mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #14062 from dustin-crossman/pr/dec_asset_update
Cypress Asset Updatepull/14099/head
Martin Kojtal
GitHub
commit
4e34abbbf1
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@ -6,4 +6,4 @@
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* MAC address is printed during WHD power up
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*/
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#define NVRAM_GENERATED_MAC_ADDRESS "macaddr=00:A0:50:6f:b2:ea"
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#define NVRAM_GENERATED_MAC_ADDRESS "macaddr=00:A0:50:08:ab:72"
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@ -1,3 +1,3 @@
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#define WHD_VERSION "v1.91.2"
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#define WHD_BRANCH "v1.91.2"
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#define WHD_DATE "2020-06-25 02:15:47 -0500"
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#define WHD_VERSION "v1.92.0"
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#define WHD_BRANCH "v1.92.0"
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#define WHD_DATE "2020-09-25 03:12:36 -0500"
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Load Diff
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@ -18,411 +18,410 @@
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#if defined(CY_STORAGE_WIFI_DATA)
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CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used))
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#endif
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const unsigned char wifi_mfg_firmware_clm_blob_image_data[7697] = {
|
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66, 76, 79, 66, 60, 0, 0, 0, 139, 244, 65, 65, 1, 0, 0, 0, 2, 0, 0,
|
||||
0, 0, 0, 0, 0, 60, 0, 0, 0, 209, 29, 0, 0, 248, 161, 152, 226, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 13, 30, 0, 0, 4, 0, 0, 0, 147, 68, 77, 121, 0, 0,
|
||||
0, 0, 67, 76, 77, 32, 68, 65, 84, 65, 0, 0, 18, 0, 2, 0, 57, 46, 49,
|
||||
48, 46, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 49, 46, 51, 54,
|
||||
46, 49, 0, 0, 0, 0, 0, 0, 0, 0, 40, 18, 0, 0, 67, 108, 109, 73, 109,
|
||||
112, 111, 114, 116, 58, 32, 49, 46, 51, 52, 46, 49, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 66, 114, 111, 97, 100, 99, 111, 109, 45, 48, 46,
|
||||
48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 132, 17, 0, 0, 16, 4,
|
||||
5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 18, 4, 5, 6,
|
||||
7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 35, 97, 0,
|
||||
15, 18, 17, 19, 10, 35, 110, 0, 16, 8, 255, 255, 0, 35, 114, 0, 15,
|
||||
19, 17, 20, 10, 48, 65, 0, 7, 8, 255, 255, 16, 48, 66, 0, 0, 14, 0,
|
||||
17, 16, 48, 67, 0, 7, 6, 12, 5, 25, 65, 67, 0, 16, 8, 255, 255, 16,
|
||||
65, 68, 0, 7, 33, 13, 39, 57, 65, 69, 0, 7, 8, 6, 7, 32, 65, 69, 1,
|
||||
7, 33, 6, 43, 32, 65, 70, 0, 7, 33, 13, 39, 57, 65, 71, 0, 7, 41, 6,
|
||||
47, 32, 65, 73, 0, 6, 15, 5, 18, 26, 65, 76, 0, 7, 33, 6, 43, 32, 65,
|
||||
77, 0, 7, 5, 12, 3, 9, 65, 78, 0, 7, 14, 6, 17, 32, 65, 79, 0, 7, 8,
|
||||
255, 255, 16, 65, 81, 0, 16, 8, 255, 255, 16, 65, 82, 0, 7, 25, 6, 25,
|
||||
0, 65, 82, 1, 7, 14, 6, 17, 0, 65, 83, 0, 6, 15, 5, 18, 26, 65, 84,
|
||||
0, 7, 33, 6, 43, 32, 65, 84, 1, 7, 37, 6, 36, 32, 65, 85, 0, 18, 42,
|
||||
22, 46, 9, 65, 85, 2, 18, 42, 21, 45, 0, 65, 87, 0, 7, 34, 6, 31, 1,
|
||||
65, 88, 0, 16, 8, 255, 255, 16, 65, 90, 0, 7, 14, 6, 17, 32, 66, 65,
|
||||
0, 7, 33, 6, 43, 32, 66, 66, 0, 7, 22, 12, 23, 25, 66, 68, 0, 7, 46,
|
||||
6, 58, 0, 66, 69, 0, 7, 33, 6, 43, 32, 66, 69, 1, 7, 37, 6, 36, 32,
|
||||
66, 70, 0, 7, 33, 13, 39, 25, 66, 71, 0, 7, 33, 6, 43, 32, 66, 71, 1,
|
||||
7, 37, 6, 36, 32, 66, 72, 0, 7, 21, 6, 22, 0, 66, 73, 0, 7, 33, 13,
|
||||
39, 25, 66, 74, 0, 7, 33, 13, 39, 57, 66, 76, 0, 16, 8, 255, 255, 16,
|
||||
66, 77, 0, 6, 15, 5, 18, 26, 66, 78, 0, 7, 8, 255, 255, 0, 66, 78, 1,
|
||||
17, 41, 20, 47, 0, 66, 79, 0, 7, 15, 12, 18, 42, 66, 81, 0, 16, 8, 255,
|
||||
255, 16, 66, 82, 0, 7, 43, 6, 52, 32, 66, 83, 0, 18, 21, 21, 22, 0,
|
||||
66, 84, 0, 7, 8, 12, 7, 56, 66, 86, 0, 16, 8, 255, 255, 16, 66, 87,
|
||||
0, 7, 45, 12, 51, 57, 66, 89, 0, 7, 33, 255, 255, 0, 66, 90, 0, 7, 15,
|
||||
12, 18, 26, 67, 65, 0, 0, 21, 0, 22, 0, 67, 65, 2, 6, 15, 5, 18, 26,
|
||||
67, 67, 0, 16, 8, 255, 255, 16, 67, 68, 0, 7, 33, 13, 39, 57, 67, 70,
|
||||
0, 7, 33, 13, 39, 25, 67, 71, 0, 7, 33, 13, 39, 57, 67, 72, 0, 7, 33,
|
||||
6, 43, 32, 67, 72, 1, 7, 37, 6, 36, 32, 67, 73, 0, 7, 33, 13, 39, 57,
|
||||
67, 75, 0, 7, 44, 12, 50, 25, 67, 76, 0, 7, 7, 6, 6, 1, 67, 77, 0, 7,
|
||||
33, 13, 39, 25, 67, 78, 0, 21, 48, 24, 53, 0, 67, 79, 0, 7, 13, 6, 11,
|
||||
32, 67, 80, 0, 16, 8, 255, 255, 16, 67, 82, 0, 7, 14, 6, 15, 32, 67,
|
||||
85, 0, 7, 8, 13, 255, 57, 67, 86, 0, 7, 33, 13, 39, 25, 67, 87, 0, 16,
|
||||
8, 255, 255, 16, 67, 88, 0, 18, 42, 21, 46, 25, 67, 89, 0, 7, 33, 6,
|
||||
43, 32, 67, 89, 1, 7, 37, 6, 36, 32, 67, 90, 0, 7, 33, 6, 43, 32, 67,
|
||||
90, 1, 7, 37, 6, 36, 32, 68, 69, 0, 7, 33, 6, 43, 32, 68, 69, 3, 7,
|
||||
37, 6, 36, 32, 68, 74, 0, 7, 8, 255, 255, 16, 68, 75, 0, 7, 33, 6, 43,
|
||||
32, 68, 75, 1, 7, 37, 6, 36, 32, 68, 77, 0, 7, 15, 12, 18, 26, 68, 79,
|
||||
0, 7, 15, 12, 18, 26, 68, 90, 0, 7, 5, 6, 4, 32, 69, 48, 0, 7, 12, 6,
|
||||
13, 32, 69, 67, 0, 7, 14, 6, 17, 32, 69, 69, 0, 7, 33, 6, 43, 32, 69,
|
||||
69, 1, 7, 37, 6, 36, 32, 69, 71, 0, 7, 41, 19, 48, 0, 69, 72, 0, 7,
|
||||
6, 12, 5, 25, 69, 82, 0, 7, 8, 255, 255, 16, 69, 83, 0, 7, 33, 6, 43,
|
||||
32, 69, 83, 1, 7, 37, 6, 36, 32, 69, 84, 0, 7, 33, 6, 43, 0, 70, 73,
|
||||
0, 7, 33, 6, 43, 32, 70, 73, 1, 7, 37, 6, 36, 32, 70, 74, 0, 7, 42,
|
||||
12, 46, 25, 70, 75, 0, 7, 33, 13, 39, 25, 70, 77, 0, 6, 15, 5, 18, 26,
|
||||
70, 79, 0, 7, 33, 13, 39, 57, 70, 82, 0, 7, 33, 6, 43, 32, 70, 82, 1,
|
||||
7, 37, 6, 36, 32, 71, 65, 0, 7, 33, 13, 39, 25, 71, 66, 0, 7, 33, 6,
|
||||
43, 32, 71, 66, 1, 7, 37, 6, 36, 32, 71, 68, 0, 7, 43, 6, 52, 0, 71,
|
||||
69, 0, 7, 33, 13, 39, 57, 71, 70, 0, 7, 33, 6, 43, 0, 71, 71, 0, 7,
|
||||
33, 13, 39, 25, 71, 72, 0, 7, 33, 13, 39, 57, 71, 73, 0, 7, 33, 13,
|
||||
39, 25, 71, 76, 0, 16, 8, 255, 255, 16, 71, 77, 0, 7, 33, 13, 39, 25,
|
||||
71, 78, 0, 7, 33, 13, 39, 57, 71, 80, 0, 7, 33, 6, 43, 0, 71, 81, 0,
|
||||
7, 33, 13, 39, 25, 71, 82, 0, 7, 33, 6, 43, 32, 71, 82, 1, 7, 37, 6,
|
||||
36, 32, 71, 83, 0, 16, 8, 255, 255, 16, 71, 84, 0, 7, 14, 11, 17, 16,
|
||||
71, 85, 0, 0, 14, 0, 17, 0, 71, 87, 0, 7, 33, 13, 39, 25, 71, 89, 0,
|
||||
7, 46, 12, 54, 25, 72, 75, 0, 18, 43, 22, 52, 0, 72, 77, 0, 16, 8, 255,
|
||||
255, 16, 72, 78, 0, 7, 47, 12, 60, 10, 72, 82, 0, 7, 33, 6, 43, 32,
|
||||
72, 82, 1, 7, 37, 6, 36, 32, 72, 84, 0, 7, 46, 12, 54, 9, 72, 85, 0,
|
||||
7, 33, 6, 43, 32, 72, 85, 1, 7, 37, 6, 36, 32, 73, 68, 0, 7, 8, 6, 7,
|
||||
0, 73, 68, 5, 7, 53, 13, 64, 25, 73, 69, 0, 7, 33, 6, 43, 32, 73, 69,
|
||||
1, 7, 37, 6, 36, 32, 73, 76, 0, 7, 5, 6, 4, 32, 73, 77, 0, 7, 33, 13,
|
||||
39, 25, 73, 78, 0, 17, 41, 20, 47, 32, 73, 79, 0, 7, 33, 13, 39, 25,
|
||||
73, 81, 0, 7, 33, 13, 39, 25, 73, 82, 0, 7, 8, 13, 255, 57, 73, 83,
|
||||
0, 7, 33, 6, 43, 32, 73, 83, 1, 7, 37, 6, 36, 32, 73, 84, 0, 7, 33,
|
||||
6, 43, 32, 73, 84, 1, 7, 37, 6, 36, 32, 74, 48, 0, 7, 38, 15, 42, 0,
|
||||
74, 49, 0, 14, 12, 255, 255, 0, 74, 50, 0, 14, 5, 255, 255, 0, 74, 51,
|
||||
0, 14, 38, 255, 255, 0, 74, 52, 0, 14, 24, 255, 255, 0, 74, 53, 0, 14,
|
||||
27, 255, 255, 0, 74, 54, 0, 14, 28, 255, 255, 0, 74, 55, 0, 14, 29,
|
||||
255, 255, 0, 74, 56, 0, 14, 40, 255, 255, 0, 74, 57, 0, 7, 28, 15, 27,
|
||||
0, 74, 69, 0, 7, 33, 13, 39, 25, 74, 77, 0, 7, 46, 13, 59, 25, 74, 79,
|
||||
0, 7, 1, 6, 0, 32, 74, 80, 0, 14, 39, 16, 40, 1, 74, 80, 1, 14, 28,
|
||||
15, 27, 0, 74, 80, 3, 14, 39, 15, 41, 1, 75, 65, 0, 20, 17, 23, 16,
|
||||
3, 75, 67, 0, 20, 46, 23, 54, 3, 75, 68, 0, 7, 49, 6, 56, 3, 75, 69,
|
||||
0, 7, 33, 6, 38, 33, 75, 71, 0, 7, 33, 13, 39, 25, 75, 72, 0, 7, 43,
|
||||
6, 52, 0, 75, 73, 0, 18, 42, 21, 46, 25, 75, 75, 0, 20, 8, 23, 7, 0,
|
||||
75, 77, 0, 7, 33, 13, 39, 25, 75, 78, 0, 7, 15, 12, 18, 26, 75, 80,
|
||||
0, 16, 8, 255, 255, 16, 75, 82, 0, 16, 53, 18, 44, 0, 75, 82, 4, 21,
|
||||
30, 24, 28, 17, 75, 87, 0, 7, 8, 6, 7, 32, 75, 87, 1, 7, 5, 6, 4, 32,
|
||||
75, 88, 0, 7, 46, 6, 54, 3, 75, 89, 0, 0, 14, 0, 17, 0, 75, 90, 0, 7,
|
||||
36, 12, 34, 8, 76, 65, 0, 7, 34, 6, 31, 1, 76, 66, 0, 7, 46, 6, 58,
|
||||
32, 76, 67, 0, 7, 15, 12, 18, 26, 76, 73, 0, 7, 33, 6, 43, 0, 76, 73,
|
||||
1, 7, 37, 6, 36, 0, 76, 75, 0, 17, 43, 20, 52, 0, 76, 82, 0, 7, 43,
|
||||
19, 50, 17, 76, 83, 0, 7, 33, 6, 43, 0, 76, 84, 0, 7, 33, 6, 43, 32,
|
||||
76, 84, 1, 7, 37, 6, 36, 32, 76, 85, 0, 7, 33, 6, 43, 32, 76, 85, 1,
|
||||
7, 37, 6, 36, 32, 76, 86, 0, 7, 33, 6, 43, 32, 76, 86, 1, 7, 37, 6,
|
||||
36, 32, 76, 89, 0, 7, 8, 14, 255, 16, 77, 65, 0, 7, 12, 19, 12, 32,
|
||||
77, 65, 1, 7, 5, 19, 4, 32, 77, 67, 0, 7, 33, 6, 43, 0, 77, 68, 0, 7,
|
||||
33, 6, 43, 32, 77, 69, 0, 7, 33, 6, 43, 32, 77, 70, 0, 7, 45, 12, 51,
|
||||
25, 77, 71, 0, 7, 33, 13, 39, 57, 77, 72, 0, 16, 8, 255, 255, 16, 77,
|
||||
75, 0, 7, 33, 6, 43, 32, 77, 76, 0, 7, 33, 13, 39, 25, 77, 77, 0, 7,
|
||||
33, 13, 39, 25, 77, 78, 0, 7, 14, 11, 17, 32, 77, 79, 0, 7, 49, 6, 58,
|
||||
0, 77, 80, 0, 6, 15, 5, 18, 26, 77, 81, 0, 7, 33, 6, 43, 0, 77, 82,
|
||||
0, 7, 33, 6, 43, 0, 77, 83, 0, 7, 33, 13, 39, 57, 77, 84, 0, 7, 33,
|
||||
6, 43, 32, 77, 84, 1, 7, 37, 6, 36, 32, 77, 85, 0, 7, 33, 6, 43, 32,
|
||||
77, 86, 0, 7, 10, 6, 10, 32, 77, 87, 0, 7, 46, 6, 58, 32, 77, 88, 0,
|
||||
7, 5, 6, 4, 0, 77, 88, 1, 7, 21, 6, 22, 0, 77, 89, 0, 17, 41, 20, 47,
|
||||
0, 77, 90, 0, 7, 16, 12, 14, 26, 78, 65, 0, 7, 16, 12, 14, 26, 78, 67,
|
||||
0, 7, 33, 13, 39, 25, 78, 69, 0, 7, 33, 13, 39, 25, 78, 70, 0, 7, 42,
|
||||
11, 45, 0, 78, 71, 0, 7, 26, 13, 26, 57, 78, 73, 0, 7, 14, 6, 17, 32,
|
||||
78, 76, 0, 7, 33, 6, 43, 32, 78, 76, 1, 7, 37, 6, 36, 32, 78, 79, 0,
|
||||
7, 33, 6, 43, 32, 78, 79, 1, 7, 37, 6, 36, 32, 78, 80, 0, 17, 9, 20,
|
||||
8, 0, 78, 82, 0, 7, 33, 13, 39, 25, 78, 85, 0, 7, 14, 255, 255, 16,
|
||||
78, 90, 0, 7, 43, 6, 52, 32, 79, 77, 0, 7, 33, 6, 43, 32, 80, 65, 0,
|
||||
17, 0, 20, 24, 32, 80, 69, 0, 7, 14, 6, 17, 32, 80, 70, 0, 7, 33, 13,
|
||||
39, 25, 80, 71, 0, 7, 2, 6, 0, 0, 80, 72, 0, 7, 43, 6, 52, 32, 80, 75,
|
||||
0, 7, 49, 11, 55, 33, 80, 76, 0, 7, 33, 6, 43, 32, 80, 76, 1, 7, 37,
|
||||
6, 36, 32, 80, 77, 0, 7, 33, 13, 39, 25, 80, 78, 0, 16, 8, 255, 255,
|
||||
16, 80, 82, 0, 0, 14, 0, 17, 0, 80, 83, 0, 16, 8, 255, 255, 0, 80, 84,
|
||||
0, 7, 33, 6, 43, 32, 80, 84, 1, 7, 37, 6, 36, 32, 80, 87, 0, 7, 15,
|
||||
12, 18, 26, 80, 89, 0, 7, 46, 6, 58, 0, 80, 89, 1, 7, 43, 6, 52, 0,
|
||||
81, 49, 0, 2, 8, 2, 7, 0, 81, 50, 0, 0, 31, 0, 29, 0, 81, 65, 0, 7,
|
||||
49, 13, 57, 57, 82, 69, 0, 7, 33, 6, 43, 0, 82, 79, 0, 7, 33, 6, 43,
|
||||
32, 82, 79, 1, 7, 37, 6, 36, 32, 82, 83, 0, 7, 33, 6, 43, 32, 82, 85,
|
||||
0, 7, 8, 255, 255, 0, 82, 85, 5, 7, 11, 11, 9, 1, 82, 87, 0, 7, 33,
|
||||
13, 39, 57, 83, 65, 0, 7, 34, 6, 32, 33, 83, 66, 0, 7, 8, 255, 255,
|
||||
16, 83, 67, 0, 7, 45, 12, 51, 25, 83, 68, 0, 7, 8, 13, 255, 57, 83,
|
||||
69, 0, 7, 33, 6, 43, 32, 83, 69, 1, 7, 37, 6, 36, 32, 83, 71, 0, 17,
|
||||
44, 20, 50, 33, 83, 72, 0, 16, 8, 255, 255, 16, 83, 73, 0, 7, 33, 6,
|
||||
43, 32, 83, 73, 1, 7, 37, 6, 36, 32, 83, 74, 0, 16, 8, 255, 255, 16,
|
||||
83, 75, 0, 7, 33, 6, 43, 32, 83, 75, 1, 7, 37, 6, 36, 32, 83, 76, 0,
|
||||
7, 33, 13, 39, 25, 83, 77, 0, 7, 33, 13, 39, 25, 83, 78, 0, 7, 33, 6,
|
||||
43, 32, 83, 79, 0, 7, 8, 255, 255, 16, 83, 82, 0, 7, 33, 13, 39, 25,
|
||||
83, 84, 0, 7, 33, 13, 39, 25, 83, 86, 0, 7, 14, 11, 17, 32, 83, 88,
|
||||
0, 16, 8, 255, 255, 16, 83, 89, 0, 16, 8, 255, 255, 16, 83, 90, 0, 7,
|
||||
33, 13, 39, 25, 84, 65, 0, 16, 8, 255, 255, 16, 84, 67, 0, 7, 33, 13,
|
||||
39, 25, 84, 68, 0, 7, 33, 13, 39, 25, 84, 70, 0, 7, 33, 13, 39, 25,
|
||||
84, 71, 0, 7, 33, 13, 39, 25, 84, 72, 0, 7, 43, 6, 52, 32, 84, 74, 0,
|
||||
7, 33, 13, 39, 25, 84, 75, 0, 16, 8, 255, 255, 16, 84, 76, 0, 7, 33,
|
||||
13, 39, 57, 84, 77, 0, 7, 33, 13, 39, 25, 84, 78, 0, 7, 5, 6, 4, 32,
|
||||
84, 79, 0, 7, 8, 255, 255, 16, 84, 82, 0, 7, 5, 6, 4, 32, 84, 82, 7,
|
||||
7, 33, 13, 39, 57, 84, 84, 0, 7, 43, 6, 52, 32, 84, 86, 0, 7, 8, 255,
|
||||
255, 16, 84, 87, 0, 0, 50, 0, 63, 0, 84, 87, 2, 0, 51, 0, 61, 0, 84,
|
||||
90, 0, 7, 33, 13, 39, 25, 85, 65, 0, 7, 8, 255, 255, 0, 85, 71, 0, 7,
|
||||
34, 6, 31, 33, 85, 77, 0, 0, 14, 0, 17, 0, 85, 83, 0, 5, 32, 4, 30,
|
||||
10, 85, 83, 25, 11, 8, 9, 7, 0, 85, 83, 26, 4, 8, 1, 7, 0, 85, 89, 0,
|
||||
18, 43, 21, 52, 0, 85, 90, 0, 7, 33, 13, 39, 25, 86, 65, 0, 7, 33, 6,
|
||||
43, 0, 86, 67, 0, 7, 15, 12, 18, 26, 86, 69, 0, 7, 41, 6, 47, 0, 86,
|
||||
71, 0, 7, 33, 6, 43, 0, 86, 73, 0, 0, 14, 0, 17, 0, 86, 78, 0, 7, 5,
|
||||
6, 4, 0, 86, 85, 0, 7, 43, 12, 49, 25, 87, 70, 0, 7, 33, 12, 43, 25,
|
||||
87, 83, 0, 7, 43, 11, 49, 17, 88, 48, 0, 3, 20, 0, 21, 0, 88, 49, 0,
|
||||
7, 41, 6, 47, 0, 88, 50, 0, 19, 3, 6, 2, 0, 88, 51, 0, 7, 33, 6, 35,
|
||||
32, 88, 65, 0, 7, 3, 255, 255, 0, 88, 66, 0, 0, 23, 255, 255, 0, 88,
|
||||
82, 0, 1, 52, 3, 62, 0, 88, 83, 0, 12, 4, 10, 1, 33, 88, 84, 0, 11,
|
||||
8, 9, 7, 32, 88, 85, 0, 8, 37, 7, 37, 32, 88, 86, 0, 10, 8, 8, 7, 32,
|
||||
88, 87, 0, 20, 35, 23, 33, 34, 88, 88, 0, 9, 33, 255, 255, 32, 88, 89,
|
||||
0, 7, 33, 6, 43, 32, 88, 90, 0, 13, 8, 255, 255, 32, 89, 49, 0, 0, 14,
|
||||
255, 255, 16, 89, 50, 0, 0, 14, 255, 255, 16, 89, 51, 0, 0, 14, 255,
|
||||
255, 16, 89, 52, 0, 0, 14, 255, 255, 16, 89, 53, 0, 0, 14, 255, 255,
|
||||
16, 89, 54, 0, 0, 14, 255, 255, 16, 89, 55, 0, 0, 14, 255, 255, 16,
|
||||
89, 69, 0, 7, 45, 12, 51, 25, 89, 84, 0, 7, 33, 6, 43, 0, 89, 89, 0,
|
||||
16, 8, 255, 255, 0, 90, 49, 0, 16, 8, 255, 255, 16, 90, 50, 0, 16, 8,
|
||||
255, 255, 16, 90, 51, 0, 16, 8, 255, 255, 16, 90, 52, 0, 16, 8, 255,
|
||||
255, 16, 90, 53, 0, 16, 8, 255, 255, 16, 90, 54, 0, 16, 8, 255, 255,
|
||||
16, 90, 55, 0, 16, 8, 255, 255, 16, 90, 56, 0, 16, 8, 255, 255, 16,
|
||||
90, 57, 0, 16, 8, 255, 255, 16, 90, 65, 0, 7, 33, 6, 43, 32, 90, 77,
|
||||
0, 17, 41, 20, 47, 0, 90, 87, 0, 7, 33, 13, 39, 57, 38, 62, 8, 102,
|
||||
142, 8, 151, 175, 8, 16, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
|
||||
17, 18, 19, 18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
|
||||
19, 20, 21, 4, 5, 76, 0, 3, 76, 6, 3, 76, 10, 3, 76, 11, 3, 66, 12,
|
||||
3, 1, 4, 62, 0, 0, 66, 4, 0, 62, 9, 0, 58, 10, 0, 4, 3, 58, 0, 3, 66,
|
||||
7, 3, 58, 12, 3, 1, 5, 42, 0, 0, 50, 3, 0, 60, 8, 0, 54, 9, 0, 46, 10,
|
||||
0, 4, 1, 56, 2, 3, 1, 1, 32, 1, 0, 4, 5, 58, 0, 3, 68, 6, 3, 74, 10,
|
||||
3, 68, 11, 3, 66, 12, 3, 1, 5, 48, 0, 0, 58, 3, 0, 66, 8, 0, 58, 9,
|
||||
0, 54, 10, 0, 4, 3, 86, 0, 0, 126, 7, 0, 86, 12, 0, 1, 3, 78, 0, 1,
|
||||
126, 5, 1, 78, 10, 1, 4, 5, 70, 0, 0, 80, 6, 0, 80, 10, 0, 80, 11, 0,
|
||||
72, 12, 0, 1, 5, 58, 0, 1, 68, 3, 1, 80, 8, 1, 68, 9, 1, 60, 10, 1,
|
||||
4, 1, 64, 4, 0, 1, 1, 64, 2, 1, 4, 1, 76, 4, 3, 1, 1, 72, 2, 0, 4, 4,
|
||||
60, 0, 3, 64, 8, 3, 44, 13, 3, 44, 16, 3, 1, 3, 40, 0, 0, 52, 5, 0,
|
||||
46, 11, 0, 0, 2, 64, 3, 3, 46, 16, 3, 4, 2, 64, 2, 0, 44, 14, 0, 1,
|
||||
3, 54, 0, 1, 64, 6, 1, 52, 12, 1, 6, 1, 76, 4, 0, 3, 1, 76, 2, 1, 6,
|
||||
const unsigned char wifi_mfg_firmware_clm_blob_data[7697] = {
|
||||
66, 76, 79, 66, 60, 0, 0, 0, 77, 58, 34, 16, 1, 0, 0, 0, 2, 0, 0, 0,
|
||||
0, 0, 0, 0, 60, 0, 0, 0, 209, 29, 0, 0, 69, 179, 25, 223, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 13, 30, 0, 0, 4, 0, 0, 0, 147, 68, 77, 121, 0, 0, 0, 0,
|
||||
67, 76, 77, 32, 68, 65, 84, 65, 0, 0, 18, 0, 2, 0, 57, 46, 49, 48, 46,
|
||||
48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 49, 46, 51, 54, 46, 49,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 40, 18, 0, 0, 67, 108, 109, 73, 109, 112, 111,
|
||||
114, 116, 58, 32, 49, 46, 51, 52, 46, 49, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 66, 114, 111, 97, 100, 99, 111, 109, 45, 48, 46, 48, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 132, 17, 0, 0, 16, 4, 5, 6, 7,
|
||||
8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 18, 4, 5, 6, 7, 8, 9,
|
||||
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 35, 97, 0, 15, 18, 17,
|
||||
19, 10, 35, 110, 0, 16, 8, 255, 255, 0, 35, 114, 0, 15, 19, 17, 20,
|
||||
10, 48, 65, 0, 7, 8, 255, 255, 16, 48, 66, 0, 0, 14, 0, 17, 16, 48,
|
||||
67, 0, 7, 6, 12, 5, 25, 65, 67, 0, 16, 8, 255, 255, 16, 65, 68, 0, 7,
|
||||
33, 13, 39, 57, 65, 69, 0, 7, 8, 6, 7, 32, 65, 69, 1, 7, 33, 6, 43,
|
||||
32, 65, 70, 0, 7, 33, 13, 39, 57, 65, 71, 0, 7, 41, 6, 47, 32, 65, 73,
|
||||
0, 6, 15, 5, 18, 26, 65, 76, 0, 7, 33, 6, 43, 32, 65, 77, 0, 7, 5, 12,
|
||||
3, 9, 65, 78, 0, 7, 14, 6, 17, 32, 65, 79, 0, 7, 8, 255, 255, 16, 65,
|
||||
81, 0, 16, 8, 255, 255, 16, 65, 82, 0, 7, 25, 6, 25, 0, 65, 82, 1, 7,
|
||||
14, 6, 17, 0, 65, 83, 0, 6, 15, 5, 18, 26, 65, 84, 0, 7, 33, 6, 43,
|
||||
32, 65, 84, 1, 7, 37, 6, 36, 32, 65, 85, 0, 18, 42, 22, 46, 9, 65, 85,
|
||||
2, 18, 42, 21, 45, 0, 65, 87, 0, 7, 34, 6, 31, 1, 65, 88, 0, 16, 8,
|
||||
255, 255, 16, 65, 90, 0, 7, 14, 6, 17, 32, 66, 65, 0, 7, 33, 6, 43,
|
||||
32, 66, 66, 0, 7, 22, 12, 23, 25, 66, 68, 0, 7, 46, 6, 58, 0, 66, 69,
|
||||
0, 7, 33, 6, 43, 32, 66, 69, 1, 7, 37, 6, 36, 32, 66, 70, 0, 7, 33,
|
||||
13, 39, 25, 66, 71, 0, 7, 33, 6, 43, 32, 66, 71, 1, 7, 37, 6, 36, 32,
|
||||
66, 72, 0, 7, 21, 6, 22, 0, 66, 73, 0, 7, 33, 13, 39, 25, 66, 74, 0,
|
||||
7, 33, 13, 39, 57, 66, 76, 0, 16, 8, 255, 255, 16, 66, 77, 0, 6, 15,
|
||||
5, 18, 26, 66, 78, 0, 7, 8, 255, 255, 0, 66, 78, 1, 17, 41, 20, 47,
|
||||
0, 66, 79, 0, 7, 15, 12, 18, 42, 66, 81, 0, 16, 8, 255, 255, 16, 66,
|
||||
82, 0, 7, 43, 6, 52, 32, 66, 83, 0, 18, 21, 21, 22, 0, 66, 84, 0, 7,
|
||||
8, 12, 7, 56, 66, 86, 0, 16, 8, 255, 255, 16, 66, 87, 0, 7, 45, 12,
|
||||
51, 57, 66, 89, 0, 7, 33, 255, 255, 0, 66, 90, 0, 7, 15, 12, 18, 26,
|
||||
67, 65, 0, 0, 21, 0, 22, 0, 67, 65, 2, 6, 15, 5, 18, 26, 67, 67, 0,
|
||||
16, 8, 255, 255, 16, 67, 68, 0, 7, 33, 13, 39, 57, 67, 70, 0, 7, 33,
|
||||
13, 39, 25, 67, 71, 0, 7, 33, 13, 39, 57, 67, 72, 0, 7, 33, 6, 43, 32,
|
||||
67, 72, 1, 7, 37, 6, 36, 32, 67, 73, 0, 7, 33, 13, 39, 57, 67, 75, 0,
|
||||
7, 44, 12, 50, 25, 67, 76, 0, 7, 7, 6, 6, 1, 67, 77, 0, 7, 33, 13, 39,
|
||||
25, 67, 78, 0, 21, 48, 24, 53, 0, 67, 79, 0, 7, 13, 6, 11, 32, 67, 80,
|
||||
0, 16, 8, 255, 255, 16, 67, 82, 0, 7, 14, 6, 15, 32, 67, 85, 0, 7, 8,
|
||||
13, 255, 57, 67, 86, 0, 7, 33, 13, 39, 25, 67, 87, 0, 16, 8, 255, 255,
|
||||
16, 67, 88, 0, 18, 42, 21, 46, 25, 67, 89, 0, 7, 33, 6, 43, 32, 67,
|
||||
89, 1, 7, 37, 6, 36, 32, 67, 90, 0, 7, 33, 6, 43, 32, 67, 90, 1, 7,
|
||||
37, 6, 36, 32, 68, 69, 0, 7, 33, 6, 43, 32, 68, 69, 3, 7, 37, 6, 36,
|
||||
32, 68, 74, 0, 7, 8, 255, 255, 16, 68, 75, 0, 7, 33, 6, 43, 32, 68,
|
||||
75, 1, 7, 37, 6, 36, 32, 68, 77, 0, 7, 15, 12, 18, 26, 68, 79, 0, 7,
|
||||
15, 12, 18, 26, 68, 90, 0, 7, 5, 6, 4, 32, 69, 48, 0, 7, 12, 6, 13,
|
||||
32, 69, 67, 0, 7, 14, 6, 17, 32, 69, 69, 0, 7, 33, 6, 43, 32, 69, 69,
|
||||
1, 7, 37, 6, 36, 32, 69, 71, 0, 7, 41, 19, 48, 0, 69, 72, 0, 7, 6, 12,
|
||||
5, 25, 69, 82, 0, 7, 8, 255, 255, 16, 69, 83, 0, 7, 33, 6, 43, 32, 69,
|
||||
83, 1, 7, 37, 6, 36, 32, 69, 84, 0, 7, 33, 6, 43, 0, 70, 73, 0, 7, 33,
|
||||
6, 43, 32, 70, 73, 1, 7, 37, 6, 36, 32, 70, 74, 0, 7, 42, 12, 46, 25,
|
||||
70, 75, 0, 7, 33, 13, 39, 25, 70, 77, 0, 6, 15, 5, 18, 26, 70, 79, 0,
|
||||
7, 33, 13, 39, 57, 70, 82, 0, 7, 33, 6, 43, 32, 70, 82, 1, 7, 37, 6,
|
||||
36, 32, 71, 65, 0, 7, 33, 13, 39, 25, 71, 66, 0, 7, 33, 6, 43, 32, 71,
|
||||
66, 1, 7, 37, 6, 36, 32, 71, 68, 0, 7, 43, 6, 52, 0, 71, 69, 0, 7, 33,
|
||||
13, 39, 57, 71, 70, 0, 7, 33, 6, 43, 0, 71, 71, 0, 7, 33, 13, 39, 25,
|
||||
71, 72, 0, 7, 33, 13, 39, 57, 71, 73, 0, 7, 33, 13, 39, 25, 71, 76,
|
||||
0, 16, 8, 255, 255, 16, 71, 77, 0, 7, 33, 13, 39, 25, 71, 78, 0, 7,
|
||||
33, 13, 39, 57, 71, 80, 0, 7, 33, 6, 43, 0, 71, 81, 0, 7, 33, 13, 39,
|
||||
25, 71, 82, 0, 7, 33, 6, 43, 32, 71, 82, 1, 7, 37, 6, 36, 32, 71, 83,
|
||||
0, 16, 8, 255, 255, 16, 71, 84, 0, 7, 14, 11, 17, 16, 71, 85, 0, 0,
|
||||
14, 0, 17, 0, 71, 87, 0, 7, 33, 13, 39, 25, 71, 89, 0, 7, 46, 12, 54,
|
||||
25, 72, 75, 0, 18, 43, 22, 52, 0, 72, 77, 0, 16, 8, 255, 255, 16, 72,
|
||||
78, 0, 7, 47, 12, 60, 10, 72, 82, 0, 7, 33, 6, 43, 32, 72, 82, 1, 7,
|
||||
37, 6, 36, 32, 72, 84, 0, 7, 46, 12, 54, 9, 72, 85, 0, 7, 33, 6, 43,
|
||||
32, 72, 85, 1, 7, 37, 6, 36, 32, 73, 68, 0, 7, 8, 6, 7, 0, 73, 68, 5,
|
||||
7, 53, 13, 64, 25, 73, 69, 0, 7, 33, 6, 43, 32, 73, 69, 1, 7, 37, 6,
|
||||
36, 32, 73, 76, 0, 7, 5, 6, 4, 32, 73, 77, 0, 7, 33, 13, 39, 25, 73,
|
||||
78, 0, 17, 41, 20, 47, 32, 73, 79, 0, 7, 33, 13, 39, 25, 73, 81, 0,
|
||||
7, 33, 13, 39, 25, 73, 82, 0, 7, 8, 13, 255, 57, 73, 83, 0, 7, 33, 6,
|
||||
43, 32, 73, 83, 1, 7, 37, 6, 36, 32, 73, 84, 0, 7, 33, 6, 43, 32, 73,
|
||||
84, 1, 7, 37, 6, 36, 32, 74, 48, 0, 7, 38, 15, 42, 0, 74, 49, 0, 14,
|
||||
12, 255, 255, 0, 74, 50, 0, 14, 5, 255, 255, 0, 74, 51, 0, 14, 38, 255,
|
||||
255, 0, 74, 52, 0, 14, 24, 255, 255, 0, 74, 53, 0, 14, 27, 255, 255,
|
||||
0, 74, 54, 0, 14, 28, 255, 255, 0, 74, 55, 0, 14, 29, 255, 255, 0, 74,
|
||||
56, 0, 14, 40, 255, 255, 0, 74, 57, 0, 7, 28, 15, 27, 0, 74, 69, 0,
|
||||
7, 33, 13, 39, 25, 74, 77, 0, 7, 46, 13, 59, 25, 74, 79, 0, 7, 1, 6,
|
||||
0, 32, 74, 80, 0, 14, 39, 16, 40, 1, 74, 80, 1, 14, 28, 15, 27, 0, 74,
|
||||
80, 3, 14, 39, 15, 41, 1, 75, 65, 0, 20, 17, 23, 16, 3, 75, 67, 0, 20,
|
||||
46, 23, 54, 3, 75, 68, 0, 7, 49, 6, 56, 3, 75, 69, 0, 7, 33, 6, 38,
|
||||
33, 75, 71, 0, 7, 33, 13, 39, 25, 75, 72, 0, 7, 43, 6, 52, 0, 75, 73,
|
||||
0, 18, 42, 21, 46, 25, 75, 75, 0, 20, 8, 23, 7, 0, 75, 77, 0, 7, 33,
|
||||
13, 39, 25, 75, 78, 0, 7, 15, 12, 18, 26, 75, 80, 0, 16, 8, 255, 255,
|
||||
16, 75, 82, 0, 16, 53, 18, 44, 0, 75, 82, 4, 21, 30, 24, 28, 17, 75,
|
||||
87, 0, 7, 8, 6, 7, 32, 75, 87, 1, 7, 5, 6, 4, 32, 75, 88, 0, 7, 46,
|
||||
6, 54, 3, 75, 89, 0, 0, 14, 0, 17, 0, 75, 90, 0, 7, 36, 12, 34, 8, 76,
|
||||
65, 0, 7, 34, 6, 31, 1, 76, 66, 0, 7, 46, 6, 58, 32, 76, 67, 0, 7, 15,
|
||||
12, 18, 26, 76, 73, 0, 7, 33, 6, 43, 0, 76, 73, 1, 7, 37, 6, 36, 0,
|
||||
76, 75, 0, 17, 43, 20, 52, 0, 76, 82, 0, 7, 43, 19, 50, 17, 76, 83,
|
||||
0, 7, 33, 6, 43, 0, 76, 84, 0, 7, 33, 6, 43, 32, 76, 84, 1, 7, 37, 6,
|
||||
36, 32, 76, 85, 0, 7, 33, 6, 43, 32, 76, 85, 1, 7, 37, 6, 36, 32, 76,
|
||||
86, 0, 7, 33, 6, 43, 32, 76, 86, 1, 7, 37, 6, 36, 32, 76, 89, 0, 7,
|
||||
8, 14, 255, 16, 77, 65, 0, 7, 12, 19, 12, 32, 77, 65, 1, 7, 5, 19, 4,
|
||||
32, 77, 67, 0, 7, 33, 6, 43, 0, 77, 68, 0, 7, 33, 6, 43, 32, 77, 69,
|
||||
0, 7, 33, 6, 43, 32, 77, 70, 0, 7, 45, 12, 51, 25, 77, 71, 0, 7, 33,
|
||||
13, 39, 57, 77, 72, 0, 16, 8, 255, 255, 16, 77, 75, 0, 7, 33, 6, 43,
|
||||
32, 77, 76, 0, 7, 33, 13, 39, 25, 77, 77, 0, 7, 33, 13, 39, 25, 77,
|
||||
78, 0, 7, 14, 11, 17, 32, 77, 79, 0, 7, 49, 6, 58, 0, 77, 80, 0, 6,
|
||||
15, 5, 18, 26, 77, 81, 0, 7, 33, 6, 43, 0, 77, 82, 0, 7, 33, 6, 43,
|
||||
0, 77, 83, 0, 7, 33, 13, 39, 57, 77, 84, 0, 7, 33, 6, 43, 32, 77, 84,
|
||||
1, 7, 37, 6, 36, 32, 77, 85, 0, 7, 33, 6, 43, 32, 77, 86, 0, 7, 10,
|
||||
6, 10, 32, 77, 87, 0, 7, 46, 6, 58, 32, 77, 88, 0, 7, 5, 6, 4, 0, 77,
|
||||
88, 1, 7, 21, 6, 22, 0, 77, 89, 0, 17, 41, 20, 47, 0, 77, 90, 0, 7,
|
||||
16, 12, 14, 26, 78, 65, 0, 7, 16, 12, 14, 26, 78, 67, 0, 7, 33, 13,
|
||||
39, 25, 78, 69, 0, 7, 33, 13, 39, 25, 78, 70, 0, 7, 42, 11, 45, 0, 78,
|
||||
71, 0, 7, 26, 13, 26, 57, 78, 73, 0, 7, 14, 6, 17, 32, 78, 76, 0, 7,
|
||||
33, 6, 43, 32, 78, 76, 1, 7, 37, 6, 36, 32, 78, 79, 0, 7, 33, 6, 43,
|
||||
32, 78, 79, 1, 7, 37, 6, 36, 32, 78, 80, 0, 17, 9, 20, 8, 0, 78, 82,
|
||||
0, 7, 33, 13, 39, 25, 78, 85, 0, 7, 14, 255, 255, 16, 78, 90, 0, 7,
|
||||
43, 6, 52, 32, 79, 77, 0, 7, 33, 6, 43, 32, 80, 65, 0, 17, 0, 20, 24,
|
||||
32, 80, 69, 0, 7, 14, 6, 17, 32, 80, 70, 0, 7, 33, 13, 39, 25, 80, 71,
|
||||
0, 7, 2, 6, 0, 0, 80, 72, 0, 7, 43, 6, 52, 32, 80, 75, 0, 7, 49, 11,
|
||||
55, 33, 80, 76, 0, 7, 33, 6, 43, 32, 80, 76, 1, 7, 37, 6, 36, 32, 80,
|
||||
77, 0, 7, 33, 13, 39, 25, 80, 78, 0, 16, 8, 255, 255, 16, 80, 82, 0,
|
||||
0, 14, 0, 17, 0, 80, 83, 0, 16, 8, 255, 255, 0, 80, 84, 0, 7, 33, 6,
|
||||
43, 32, 80, 84, 1, 7, 37, 6, 36, 32, 80, 87, 0, 7, 15, 12, 18, 26, 80,
|
||||
89, 0, 7, 46, 6, 58, 0, 80, 89, 1, 7, 43, 6, 52, 0, 81, 49, 0, 2, 8,
|
||||
2, 7, 0, 81, 50, 0, 0, 31, 0, 29, 0, 81, 65, 0, 7, 49, 13, 57, 57, 82,
|
||||
69, 0, 7, 33, 6, 43, 0, 82, 79, 0, 7, 33, 6, 43, 32, 82, 79, 1, 7, 37,
|
||||
6, 36, 32, 82, 83, 0, 7, 33, 6, 43, 32, 82, 85, 0, 7, 8, 255, 255, 0,
|
||||
82, 85, 5, 7, 11, 11, 9, 1, 82, 87, 0, 7, 33, 13, 39, 57, 83, 65, 0,
|
||||
7, 34, 6, 32, 33, 83, 66, 0, 7, 8, 255, 255, 16, 83, 67, 0, 7, 45, 12,
|
||||
51, 25, 83, 68, 0, 7, 8, 13, 255, 57, 83, 69, 0, 7, 33, 6, 43, 32, 83,
|
||||
69, 1, 7, 37, 6, 36, 32, 83, 71, 0, 17, 44, 20, 50, 33, 83, 72, 0, 16,
|
||||
8, 255, 255, 16, 83, 73, 0, 7, 33, 6, 43, 32, 83, 73, 1, 7, 37, 6, 36,
|
||||
32, 83, 74, 0, 16, 8, 255, 255, 16, 83, 75, 0, 7, 33, 6, 43, 32, 83,
|
||||
75, 1, 7, 37, 6, 36, 32, 83, 76, 0, 7, 33, 13, 39, 25, 83, 77, 0, 7,
|
||||
33, 13, 39, 25, 83, 78, 0, 7, 33, 6, 43, 32, 83, 79, 0, 7, 8, 255, 255,
|
||||
16, 83, 82, 0, 7, 33, 13, 39, 25, 83, 84, 0, 7, 33, 13, 39, 25, 83,
|
||||
86, 0, 7, 14, 11, 17, 32, 83, 88, 0, 16, 8, 255, 255, 16, 83, 89, 0,
|
||||
16, 8, 255, 255, 16, 83, 90, 0, 7, 33, 13, 39, 25, 84, 65, 0, 16, 8,
|
||||
255, 255, 16, 84, 67, 0, 7, 33, 13, 39, 25, 84, 68, 0, 7, 33, 13, 39,
|
||||
25, 84, 70, 0, 7, 33, 13, 39, 25, 84, 71, 0, 7, 33, 13, 39, 25, 84,
|
||||
72, 0, 7, 43, 6, 52, 32, 84, 74, 0, 7, 33, 13, 39, 25, 84, 75, 0, 16,
|
||||
8, 255, 255, 16, 84, 76, 0, 7, 33, 13, 39, 57, 84, 77, 0, 7, 33, 13,
|
||||
39, 25, 84, 78, 0, 7, 5, 6, 4, 32, 84, 79, 0, 7, 8, 255, 255, 16, 84,
|
||||
82, 0, 7, 5, 6, 4, 32, 84, 82, 7, 7, 33, 13, 39, 57, 84, 84, 0, 7, 43,
|
||||
6, 52, 32, 84, 86, 0, 7, 8, 255, 255, 16, 84, 87, 0, 0, 50, 0, 63, 0,
|
||||
84, 87, 2, 0, 51, 0, 61, 0, 84, 90, 0, 7, 33, 13, 39, 25, 85, 65, 0,
|
||||
7, 8, 255, 255, 0, 85, 71, 0, 7, 34, 6, 31, 33, 85, 77, 0, 0, 14, 0,
|
||||
17, 0, 85, 83, 0, 5, 32, 4, 30, 10, 85, 83, 25, 11, 8, 9, 7, 0, 85,
|
||||
83, 26, 4, 8, 1, 7, 0, 85, 89, 0, 18, 43, 21, 52, 0, 85, 90, 0, 7, 33,
|
||||
13, 39, 25, 86, 65, 0, 7, 33, 6, 43, 0, 86, 67, 0, 7, 15, 12, 18, 26,
|
||||
86, 69, 0, 7, 41, 6, 47, 0, 86, 71, 0, 7, 33, 6, 43, 0, 86, 73, 0, 0,
|
||||
14, 0, 17, 0, 86, 78, 0, 7, 5, 6, 4, 0, 86, 85, 0, 7, 43, 12, 49, 25,
|
||||
87, 70, 0, 7, 33, 12, 43, 25, 87, 83, 0, 7, 43, 11, 49, 17, 88, 48,
|
||||
0, 3, 20, 0, 21, 0, 88, 49, 0, 7, 41, 6, 47, 0, 88, 50, 0, 19, 3, 6,
|
||||
2, 0, 88, 51, 0, 7, 33, 6, 35, 32, 88, 65, 0, 7, 3, 255, 255, 0, 88,
|
||||
66, 0, 0, 23, 255, 255, 0, 88, 82, 0, 1, 52, 3, 62, 0, 88, 83, 0, 12,
|
||||
4, 10, 1, 33, 88, 84, 0, 11, 8, 9, 7, 32, 88, 85, 0, 8, 37, 7, 37, 32,
|
||||
88, 86, 0, 10, 8, 8, 7, 32, 88, 87, 0, 20, 35, 23, 33, 34, 88, 88, 0,
|
||||
9, 33, 255, 255, 32, 88, 89, 0, 7, 33, 6, 43, 32, 88, 90, 0, 13, 8,
|
||||
255, 255, 32, 89, 49, 0, 0, 14, 255, 255, 16, 89, 50, 0, 0, 14, 255,
|
||||
255, 16, 89, 51, 0, 0, 14, 255, 255, 16, 89, 52, 0, 0, 14, 255, 255,
|
||||
16, 89, 53, 0, 0, 14, 255, 255, 16, 89, 54, 0, 0, 14, 255, 255, 16,
|
||||
89, 55, 0, 0, 14, 255, 255, 16, 89, 69, 0, 7, 45, 12, 51, 25, 89, 84,
|
||||
0, 7, 33, 6, 43, 0, 89, 89, 0, 16, 8, 255, 255, 0, 90, 49, 0, 16, 8,
|
||||
255, 255, 16, 90, 50, 0, 16, 8, 255, 255, 16, 90, 51, 0, 16, 8, 255,
|
||||
255, 16, 90, 52, 0, 16, 8, 255, 255, 16, 90, 53, 0, 16, 8, 255, 255,
|
||||
16, 90, 54, 0, 16, 8, 255, 255, 16, 90, 55, 0, 16, 8, 255, 255, 16,
|
||||
90, 56, 0, 16, 8, 255, 255, 16, 90, 57, 0, 16, 8, 255, 255, 16, 90,
|
||||
65, 0, 7, 33, 6, 43, 32, 90, 77, 0, 17, 41, 20, 47, 0, 90, 87, 0, 7,
|
||||
33, 13, 39, 57, 38, 62, 8, 102, 142, 8, 151, 175, 8, 16, 4, 5, 6, 7,
|
||||
8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 18, 4, 5, 6, 7, 8, 9,
|
||||
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 4, 5, 76, 0, 3, 76,
|
||||
6, 3, 76, 10, 3, 76, 11, 3, 66, 12, 3, 1, 4, 62, 0, 0, 66, 4, 0, 62,
|
||||
9, 0, 58, 10, 0, 4, 3, 58, 0, 3, 66, 7, 3, 58, 12, 3, 1, 5, 42, 0, 0,
|
||||
50, 3, 0, 60, 8, 0, 54, 9, 0, 46, 10, 0, 4, 1, 56, 2, 3, 1, 1, 32, 1,
|
||||
0, 4, 5, 58, 0, 3, 68, 6, 3, 74, 10, 3, 68, 11, 3, 66, 12, 3, 1, 5,
|
||||
48, 0, 0, 58, 3, 0, 66, 8, 0, 58, 9, 0, 54, 10, 0, 4, 3, 86, 0, 0, 126,
|
||||
7, 0, 86, 12, 0, 1, 3, 78, 0, 1, 126, 5, 1, 78, 10, 1, 4, 5, 70, 0,
|
||||
0, 80, 6, 0, 80, 10, 0, 80, 11, 0, 72, 12, 0, 1, 5, 58, 0, 1, 68, 3,
|
||||
1, 80, 8, 1, 68, 9, 1, 60, 10, 1, 4, 1, 64, 4, 0, 1, 1, 64, 2, 1, 4,
|
||||
1, 76, 4, 3, 1, 1, 72, 2, 0, 4, 4, 60, 0, 3, 64, 8, 3, 44, 13, 3, 44,
|
||||
16, 3, 1, 3, 40, 0, 0, 52, 5, 0, 46, 11, 0, 0, 2, 64, 3, 3, 46, 16,
|
||||
3, 4, 2, 64, 2, 0, 44, 14, 0, 1, 3, 54, 0, 1, 64, 6, 1, 52, 12, 1, 6,
|
||||
1, 76, 4, 0, 3, 1, 76, 2, 1, 6, 1, 76, 4, 0, 3, 1, 76, 2, 1, 6, 1, 76,
|
||||
4, 0, 3, 1, 128, 2, 1, 4, 1, 64, 4, 0, 1, 1, 64, 2, 1, 6, 1, 84, 4,
|
||||
3, 3, 1, 72, 2, 0, 4, 2, 120, 4, 0, 120, 17, 3, 1, 1, 120, 2, 1, 0,
|
||||
0, 0, 1, 64, 4, 3, 4, 1, 80, 4, 0, 1, 1, 64, 2, 1, 4, 1, 88, 4, 0, 1,
|
||||
1, 60, 2, 1, 6, 1, 100, 4, 0, 3, 1, 88, 2, 1, 4, 1, 64, 2, 3, 1, 1,
|
||||
52, 1, 0, 4, 3, 56, 0, 3, 64, 9, 3, 56, 16, 3, 1, 2, 46, 0, 0, 52, 7,
|
||||
0, 1, 18, 1, 255, 1, 58, 1, 14, 1, 15, 3, 29, 41, 55, 2, 19, 55, 3,
|
||||
11, 1, 1, 1, 1, 10, 1, 11, 1, 12, 1, 13, 1, 14, 2, 2, 2, 10, 2, 11,
|
||||
2, 12, 3, 9, 10, 10, 11, 11, 12, 12, 12, 13, 12, 14, 13, 13, 14, 14,
|
||||
34, 46, 36, 48, 36, 64, 36, 116, 36, 140, 36, 144, 36, 161, 36, 165,
|
||||
36, 177, 52, 52, 52, 60, 52, 64, 52, 124, 52, 140, 52, 144, 52, 165,
|
||||
56, 60, 56, 64, 64, 64, 64, 100, 100, 100, 100, 116, 100, 140, 100,
|
||||
144, 100, 165, 104, 128, 104, 136, 104, 140, 104, 165, 132, 140, 132,
|
||||
144, 132, 165, 140, 140, 144, 144, 144, 165, 149, 149, 149, 161, 149,
|
||||
165, 149, 177, 153, 161, 165, 165, 0, 145, 0, 146, 0, 147, 0, 148, 0,
|
||||
149, 0, 150, 0, 151, 0, 152, 0, 153, 0, 154, 0, 0, 0, 4, 0, 0, 0, 28,
|
||||
18, 0, 0, 42, 42, 42, 58, 42, 106, 42, 122, 42, 138, 42, 155, 42, 171,
|
||||
58, 58, 106, 106, 106, 122, 106, 138, 106, 155, 122, 122, 122, 138,
|
||||
122, 171, 138, 138, 138, 155, 155, 155, 155, 171, 42, 106, 106, 42,
|
||||
58, 106, 106, 58, 42, 122, 122, 42, 58, 122, 122, 58, 42, 138, 138,
|
||||
42, 58, 138, 138, 58, 106, 138, 138, 106, 42, 155, 155, 42, 58, 155,
|
||||
155, 58, 106, 155, 155, 106, 122, 155, 155, 122, 138, 155, 155, 138,
|
||||
42, 171, 171, 42, 58, 171, 171, 58, 106, 171, 171, 106, 122, 171, 171,
|
||||
122, 138, 171, 171, 138, 0, 0, 1, 0, 0, 0, 164, 17, 0, 0, 1, 0, 0, 0,
|
||||
81, 17, 0, 0, 1, 0, 0, 0, 6, 18, 0, 0, 24, 0, 159, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 2, 0, 0, 0, 93, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 255,
|
||||
1, 30, 2, 0, 3, 76, 1, 4, 76, 2, 2, 66, 12, 4, 1, 0, 255, 1, 30, 2,
|
||||
0, 7, 72, 0, 2, 58, 0, 4, 68, 6, 4, 74, 8, 2, 74, 10, 4, 68, 11, 4,
|
||||
66, 12, 4, 1, 0, 255, 1, 30, 2, 0, 2, 64, 2, 2, 56, 2, 4, 1, 0, 255,
|
||||
1, 30, 2, 0, 5, 72, 0, 2, 76, 1, 4, 76, 7, 2, 72, 12, 2, 66, 12, 4,
|
||||
1, 0, 255, 1, 30, 2, 0, 4, 58, 0, 4, 68, 2, 2, 66, 7, 4, 58, 12, 4,
|
||||
1, 0, 255, 1, 30, 2, 0, 5, 92, 0, 2, 86, 0, 4, 126, 7, 1, 92, 12, 2,
|
||||
86, 12, 4, 1, 0, 255, 1, 30, 2, 0, 5, 70, 0, 4, 80, 1, 2, 80, 7, 4,
|
||||
76, 12, 2, 72, 12, 4, 2, 4, 255, 1, 20, 4, 2, 1, 76, 4, 1, 2, 0, 255,
|
||||
1, 20, 4, 0, 1, 76, 4, 1, 3, 0, 4, 1, 20, 5, 2, 5, 76, 1, 4, 76, 4,
|
||||
2, 70, 12, 4, 76, 14, 4, 54, 17, 2, 3, 0, 4, 1, 20, 5, 0, 6, 60, 0,
|
||||
4, 68, 2, 2, 64, 8, 4, 48, 14, 2, 44, 14, 4, 64, 17, 2, 3, 0, 4, 1,
|
||||
20, 5, 0, 3, 64, 3, 4, 64, 5, 2, 46, 16, 4, 2, 0, 3, 1, 20, 4, 0, 3,
|
||||
64, 2, 1, 48, 14, 2, 44, 14, 4, 3, 0, 4, 1, 20, 5, 0, 6, 62, 0, 4, 66,
|
||||
4, 2, 66, 7, 4, 62, 12, 4, 66, 14, 4, 42, 17, 2, 3, 0, 255, 1, 20, 5,
|
||||
2, 2, 84, 4, 4, 78, 5, 2, 3, 0, 255, 1, 30, 5, 0, 1, 120, 5, 1, 0, 0,
|
||||
255, 0, 0, 0, 2, 0, 255, 1, 23, 4, 2, 1, 92, 4, 1, 2, 0, 255, 1, 36,
|
||||
4, 2, 1, 100, 4, 1, 2, 4, 3, 1, 20, 4, 2, 1, 76, 4, 1, 1, 0, 255, 1,
|
||||
20, 2, 2, 1, 76, 2, 1, 2, 0, 255, 1, 20, 4, 4, 3, 56, 0, 4, 64, 9, 4,
|
||||
56, 16, 4, 2, 1, 76, 4, 2, 0, 0, 0, 1, 0, 0, 0, 192, 29, 0, 0, 1, 0,
|
||||
0, 0, 195, 29, 0, 0, 1, 0, 0, 0, 198, 29, 0, 0, 10, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 8, 12, 13, 14, 15, 16, 17, 18, 19, 8, 4, 5,
|
||||
6, 7, 8, 9, 10, 11, 0, 12, 4, 10, 2, 2, 2, 9, 1, 1, 1, 1, 1, 1, 3, 3,
|
||||
4, 4, 2, 2, 2, 2, 3, 1, 1, 1, 1, 1, 1, 1, 0, 9, 0, 19, 0, 22, 0, 24,
|
||||
0, 32, 0, 35, 0, 42, 0, 53, 0, 59, 0, 73, 0, 75, 0, 77, 0, 80, 0, 87,
|
||||
0, 92, 0, 95, 0, 101, 0, 104, 0, 117, 0, 127, 0, 130, 0, 132, 0, 134,
|
||||
0, 142, 0, 144, 0, 160, 0, 173, 0, 175, 0, 183, 0, 188, 0, 190, 0, 192,
|
||||
0, 195, 0, 212, 0, 217, 0, 227, 0, 229, 0, 242, 0, 248, 0, 251, 0, 1,
|
||||
1, 4, 1, 11, 1, 15, 1, 18, 1, 42, 1, 46, 1, 53, 1, 6, 2, 2, 1, 1, 1,
|
||||
1, 0, 6, 2, 5, 1, 1, 1, 7, 2, 4, 1, 1, 1, 2, 8, 4, 2, 2, 1, 1, 1, 14,
|
||||
2, 2, 1, 1, 1, 1, 0, 6, 2, 5, 5, 1, 1, 7, 2, 4, 1, 1, 1, 2, 8, 4, 2,
|
||||
2, 1, 1, 1, 13, 2, 2, 1, 1, 1, 1, 18, 4, 2, 2, 5, 1, 1, 10, 12, 13,
|
||||
14, 15, 16, 17, 18, 19, 20, 21, 12, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
|
||||
11, 4, 0, 1, 2, 3, 8, 12, 13, 14, 15, 16, 17, 18, 19, 8, 4, 5, 6, 7,
|
||||
8, 9, 10, 11, 21, 2, 2, 18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 50, 48, 50, 48, 45, 48, 49, 45, 50, 55, 32,
|
||||
50, 50, 58, 48, 51, 58, 48, 52, 0, 0, 3, 0, 0, 0, 196, 11, 0, 0, 1,
|
||||
14, 1, 0, 3, 0, 0, 0, 120, 14, 0, 0, 42, 58, 16, 106, 138, 16, 155,
|
||||
171, 16, 0, 0, 0, 3, 0, 0, 0, 28, 23, 0, 0, 21, 2, 2, 0, 9, 0, 19, 0,
|
||||
22, 0, 24, 0, 32, 0, 35, 0, 42, 0, 53, 0, 59, 0, 73, 0, 75, 0, 77, 0,
|
||||
80, 0, 87, 0, 92, 0, 95, 0, 101, 0, 104, 0, 117, 0, 127, 0, 130, 0,
|
||||
132, 0, 134, 0, 142, 0, 144, 0, 160, 0, 173, 0, 175, 0, 183, 0, 188,
|
||||
0, 190, 0, 192, 0, 195, 0, 212, 0, 217, 0, 227, 0, 229, 0, 242, 0, 248,
|
||||
0, 251, 0, 1, 1, 4, 1, 11, 1, 15, 1, 18, 1, 46, 1, 52, 1, 21, 2, 2,
|
||||
0, 0, 0, 3, 0, 0, 0, 40, 16, 0, 0, 102, 1, 0, 0, 148, 0, 0, 0, 34, 46,
|
||||
4, 36, 64, 4, 100, 144, 4, 149, 177, 4, 104, 0, 0, 0, 4, 14, 0, 0, 119,
|
||||
13, 0, 0, 99, 13, 0, 0, 112, 22, 0, 0, 64, 16, 0, 0, 172, 14, 0, 0,
|
||||
232, 18, 0, 0, 241, 11, 0, 0, 76, 23, 0, 0, 20, 18, 0, 0, 156, 17, 0,
|
||||
0, 84, 29, 0, 0, 255, 80, 161, 4, 76, 29, 0, 0, 184, 29, 0, 0, 92, 29,
|
||||
0, 0, 12, 14, 0, 0, 201, 29, 0, 0, 112, 0, 0, 0, 84, 17, 0, 0, 6, 23,
|
||||
0, 0, 34, 17, 0, 0, 205, 11, 0, 0, 103, 17, 0, 0, 176, 29, 0, 0, 124,
|
||||
17, 0, 0, 64, 23, 0, 0, 248, 22, 0, 0, 104, 22, 0, 0, 0, 0, 0, 0, 0,
|
||||
4, 0, 3, 1, 76, 2, 1, 6, 1, 76, 4, 0, 3, 1, 128, 2, 1, 4, 1, 64, 4,
|
||||
0, 1, 1, 64, 2, 1, 6, 1, 84, 4, 3, 3, 1, 72, 2, 0, 4, 2, 120, 4, 0,
|
||||
120, 17, 3, 1, 1, 120, 2, 1, 0, 0, 0, 1, 64, 4, 3, 4, 1, 80, 4, 0, 1,
|
||||
1, 64, 2, 1, 4, 1, 88, 4, 0, 1, 1, 60, 2, 1, 6, 1, 100, 4, 0, 3, 1,
|
||||
88, 2, 1, 4, 1, 64, 2, 3, 1, 1, 52, 1, 0, 4, 3, 56, 0, 3, 64, 9, 3,
|
||||
56, 16, 3, 1, 2, 46, 0, 0, 52, 7, 0, 1, 18, 1, 255, 1, 58, 1, 14, 1,
|
||||
15, 3, 29, 41, 55, 2, 19, 55, 3, 11, 1, 1, 1, 1, 10, 1, 11, 1, 12, 1,
|
||||
13, 1, 14, 2, 2, 2, 10, 2, 11, 2, 12, 3, 9, 10, 10, 11, 11, 12, 12,
|
||||
12, 13, 12, 14, 13, 13, 14, 14, 34, 46, 36, 48, 36, 64, 36, 116, 36,
|
||||
140, 36, 144, 36, 161, 36, 165, 36, 177, 52, 52, 52, 60, 52, 64, 52,
|
||||
124, 52, 140, 52, 144, 52, 165, 56, 60, 56, 64, 64, 64, 64, 100, 100,
|
||||
100, 100, 116, 100, 140, 100, 144, 100, 165, 104, 128, 104, 136, 104,
|
||||
140, 104, 165, 132, 140, 132, 144, 132, 165, 140, 140, 144, 144, 144,
|
||||
165, 149, 149, 149, 161, 149, 165, 149, 177, 153, 161, 165, 165, 0,
|
||||
145, 0, 146, 0, 147, 0, 148, 0, 149, 0, 150, 0, 151, 0, 152, 0, 153,
|
||||
0, 154, 0, 0, 0, 4, 0, 0, 0, 28, 18, 0, 0, 42, 42, 42, 58, 42, 106,
|
||||
42, 122, 42, 138, 42, 155, 42, 171, 58, 58, 106, 106, 106, 122, 106,
|
||||
138, 106, 155, 122, 122, 122, 138, 122, 171, 138, 138, 138, 155, 155,
|
||||
155, 155, 171, 42, 106, 106, 42, 58, 106, 106, 58, 42, 122, 122, 42,
|
||||
58, 122, 122, 58, 42, 138, 138, 42, 58, 138, 138, 58, 106, 138, 138,
|
||||
106, 42, 155, 155, 42, 58, 155, 155, 58, 106, 155, 155, 106, 122, 155,
|
||||
155, 122, 138, 155, 155, 138, 42, 171, 171, 42, 58, 171, 171, 58, 106,
|
||||
171, 171, 106, 122, 171, 171, 122, 138, 171, 171, 138, 0, 0, 1, 0, 0,
|
||||
0, 164, 17, 0, 0, 1, 0, 0, 0, 81, 17, 0, 0, 1, 0, 0, 0, 6, 18, 0, 0,
|
||||
24, 0, 159, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 93, 16, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 1, 0, 255, 1, 30, 2, 0, 3, 76, 1, 4, 76, 2, 2,
|
||||
66, 12, 4, 1, 0, 255, 1, 30, 2, 0, 7, 72, 0, 2, 58, 0, 4, 68, 6, 4,
|
||||
74, 8, 2, 74, 10, 4, 68, 11, 4, 66, 12, 4, 1, 0, 255, 1, 30, 2, 0, 2,
|
||||
64, 2, 2, 56, 2, 4, 1, 0, 255, 1, 30, 2, 0, 5, 72, 0, 2, 76, 1, 4, 76,
|
||||
7, 2, 72, 12, 2, 66, 12, 4, 1, 0, 255, 1, 30, 2, 0, 4, 58, 0, 4, 68,
|
||||
2, 2, 66, 7, 4, 58, 12, 4, 1, 0, 255, 1, 30, 2, 0, 5, 92, 0, 2, 86,
|
||||
0, 4, 126, 7, 1, 92, 12, 2, 86, 12, 4, 1, 0, 255, 1, 30, 2, 0, 5, 70,
|
||||
0, 4, 80, 1, 2, 80, 7, 4, 76, 12, 2, 72, 12, 4, 2, 4, 255, 1, 20, 4,
|
||||
2, 1, 76, 4, 1, 2, 0, 255, 1, 20, 4, 0, 1, 76, 4, 1, 3, 0, 4, 1, 20,
|
||||
5, 2, 5, 76, 1, 4, 76, 4, 2, 70, 12, 4, 76, 14, 4, 54, 17, 2, 3, 0,
|
||||
4, 1, 20, 5, 0, 6, 60, 0, 4, 68, 2, 2, 64, 8, 4, 48, 14, 2, 44, 14,
|
||||
4, 64, 17, 2, 3, 0, 4, 1, 20, 5, 0, 3, 64, 3, 4, 64, 5, 2, 46, 16, 4,
|
||||
2, 0, 3, 1, 20, 4, 0, 3, 64, 2, 1, 48, 14, 2, 44, 14, 4, 3, 0, 4, 1,
|
||||
20, 5, 0, 6, 62, 0, 4, 66, 4, 2, 66, 7, 4, 62, 12, 4, 66, 14, 4, 42,
|
||||
17, 2, 3, 0, 255, 1, 20, 5, 2, 2, 84, 4, 4, 78, 5, 2, 3, 0, 255, 1,
|
||||
30, 5, 0, 1, 120, 5, 1, 0, 0, 255, 0, 0, 0, 2, 0, 255, 1, 23, 4, 2,
|
||||
1, 92, 4, 1, 2, 0, 255, 1, 36, 4, 2, 1, 100, 4, 1, 2, 4, 3, 1, 20, 4,
|
||||
2, 1, 76, 4, 1, 1, 0, 255, 1, 20, 2, 2, 1, 76, 2, 1, 2, 0, 255, 1, 20,
|
||||
4, 4, 3, 56, 0, 4, 64, 9, 4, 56, 16, 4, 2, 1, 76, 4, 2, 0, 0, 0, 1,
|
||||
0, 0, 0, 192, 29, 0, 0, 1, 0, 0, 0, 195, 29, 0, 0, 1, 0, 0, 0, 198,
|
||||
29, 0, 0, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 8, 12, 13, 14,
|
||||
15, 16, 17, 18, 19, 8, 4, 5, 6, 7, 8, 9, 10, 11, 0, 12, 4, 10, 2, 2,
|
||||
2, 9, 1, 1, 1, 1, 1, 1, 3, 3, 4, 4, 2, 2, 2, 2, 3, 1, 1, 1, 1, 1, 1,
|
||||
1, 0, 9, 0, 19, 0, 22, 0, 24, 0, 32, 0, 35, 0, 42, 0, 53, 0, 59, 0,
|
||||
73, 0, 75, 0, 77, 0, 80, 0, 87, 0, 92, 0, 95, 0, 101, 0, 104, 0, 117,
|
||||
0, 127, 0, 130, 0, 132, 0, 134, 0, 142, 0, 144, 0, 160, 0, 173, 0, 175,
|
||||
0, 183, 0, 188, 0, 190, 0, 192, 0, 195, 0, 212, 0, 217, 0, 227, 0, 229,
|
||||
0, 242, 0, 248, 0, 251, 0, 1, 1, 4, 1, 11, 1, 15, 1, 18, 1, 42, 1, 46,
|
||||
1, 53, 1, 6, 2, 2, 1, 1, 1, 1, 0, 6, 2, 5, 1, 1, 1, 7, 2, 4, 1, 1, 1,
|
||||
2, 8, 4, 2, 2, 1, 1, 1, 14, 2, 2, 1, 1, 1, 1, 0, 6, 2, 5, 5, 1, 1, 7,
|
||||
2, 4, 1, 1, 1, 2, 8, 4, 2, 2, 1, 1, 1, 13, 2, 2, 1, 1, 1, 1, 18, 4,
|
||||
2, 2, 5, 1, 1, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 12, 0, 1,
|
||||
2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 4, 0, 1, 2, 3, 8, 12, 13, 14, 15, 16,
|
||||
17, 18, 19, 8, 4, 5, 6, 7, 8, 9, 10, 11, 21, 2, 2, 18, 4, 5, 6, 7, 8,
|
||||
9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 50, 48, 50, 48, 45,
|
||||
48, 57, 45, 48, 57, 32, 48, 49, 58, 51, 53, 58, 49, 54, 0, 0, 3, 0,
|
||||
0, 0, 196, 11, 0, 0, 1, 14, 1, 0, 3, 0, 0, 0, 120, 14, 0, 0, 42, 58,
|
||||
16, 106, 138, 16, 155, 171, 16, 0, 0, 0, 3, 0, 0, 0, 28, 23, 0, 0, 21,
|
||||
2, 2, 0, 9, 0, 19, 0, 22, 0, 24, 0, 32, 0, 35, 0, 42, 0, 53, 0, 59,
|
||||
0, 73, 0, 75, 0, 77, 0, 80, 0, 87, 0, 92, 0, 95, 0, 101, 0, 104, 0,
|
||||
117, 0, 127, 0, 130, 0, 132, 0, 134, 0, 142, 0, 144, 0, 160, 0, 173,
|
||||
0, 175, 0, 183, 0, 188, 0, 190, 0, 192, 0, 195, 0, 212, 0, 217, 0, 227,
|
||||
0, 229, 0, 242, 0, 248, 0, 251, 0, 1, 1, 4, 1, 11, 1, 15, 1, 18, 1,
|
||||
46, 1, 52, 1, 21, 2, 2, 0, 0, 0, 3, 0, 0, 0, 40, 16, 0, 0, 102, 1, 0,
|
||||
0, 148, 0, 0, 0, 34, 46, 4, 36, 64, 4, 100, 144, 4, 149, 177, 4, 104,
|
||||
0, 0, 0, 4, 14, 0, 0, 119, 13, 0, 0, 99, 13, 0, 0, 112, 22, 0, 0, 64,
|
||||
16, 0, 0, 172, 14, 0, 0, 232, 18, 0, 0, 241, 11, 0, 0, 76, 23, 0, 0,
|
||||
20, 18, 0, 0, 156, 17, 0, 0, 84, 29, 0, 0, 255, 80, 161, 4, 76, 29,
|
||||
0, 0, 184, 29, 0, 0, 92, 29, 0, 0, 12, 14, 0, 0, 201, 29, 0, 0, 112,
|
||||
0, 0, 0, 84, 17, 0, 0, 6, 23, 0, 0, 34, 17, 0, 0, 205, 11, 0, 0, 103,
|
||||
17, 0, 0, 176, 29, 0, 0, 124, 17, 0, 0, 64, 23, 0, 0, 248, 22, 0, 0,
|
||||
104, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12, 18, 0, 0, 136, 17, 0, 0,
|
||||
10, 2, 255, 3, 17, 19, 24, 29, 30, 55, 0, 4, 56, 19, 2, 70, 28, 2, 58,
|
||||
36, 2, 70, 55, 2, 14, 0, 255, 2, 23, 19, 23, 55, 2, 2, 84, 19, 2, 84,
|
||||
55, 2, 14, 0, 255, 2, 23, 19, 23, 55, 0, 2, 66, 19, 2, 66, 55, 2, 23,
|
||||
1, 1, 4, 23, 19, 17, 29, 23, 40, 30, 55, 2, 2, 84, 22, 2, 84, 55, 2,
|
||||
24, 1, 5, 2, 23, 23, 30, 55, 0, 4, 56, 19, 2, 58, 29, 2, 60, 41, 2,
|
||||
70, 55, 2, 15, 1, 255, 1, 23, 20, 2, 1, 84, 20, 2, 15, 1, 255, 1, 23,
|
||||
20, 2, 1, 84, 20, 2, 20, 1, 255, 2, 21, 20, 21, 55, 2, 2, 84, 20, 2,
|
||||
84, 55, 2, 0, 0, 255, 0, 0, 0, 19, 1, 255, 2, 23, 20, 23, 54, 0, 2,
|
||||
66, 20, 2, 66, 54, 2, 20, 1, 255, 2, 23, 20, 20, 55, 0, 2, 66, 20, 2,
|
||||
64, 55, 2, 20, 1, 255, 2, 23, 20, 20, 55, 2, 2, 92, 20, 2, 80, 55, 2,
|
||||
9, 0, 255, 1, 23, 19, 2, 1, 84, 19, 2, 9, 0, 255, 1, 20, 19, 0, 1, 56,
|
||||
19, 2, 11, 2, 255, 3, 17, 19, 24, 31, 30, 55, 0, 5, 56, 19, 2, 70, 28,
|
||||
2, 58, 36, 2, 68, 40, 2, 70, 55, 2, 13, 2, 255, 3, 17, 19, 24, 32, 30,
|
||||
55, 0, 5, 56, 19, 2, 78, 28, 2, 64, 36, 2, 68, 38, 2, 78, 46, 2, 26,
|
||||
1, 255, 2, 23, 20, 30, 42, 2, 2, 84, 23, 2, 112, 55, 2, 13, 2, 255,
|
||||
3, 17, 19, 24, 32, 30, 55, 0, 7, 58, 19, 2, 84, 27, 2, 76, 35, 2, 72,
|
||||
38, 2, 80, 44, 2, 68, 50, 2, 80, 52, 2, 27, 0, 255, 1, 30, 26, 0, 1,
|
||||
120, 26, 2, 26, 2, 255, 1, 30, 25, 0, 1, 120, 25, 2, 10, 2, 2, 3, 17,
|
||||
19, 24, 29, 30, 55, 0, 4, 56, 19, 2, 70, 28, 2, 58, 36, 2, 70, 55, 2,
|
||||
10, 2, 255, 3, 17, 19, 24, 29, 30, 55, 0, 4, 56, 19, 2, 66, 28, 2, 60,
|
||||
36, 2, 66, 55, 2, 20, 2, 255, 2, 23, 20, 33, 55, 2, 2, 84, 20, 2, 84,
|
||||
55, 2, 10, 2, 1, 3, 17, 19, 24, 29, 30, 55, 0, 4, 56, 19, 2, 70, 28,
|
||||
2, 58, 36, 2, 70, 55, 2, 32, 2, 255, 1, 30, 40, 2, 1, 84, 40, 2, 29,
|
||||
2, 255, 2, 21, 29, 30, 55, 0, 2, 60, 29, 2, 68, 55, 2, 29, 1, 255, 2,
|
||||
30, 29, 30, 55, 2, 2, 112, 29, 2, 112, 55, 2, 5, 2, 0, 2, 23, 18, 23,
|
||||
19, 2, 2, 84, 18, 2, 84, 19, 2, 7, 2, 0, 2, 23, 18, 23, 20, 2, 2, 84,
|
||||
18, 2, 84, 20, 2, 8, 2, 0, 3, 23, 18, 23, 20, 30, 40, 2, 2, 84, 18,
|
||||
2, 84, 22, 2, 6, 1, 255, 4, 14, 18, 14, 19, 20, 30, 20, 54, 0, 4, 48,
|
||||
18, 2, 48, 19, 2, 60, 30, 2, 60, 54, 2, 14, 0, 255, 2, 17, 19, 30, 55,
|
||||
0, 2, 56, 19, 2, 68, 55, 2, 12, 2, 255, 3, 17, 19, 24, 32, 30, 56, 0,
|
||||
6, 62, 19, 2, 90, 28, 2, 80, 37, 2, 90, 43, 2, 86, 48, 2, 118, 56, 2,
|
||||
22, 1, 255, 2, 23, 20, 30, 40, 2, 1, 84, 22, 2, 25, 1, 255, 1, 23, 24,
|
||||
2, 1, 84, 24, 2, 14, 0, 6, 2, 17, 19, 20, 55, 0, 2, 56, 19, 2, 60, 55,
|
||||
2, 18, 1, 255, 2, 20, 20, 20, 47, 2, 2, 72, 20, 2, 72, 47, 2, 22, 1,
|
||||
255, 2, 23, 20, 30, 40, 2, 1, 84, 22, 2, 22, 2, 255, 1, 20, 22, 0, 2,
|
||||
62, 20, 2, 66, 40, 2, 16, 2, 255, 2, 20, 20, 28, 40, 2, 2, 84, 20, 2,
|
||||
112, 40, 2, 4, 0, 255, 1, 23, 18, 2, 1, 84, 18, 2, 20, 1, 255, 2, 23,
|
||||
20, 30, 55, 2, 2, 84, 20, 2, 84, 55, 2, 21, 1, 255, 3, 23, 20, 30, 39,
|
||||
30, 49, 2, 2, 84, 21, 2, 84, 49, 2, 26, 1, 255, 3, 23, 20, 24, 41, 30,
|
||||
55, 2, 1, 84, 25, 2, 26, 1, 255, 3, 23, 20, 24, 41, 30, 55, 2, 1, 84,
|
||||
25, 2, 17, 1, 255, 2, 23, 20, 30, 42, 2, 2, 84, 20, 2, 112, 42, 2, 34,
|
||||
0, 255, 1, 27, 55, 2, 1, 84, 55, 2, 34, 0, 255, 1, 30, 55, 0, 1, 78,
|
||||
55, 2, 34, 0, 255, 1, 27, 55, 2, 1, 84, 55, 2, 34, 0, 255, 1, 20, 55,
|
||||
2, 1, 76, 55, 2, 31, 2, 255, 2, 17, 35, 30, 55, 0, 2, 68, 35, 2, 68,
|
||||
55, 2, 30, 2, 255, 3, 17, 35, 24, 40, 30, 55, 0, 3, 56, 35, 2, 68, 40,
|
||||
2, 68, 55, 2, 28, 2, 255, 3, 17, 29, 24, 40, 30, 55, 0, 3, 56, 29, 2,
|
||||
58, 40, 2, 62, 55, 2, 33, 0, 255, 1, 27, 54, 2, 1, 84, 54, 2, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 4, 1, 5, 1, 18, 2, 18, 19, 4,
|
||||
18, 19, 30, 54, 2, 18, 20, 2, 18, 22, 1, 19, 3, 19, 29, 55, 3, 19, 31,
|
||||
55, 3, 19, 32, 56, 2, 19, 33, 2, 19, 55, 1, 20, 2, 20, 40, 2, 20, 42,
|
||||
2, 20, 47, 2, 20, 54, 2, 20, 55, 2, 21, 49, 1, 22, 2, 22, 55, 2, 23,
|
||||
55, 1, 24, 1, 25, 1, 26, 3, 29, 40, 55, 2, 29, 55, 3, 35, 40, 55, 2,
|
||||
35, 55, 1, 40, 1, 54, 1, 55, 0, 0, 0, 1, 0, 0, 0, 220, 16, 0, 0, 4,
|
||||
0, 0, 0, 227, 16, 0, 0, 5, 0, 0, 0, 255, 16, 0, 0, 50, 50, 32, 114,
|
||||
114, 32, 163, 163, 32, 0, 0, 0, 3, 0, 0, 0, 236, 22, 0, 0, 84, 0, 69,
|
||||
1, 74, 1, 18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
|
||||
19, 20, 21, 0, 0, 0, 68, 69, 0, 0, 3, 0, 0, 0, 0, 23, 0, 0, 74, 80,
|
||||
0, 0, 10, 0, 0, 0, 238, 13, 0, 0, 85, 83, 0, 0, 2, 0, 0, 0, 72, 23,
|
||||
0, 0, 3, 0, 0, 0, 144, 17, 0, 0, 252, 0, 253, 0, 4, 2, 64, 19, 1, 64,
|
||||
55, 1, 1, 2, 40, 14, 0, 40, 39, 0, 4, 4, 56, 19, 0, 58, 29, 0, 60, 41,
|
||||
0, 70, 55, 0, 5, 3, 52, 15, 1, 64, 30, 1, 72, 39, 1, 8, 3, 52, 1, 0,
|
||||
64, 10, 0, 72, 17, 0, 4, 3, 60, 20, 1, 60, 40, 1, 60, 55, 1, 1, 3, 56,
|
||||
14, 0, 60, 25, 0, 60, 39, 0, 6, 1, 84, 20, 0, 7, 1, 84, 15, 1, 10, 1,
|
||||
84, 1, 0, 4, 1, 60, 20, 1, 1, 1, 56, 15, 0, 6, 1, 84, 20, 0, 7, 1, 88,
|
||||
15, 1, 10, 1, 88, 1, 0, 6, 2, 84, 20, 0, 84, 55, 0, 7, 2, 84, 15, 1,
|
||||
84, 39, 1, 10, 2, 84, 1, 0, 84, 17, 0, 0, 0, 4, 2, 66, 20, 1, 66, 54,
|
||||
1, 1, 2, 54, 15, 0, 54, 39, 0, 6, 2, 92, 20, 0, 80, 55, 0, 7, 2, 88,
|
||||
15, 1, 76, 39, 1, 10, 2, 88, 1, 0, 76, 17, 0, 4, 2, 66, 20, 1, 64, 55,
|
||||
1, 1, 2, 56, 15, 0, 56, 39, 0, 4, 1, 56, 19, 1, 1, 1, 48, 14, 0, 4,
|
||||
1, 60, 19, 1, 1, 1, 56, 14, 0, 4, 1, 60, 19, 1, 1, 1, 56, 14, 0, 6,
|
||||
2, 84, 23, 0, 112, 55, 0, 7, 2, 88, 19, 1, 116, 39, 1, 10, 2, 88, 4,
|
||||
0, 116, 17, 0, 4, 5, 56, 19, 1, 70, 28, 1, 58, 36, 1, 68, 40, 1, 70,
|
||||
55, 1, 1, 7, 52, 13, 0, 66, 22, 0, 68, 23, 0, 52, 26, 0, 62, 27, 0,
|
||||
72, 33, 0, 74, 39, 0, 4, 11, 58, 19, 0, 84, 27, 0, 76, 34, 0, 76, 36,
|
||||
0, 72, 38, 0, 80, 44, 0, 68, 50, 0, 80, 51, 0, 80, 53, 0, 80, 57, 0,
|
||||
80, 58, 0, 5, 10, 58, 13, 1, 66, 22, 1, 80, 23, 1, 62, 26, 1, 66, 27,
|
||||
1, 82, 32, 1, 74, 35, 1, 76, 37, 1, 72, 38, 1, 80, 41, 1, 8, 5, 52,
|
||||
0, 0, 58, 7, 0, 50, 8, 0, 82, 13, 0, 72, 17, 0, 4, 6, 56, 19, 1, 68,
|
||||
28, 1, 56, 36, 1, 68, 38, 1, 68, 45, 1, 68, 55, 1, 1, 6, 48, 14, 0,
|
||||
68, 23, 0, 48, 26, 0, 62, 27, 0, 74, 33, 0, 72, 39, 0, 4, 5, 56, 19,
|
||||
0, 78, 28, 0, 64, 36, 0, 68, 38, 0, 78, 46, 0, 5, 10, 62, 13, 1, 62,
|
||||
22, 1, 78, 23, 1, 50, 26, 1, 56, 27, 1, 78, 32, 1, 78, 35, 1, 78, 37,
|
||||
1, 60, 38, 1, 78, 41, 1, 8, 6, 58, 0, 0, 64, 7, 0, 76, 8, 0, 76, 12,
|
||||
0, 78, 15, 0, 72, 17, 0, 4, 1, 120, 26, 0, 5, 1, 120, 21, 1, 12, 1,
|
||||
120, 6, 0, 76, 34, 120, 19, 0, 120, 20, 0, 120, 21, 0, 120, 22, 0, 120,
|
||||
23, 0, 120, 24, 0, 120, 25, 0, 120, 26, 0, 120, 27, 0, 120, 28, 0, 120,
|
||||
29, 0, 120, 30, 0, 120, 31, 0, 120, 32, 0, 120, 33, 0, 120, 34, 0, 120,
|
||||
35, 0, 120, 36, 0, 120, 37, 0, 120, 38, 0, 120, 39, 0, 120, 40, 0, 120,
|
||||
41, 0, 120, 42, 0, 120, 43, 0, 120, 44, 0, 120, 45, 0, 120, 46, 0, 120,
|
||||
47, 0, 120, 48, 0, 120, 49, 0, 120, 50, 0, 120, 51, 0, 120, 52, 0, 9,
|
||||
1, 120, 2, 0, 4, 1, 120, 25, 0, 5, 1, 120, 20, 1, 12, 1, 120, 5, 0,
|
||||
76, 24, 120, 19, 0, 120, 20, 0, 120, 21, 0, 120, 22, 0, 120, 23, 0,
|
||||
120, 24, 0, 120, 25, 0, 120, 26, 0, 120, 27, 0, 120, 28, 0, 120, 29,
|
||||
0, 120, 30, 0, 120, 31, 0, 120, 32, 0, 120, 33, 0, 120, 34, 0, 120,
|
||||
35, 0, 120, 36, 0, 120, 37, 0, 120, 38, 0, 120, 39, 0, 120, 40, 0, 120,
|
||||
41, 0, 120, 42, 0, 9, 1, 120, 1, 0, 4, 4, 56, 19, 1, 70, 28, 1, 58,
|
||||
36, 1, 70, 55, 1, 1, 4, 48, 14, 0, 62, 23, 0, 48, 26, 0, 60, 39, 0,
|
||||
4, 4, 56, 19, 1, 66, 28, 1, 60, 36, 1, 66, 55, 1, 1, 3, 56, 14, 0, 60,
|
||||
24, 0, 60, 39, 0, 6, 2, 84, 20, 0, 84, 55, 0, 7, 2, 88, 15, 1, 88, 39,
|
||||
1, 10, 2, 88, 1, 0, 88, 17, 0, 4, 4, 56, 19, 1, 70, 28, 1, 58, 36, 1,
|
||||
70, 55, 1, 1, 4, 48, 14, 0, 62, 23, 0, 48, 26, 0, 60, 39, 0, 4, 2, 60,
|
||||
29, 1, 68, 55, 1, 1, 2, 56, 24, 0, 56, 39, 0, 6, 2, 112, 29, 0, 112,
|
||||
55, 0, 7, 2, 112, 24, 1, 112, 39, 1, 10, 2, 112, 7, 0, 112, 17, 0, 0,
|
||||
2, 64, 18, 1, 64, 20, 1, 4, 4, 48, 18, 0, 48, 19, 0, 60, 30, 0, 60,
|
||||
54, 0, 5, 2, 48, 17, 1, 48, 39, 1, 8, 2, 48, 2, 0, 48, 17, 0, 4, 2,
|
||||
56, 19, 1, 68, 55, 1, 1, 2, 48, 14, 0, 60, 39, 0, 4, 6, 62, 19, 0, 90,
|
||||
28, 0, 80, 37, 0, 90, 43, 0, 86, 48, 0, 118, 56, 0, 5, 6, 74, 14, 1,
|
||||
98, 23, 1, 66, 26, 1, 74, 27, 1, 98, 34, 1, 118, 40, 1, 8, 5, 74, 0,
|
||||
0, 78, 7, 0, 82, 9, 0, 98, 15, 0, 118, 18, 0, 6, 1, 84, 24, 0, 7, 1,
|
||||
88, 20, 1, 10, 1, 88, 5, 0, 6, 1, 84, 24, 0, 7, 1, 88, 20, 1, 10, 1,
|
||||
88, 5, 0, 4, 2, 56, 19, 0, 60, 55, 0, 5, 2, 48, 14, 1, 60, 39, 1, 8,
|
||||
2, 64, 0, 0, 70, 17, 0, 6, 2, 72, 20, 0, 72, 47, 0, 3, 2, 76, 15, 1,
|
||||
76, 35, 1, 4, 2, 60, 20, 1, 60, 40, 1, 1, 2, 56, 15, 0, 64, 29, 0, 4,
|
||||
2, 60, 20, 1, 60, 40, 1, 1, 1, 56, 18, 0, 4, 2, 84, 20, 1, 84, 40, 1,
|
||||
1, 1, 56, 18, 0, 6, 1, 84, 22, 0, 7, 1, 88, 18, 1, 10, 1, 88, 3, 0,
|
||||
6, 1, 84, 22, 0, 7, 1, 88, 18, 1, 10, 1, 88, 3, 0, 6, 2, 84, 20, 0,
|
||||
112, 40, 0, 3, 2, 68, 15, 1, 96, 29, 1, 4, 2, 66, 20, 0, 66, 40, 0,
|
||||
1, 2, 42, 15, 1, 64, 29, 1, 4, 2, 62, 20, 1, 66, 40, 1, 1, 2, 42, 15,
|
||||
0, 64, 29, 0, 4, 2, 60, 20, 0, 60, 40, 0, 1, 2, 56, 15, 1, 64, 29, 1,
|
||||
0, 0, 4, 4, 60, 20, 1, 60, 39, 1, 60, 47, 1, 60, 55, 1, 1, 4, 56, 15,
|
||||
0, 60, 28, 0, 60, 35, 0, 60, 39, 0, 6, 2, 84, 21, 0, 84, 49, 0, 7, 2,
|
||||
88, 16, 1, 88, 36, 1, 10, 2, 88, 2, 0, 88, 16, 0, 4, 2, 60, 20, 1, 60,
|
||||
55, 1, 1, 2, 56, 15, 0, 60, 39, 0, 0, 2, 60, 20, 1, 60, 55, 1, 6, 1,
|
||||
84, 25, 0, 7, 1, 84, 20, 1, 10, 1, 84, 5, 0, 6, 1, 84, 25, 0, 7, 1,
|
||||
88, 20, 1, 10, 1, 88, 5, 0, 6, 2, 84, 20, 0, 112, 42, 0, 7, 2, 88, 15,
|
||||
1, 116, 31, 1, 10, 2, 88, 1, 0, 116, 11, 0, 4, 3, 60, 20, 1, 60, 40,
|
||||
1, 60, 55, 1, 1, 3, 56, 15, 0, 64, 29, 0, 60, 39, 0, 4, 1, 60, 55, 1,
|
||||
1, 1, 52, 39, 0, 6, 1, 80, 55, 0, 7, 1, 80, 39, 1, 10, 1, 80, 17, 0,
|
||||
6, 1, 80, 55, 0, 7, 1, 80, 39, 1, 10, 1, 80, 17, 0, 6, 1, 76, 55, 0,
|
||||
7, 1, 68, 39, 1, 10, 1, 68, 17, 0, 6, 1, 76, 55, 0, 7, 1, 76, 39, 1,
|
||||
10, 1, 76, 17, 0, 4, 1, 60, 55, 1, 1, 1, 60, 39, 0, 6, 1, 84, 55, 0,
|
||||
7, 1, 88, 39, 1, 10, 1, 88, 17, 0, 4, 1, 78, 55, 0, 5, 1, 78, 39, 1,
|
||||
8, 1, 78, 17, 0, 4, 3, 56, 35, 1, 68, 40, 1, 68, 55, 1, 1, 4, 48, 26,
|
||||
0, 62, 27, 0, 74, 33, 0, 72, 39, 0, 4, 3, 56, 29, 1, 58, 40, 1, 62,
|
||||
55, 1, 1, 4, 46, 23, 0, 48, 26, 0, 56, 29, 0, 56, 39, 0, 4, 2, 68, 35,
|
||||
1, 68, 55, 1, 1, 2, 66, 26, 0, 60, 39, 0, 2, 1, 84, 54, 0, 0, 0, 88,
|
||||
65, 0, 0, 2, 0, 0, 0, 144, 14, 0, 0, 88, 84, 0, 0, 47, 0, 0, 0, 168,
|
||||
17, 0, 0, 88, 86, 0, 0, 48, 0, 0, 0, 124, 16, 0, 0, 3, 0, 0, 0, 212,
|
||||
22, 0, 0, 3, 0, 0, 0, 40, 29, 0, 0, 3, 3, 3, 9, 3, 11, 4, 4, 4, 7, 4,
|
||||
8, 4, 10, 4, 11, 5, 7, 8, 8, 9, 9, 9, 11, 11, 11, 38, 38, 38, 46, 38,
|
||||
62, 38, 110, 38, 118, 38, 134, 38, 142, 38, 159, 38, 175, 46, 46, 54,
|
||||
54, 54, 62, 54, 134, 62, 62, 102, 102, 102, 110, 102, 134, 102, 142,
|
||||
102, 159, 110, 126, 110, 134, 110, 142, 134, 134, 134, 159, 142, 142,
|
||||
151, 151, 151, 159, 151, 175, 159, 159, 1, 0, 0, 0, 116, 13, 0, 0, 3,
|
||||
0, 0, 0, 148, 14, 0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 50, 50, 50, 114,
|
||||
50, 163, 114, 163, 4, 168, 0, 0
|
||||
12, 18, 0, 0, 136, 17, 0, 0, 10, 2, 255, 3, 17, 19, 24, 29, 30, 55,
|
||||
0, 4, 56, 19, 2, 70, 28, 2, 58, 36, 2, 70, 55, 2, 14, 0, 255, 2, 23,
|
||||
19, 23, 55, 2, 2, 84, 19, 2, 84, 55, 2, 14, 0, 255, 2, 23, 19, 23, 55,
|
||||
0, 2, 66, 19, 2, 66, 55, 2, 23, 1, 1, 4, 23, 19, 17, 29, 23, 40, 30,
|
||||
55, 2, 2, 84, 22, 2, 84, 55, 2, 24, 1, 5, 2, 23, 23, 30, 55, 0, 4, 56,
|
||||
19, 2, 58, 29, 2, 60, 41, 2, 70, 55, 2, 15, 1, 255, 1, 23, 20, 2, 1,
|
||||
84, 20, 2, 15, 1, 255, 1, 23, 20, 2, 1, 84, 20, 2, 20, 1, 255, 2, 21,
|
||||
20, 21, 55, 2, 2, 84, 20, 2, 84, 55, 2, 0, 0, 255, 0, 0, 0, 19, 1, 255,
|
||||
2, 23, 20, 23, 54, 0, 2, 66, 20, 2, 66, 54, 2, 20, 1, 255, 2, 23, 20,
|
||||
20, 55, 0, 2, 66, 20, 2, 64, 55, 2, 20, 1, 255, 2, 23, 20, 20, 55, 2,
|
||||
2, 92, 20, 2, 80, 55, 2, 9, 0, 255, 1, 23, 19, 2, 1, 84, 19, 2, 9, 0,
|
||||
255, 1, 20, 19, 0, 1, 56, 19, 2, 11, 2, 255, 3, 17, 19, 24, 31, 30,
|
||||
55, 0, 5, 56, 19, 2, 70, 28, 2, 58, 36, 2, 68, 40, 2, 70, 55, 2, 13,
|
||||
2, 255, 3, 17, 19, 24, 32, 30, 55, 0, 5, 56, 19, 2, 78, 28, 2, 64, 36,
|
||||
2, 68, 38, 2, 78, 46, 2, 26, 1, 255, 2, 23, 20, 30, 42, 2, 2, 84, 23,
|
||||
2, 112, 55, 2, 13, 2, 255, 3, 17, 19, 24, 32, 30, 55, 0, 7, 58, 19,
|
||||
2, 84, 27, 2, 76, 35, 2, 72, 38, 2, 80, 44, 2, 68, 50, 2, 80, 52, 2,
|
||||
27, 0, 255, 1, 30, 26, 0, 1, 120, 26, 2, 26, 2, 255, 1, 30, 25, 0, 1,
|
||||
120, 25, 2, 10, 2, 2, 3, 17, 19, 24, 29, 30, 55, 0, 4, 56, 19, 2, 70,
|
||||
28, 2, 58, 36, 2, 70, 55, 2, 10, 2, 255, 3, 17, 19, 24, 29, 30, 55,
|
||||
0, 4, 56, 19, 2, 66, 28, 2, 60, 36, 2, 66, 55, 2, 20, 2, 255, 2, 23,
|
||||
20, 33, 55, 2, 2, 84, 20, 2, 84, 55, 2, 10, 2, 1, 3, 17, 19, 24, 29,
|
||||
30, 55, 0, 4, 56, 19, 2, 70, 28, 2, 58, 36, 2, 70, 55, 2, 32, 2, 255,
|
||||
1, 30, 40, 2, 1, 84, 40, 2, 29, 2, 255, 2, 21, 29, 30, 55, 0, 2, 60,
|
||||
29, 2, 68, 55, 2, 29, 1, 255, 2, 30, 29, 30, 55, 2, 2, 112, 29, 2, 112,
|
||||
55, 2, 5, 2, 0, 2, 23, 18, 23, 19, 2, 2, 84, 18, 2, 84, 19, 2, 7, 2,
|
||||
0, 2, 23, 18, 23, 20, 2, 2, 84, 18, 2, 84, 20, 2, 8, 2, 0, 3, 23, 18,
|
||||
23, 20, 30, 40, 2, 2, 84, 18, 2, 84, 22, 2, 6, 1, 255, 4, 14, 18, 14,
|
||||
19, 20, 30, 20, 54, 0, 4, 48, 18, 2, 48, 19, 2, 60, 30, 2, 60, 54, 2,
|
||||
14, 0, 255, 2, 17, 19, 30, 55, 0, 2, 56, 19, 2, 68, 55, 2, 12, 2, 255,
|
||||
3, 17, 19, 24, 32, 30, 56, 0, 6, 62, 19, 2, 90, 28, 2, 80, 37, 2, 90,
|
||||
43, 2, 86, 48, 2, 118, 56, 2, 22, 1, 255, 2, 23, 20, 30, 40, 2, 1, 84,
|
||||
22, 2, 25, 1, 255, 1, 23, 24, 2, 1, 84, 24, 2, 14, 0, 6, 2, 17, 19,
|
||||
20, 55, 0, 2, 56, 19, 2, 60, 55, 2, 18, 1, 255, 2, 20, 20, 20, 47, 2,
|
||||
2, 72, 20, 2, 72, 47, 2, 22, 1, 255, 2, 23, 20, 30, 40, 2, 1, 84, 22,
|
||||
2, 22, 2, 255, 1, 20, 22, 0, 2, 62, 20, 2, 66, 40, 2, 16, 2, 255, 2,
|
||||
20, 20, 28, 40, 2, 2, 84, 20, 2, 112, 40, 2, 4, 0, 255, 1, 23, 18, 2,
|
||||
1, 84, 18, 2, 20, 1, 255, 2, 23, 20, 30, 55, 2, 2, 84, 20, 2, 84, 55,
|
||||
2, 21, 1, 255, 3, 23, 20, 30, 39, 30, 49, 2, 2, 84, 21, 2, 84, 49, 2,
|
||||
26, 1, 255, 3, 23, 20, 24, 41, 30, 55, 2, 1, 84, 25, 2, 26, 1, 255,
|
||||
3, 23, 20, 24, 41, 30, 55, 2, 1, 84, 25, 2, 17, 1, 255, 2, 23, 20, 30,
|
||||
42, 2, 2, 84, 20, 2, 112, 42, 2, 34, 0, 255, 1, 27, 55, 2, 1, 84, 55,
|
||||
2, 34, 0, 255, 1, 30, 55, 0, 1, 78, 55, 2, 34, 0, 255, 1, 27, 55, 2,
|
||||
1, 84, 55, 2, 34, 0, 255, 1, 20, 55, 2, 1, 76, 55, 2, 31, 2, 255, 2,
|
||||
17, 35, 30, 55, 0, 2, 68, 35, 2, 68, 55, 2, 30, 2, 255, 3, 17, 35, 24,
|
||||
40, 30, 55, 0, 3, 56, 35, 2, 68, 40, 2, 68, 55, 2, 28, 2, 255, 3, 17,
|
||||
29, 24, 40, 30, 55, 0, 3, 56, 29, 2, 58, 40, 2, 62, 55, 2, 33, 0, 255,
|
||||
1, 27, 54, 2, 1, 84, 54, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2,
|
||||
1, 4, 1, 5, 1, 18, 2, 18, 19, 4, 18, 19, 30, 54, 2, 18, 20, 2, 18, 22,
|
||||
1, 19, 3, 19, 29, 55, 3, 19, 31, 55, 3, 19, 32, 56, 2, 19, 33, 2, 19,
|
||||
55, 1, 20, 2, 20, 40, 2, 20, 42, 2, 20, 47, 2, 20, 54, 2, 20, 55, 2,
|
||||
21, 49, 1, 22, 2, 22, 55, 2, 23, 55, 1, 24, 1, 25, 1, 26, 3, 29, 40,
|
||||
55, 2, 29, 55, 3, 35, 40, 55, 2, 35, 55, 1, 40, 1, 54, 1, 55, 0, 0,
|
||||
0, 1, 0, 0, 0, 220, 16, 0, 0, 4, 0, 0, 0, 227, 16, 0, 0, 5, 0, 0, 0,
|
||||
255, 16, 0, 0, 50, 50, 32, 114, 114, 32, 163, 163, 32, 0, 0, 0, 3, 0,
|
||||
0, 0, 236, 22, 0, 0, 84, 0, 69, 1, 74, 1, 18, 4, 5, 6, 7, 8, 9, 10,
|
||||
11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 0, 0, 0, 68, 69, 0, 0, 3,
|
||||
0, 0, 0, 0, 23, 0, 0, 74, 80, 0, 0, 10, 0, 0, 0, 238, 13, 0, 0, 85,
|
||||
83, 0, 0, 2, 0, 0, 0, 72, 23, 0, 0, 3, 0, 0, 0, 144, 17, 0, 0, 252,
|
||||
0, 253, 0, 4, 2, 64, 19, 1, 64, 55, 1, 1, 2, 40, 14, 0, 40, 39, 0, 4,
|
||||
4, 56, 19, 0, 58, 29, 0, 60, 41, 0, 70, 55, 0, 5, 3, 52, 15, 1, 64,
|
||||
30, 1, 72, 39, 1, 8, 3, 52, 1, 0, 64, 10, 0, 72, 17, 0, 4, 3, 60, 20,
|
||||
1, 60, 40, 1, 60, 55, 1, 1, 3, 56, 14, 0, 60, 25, 0, 60, 39, 0, 6, 1,
|
||||
84, 20, 0, 7, 1, 84, 15, 1, 10, 1, 84, 1, 0, 4, 1, 60, 20, 1, 1, 1,
|
||||
56, 15, 0, 6, 1, 84, 20, 0, 7, 1, 88, 15, 1, 10, 1, 88, 1, 0, 6, 2,
|
||||
84, 20, 0, 84, 55, 0, 7, 2, 84, 15, 1, 84, 39, 1, 10, 2, 84, 1, 0, 84,
|
||||
17, 0, 0, 0, 4, 2, 66, 20, 1, 66, 54, 1, 1, 2, 54, 15, 0, 54, 39, 0,
|
||||
6, 2, 92, 20, 0, 80, 55, 0, 7, 2, 88, 15, 1, 76, 39, 1, 10, 2, 88, 1,
|
||||
0, 76, 17, 0, 4, 2, 66, 20, 1, 64, 55, 1, 1, 2, 56, 15, 0, 56, 39, 0,
|
||||
4, 1, 56, 19, 1, 1, 1, 48, 14, 0, 4, 1, 60, 19, 1, 1, 1, 56, 14, 0,
|
||||
4, 1, 60, 19, 1, 1, 1, 56, 14, 0, 6, 2, 84, 23, 0, 112, 55, 0, 7, 2,
|
||||
88, 19, 1, 116, 39, 1, 10, 2, 88, 4, 0, 116, 17, 0, 4, 5, 56, 19, 1,
|
||||
70, 28, 1, 58, 36, 1, 68, 40, 1, 70, 55, 1, 1, 7, 52, 13, 0, 66, 22,
|
||||
0, 68, 23, 0, 52, 26, 0, 62, 27, 0, 72, 33, 0, 74, 39, 0, 4, 11, 58,
|
||||
19, 0, 84, 27, 0, 76, 34, 0, 76, 36, 0, 72, 38, 0, 80, 44, 0, 68, 50,
|
||||
0, 80, 51, 0, 80, 53, 0, 80, 57, 0, 80, 58, 0, 5, 10, 58, 13, 1, 66,
|
||||
22, 1, 80, 23, 1, 62, 26, 1, 66, 27, 1, 82, 32, 1, 74, 35, 1, 76, 37,
|
||||
1, 72, 38, 1, 80, 41, 1, 8, 5, 52, 0, 0, 58, 7, 0, 50, 8, 0, 82, 13,
|
||||
0, 72, 17, 0, 4, 6, 56, 19, 1, 68, 28, 1, 56, 36, 1, 68, 38, 1, 68,
|
||||
45, 1, 68, 55, 1, 1, 6, 48, 14, 0, 68, 23, 0, 48, 26, 0, 62, 27, 0,
|
||||
74, 33, 0, 72, 39, 0, 4, 5, 56, 19, 0, 78, 28, 0, 64, 36, 0, 68, 38,
|
||||
0, 78, 46, 0, 5, 10, 62, 13, 1, 62, 22, 1, 78, 23, 1, 50, 26, 1, 56,
|
||||
27, 1, 78, 32, 1, 78, 35, 1, 78, 37, 1, 60, 38, 1, 78, 41, 1, 8, 6,
|
||||
58, 0, 0, 64, 7, 0, 76, 8, 0, 76, 12, 0, 78, 15, 0, 72, 17, 0, 4, 1,
|
||||
120, 26, 0, 5, 1, 120, 21, 1, 12, 1, 120, 6, 0, 76, 34, 120, 19, 0,
|
||||
120, 20, 0, 120, 21, 0, 120, 22, 0, 120, 23, 0, 120, 24, 0, 120, 25,
|
||||
0, 120, 26, 0, 120, 27, 0, 120, 28, 0, 120, 29, 0, 120, 30, 0, 120,
|
||||
31, 0, 120, 32, 0, 120, 33, 0, 120, 34, 0, 120, 35, 0, 120, 36, 0, 120,
|
||||
37, 0, 120, 38, 0, 120, 39, 0, 120, 40, 0, 120, 41, 0, 120, 42, 0, 120,
|
||||
43, 0, 120, 44, 0, 120, 45, 0, 120, 46, 0, 120, 47, 0, 120, 48, 0, 120,
|
||||
49, 0, 120, 50, 0, 120, 51, 0, 120, 52, 0, 9, 1, 120, 2, 0, 4, 1, 120,
|
||||
25, 0, 5, 1, 120, 20, 1, 12, 1, 120, 5, 0, 76, 24, 120, 19, 0, 120,
|
||||
20, 0, 120, 21, 0, 120, 22, 0, 120, 23, 0, 120, 24, 0, 120, 25, 0, 120,
|
||||
26, 0, 120, 27, 0, 120, 28, 0, 120, 29, 0, 120, 30, 0, 120, 31, 0, 120,
|
||||
32, 0, 120, 33, 0, 120, 34, 0, 120, 35, 0, 120, 36, 0, 120, 37, 0, 120,
|
||||
38, 0, 120, 39, 0, 120, 40, 0, 120, 41, 0, 120, 42, 0, 9, 1, 120, 1,
|
||||
0, 4, 4, 56, 19, 1, 70, 28, 1, 58, 36, 1, 70, 55, 1, 1, 4, 48, 14, 0,
|
||||
62, 23, 0, 48, 26, 0, 60, 39, 0, 4, 4, 56, 19, 1, 66, 28, 1, 60, 36,
|
||||
1, 66, 55, 1, 1, 3, 56, 14, 0, 60, 24, 0, 60, 39, 0, 6, 2, 84, 20, 0,
|
||||
84, 55, 0, 7, 2, 88, 15, 1, 88, 39, 1, 10, 2, 88, 1, 0, 88, 17, 0, 4,
|
||||
4, 56, 19, 1, 70, 28, 1, 58, 36, 1, 70, 55, 1, 1, 4, 48, 14, 0, 62,
|
||||
23, 0, 48, 26, 0, 60, 39, 0, 4, 2, 60, 29, 1, 68, 55, 1, 1, 2, 56, 24,
|
||||
0, 56, 39, 0, 6, 2, 112, 29, 0, 112, 55, 0, 7, 2, 112, 24, 1, 112, 39,
|
||||
1, 10, 2, 112, 7, 0, 112, 17, 0, 0, 2, 64, 18, 1, 64, 20, 1, 4, 4, 48,
|
||||
18, 0, 48, 19, 0, 60, 30, 0, 60, 54, 0, 5, 2, 48, 17, 1, 48, 39, 1,
|
||||
8, 2, 48, 2, 0, 48, 17, 0, 4, 2, 56, 19, 1, 68, 55, 1, 1, 2, 48, 14,
|
||||
0, 60, 39, 0, 4, 6, 62, 19, 0, 90, 28, 0, 80, 37, 0, 90, 43, 0, 86,
|
||||
48, 0, 118, 56, 0, 5, 6, 74, 14, 1, 98, 23, 1, 66, 26, 1, 74, 27, 1,
|
||||
98, 34, 1, 118, 40, 1, 8, 5, 74, 0, 0, 78, 7, 0, 82, 9, 0, 98, 15, 0,
|
||||
118, 18, 0, 6, 1, 84, 24, 0, 7, 1, 88, 20, 1, 10, 1, 88, 5, 0, 6, 1,
|
||||
84, 24, 0, 7, 1, 88, 20, 1, 10, 1, 88, 5, 0, 4, 2, 56, 19, 0, 60, 55,
|
||||
0, 5, 2, 48, 14, 1, 60, 39, 1, 8, 2, 64, 0, 0, 70, 17, 0, 6, 2, 72,
|
||||
20, 0, 72, 47, 0, 3, 2, 76, 15, 1, 76, 35, 1, 4, 2, 60, 20, 1, 60, 40,
|
||||
1, 1, 2, 56, 15, 0, 64, 29, 0, 4, 2, 60, 20, 1, 60, 40, 1, 1, 1, 56,
|
||||
18, 0, 4, 2, 84, 20, 1, 84, 40, 1, 1, 1, 56, 18, 0, 6, 1, 84, 22, 0,
|
||||
7, 1, 88, 18, 1, 10, 1, 88, 3, 0, 6, 1, 84, 22, 0, 7, 1, 88, 18, 1,
|
||||
10, 1, 88, 3, 0, 6, 2, 84, 20, 0, 112, 40, 0, 3, 2, 68, 15, 1, 96, 29,
|
||||
1, 4, 2, 66, 20, 0, 66, 40, 0, 1, 2, 42, 15, 1, 64, 29, 1, 4, 2, 62,
|
||||
20, 1, 66, 40, 1, 1, 2, 42, 15, 0, 64, 29, 0, 4, 2, 60, 20, 0, 60, 40,
|
||||
0, 1, 2, 56, 15, 1, 64, 29, 1, 0, 0, 4, 4, 60, 20, 1, 60, 39, 1, 60,
|
||||
47, 1, 60, 55, 1, 1, 4, 56, 15, 0, 60, 28, 0, 60, 35, 0, 60, 39, 0,
|
||||
6, 2, 84, 21, 0, 84, 49, 0, 7, 2, 88, 16, 1, 88, 36, 1, 10, 2, 88, 2,
|
||||
0, 88, 16, 0, 4, 2, 60, 20, 1, 60, 55, 1, 1, 2, 56, 15, 0, 60, 39, 0,
|
||||
0, 2, 60, 20, 1, 60, 55, 1, 6, 1, 84, 25, 0, 7, 1, 84, 20, 1, 10, 1,
|
||||
84, 5, 0, 6, 1, 84, 25, 0, 7, 1, 88, 20, 1, 10, 1, 88, 5, 0, 6, 2, 84,
|
||||
20, 0, 112, 42, 0, 7, 2, 88, 15, 1, 116, 31, 1, 10, 2, 88, 1, 0, 116,
|
||||
11, 0, 4, 3, 60, 20, 1, 60, 40, 1, 60, 55, 1, 1, 3, 56, 15, 0, 64, 29,
|
||||
0, 60, 39, 0, 4, 1, 60, 55, 1, 1, 1, 52, 39, 0, 6, 1, 80, 55, 0, 7,
|
||||
1, 80, 39, 1, 10, 1, 80, 17, 0, 6, 1, 80, 55, 0, 7, 1, 80, 39, 1, 10,
|
||||
1, 80, 17, 0, 6, 1, 76, 55, 0, 7, 1, 68, 39, 1, 10, 1, 68, 17, 0, 6,
|
||||
1, 76, 55, 0, 7, 1, 76, 39, 1, 10, 1, 76, 17, 0, 4, 1, 60, 55, 1, 1,
|
||||
1, 60, 39, 0, 6, 1, 84, 55, 0, 7, 1, 88, 39, 1, 10, 1, 88, 17, 0, 4,
|
||||
1, 78, 55, 0, 5, 1, 78, 39, 1, 8, 1, 78, 17, 0, 4, 3, 56, 35, 1, 68,
|
||||
40, 1, 68, 55, 1, 1, 4, 48, 26, 0, 62, 27, 0, 74, 33, 0, 72, 39, 0,
|
||||
4, 3, 56, 29, 1, 58, 40, 1, 62, 55, 1, 1, 4, 46, 23, 0, 48, 26, 0, 56,
|
||||
29, 0, 56, 39, 0, 4, 2, 68, 35, 1, 68, 55, 1, 1, 2, 66, 26, 0, 60, 39,
|
||||
0, 2, 1, 84, 54, 0, 0, 0, 88, 65, 0, 0, 2, 0, 0, 0, 144, 14, 0, 0, 88,
|
||||
84, 0, 0, 47, 0, 0, 0, 168, 17, 0, 0, 88, 86, 0, 0, 48, 0, 0, 0, 124,
|
||||
16, 0, 0, 3, 0, 0, 0, 212, 22, 0, 0, 3, 0, 0, 0, 40, 29, 0, 0, 3, 3,
|
||||
3, 9, 3, 11, 4, 4, 4, 7, 4, 8, 4, 10, 4, 11, 5, 7, 8, 8, 9, 9, 9, 11,
|
||||
11, 11, 38, 38, 38, 46, 38, 62, 38, 110, 38, 118, 38, 134, 38, 142,
|
||||
38, 159, 38, 175, 46, 46, 54, 54, 54, 62, 54, 134, 62, 62, 102, 102,
|
||||
102, 110, 102, 134, 102, 142, 102, 159, 110, 126, 110, 134, 110, 142,
|
||||
134, 134, 134, 159, 142, 142, 151, 151, 151, 159, 151, 175, 159, 159,
|
||||
1, 0, 0, 0, 116, 13, 0, 0, 3, 0, 0, 0, 148, 14, 0, 0, 2, 2, 2, 2, 2,
|
||||
2, 2, 2, 2, 50, 50, 50, 114, 50, 163, 114, 163, 4, 168, 0, 0
|
||||
};
|
||||
const resource_hnd_t wifi_mfg_firmware_clm_blob = { RESOURCE_IN_MEMORY, 7697, {.mem = { (const char *) wifi_mfg_firmware_clm_blob_image_data }}};
|
||||
const resource_hnd_t wifi_mfg_firmware_clm_blob = { RESOURCE_IN_MEMORY, 7697, {.mem = { (const char *) wifi_mfg_firmware_clm_blob_data }}};
|
||||
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
|
|
@ -18,9 +18,9 @@
|
|||
#if defined(CY_STORAGE_WIFI_DATA)
|
||||
CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used))
|
||||
#endif
|
||||
const unsigned char wifi_firmware_clm_blob_image_data[7697] = {
|
||||
66, 76, 79, 66, 60, 0, 0, 0, 118, 196, 112, 169, 1, 0, 0, 0, 2, 0, 0,
|
||||
0, 0, 0, 0, 0, 60, 0, 0, 0, 209, 29, 0, 0, 236, 81, 84, 207, 0, 0, 0,
|
||||
const unsigned char wifi_firmware_clm_blob_data[7697] = {
|
||||
66, 76, 79, 66, 60, 0, 0, 0, 227, 75, 186, 247, 1, 0, 0, 0, 2, 0, 0,
|
||||
0, 0, 0, 0, 0, 60, 0, 0, 0, 209, 29, 0, 0, 79, 39, 210, 178, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 13, 30, 0, 0, 4, 0, 0, 0, 147, 68, 77, 121, 0, 0, 0,
|
||||
0, 67, 76, 77, 32, 68, 65, 84, 65, 0, 0, 18, 0, 2, 0, 57, 46, 49, 48,
|
||||
46, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 49, 46, 51, 54, 46,
|
||||
|
|
@ -257,7 +257,7 @@ const unsigned char wifi_firmware_clm_blob_image_data[7697] = {
|
|||
2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 4, 0, 1, 2, 3, 8, 12, 13, 14, 15, 16,
|
||||
17, 18, 19, 8, 4, 5, 6, 7, 8, 9, 10, 11, 21, 2, 2, 18, 4, 5, 6, 7, 8,
|
||||
9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 50, 48, 50, 48, 45,
|
||||
48, 49, 45, 50, 55, 32, 50, 49, 58, 53, 52, 58, 51, 51, 0, 0, 3, 0,
|
||||
48, 57, 45, 48, 57, 32, 48, 49, 58, 49, 57, 58, 48, 51, 0, 0, 3, 0,
|
||||
0, 0, 196, 11, 0, 0, 1, 14, 1, 0, 3, 0, 0, 0, 120, 14, 0, 0, 42, 58,
|
||||
16, 106, 138, 16, 155, 171, 16, 0, 0, 0, 3, 0, 0, 0, 28, 23, 0, 0, 21,
|
||||
2, 2, 0, 9, 0, 19, 0, 22, 0, 24, 0, 32, 0, 35, 0, 42, 0, 53, 0, 59,
|
||||
|
|
@ -423,5 +423,5 @@ const unsigned char wifi_firmware_clm_blob_image_data[7697] = {
|
|||
1, 0, 0, 0, 116, 13, 0, 0, 3, 0, 0, 0, 148, 14, 0, 0, 2, 2, 2, 2, 2,
|
||||
2, 2, 2, 2, 50, 50, 50, 114, 50, 163, 114, 163, 4, 168, 0, 0
|
||||
};
|
||||
const resource_hnd_t wifi_firmware_clm_blob = { RESOURCE_IN_MEMORY, 7697, {.mem = { (const char *) wifi_firmware_clm_blob_image_data }}};
|
||||
const resource_hnd_t wifi_firmware_clm_blob = { RESOURCE_IN_MEMORY, 7697, {.mem = { (const char *) wifi_firmware_clm_blob_data }}};
|
||||
|
||||
|
|
|
|||
|
|
@ -20,12 +20,12 @@
|
|||
#include "wiced_resource.h"
|
||||
|
||||
extern const resource_hnd_t wifi_firmware_image;
|
||||
extern const unsigned char wifi_firmware_image_data[414712];
|
||||
extern const unsigned char wifi_firmware_image_data[444199];
|
||||
extern const resource_hnd_t wifi_firmware_clm_blob;
|
||||
extern const unsigned char wifi_firmware_clm_blob_image_data[7697];
|
||||
extern const unsigned char wifi_firmware_clm_blob_data[7697];
|
||||
extern const resource_hnd_t wifi_mfg_firmware_image;
|
||||
extern const unsigned char wifi_mfg_firmware_image_data[495320];
|
||||
extern const unsigned char wifi_mfg_firmware_image_data[487520];
|
||||
extern const resource_hnd_t wifi_mfg_firmware_clm_blob;
|
||||
extern const unsigned char wifi_mfg_firmware_clm_blob_image_data[7697];
|
||||
extern const unsigned char wifi_mfg_firmware_clm_blob_data[7697];
|
||||
|
||||
#endif /* ifndef INCLUDED_RESOURCES_H_ */
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,259 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
|
||||
* SPDX-License-Identifier: LicenseRef-PBL
|
||||
*
|
||||
* This file and the related binary are licensed under the
|
||||
* Permissive Binary License, Version 1.0 (the "License");
|
||||
* you may not use these files except in compliance with the License.
|
||||
*
|
||||
* You may obtain a copy of the License here:
|
||||
* LICENSE-permissive-binary-license-1.0.txt and at
|
||||
* https://www.mbed.com/licenses/PBL-1.0
|
||||
*
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "wiced_resource.h"
|
||||
|
||||
#if defined(CY_STORAGE_WIFI_DATA)
|
||||
CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used))
|
||||
#endif
|
||||
const unsigned char wifi_mfg_firmware_clm_blob_data[4684] = {
|
||||
66, 76, 79, 66, 60, 0, 0, 0, 161, 72, 221, 222, 1, 0, 0, 0, 2, 0, 0,
|
||||
0, 0, 0, 0, 0, 60, 0, 0, 0, 12, 18, 0, 0, 233, 132, 74, 248, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 72, 18, 0, 0, 4, 0, 0, 0, 247, 227, 18, 42, 0, 0, 0,
|
||||
0, 67, 76, 77, 32, 68, 65, 84, 65, 0, 0, 18, 0, 1, 0, 67, 121, 112,
|
||||
114, 101, 115, 115, 46, 67, 89, 87, 52, 51, 55, 51, 0, 0, 0, 0, 0, 49,
|
||||
46, 51, 53, 46, 48, 0, 0, 0, 0, 0, 0, 0, 0, 152, 11, 0, 0, 67, 108,
|
||||
109, 73, 109, 112, 111, 114, 116, 58, 32, 49, 46, 51, 54, 46, 51, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 118, 49, 32, 50, 48, 48, 52, 49,
|
||||
53, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 0, 0, 92, 11, 0, 0, 18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 35, 110, 0, 13, 0, 13, 0, 0, 65, 68, 0, 9, 10,
|
||||
9, 10, 41, 65, 69, 0, 15, 14, 15, 14, 9, 65, 70, 0, 0, 1, 0, 1, 9, 65,
|
||||
71, 0, 15, 14, 15, 14, 10, 65, 73, 0, 30, 29, 30, 29, 10, 65, 76, 0,
|
||||
9, 10, 9, 10, 41, 65, 77, 0, 1, 2, 1, 2, 9, 65, 79, 0, 9, 10, 9, 10,
|
||||
41, 65, 82, 0, 23, 22, 23, 22, 10, 65, 83, 0, 30, 29, 30, 29, 10, 65,
|
||||
84, 0, 9, 10, 9, 10, 41, 65, 85, 0, 2, 3, 2, 3, 9, 65, 87, 0, 3, 4,
|
||||
3, 4, 10, 65, 90, 0, 9, 10, 9, 10, 41, 66, 65, 0, 9, 10, 9, 10, 41,
|
||||
66, 66, 0, 7, 8, 7, 8, 10, 66, 68, 0, 4, 5, 4, 5, 9, 66, 69, 0, 9, 10,
|
||||
9, 10, 41, 66, 70, 0, 9, 10, 9, 10, 9, 66, 71, 0, 9, 10, 9, 10, 41,
|
||||
66, 72, 0, 7, 8, 7, 8, 9, 66, 73, 0, 0, 1, 0, 1, 9, 66, 74, 0, 9, 10,
|
||||
9, 10, 41, 66, 76, 0, 9, 10, 9, 10, 41, 66, 77, 0, 30, 29, 30, 29, 10,
|
||||
66, 78, 0, 7, 8, 7, 8, 9, 66, 79, 0, 5, 6, 5, 6, 9, 66, 81, 0, 15, 14,
|
||||
15, 14, 9, 66, 82, 0, 15, 14, 15, 14, 9, 66, 83, 0, 30, 29, 30, 29,
|
||||
10, 66, 84, 0, 9, 10, 9, 10, 9, 66, 87, 0, 0, 1, 0, 1, 9, 66, 89, 0,
|
||||
0, 1, 0, 1, 9, 66, 90, 0, 15, 14, 15, 14, 9, 67, 65, 0, 6, 7, 6, 7,
|
||||
10, 67, 67, 0, 2, 3, 2, 3, 9, 67, 68, 0, 0, 1, 0, 1, 9, 67, 70, 0, 0,
|
||||
1, 0, 1, 9, 67, 71, 0, 0, 1, 0, 1, 9, 67, 72, 0, 9, 10, 9, 10, 41, 67,
|
||||
73, 0, 1, 2, 1, 2, 9, 67, 75, 0, 2, 3, 2, 3, 9, 67, 76, 0, 15, 14, 15,
|
||||
14, 9, 67, 77, 0, 9, 10, 9, 10, 41, 67, 78, 0, 7, 8, 7, 8, 9, 67, 79,
|
||||
0, 8, 9, 8, 9, 10, 67, 82, 0, 30, 29, 30, 29, 10, 67, 86, 0, 9, 10,
|
||||
9, 10, 41, 67, 87, 0, 27, 26, 27, 26, 9, 67, 88, 0, 2, 3, 2, 3, 9, 67,
|
||||
89, 0, 9, 10, 9, 10, 41, 67, 90, 0, 9, 10, 9, 10, 41, 68, 69, 0, 9,
|
||||
10, 9, 10, 41, 68, 74, 0, 10, 0, 10, 0, 8, 68, 75, 0, 9, 10, 9, 10,
|
||||
41, 68, 77, 0, 22, 21, 22, 21, 10, 68, 79, 0, 15, 14, 15, 14, 10, 68,
|
||||
90, 0, 11, 11, 11, 11, 9, 69, 67, 0, 15, 14, 15, 14, 9, 69, 69, 0, 9,
|
||||
10, 9, 10, 41, 69, 71, 0, 12, 12, 12, 12, 9, 69, 72, 0, 12, 12, 12,
|
||||
12, 9, 69, 82, 0, 10, 0, 10, 0, 8, 69, 83, 0, 9, 10, 9, 10, 41, 69,
|
||||
84, 0, 0, 1, 0, 1, 9, 70, 73, 0, 9, 10, 9, 10, 41, 70, 74, 0, 2, 3,
|
||||
2, 3, 9, 70, 75, 0, 0, 1, 0, 1, 9, 70, 79, 0, 9, 10, 9, 10, 41, 70,
|
||||
82, 0, 9, 10, 9, 10, 41, 71, 65, 0, 9, 10, 9, 10, 41, 71, 66, 0, 15,
|
||||
14, 15, 14, 9, 71, 68, 0, 14, 13, 14, 13, 10, 71, 69, 0, 9, 10, 9, 10,
|
||||
41, 71, 70, 0, 9, 10, 9, 10, 41, 71, 71, 0, 15, 14, 15, 14, 9, 71, 72,
|
||||
0, 0, 1, 0, 1, 9, 71, 73, 0, 9, 10, 9, 10, 41, 71, 76, 0, 9, 10, 9,
|
||||
10, 41, 71, 77, 0, 0, 1, 0, 1, 9, 71, 78, 0, 0, 1, 0, 1, 9, 71, 80,
|
||||
0, 9, 10, 9, 10, 41, 71, 81, 0, 0, 1, 0, 1, 9, 71, 82, 0, 9, 10, 9,
|
||||
10, 41, 71, 84, 0, 0, 1, 0, 1, 9, 71, 85, 0, 30, 29, 30, 29, 10, 71,
|
||||
87, 0, 0, 1, 0, 1, 9, 71, 89, 0, 4, 5, 4, 5, 9, 72, 75, 0, 15, 14, 15,
|
||||
14, 9, 72, 77, 0, 2, 3, 2, 3, 9, 72, 78, 0, 15, 14, 15, 14, 10, 72,
|
||||
82, 0, 9, 10, 9, 10, 41, 72, 84, 0, 15, 14, 15, 14, 10, 72, 85, 0, 9,
|
||||
10, 9, 10, 41, 73, 68, 0, 16, 15, 16, 15, 9, 73, 69, 0, 9, 10, 9, 10,
|
||||
41, 73, 76, 0, 12, 12, 12, 12, 9, 73, 77, 0, 15, 14, 15, 14, 9, 73,
|
||||
78, 0, 17, 16, 17, 16, 9, 73, 79, 0, 0, 1, 0, 1, 9, 73, 81, 0, 9, 10,
|
||||
9, 10, 41, 73, 83, 0, 9, 10, 9, 10, 41, 73, 84, 0, 9, 10, 9, 10, 41,
|
||||
74, 69, 0, 15, 14, 15, 14, 9, 74, 77, 0, 4, 5, 4, 5, 9, 74, 79, 0, 18,
|
||||
17, 18, 17, 9, 74, 80, 0, 19, 18, 19, 18, 10, 75, 69, 0, 9, 10, 9, 10,
|
||||
41, 75, 71, 0, 0, 1, 0, 1, 9, 75, 72, 0, 15, 14, 15, 14, 9, 75, 73,
|
||||
0, 2, 3, 2, 3, 9, 75, 77, 0, 0, 1, 0, 1, 9, 75, 78, 0, 15, 14, 15, 14,
|
||||
10, 75, 82, 0, 20, 19, 20, 19, 9, 75, 87, 0, 12, 12, 12, 12, 9, 75,
|
||||
89, 0, 30, 29, 30, 29, 10, 75, 90, 0, 21, 20, 21, 20, 9, 76, 65, 0,
|
||||
15, 14, 15, 14, 9, 76, 66, 0, 15, 14, 15, 14, 9, 76, 67, 0, 22, 21,
|
||||
22, 21, 10, 76, 73, 0, 9, 10, 9, 10, 41, 76, 75, 0, 15, 14, 15, 14,
|
||||
9, 76, 82, 0, 15, 14, 15, 14, 9, 76, 83, 0, 9, 10, 9, 10, 9, 76, 84,
|
||||
0, 9, 10, 9, 10, 41, 76, 85, 0, 9, 10, 9, 10, 41, 76, 86, 0, 9, 10,
|
||||
9, 10, 41, 76, 89, 0, 9, 10, 9, 10, 41, 77, 65, 0, 12, 12, 12, 12, 9,
|
||||
77, 67, 0, 9, 10, 9, 10, 41, 77, 68, 0, 9, 10, 9, 10, 41, 77, 69, 0,
|
||||
9, 10, 9, 10, 41, 77, 70, 0, 9, 10, 9, 10, 41, 77, 71, 0, 0, 1, 0, 1,
|
||||
9, 77, 75, 0, 9, 10, 9, 10, 41, 77, 76, 0, 9, 10, 9, 10, 41, 77, 77,
|
||||
0, 4, 5, 4, 5, 9, 77, 78, 0, 22, 21, 22, 21, 9, 77, 79, 0, 15, 14, 15,
|
||||
14, 9, 77, 80, 0, 30, 29, 30, 29, 10, 77, 81, 0, 9, 10, 9, 10, 41, 77,
|
||||
82, 0, 0, 1, 0, 1, 9, 77, 83, 0, 0, 1, 0, 1, 9, 77, 84, 0, 9, 10, 9,
|
||||
10, 41, 77, 85, 0, 0, 1, 0, 1, 9, 77, 86, 0, 7, 8, 7, 8, 9, 77, 87,
|
||||
0, 15, 14, 15, 14, 9, 77, 88, 0, 23, 22, 23, 22, 9, 77, 89, 0, 24, 23,
|
||||
24, 23, 9, 77, 90, 0, 9, 10, 9, 10, 41, 78, 65, 0, 15, 14, 15, 14, 9,
|
||||
78, 67, 0, 0, 1, 0, 1, 9, 78, 69, 0, 0, 1, 0, 1, 9, 78, 70, 0, 2, 3,
|
||||
2, 3, 9, 78, 71, 0, 25, 24, 25, 24, 9, 78, 73, 0, 8, 9, 8, 9, 9, 78,
|
||||
76, 0, 9, 10, 9, 10, 41, 78, 79, 0, 9, 10, 9, 10, 41, 78, 80, 0, 3,
|
||||
4, 3, 4, 9, 78, 82, 0, 0, 1, 0, 1, 9, 78, 85, 0, 15, 14, 15, 14, 9,
|
||||
78, 90, 0, 15, 14, 15, 14, 9, 79, 77, 0, 9, 10, 9, 10, 9, 80, 65, 0,
|
||||
15, 14, 15, 14, 10, 80, 69, 0, 15, 14, 15, 14, 9, 80, 70, 0, 9, 10,
|
||||
9, 10, 41, 80, 71, 0, 2, 3, 2, 3, 9, 80, 72, 0, 15, 14, 15, 14, 9, 80,
|
||||
75, 0, 4, 5, 4, 5, 9, 80, 76, 0, 9, 10, 9, 10, 41, 80, 77, 0, 9, 10,
|
||||
9, 10, 41, 80, 78, 0, 0, 1, 0, 1, 9, 80, 82, 0, 30, 29, 30, 29, 10,
|
||||
80, 83, 0, 10, 0, 10, 0, 8, 80, 84, 0, 9, 10, 9, 10, 41, 80, 87, 0,
|
||||
8, 9, 8, 9, 9, 80, 89, 0, 15, 14, 15, 14, 9, 81, 65, 0, 15, 14, 15,
|
||||
14, 9, 82, 69, 0, 9, 10, 9, 10, 41, 82, 79, 0, 9, 10, 9, 10, 41, 82,
|
||||
83, 0, 9, 10, 9, 10, 41, 82, 85, 0, 26, 25, 26, 25, 9, 82, 87, 0, 0,
|
||||
1, 0, 1, 9, 83, 65, 0, 27, 26, 27, 26, 9, 83, 66, 0, 10, 0, 10, 0, 8,
|
||||
83, 67, 0, 15, 14, 15, 14, 9, 83, 69, 0, 9, 10, 9, 10, 41, 83, 71, 0,
|
||||
15, 14, 15, 14, 9, 83, 73, 0, 9, 10, 9, 10, 41, 83, 75, 0, 9, 10, 9,
|
||||
10, 41, 83, 76, 0, 0, 1, 0, 1, 9, 83, 77, 0, 9, 10, 9, 10, 41, 83, 78,
|
||||
0, 0, 1, 0, 1, 9, 83, 79, 0, 10, 0, 10, 0, 8, 83, 82, 0, 9, 10, 9, 10,
|
||||
41, 83, 84, 0, 0, 1, 0, 1, 9, 83, 86, 0, 8, 9, 8, 9, 9, 83, 88, 0, 8,
|
||||
9, 8, 9, 9, 83, 90, 0, 9, 10, 9, 10, 41, 84, 67, 0, 15, 14, 15, 14,
|
||||
10, 84, 68, 0, 0, 1, 0, 1, 9, 84, 70, 0, 9, 10, 9, 10, 41, 84, 71, 0,
|
||||
9, 10, 9, 10, 41, 84, 72, 0, 15, 14, 15, 14, 9, 84, 74, 0, 0, 1, 0,
|
||||
1, 9, 84, 75, 0, 15, 14, 15, 14, 9, 84, 77, 0, 0, 1, 0, 1, 9, 84, 78,
|
||||
0, 28, 27, 28, 27, 9, 84, 79, 0, 2, 3, 2, 3, 9, 84, 82, 0, 9, 10, 9,
|
||||
10, 41, 84, 84, 0, 15, 14, 15, 14, 9, 84, 86, 0, 10, 0, 10, 0, 8, 84,
|
||||
87, 0, 30, 29, 30, 29, 10, 84, 90, 0, 9, 10, 9, 10, 41, 85, 65, 0, 29,
|
||||
28, 29, 28, 9, 85, 71, 0, 9, 10, 9, 10, 41, 85, 77, 0, 30, 29, 30, 29,
|
||||
10, 85, 83, 0, 30, 29, 30, 29, 10, 85, 89, 0, 7, 8, 7, 8, 9, 85, 90,
|
||||
0, 12, 12, 12, 12, 9, 86, 65, 0, 9, 10, 9, 10, 41, 86, 67, 0, 15, 14,
|
||||
15, 14, 10, 86, 69, 0, 7, 8, 7, 8, 9, 86, 71, 0, 15, 14, 15, 14, 10,
|
||||
86, 73, 0, 30, 29, 30, 29, 10, 86, 78, 0, 15, 14, 15, 14, 9, 86, 85,
|
||||
0, 15, 14, 15, 14, 9, 87, 70, 0, 9, 10, 9, 10, 41, 87, 83, 0, 31, 30,
|
||||
31, 30, 9, 88, 75, 0, 9, 10, 9, 10, 41, 88, 84, 0, 32, 0, 32, 0, 32,
|
||||
88, 88, 0, 33, 31, 33, 31, 42, 88, 90, 0, 34, 32, 34, 32, 42, 89, 69,
|
||||
0, 15, 14, 15, 14, 9, 89, 84, 0, 9, 10, 9, 10, 41, 90, 65, 0, 15, 14,
|
||||
15, 14, 9, 90, 77, 0, 15, 14, 15, 14, 9, 90, 87, 0, 0, 1, 0, 1, 9, 90,
|
||||
88, 0, 35, 33, 35, 33, 9, 90, 90, 0, 36, 34, 36, 34, 41, 38, 62, 8,
|
||||
102, 142, 8, 151, 175, 8, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 108,
|
||||
1, 0, 0, 1, 108, 1, 0, 0, 1, 80, 1, 0, 0, 1, 108, 1, 0, 0, 1, 108, 0,
|
||||
0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0,
|
||||
1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 0, 0, 1, 108, 1, 0, 0, 1, 68, 1, 0,
|
||||
0, 1, 96, 1, 0, 0, 1, 108, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0,
|
||||
1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 108, 1, 0, 0, 1,
|
||||
96, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 2, 1, 40,
|
||||
1, 0, 0, 1, 68, 1, 0, 0, 1, 108, 0, 0, 0, 1, 68, 1, 0, 2, 1, 40, 0,
|
||||
0, 2, 1, 40, 0, 0, 2, 1, 40, 1, 0, 0, 1, 108, 1, 0, 0, 1, 68, 1, 0,
|
||||
1, 2, 2, 6, 12, 2, 6, 8, 2, 3, 16, 2, 6, 10, 3, 6, 10, 13, 1, 6, 4,
|
||||
6, 7, 12, 13, 2, 6, 9, 3, 11, 1, 1, 11, 1, 13, 12, 13, 36, 48, 36, 64,
|
||||
36, 144, 52, 64, 100, 116, 100, 128, 100, 132, 100, 140, 100, 144, 132,
|
||||
140, 144, 144, 149, 157, 149, 161, 149, 165, 165, 165, 50, 48, 50, 48,
|
||||
45, 48, 56, 45, 48, 54, 32, 49, 53, 58, 48, 48, 58, 49, 57, 0, 42, 42,
|
||||
42, 138, 42, 171, 58, 58, 106, 106, 122, 171, 155, 155, 0, 1, 0, 0,
|
||||
0, 35, 11, 0, 0, 1, 0, 0, 0, 38, 11, 0, 0, 2, 0, 255, 1, 20, 1, 0, 1,
|
||||
68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 36, 1,
|
||||
0, 1, 108, 1, 1, 2, 0, 255, 1, 30, 1, 0, 1, 108, 1, 1, 2, 0, 255, 1,
|
||||
23, 1, 0, 1, 80, 1, 1, 2, 0, 255, 1, 27, 1, 0, 1, 108, 1, 1, 1, 0, 255,
|
||||
1, 30, 0, 0, 1, 108, 0, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0,
|
||||
255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1,
|
||||
2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68,
|
||||
1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 0, 0, 255, 0, 0, 0, 2, 0,
|
||||
255, 1, 30, 1, 0, 1, 108, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1,
|
||||
2, 0, 255, 1, 27, 1, 0, 1, 96, 1, 1, 2, 0, 255, 1, 30, 1, 0, 1, 108,
|
||||
1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1,
|
||||
68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1,
|
||||
0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 30,
|
||||
1, 0, 1, 108, 1, 1, 2, 0, 255, 1, 27, 1, 0, 1, 96, 1, 1, 2, 0, 255,
|
||||
1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0,
|
||||
255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 10, 1, 2, 1, 40, 1, 1,
|
||||
2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 1, 0, 255, 1, 30, 0, 0, 1, 108,
|
||||
0, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 1, 0, 255, 1, 10, 0, 2, 1,
|
||||
40, 0, 1, 1, 0, 255, 1, 10, 0, 2, 1, 40, 0, 1, 2, 0, 0, 1, 10, 1, 2,
|
||||
1, 40, 1, 1, 2, 0, 255, 1, 30, 1, 0, 1, 108, 1, 1, 2, 0, 255, 1, 20,
|
||||
1, 0, 1, 68, 1, 1, 0, 0, 1, 0, 0, 0, 252, 17, 0, 0, 1, 0, 0, 0, 255,
|
||||
17, 0, 0, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 8, 4, 5, 6, 7,
|
||||
8, 9, 10, 11, 2, 2, 2, 1, 1, 1, 1, 0, 6, 2, 5, 1, 1, 1, 3, 2, 4, 1,
|
||||
1, 1, 2, 4, 4, 2, 2, 1, 1, 1, 5, 2, 2, 1, 1, 1, 1, 4, 2, 2, 4, 2, 2,
|
||||
18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
|
||||
10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 12, 0, 1, 2, 3, 4, 5, 6,
|
||||
7, 8, 9, 10, 11, 3, 0, 0, 0, 19, 8, 0, 0, 1, 13, 1, 0, 2, 0, 0, 0, 56,
|
||||
9, 0, 0, 42, 58, 16, 106, 138, 16, 155, 171, 16, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 2, 0, 0, 0, 220, 10, 0, 0, 241, 0, 0, 0, 139, 0, 0, 0, 36,
|
||||
64, 4, 100, 144, 4, 149, 165, 4, 0, 0, 0, 112, 0, 0, 0, 188, 14, 0,
|
||||
0, 241, 8, 0, 0, 210, 8, 0, 0, 124, 14, 0, 0, 236, 10, 0, 0, 72, 9,
|
||||
0, 0, 88, 12, 0, 0, 28, 8, 0, 0, 212, 14, 0, 0, 132, 11, 0, 0, 116,
|
||||
11, 0, 0, 220, 17, 0, 0, 255, 80, 129, 5, 212, 17, 0, 0, 0, 0, 0, 0,
|
||||
228, 17, 0, 0, 41, 9, 0, 0, 0, 0, 0, 0, 120, 0, 0, 0, 41, 11, 0, 0,
|
||||
0, 0, 0, 0, 60, 11, 0, 0, 0, 0, 0, 0, 21, 9, 0, 0, 244, 17, 0, 0, 84,
|
||||
11, 0, 0, 204, 14, 0, 0, 180, 14, 0, 0, 116, 14, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 100, 14, 0, 0, 196, 14, 0, 0, 108, 14, 0, 0,
|
||||
172, 14, 0, 0, 4, 18, 0, 0, 104, 0, 0, 0, 0, 0, 0, 0, 124, 11, 0, 0,
|
||||
96, 11, 0, 0, 0, 0, 255, 0, 0, 0, 3, 1, 4, 1, 23, 3, 0, 1, 80, 3, 1,
|
||||
3, 0, 255, 1, 20, 3, 0, 1, 68, 3, 1, 7, 1, 7, 2, 23, 3, 30, 16, 0, 2,
|
||||
80, 3, 1, 108, 16, 1, 5, 2, 6, 2, 23, 3, 30, 15, 0, 2, 80, 3, 1, 108,
|
||||
15, 1, 10, 0, 255, 1, 28, 16, 0, 1, 100, 16, 1, 10, 1, 6, 1, 30, 16,
|
||||
0, 1, 108, 16, 1, 7, 2, 7, 2, 23, 3, 30, 16, 0, 2, 80, 3, 1, 108, 16,
|
||||
1, 7, 1, 6, 2, 23, 3, 20, 16, 0, 2, 80, 3, 1, 68, 16, 1, 7, 1, 5, 2,
|
||||
17, 3, 20, 16, 0, 2, 56, 3, 1, 68, 16, 1, 7, 1, 4, 2, 23, 3, 14, 16,
|
||||
4, 1, 80, 3, 1, 2, 1, 56, 16, 1, 3, 1, 8, 1, 23, 3, 0, 1, 80, 3, 1,
|
||||
3, 1, 6, 1, 20, 3, 0, 1, 68, 3, 1, 3, 2, 4, 1, 17, 3, 0, 1, 56, 3, 1,
|
||||
7, 1, 5, 2, 23, 3, 20, 16, 0, 2, 80, 3, 1, 68, 16, 1, 5, 1, 6, 2, 23,
|
||||
3, 23, 15, 0, 2, 80, 3, 1, 80, 15, 1, 7, 1, 4, 2, 24, 3, 30, 16, 0,
|
||||
2, 84, 3, 1, 108, 16, 1, 7, 0, 255, 2, 23, 3, 23, 16, 0, 2, 80, 3, 1,
|
||||
80, 16, 1, 3, 2, 4, 1, 20, 3, 0, 1, 68, 3, 1, 7, 1, 4, 2, 14, 3, 20,
|
||||
16, 0, 2, 44, 3, 1, 68, 16, 1, 3, 1, 1, 1, 20, 3, 0, 1, 68, 3, 1, 5,
|
||||
1, 5, 2, 23, 3, 30, 15, 0, 2, 80, 3, 1, 108, 15, 1, 7, 1, 7, 2, 17,
|
||||
3, 30, 16, 0, 2, 56, 3, 1, 108, 16, 1, 7, 1, 2, 2, 30, 3, 30, 16, 0,
|
||||
2, 108, 3, 1, 108, 16, 1, 7, 1, 6, 2, 20, 3, 14, 16, 4, 1, 68, 3, 1,
|
||||
2, 1, 56, 16, 1, 7, 1, 1, 2, 23, 3, 23, 16, 0, 2, 80, 3, 1, 80, 16,
|
||||
1, 6, 1, 5, 3, 23, 3, 30, 15, 14, 17, 4, 2, 80, 3, 1, 108, 15, 1, 2,
|
||||
1, 56, 17, 1, 3, 1, 6, 1, 23, 3, 0, 1, 80, 3, 1, 7, 1, 4, 2, 20, 3,
|
||||
20, 16, 0, 2, 68, 3, 1, 68, 16, 1, 7, 2, 5, 2, 24, 3, 30, 16, 0, 2,
|
||||
84, 3, 1, 108, 16, 1, 4, 1, 5, 2, 20, 3, 20, 14, 0, 2, 68, 3, 1, 68,
|
||||
14, 1, 7, 0, 3, 2, 11, 3, 14, 16, 4, 1, 44, 3, 1, 2, 1, 56, 16, 1, 7,
|
||||
0, 3, 2, 11, 3, 14, 16, 4, 1, 44, 3, 1, 2, 1, 56, 16, 1, 9, 2, 255,
|
||||
2, 24, 5, 30, 16, 0, 2, 84, 5, 1, 108, 16, 1, 8, 1, 255, 3, 23, 4, 30,
|
||||
11, 14, 16, 4, 2, 80, 4, 1, 108, 11, 1, 2, 1, 56, 16, 1, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 1, 1, 3, 2, 3, 14, 2, 3, 15, 3, 3, 15, 17, 2, 3, 16, 3, 4,
|
||||
11, 16, 2, 5, 16, 1, 16, 0, 0, 0, 1, 0, 0, 0, 0, 11, 0, 0, 4, 0, 0,
|
||||
0, 7, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0,
|
||||
0, 0, 140, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 104, 11, 0,
|
||||
0, 0, 0, 4, 1, 68, 3, 0, 5, 1, 80, 1, 0, 8, 1, 80, 0, 0, 4, 1, 68, 3,
|
||||
0, 5, 1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 2, 80, 3, 0, 108, 16, 0, 5, 2,
|
||||
80, 1, 0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 2, 80, 3, 0, 108,
|
||||
15, 0, 5, 2, 80, 1, 0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 1, 100,
|
||||
16, 0, 5, 1, 100, 7, 0, 8, 1, 100, 6, 0, 4, 1, 108, 16, 0, 5, 1, 108,
|
||||
7, 0, 8, 1, 108, 6, 0, 4, 2, 80, 3, 0, 108, 16, 0, 5, 2, 80, 1, 0, 108,
|
||||
7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 2, 80, 3, 0, 68, 16, 0, 5, 2, 80,
|
||||
1, 0, 68, 7, 0, 8, 2, 80, 0, 0, 68, 6, 0, 4, 2, 56, 3, 0, 68, 16, 0,
|
||||
5, 2, 56, 1, 0, 68, 7, 0, 8, 2, 56, 0, 0, 68, 6, 0, 4, 1, 80, 3, 0,
|
||||
6, 1, 56, 16, 0, 5, 1, 80, 1, 0, 7, 1, 56, 7, 0, 12, 1, 80, 0, 0, 10,
|
||||
1, 56, 6, 0, 4, 1, 80, 3, 0, 5, 1, 80, 1, 0, 8, 1, 80, 0, 0, 4, 1, 68,
|
||||
3, 0, 5, 1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 1, 56, 3, 0, 5, 1, 56, 1, 0,
|
||||
8, 1, 56, 0, 0, 4, 2, 80, 3, 0, 68, 16, 0, 5, 2, 80, 1, 0, 68, 7, 0,
|
||||
8, 2, 80, 0, 0, 68, 6, 0, 4, 2, 80, 3, 0, 80, 15, 0, 5, 2, 80, 1, 0,
|
||||
80, 7, 0, 8, 2, 80, 0, 0, 80, 6, 0, 4, 2, 84, 3, 0, 108, 16, 0, 5, 2,
|
||||
84, 1, 0, 108, 7, 0, 8, 2, 84, 0, 0, 108, 6, 0, 4, 2, 80, 3, 0, 80,
|
||||
16, 0, 5, 2, 80, 1, 0, 80, 7, 0, 8, 2, 80, 0, 0, 80, 6, 0, 4, 1, 68,
|
||||
3, 0, 5, 1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 2, 44, 3, 0, 68, 16, 0, 5,
|
||||
2, 44, 1, 0, 68, 7, 0, 8, 2, 44, 0, 0, 68, 6, 0, 4, 1, 68, 3, 0, 5,
|
||||
1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 2, 80, 3, 0, 108, 15, 0, 5, 2, 80, 1,
|
||||
0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 2, 56, 3, 0, 108, 16, 0,
|
||||
5, 2, 56, 1, 0, 108, 7, 0, 8, 2, 56, 0, 0, 108, 6, 0, 4, 2, 108, 3,
|
||||
0, 108, 16, 0, 5, 2, 108, 1, 0, 108, 7, 0, 8, 2, 108, 0, 0, 108, 6,
|
||||
0, 4, 1, 68, 3, 0, 6, 1, 56, 16, 0, 5, 1, 68, 1, 0, 7, 1, 56, 7, 0,
|
||||
12, 1, 68, 0, 0, 10, 1, 56, 6, 0, 4, 2, 80, 3, 0, 80, 16, 0, 5, 2, 80,
|
||||
1, 0, 80, 7, 0, 8, 2, 80, 0, 0, 80, 6, 0, 4, 2, 80, 3, 0, 108, 15, 0,
|
||||
6, 1, 56, 17, 0, 5, 2, 80, 1, 0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6,
|
||||
0, 4, 1, 80, 3, 0, 5, 1, 80, 1, 0, 8, 1, 80, 0, 0, 4, 2, 68, 3, 0, 68,
|
||||
16, 0, 5, 2, 68, 1, 0, 68, 7, 0, 8, 2, 68, 0, 0, 68, 6, 0, 4, 2, 84,
|
||||
3, 0, 108, 16, 0, 5, 2, 84, 1, 0, 108, 7, 0, 8, 2, 84, 0, 0, 108, 6,
|
||||
0, 4, 2, 68, 3, 0, 68, 14, 0, 5, 2, 68, 1, 0, 68, 6, 0, 8, 1, 68, 0,
|
||||
0, 4, 1, 44, 3, 0, 6, 1, 56, 16, 0, 5, 1, 44, 1, 0, 7, 1, 56, 7, 0,
|
||||
12, 1, 44, 0, 0, 10, 1, 56, 6, 0, 4, 1, 44, 3, 0, 6, 1, 56, 16, 0, 5,
|
||||
1, 44, 1, 0, 7, 1, 56, 7, 0, 12, 1, 44, 0, 0, 10, 1, 56, 6, 0, 4, 2,
|
||||
84, 5, 0, 108, 16, 0, 5, 2, 84, 3, 0, 108, 7, 0, 8, 2, 84, 1, 0, 108,
|
||||
6, 0, 4, 2, 80, 4, 0, 108, 11, 0, 6, 1, 56, 16, 0, 5, 2, 80, 2, 0, 108,
|
||||
5, 0, 7, 1, 56, 7, 0, 12, 1, 80, 1, 0, 10, 1, 56, 6, 0, 0, 0, 2, 0,
|
||||
0, 0, 156, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 11, 38, 46, 38, 62,
|
||||
38, 142, 38, 175, 102, 142, 151, 151, 151, 159, 1, 0, 0, 0, 238, 8,
|
||||
0, 0, 0, 2, 2, 0, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 115, 67, 0, 0
|
||||
};
|
||||
const resource_hnd_t wifi_mfg_firmware_clm_blob = { RESOURCE_IN_MEMORY, 4684, {.mem = { (const char *) wifi_mfg_firmware_clm_blob_data }}};
|
||||
|
||||
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,259 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
|
||||
* SPDX-License-Identifier: LicenseRef-PBL
|
||||
*
|
||||
* This file and the related binary are licensed under the
|
||||
* Permissive Binary License, Version 1.0 (the "License");
|
||||
* you may not use these files except in compliance with the License.
|
||||
*
|
||||
* You may obtain a copy of the License here:
|
||||
* LICENSE-permissive-binary-license-1.0.txt and at
|
||||
* https://www.mbed.com/licenses/PBL-1.0
|
||||
*
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "wiced_resource.h"
|
||||
|
||||
#if defined(CY_STORAGE_WIFI_DATA)
|
||||
CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used))
|
||||
#endif
|
||||
const unsigned char wifi_firmware_clm_blob_data[4684] = {
|
||||
66, 76, 79, 66, 60, 0, 0, 0, 154, 219, 133, 155, 1, 0, 0, 0, 2, 0, 0,
|
||||
0, 0, 0, 0, 0, 60, 0, 0, 0, 12, 18, 0, 0, 38, 6, 158, 153, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 72, 18, 0, 0, 4, 0, 0, 0, 247, 227, 18, 42, 0, 0, 0,
|
||||
0, 67, 76, 77, 32, 68, 65, 84, 65, 0, 0, 18, 0, 1, 0, 67, 121, 112,
|
||||
114, 101, 115, 115, 46, 67, 89, 87, 52, 51, 55, 51, 0, 0, 0, 0, 0, 49,
|
||||
46, 51, 53, 46, 48, 0, 0, 0, 0, 0, 0, 0, 0, 152, 11, 0, 0, 67, 108,
|
||||
109, 73, 109, 112, 111, 114, 116, 58, 32, 49, 46, 51, 54, 46, 51, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 118, 49, 32, 50, 48, 48, 52, 49,
|
||||
53, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 0, 0, 92, 11, 0, 0, 18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 21, 35, 110, 0, 13, 0, 13, 0, 0, 65, 68, 0, 9, 10,
|
||||
9, 10, 41, 65, 69, 0, 15, 14, 15, 14, 9, 65, 70, 0, 0, 1, 0, 1, 9, 65,
|
||||
71, 0, 15, 14, 15, 14, 10, 65, 73, 0, 30, 29, 30, 29, 10, 65, 76, 0,
|
||||
9, 10, 9, 10, 41, 65, 77, 0, 1, 2, 1, 2, 9, 65, 79, 0, 9, 10, 9, 10,
|
||||
41, 65, 82, 0, 23, 22, 23, 22, 10, 65, 83, 0, 30, 29, 30, 29, 10, 65,
|
||||
84, 0, 9, 10, 9, 10, 41, 65, 85, 0, 2, 3, 2, 3, 9, 65, 87, 0, 3, 4,
|
||||
3, 4, 10, 65, 90, 0, 9, 10, 9, 10, 41, 66, 65, 0, 9, 10, 9, 10, 41,
|
||||
66, 66, 0, 7, 8, 7, 8, 10, 66, 68, 0, 4, 5, 4, 5, 9, 66, 69, 0, 9, 10,
|
||||
9, 10, 41, 66, 70, 0, 9, 10, 9, 10, 9, 66, 71, 0, 9, 10, 9, 10, 41,
|
||||
66, 72, 0, 7, 8, 7, 8, 9, 66, 73, 0, 0, 1, 0, 1, 9, 66, 74, 0, 9, 10,
|
||||
9, 10, 41, 66, 76, 0, 9, 10, 9, 10, 41, 66, 77, 0, 30, 29, 30, 29, 10,
|
||||
66, 78, 0, 7, 8, 7, 8, 9, 66, 79, 0, 5, 6, 5, 6, 9, 66, 81, 0, 15, 14,
|
||||
15, 14, 9, 66, 82, 0, 15, 14, 15, 14, 9, 66, 83, 0, 30, 29, 30, 29,
|
||||
10, 66, 84, 0, 9, 10, 9, 10, 9, 66, 87, 0, 0, 1, 0, 1, 9, 66, 89, 0,
|
||||
0, 1, 0, 1, 9, 66, 90, 0, 15, 14, 15, 14, 9, 67, 65, 0, 6, 7, 6, 7,
|
||||
10, 67, 67, 0, 2, 3, 2, 3, 9, 67, 68, 0, 0, 1, 0, 1, 9, 67, 70, 0, 0,
|
||||
1, 0, 1, 9, 67, 71, 0, 0, 1, 0, 1, 9, 67, 72, 0, 9, 10, 9, 10, 41, 67,
|
||||
73, 0, 1, 2, 1, 2, 9, 67, 75, 0, 2, 3, 2, 3, 9, 67, 76, 0, 15, 14, 15,
|
||||
14, 9, 67, 77, 0, 9, 10, 9, 10, 41, 67, 78, 0, 7, 8, 7, 8, 9, 67, 79,
|
||||
0, 8, 9, 8, 9, 10, 67, 82, 0, 30, 29, 30, 29, 10, 67, 86, 0, 9, 10,
|
||||
9, 10, 41, 67, 87, 0, 27, 26, 27, 26, 9, 67, 88, 0, 2, 3, 2, 3, 9, 67,
|
||||
89, 0, 9, 10, 9, 10, 41, 67, 90, 0, 9, 10, 9, 10, 41, 68, 69, 0, 9,
|
||||
10, 9, 10, 41, 68, 74, 0, 10, 0, 10, 0, 8, 68, 75, 0, 9, 10, 9, 10,
|
||||
41, 68, 77, 0, 22, 21, 22, 21, 10, 68, 79, 0, 15, 14, 15, 14, 10, 68,
|
||||
90, 0, 11, 11, 11, 11, 9, 69, 67, 0, 15, 14, 15, 14, 9, 69, 69, 0, 9,
|
||||
10, 9, 10, 41, 69, 71, 0, 12, 12, 12, 12, 9, 69, 72, 0, 12, 12, 12,
|
||||
12, 9, 69, 82, 0, 10, 0, 10, 0, 8, 69, 83, 0, 9, 10, 9, 10, 41, 69,
|
||||
84, 0, 0, 1, 0, 1, 9, 70, 73, 0, 9, 10, 9, 10, 41, 70, 74, 0, 2, 3,
|
||||
2, 3, 9, 70, 75, 0, 0, 1, 0, 1, 9, 70, 79, 0, 9, 10, 9, 10, 41, 70,
|
||||
82, 0, 9, 10, 9, 10, 41, 71, 65, 0, 9, 10, 9, 10, 41, 71, 66, 0, 15,
|
||||
14, 15, 14, 9, 71, 68, 0, 14, 13, 14, 13, 10, 71, 69, 0, 9, 10, 9, 10,
|
||||
41, 71, 70, 0, 9, 10, 9, 10, 41, 71, 71, 0, 15, 14, 15, 14, 9, 71, 72,
|
||||
0, 0, 1, 0, 1, 9, 71, 73, 0, 9, 10, 9, 10, 41, 71, 76, 0, 9, 10, 9,
|
||||
10, 41, 71, 77, 0, 0, 1, 0, 1, 9, 71, 78, 0, 0, 1, 0, 1, 9, 71, 80,
|
||||
0, 9, 10, 9, 10, 41, 71, 81, 0, 0, 1, 0, 1, 9, 71, 82, 0, 9, 10, 9,
|
||||
10, 41, 71, 84, 0, 0, 1, 0, 1, 9, 71, 85, 0, 30, 29, 30, 29, 10, 71,
|
||||
87, 0, 0, 1, 0, 1, 9, 71, 89, 0, 4, 5, 4, 5, 9, 72, 75, 0, 15, 14, 15,
|
||||
14, 9, 72, 77, 0, 2, 3, 2, 3, 9, 72, 78, 0, 15, 14, 15, 14, 10, 72,
|
||||
82, 0, 9, 10, 9, 10, 41, 72, 84, 0, 15, 14, 15, 14, 10, 72, 85, 0, 9,
|
||||
10, 9, 10, 41, 73, 68, 0, 16, 15, 16, 15, 9, 73, 69, 0, 9, 10, 9, 10,
|
||||
41, 73, 76, 0, 12, 12, 12, 12, 9, 73, 77, 0, 15, 14, 15, 14, 9, 73,
|
||||
78, 0, 17, 16, 17, 16, 9, 73, 79, 0, 0, 1, 0, 1, 9, 73, 81, 0, 9, 10,
|
||||
9, 10, 41, 73, 83, 0, 9, 10, 9, 10, 41, 73, 84, 0, 9, 10, 9, 10, 41,
|
||||
74, 69, 0, 15, 14, 15, 14, 9, 74, 77, 0, 4, 5, 4, 5, 9, 74, 79, 0, 18,
|
||||
17, 18, 17, 9, 74, 80, 0, 19, 18, 19, 18, 10, 75, 69, 0, 9, 10, 9, 10,
|
||||
41, 75, 71, 0, 0, 1, 0, 1, 9, 75, 72, 0, 15, 14, 15, 14, 9, 75, 73,
|
||||
0, 2, 3, 2, 3, 9, 75, 77, 0, 0, 1, 0, 1, 9, 75, 78, 0, 15, 14, 15, 14,
|
||||
10, 75, 82, 0, 20, 19, 20, 19, 9, 75, 87, 0, 12, 12, 12, 12, 9, 75,
|
||||
89, 0, 30, 29, 30, 29, 10, 75, 90, 0, 21, 20, 21, 20, 9, 76, 65, 0,
|
||||
15, 14, 15, 14, 9, 76, 66, 0, 15, 14, 15, 14, 9, 76, 67, 0, 22, 21,
|
||||
22, 21, 10, 76, 73, 0, 9, 10, 9, 10, 41, 76, 75, 0, 15, 14, 15, 14,
|
||||
9, 76, 82, 0, 15, 14, 15, 14, 9, 76, 83, 0, 9, 10, 9, 10, 9, 76, 84,
|
||||
0, 9, 10, 9, 10, 41, 76, 85, 0, 9, 10, 9, 10, 41, 76, 86, 0, 9, 10,
|
||||
9, 10, 41, 76, 89, 0, 9, 10, 9, 10, 41, 77, 65, 0, 12, 12, 12, 12, 9,
|
||||
77, 67, 0, 9, 10, 9, 10, 41, 77, 68, 0, 9, 10, 9, 10, 41, 77, 69, 0,
|
||||
9, 10, 9, 10, 41, 77, 70, 0, 9, 10, 9, 10, 41, 77, 71, 0, 0, 1, 0, 1,
|
||||
9, 77, 75, 0, 9, 10, 9, 10, 41, 77, 76, 0, 9, 10, 9, 10, 41, 77, 77,
|
||||
0, 4, 5, 4, 5, 9, 77, 78, 0, 22, 21, 22, 21, 9, 77, 79, 0, 15, 14, 15,
|
||||
14, 9, 77, 80, 0, 30, 29, 30, 29, 10, 77, 81, 0, 9, 10, 9, 10, 41, 77,
|
||||
82, 0, 0, 1, 0, 1, 9, 77, 83, 0, 0, 1, 0, 1, 9, 77, 84, 0, 9, 10, 9,
|
||||
10, 41, 77, 85, 0, 0, 1, 0, 1, 9, 77, 86, 0, 7, 8, 7, 8, 9, 77, 87,
|
||||
0, 15, 14, 15, 14, 9, 77, 88, 0, 23, 22, 23, 22, 9, 77, 89, 0, 24, 23,
|
||||
24, 23, 9, 77, 90, 0, 9, 10, 9, 10, 41, 78, 65, 0, 15, 14, 15, 14, 9,
|
||||
78, 67, 0, 0, 1, 0, 1, 9, 78, 69, 0, 0, 1, 0, 1, 9, 78, 70, 0, 2, 3,
|
||||
2, 3, 9, 78, 71, 0, 25, 24, 25, 24, 9, 78, 73, 0, 8, 9, 8, 9, 9, 78,
|
||||
76, 0, 9, 10, 9, 10, 41, 78, 79, 0, 9, 10, 9, 10, 41, 78, 80, 0, 3,
|
||||
4, 3, 4, 9, 78, 82, 0, 0, 1, 0, 1, 9, 78, 85, 0, 15, 14, 15, 14, 9,
|
||||
78, 90, 0, 15, 14, 15, 14, 9, 79, 77, 0, 9, 10, 9, 10, 9, 80, 65, 0,
|
||||
15, 14, 15, 14, 10, 80, 69, 0, 15, 14, 15, 14, 9, 80, 70, 0, 9, 10,
|
||||
9, 10, 41, 80, 71, 0, 2, 3, 2, 3, 9, 80, 72, 0, 15, 14, 15, 14, 9, 80,
|
||||
75, 0, 4, 5, 4, 5, 9, 80, 76, 0, 9, 10, 9, 10, 41, 80, 77, 0, 9, 10,
|
||||
9, 10, 41, 80, 78, 0, 0, 1, 0, 1, 9, 80, 82, 0, 30, 29, 30, 29, 10,
|
||||
80, 83, 0, 10, 0, 10, 0, 8, 80, 84, 0, 9, 10, 9, 10, 41, 80, 87, 0,
|
||||
8, 9, 8, 9, 9, 80, 89, 0, 15, 14, 15, 14, 9, 81, 65, 0, 15, 14, 15,
|
||||
14, 9, 82, 69, 0, 9, 10, 9, 10, 41, 82, 79, 0, 9, 10, 9, 10, 41, 82,
|
||||
83, 0, 9, 10, 9, 10, 41, 82, 85, 0, 26, 25, 26, 25, 9, 82, 87, 0, 0,
|
||||
1, 0, 1, 9, 83, 65, 0, 27, 26, 27, 26, 9, 83, 66, 0, 10, 0, 10, 0, 8,
|
||||
83, 67, 0, 15, 14, 15, 14, 9, 83, 69, 0, 9, 10, 9, 10, 41, 83, 71, 0,
|
||||
15, 14, 15, 14, 9, 83, 73, 0, 9, 10, 9, 10, 41, 83, 75, 0, 9, 10, 9,
|
||||
10, 41, 83, 76, 0, 0, 1, 0, 1, 9, 83, 77, 0, 9, 10, 9, 10, 41, 83, 78,
|
||||
0, 0, 1, 0, 1, 9, 83, 79, 0, 10, 0, 10, 0, 8, 83, 82, 0, 9, 10, 9, 10,
|
||||
41, 83, 84, 0, 0, 1, 0, 1, 9, 83, 86, 0, 8, 9, 8, 9, 9, 83, 88, 0, 8,
|
||||
9, 8, 9, 9, 83, 90, 0, 9, 10, 9, 10, 41, 84, 67, 0, 15, 14, 15, 14,
|
||||
10, 84, 68, 0, 0, 1, 0, 1, 9, 84, 70, 0, 9, 10, 9, 10, 41, 84, 71, 0,
|
||||
9, 10, 9, 10, 41, 84, 72, 0, 15, 14, 15, 14, 9, 84, 74, 0, 0, 1, 0,
|
||||
1, 9, 84, 75, 0, 15, 14, 15, 14, 9, 84, 77, 0, 0, 1, 0, 1, 9, 84, 78,
|
||||
0, 28, 27, 28, 27, 9, 84, 79, 0, 2, 3, 2, 3, 9, 84, 82, 0, 9, 10, 9,
|
||||
10, 41, 84, 84, 0, 15, 14, 15, 14, 9, 84, 86, 0, 10, 0, 10, 0, 8, 84,
|
||||
87, 0, 30, 29, 30, 29, 10, 84, 90, 0, 9, 10, 9, 10, 41, 85, 65, 0, 29,
|
||||
28, 29, 28, 9, 85, 71, 0, 9, 10, 9, 10, 41, 85, 77, 0, 30, 29, 30, 29,
|
||||
10, 85, 83, 0, 30, 29, 30, 29, 10, 85, 89, 0, 7, 8, 7, 8, 9, 85, 90,
|
||||
0, 12, 12, 12, 12, 9, 86, 65, 0, 9, 10, 9, 10, 41, 86, 67, 0, 15, 14,
|
||||
15, 14, 10, 86, 69, 0, 7, 8, 7, 8, 9, 86, 71, 0, 15, 14, 15, 14, 10,
|
||||
86, 73, 0, 30, 29, 30, 29, 10, 86, 78, 0, 15, 14, 15, 14, 9, 86, 85,
|
||||
0, 15, 14, 15, 14, 9, 87, 70, 0, 9, 10, 9, 10, 41, 87, 83, 0, 31, 30,
|
||||
31, 30, 9, 88, 75, 0, 9, 10, 9, 10, 41, 88, 84, 0, 32, 0, 32, 0, 32,
|
||||
88, 88, 0, 33, 31, 33, 31, 42, 88, 90, 0, 34, 32, 34, 32, 42, 89, 69,
|
||||
0, 15, 14, 15, 14, 9, 89, 84, 0, 9, 10, 9, 10, 41, 90, 65, 0, 15, 14,
|
||||
15, 14, 9, 90, 77, 0, 15, 14, 15, 14, 9, 90, 87, 0, 0, 1, 0, 1, 9, 90,
|
||||
88, 0, 35, 33, 35, 33, 9, 90, 90, 0, 36, 34, 36, 34, 41, 38, 62, 8,
|
||||
102, 142, 8, 151, 175, 8, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 108,
|
||||
1, 0, 0, 1, 108, 1, 0, 0, 1, 80, 1, 0, 0, 1, 108, 1, 0, 0, 1, 108, 0,
|
||||
0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0,
|
||||
1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 0, 0, 1, 108, 1, 0, 0, 1, 68, 1, 0,
|
||||
0, 1, 96, 1, 0, 0, 1, 108, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0,
|
||||
1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 108, 1, 0, 0, 1,
|
||||
96, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 0, 1, 68, 1, 0, 2, 1, 40,
|
||||
1, 0, 0, 1, 68, 1, 0, 0, 1, 108, 0, 0, 0, 1, 68, 1, 0, 2, 1, 40, 0,
|
||||
0, 2, 1, 40, 0, 0, 2, 1, 40, 1, 0, 0, 1, 108, 1, 0, 0, 1, 68, 1, 0,
|
||||
1, 2, 2, 6, 12, 2, 6, 8, 2, 3, 16, 2, 6, 10, 3, 6, 10, 13, 1, 6, 4,
|
||||
6, 7, 12, 13, 2, 6, 9, 3, 11, 1, 1, 11, 1, 13, 12, 13, 36, 48, 36, 64,
|
||||
36, 144, 52, 64, 100, 116, 100, 128, 100, 132, 100, 140, 100, 144, 132,
|
||||
140, 144, 144, 149, 157, 149, 161, 149, 165, 165, 165, 50, 48, 50, 48,
|
||||
45, 48, 56, 45, 48, 54, 32, 49, 53, 58, 48, 56, 58, 49, 55, 0, 42, 42,
|
||||
42, 138, 42, 171, 58, 58, 106, 106, 122, 171, 155, 155, 0, 1, 0, 0,
|
||||
0, 35, 11, 0, 0, 1, 0, 0, 0, 38, 11, 0, 0, 2, 0, 255, 1, 20, 1, 0, 1,
|
||||
68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 36, 1,
|
||||
0, 1, 108, 1, 1, 2, 0, 255, 1, 30, 1, 0, 1, 108, 1, 1, 2, 0, 255, 1,
|
||||
23, 1, 0, 1, 80, 1, 1, 2, 0, 255, 1, 27, 1, 0, 1, 108, 1, 1, 1, 0, 255,
|
||||
1, 30, 0, 0, 1, 108, 0, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0,
|
||||
255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1,
|
||||
2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68,
|
||||
1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 0, 0, 255, 0, 0, 0, 2, 0,
|
||||
255, 1, 30, 1, 0, 1, 108, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1,
|
||||
2, 0, 255, 1, 27, 1, 0, 1, 96, 1, 1, 2, 0, 255, 1, 30, 1, 0, 1, 108,
|
||||
1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1,
|
||||
68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1,
|
||||
0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 30,
|
||||
1, 0, 1, 108, 1, 1, 2, 0, 255, 1, 27, 1, 0, 1, 96, 1, 1, 2, 0, 255,
|
||||
1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0,
|
||||
255, 1, 20, 1, 0, 1, 68, 1, 1, 2, 0, 255, 1, 10, 1, 2, 1, 40, 1, 1,
|
||||
2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 1, 0, 255, 1, 30, 0, 0, 1, 108,
|
||||
0, 1, 2, 0, 255, 1, 20, 1, 0, 1, 68, 1, 1, 1, 0, 255, 1, 10, 0, 2, 1,
|
||||
40, 0, 1, 1, 0, 255, 1, 10, 0, 2, 1, 40, 0, 1, 2, 0, 0, 1, 10, 1, 2,
|
||||
1, 40, 1, 1, 2, 0, 255, 1, 30, 1, 0, 1, 108, 1, 1, 2, 0, 255, 1, 20,
|
||||
1, 0, 1, 68, 1, 1, 0, 0, 1, 0, 0, 0, 252, 17, 0, 0, 1, 0, 0, 0, 255,
|
||||
17, 0, 0, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 8, 4, 5, 6, 7,
|
||||
8, 9, 10, 11, 2, 2, 2, 1, 1, 1, 1, 0, 6, 2, 5, 1, 1, 1, 3, 2, 4, 1,
|
||||
1, 1, 2, 4, 4, 2, 2, 1, 1, 1, 5, 2, 2, 1, 1, 1, 1, 4, 2, 2, 4, 2, 2,
|
||||
18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
|
||||
10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 12, 0, 1, 2, 3, 4, 5, 6,
|
||||
7, 8, 9, 10, 11, 3, 0, 0, 0, 19, 8, 0, 0, 1, 13, 1, 0, 2, 0, 0, 0, 56,
|
||||
9, 0, 0, 42, 58, 16, 106, 138, 16, 155, 171, 16, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 2, 0, 0, 0, 220, 10, 0, 0, 241, 0, 0, 0, 139, 0, 0, 0, 36,
|
||||
64, 4, 100, 144, 4, 149, 165, 4, 0, 0, 0, 112, 0, 0, 0, 188, 14, 0,
|
||||
0, 241, 8, 0, 0, 210, 8, 0, 0, 124, 14, 0, 0, 236, 10, 0, 0, 72, 9,
|
||||
0, 0, 88, 12, 0, 0, 28, 8, 0, 0, 212, 14, 0, 0, 132, 11, 0, 0, 116,
|
||||
11, 0, 0, 220, 17, 0, 0, 255, 80, 129, 5, 212, 17, 0, 0, 0, 0, 0, 0,
|
||||
228, 17, 0, 0, 41, 9, 0, 0, 0, 0, 0, 0, 120, 0, 0, 0, 41, 11, 0, 0,
|
||||
0, 0, 0, 0, 60, 11, 0, 0, 0, 0, 0, 0, 21, 9, 0, 0, 244, 17, 0, 0, 84,
|
||||
11, 0, 0, 204, 14, 0, 0, 180, 14, 0, 0, 116, 14, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 100, 14, 0, 0, 196, 14, 0, 0, 108, 14, 0, 0,
|
||||
172, 14, 0, 0, 4, 18, 0, 0, 104, 0, 0, 0, 0, 0, 0, 0, 124, 11, 0, 0,
|
||||
96, 11, 0, 0, 0, 0, 255, 0, 0, 0, 3, 1, 4, 1, 23, 3, 0, 1, 80, 3, 1,
|
||||
3, 0, 255, 1, 20, 3, 0, 1, 68, 3, 1, 7, 1, 7, 2, 23, 3, 30, 16, 0, 2,
|
||||
80, 3, 1, 108, 16, 1, 5, 2, 6, 2, 23, 3, 30, 15, 0, 2, 80, 3, 1, 108,
|
||||
15, 1, 10, 0, 255, 1, 28, 16, 0, 1, 100, 16, 1, 10, 1, 6, 1, 30, 16,
|
||||
0, 1, 108, 16, 1, 7, 2, 7, 2, 23, 3, 30, 16, 0, 2, 80, 3, 1, 108, 16,
|
||||
1, 7, 1, 6, 2, 23, 3, 20, 16, 0, 2, 80, 3, 1, 68, 16, 1, 7, 1, 5, 2,
|
||||
17, 3, 20, 16, 0, 2, 56, 3, 1, 68, 16, 1, 7, 1, 4, 2, 23, 3, 14, 16,
|
||||
4, 1, 80, 3, 1, 2, 1, 56, 16, 1, 3, 1, 8, 1, 23, 3, 0, 1, 80, 3, 1,
|
||||
3, 1, 6, 1, 20, 3, 0, 1, 68, 3, 1, 3, 2, 4, 1, 17, 3, 0, 1, 56, 3, 1,
|
||||
7, 1, 5, 2, 23, 3, 20, 16, 0, 2, 80, 3, 1, 68, 16, 1, 5, 1, 6, 2, 23,
|
||||
3, 23, 15, 0, 2, 80, 3, 1, 80, 15, 1, 7, 1, 4, 2, 24, 3, 30, 16, 0,
|
||||
2, 84, 3, 1, 108, 16, 1, 7, 0, 255, 2, 23, 3, 23, 16, 0, 2, 80, 3, 1,
|
||||
80, 16, 1, 3, 2, 4, 1, 20, 3, 0, 1, 68, 3, 1, 7, 1, 4, 2, 14, 3, 20,
|
||||
16, 0, 2, 44, 3, 1, 68, 16, 1, 3, 1, 1, 1, 20, 3, 0, 1, 68, 3, 1, 5,
|
||||
1, 5, 2, 23, 3, 30, 15, 0, 2, 80, 3, 1, 108, 15, 1, 7, 1, 7, 2, 17,
|
||||
3, 30, 16, 0, 2, 56, 3, 1, 108, 16, 1, 7, 1, 2, 2, 30, 3, 30, 16, 0,
|
||||
2, 108, 3, 1, 108, 16, 1, 7, 1, 6, 2, 20, 3, 14, 16, 4, 1, 68, 3, 1,
|
||||
2, 1, 56, 16, 1, 7, 1, 1, 2, 23, 3, 23, 16, 0, 2, 80, 3, 1, 80, 16,
|
||||
1, 6, 1, 5, 3, 23, 3, 30, 15, 14, 17, 4, 2, 80, 3, 1, 108, 15, 1, 2,
|
||||
1, 56, 17, 1, 3, 1, 6, 1, 23, 3, 0, 1, 80, 3, 1, 7, 1, 4, 2, 20, 3,
|
||||
20, 16, 0, 2, 68, 3, 1, 68, 16, 1, 7, 2, 5, 2, 24, 3, 30, 16, 0, 2,
|
||||
84, 3, 1, 108, 16, 1, 4, 1, 5, 2, 20, 3, 20, 14, 0, 2, 68, 3, 1, 68,
|
||||
14, 1, 7, 0, 3, 2, 11, 3, 14, 16, 4, 1, 44, 3, 1, 2, 1, 56, 16, 1, 7,
|
||||
0, 3, 2, 11, 3, 14, 16, 4, 1, 44, 3, 1, 2, 1, 56, 16, 1, 9, 2, 255,
|
||||
2, 24, 5, 30, 16, 0, 2, 84, 5, 1, 108, 16, 1, 8, 1, 255, 3, 23, 4, 30,
|
||||
11, 14, 16, 4, 2, 80, 4, 1, 108, 11, 1, 2, 1, 56, 16, 1, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 1, 1, 1, 3, 2, 3, 14, 2, 3, 15, 3, 3, 15, 17, 2, 3, 16, 3, 4,
|
||||
11, 16, 2, 5, 16, 1, 16, 0, 0, 0, 1, 0, 0, 0, 0, 11, 0, 0, 4, 0, 0,
|
||||
0, 7, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0,
|
||||
0, 0, 140, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 104, 11, 0,
|
||||
0, 0, 0, 4, 1, 68, 3, 0, 5, 1, 80, 1, 0, 8, 1, 80, 0, 0, 4, 1, 68, 3,
|
||||
0, 5, 1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 2, 80, 3, 0, 108, 16, 0, 5, 2,
|
||||
80, 1, 0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 2, 80, 3, 0, 108,
|
||||
15, 0, 5, 2, 80, 1, 0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 1, 100,
|
||||
16, 0, 5, 1, 100, 7, 0, 8, 1, 100, 6, 0, 4, 1, 108, 16, 0, 5, 1, 108,
|
||||
7, 0, 8, 1, 108, 6, 0, 4, 2, 80, 3, 0, 108, 16, 0, 5, 2, 80, 1, 0, 108,
|
||||
7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 2, 80, 3, 0, 68, 16, 0, 5, 2, 80,
|
||||
1, 0, 68, 7, 0, 8, 2, 80, 0, 0, 68, 6, 0, 4, 2, 56, 3, 0, 68, 16, 0,
|
||||
5, 2, 56, 1, 0, 68, 7, 0, 8, 2, 56, 0, 0, 68, 6, 0, 4, 1, 80, 3, 0,
|
||||
6, 1, 56, 16, 0, 5, 1, 80, 1, 0, 7, 1, 56, 7, 0, 12, 1, 80, 0, 0, 10,
|
||||
1, 56, 6, 0, 4, 1, 80, 3, 0, 5, 1, 80, 1, 0, 8, 1, 80, 0, 0, 4, 1, 68,
|
||||
3, 0, 5, 1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 1, 56, 3, 0, 5, 1, 56, 1, 0,
|
||||
8, 1, 56, 0, 0, 4, 2, 80, 3, 0, 68, 16, 0, 5, 2, 80, 1, 0, 68, 7, 0,
|
||||
8, 2, 80, 0, 0, 68, 6, 0, 4, 2, 80, 3, 0, 80, 15, 0, 5, 2, 80, 1, 0,
|
||||
80, 7, 0, 8, 2, 80, 0, 0, 80, 6, 0, 4, 2, 84, 3, 0, 108, 16, 0, 5, 2,
|
||||
84, 1, 0, 108, 7, 0, 8, 2, 84, 0, 0, 108, 6, 0, 4, 2, 80, 3, 0, 80,
|
||||
16, 0, 5, 2, 80, 1, 0, 80, 7, 0, 8, 2, 80, 0, 0, 80, 6, 0, 4, 1, 68,
|
||||
3, 0, 5, 1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 2, 44, 3, 0, 68, 16, 0, 5,
|
||||
2, 44, 1, 0, 68, 7, 0, 8, 2, 44, 0, 0, 68, 6, 0, 4, 1, 68, 3, 0, 5,
|
||||
1, 68, 1, 0, 8, 1, 68, 0, 0, 4, 2, 80, 3, 0, 108, 15, 0, 5, 2, 80, 1,
|
||||
0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6, 0, 4, 2, 56, 3, 0, 108, 16, 0,
|
||||
5, 2, 56, 1, 0, 108, 7, 0, 8, 2, 56, 0, 0, 108, 6, 0, 4, 2, 108, 3,
|
||||
0, 108, 16, 0, 5, 2, 108, 1, 0, 108, 7, 0, 8, 2, 108, 0, 0, 108, 6,
|
||||
0, 4, 1, 68, 3, 0, 6, 1, 56, 16, 0, 5, 1, 68, 1, 0, 7, 1, 56, 7, 0,
|
||||
12, 1, 68, 0, 0, 10, 1, 56, 6, 0, 4, 2, 80, 3, 0, 80, 16, 0, 5, 2, 80,
|
||||
1, 0, 80, 7, 0, 8, 2, 80, 0, 0, 80, 6, 0, 4, 2, 80, 3, 0, 108, 15, 0,
|
||||
6, 1, 56, 17, 0, 5, 2, 80, 1, 0, 108, 7, 0, 8, 2, 80, 0, 0, 108, 6,
|
||||
0, 4, 1, 80, 3, 0, 5, 1, 80, 1, 0, 8, 1, 80, 0, 0, 4, 2, 68, 3, 0, 68,
|
||||
16, 0, 5, 2, 68, 1, 0, 68, 7, 0, 8, 2, 68, 0, 0, 68, 6, 0, 4, 2, 84,
|
||||
3, 0, 108, 16, 0, 5, 2, 84, 1, 0, 108, 7, 0, 8, 2, 84, 0, 0, 108, 6,
|
||||
0, 4, 2, 68, 3, 0, 68, 14, 0, 5, 2, 68, 1, 0, 68, 6, 0, 8, 1, 68, 0,
|
||||
0, 4, 1, 44, 3, 0, 6, 1, 56, 16, 0, 5, 1, 44, 1, 0, 7, 1, 56, 7, 0,
|
||||
12, 1, 44, 0, 0, 10, 1, 56, 6, 0, 4, 1, 44, 3, 0, 6, 1, 56, 16, 0, 5,
|
||||
1, 44, 1, 0, 7, 1, 56, 7, 0, 12, 1, 44, 0, 0, 10, 1, 56, 6, 0, 4, 2,
|
||||
84, 5, 0, 108, 16, 0, 5, 2, 84, 3, 0, 108, 7, 0, 8, 2, 84, 1, 0, 108,
|
||||
6, 0, 4, 2, 80, 4, 0, 108, 11, 0, 6, 1, 56, 16, 0, 5, 2, 80, 2, 0, 108,
|
||||
5, 0, 7, 1, 56, 7, 0, 12, 1, 80, 1, 0, 10, 1, 56, 6, 0, 0, 0, 2, 0,
|
||||
0, 0, 156, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 11, 38, 46, 38, 62,
|
||||
38, 142, 38, 175, 102, 142, 151, 151, 151, 159, 1, 0, 0, 0, 238, 8,
|
||||
0, 0, 0, 2, 2, 0, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 115, 67, 0, 0
|
||||
};
|
||||
const resource_hnd_t wifi_firmware_clm_blob = { RESOURCE_IN_MEMORY, 4684, {.mem = { (const char *) wifi_firmware_clm_blob_data }}};
|
||||
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
|
||||
* SPDX-License-Identifier: LicenseRef-PBL
|
||||
*
|
||||
* This file and the related binary are licensed under the
|
||||
* Permissive Binary License, Version 1.0 (the "License");
|
||||
* you may not use these files except in compliance with the License.
|
||||
*
|
||||
* You may obtain a copy of the License here:
|
||||
* LICENSE-permissive-binary-license-1.0.txt and at
|
||||
* https://www.mbed.com/licenses/PBL-1.0
|
||||
*
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
/* Automatically generated file - this comment ensures resources.h file creation */
|
||||
/* Auto-generated header file. Do not edit */
|
||||
#ifndef INCLUDED_RESOURCES_H_
|
||||
#define INCLUDED_RESOURCES_H_
|
||||
#include "wiced_resource.h"
|
||||
|
||||
extern const resource_hnd_t wifi_firmware_image;
|
||||
extern const unsigned char wifi_firmware_image_data[556559];
|
||||
extern const resource_hnd_t wifi_firmware_clm_blob;
|
||||
extern const unsigned char wifi_firmware_clm_blob_data[4684];
|
||||
extern const resource_hnd_t wifi_mfg_firmware_image;
|
||||
extern const unsigned char wifi_mfg_firmware_image_data[561035];
|
||||
extern const resource_hnd_t wifi_mfg_firmware_clm_blob;
|
||||
extern const unsigned char wifi_mfg_firmware_clm_blob_data[4684];
|
||||
|
||||
#endif /* ifndef INCLUDED_RESOURCES_H_ */
|
||||
|
|
@ -3,7 +3,7 @@
|
|||
* SPDX-License-Identifier: LicenseRef-PBL
|
||||
*
|
||||
* This file and the related binary are licensed under the
|
||||
* Permissive Binary License, Version 1.0 (the "License");
|
||||
* Permissive Binary License, Version 1.0 (the "License")
|
||||
* you may not use these files except in compliance with the License.
|
||||
*
|
||||
* You may obtain a copy of the License here:
|
||||
|
|
@ -27,11 +27,11 @@ extern "C" {
|
|||
|
||||
/**
|
||||
* Character array of NVRAM image
|
||||
* Generated from cyw9cy8cmod-064b0s2-4343w_P100_724315.txt
|
||||
* Generated from cyw9cy8cmod-064b0s2-4343w_P100.txt
|
||||
*/
|
||||
|
||||
static const char wifi_nvram_image[] =
|
||||
"NVRAMRev=$Rev: 724315 $" "\x00"
|
||||
"NVRAMRev=$Rev$" "\x00"
|
||||
"manfid=0x2d0" "\x00"
|
||||
"prodid=0x087d" "\x00"
|
||||
"vendid=0x14e4" "\x00"
|
||||
|
|
@ -55,7 +55,7 @@ static const char wifi_nvram_image[] =
|
|||
"pa0itssit=0x20" "\x00"
|
||||
"extpagain2g=0" "\x00"
|
||||
"" "\x00"
|
||||
"pa2ga0=-168,6393,-757" "\x00"
|
||||
"pa2ga0=-168,6777,-788" "\x00"
|
||||
"AvVmid_c0=0x0,0xc8" "\x00"
|
||||
"AvVmidIQcal=0x2,0xa8" "\x00"
|
||||
"cckpwroffset0=5" "\x00"
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
|
||||
* SPDX-License-Identifier: LicenseRef-PBL
|
||||
*
|
||||
* This file and the related binary are licensed under the
|
||||
* Permissive Binary License, Version 1.0 (the "License")
|
||||
* you may not use these files except in compliance with the License.
|
||||
*
|
||||
* You may obtain a copy of the License here:
|
||||
* LICENSE-permissive-binary-license-1.0.txt and at
|
||||
* https://www.mbed.com/licenses/PBL-1.0
|
||||
*
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef INCLUDED_NVRAM_IMAGE_H_
|
||||
#define INCLUDED_NVRAM_IMAGE_H_
|
||||
|
||||
#include <string.h>
|
||||
#include <stdint.h>
|
||||
#include "generated_mac_address.txt"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Character array of NVRAM image
|
||||
* Generated from cyw9cy8cmod-064s0s2-4343w_P100.txt
|
||||
*/
|
||||
|
||||
static const char wifi_nvram_image[] =
|
||||
"NVRAMRev=$Rev$" "\x00"
|
||||
"manfid=0x2d0" "\x00"
|
||||
"prodid=0x088d" "\x00"
|
||||
"vendid=0x14e4" "\x00"
|
||||
"devid=0x43e2" "\x00"
|
||||
"boardtype=0x088d" "\x00"
|
||||
"boardrev=0x1100" "\x00"
|
||||
"boardnum=22" "\x00"
|
||||
NVRAM_GENERATED_MAC_ADDRESS "\x00"
|
||||
"sromrev=11" "\x00"
|
||||
"boardflags=0x00404201" "\x00"
|
||||
"boardflags3=0x08000000" "\x00"
|
||||
"xtalfreq=37400" "\x00"
|
||||
"nocrc=1" "\x00"
|
||||
"ag0=255" "\x00"
|
||||
"aa2g=1" "\x00"
|
||||
"ccode=ALL" "\x00"
|
||||
"" "\x00"
|
||||
"swdiv_en=1" "\x00"
|
||||
"swdiv_gpio=2" "\x00"
|
||||
"" "\x00"
|
||||
"pa0itssit=0x20" "\x00"
|
||||
"extpagain2g=0" "\x00"
|
||||
"" "\x00"
|
||||
"pa2ga0=-168,6777,-788" "\x00"
|
||||
"AvVmid_c0=0x0,0xc8" "\x00"
|
||||
"AvVmidIQcal=0x2,0xa8" "\x00"
|
||||
"cckpwroffset0=5" "\x00"
|
||||
"" "\x00"
|
||||
"maxp2ga0=84" "\x00"
|
||||
"txpwrbckof=6" "\x00"
|
||||
"cckbw202gpo=0" "\x00"
|
||||
"legofdmbw202gpo=0x66111111" "\x00"
|
||||
"mcsbw202gpo=0x77711111" "\x00"
|
||||
"propbw202gpo=0xdd" "\x00"
|
||||
"" "\x00"
|
||||
"ofdmdigfilttype=18" "\x00"
|
||||
"ofdmdigfilttypebe=18" "\x00"
|
||||
"papdmode=1" "\x00"
|
||||
"papdvalidtest=1" "\x00"
|
||||
"pacalidx2g=32" "\x00"
|
||||
"papdepsoffset=-36" "\x00"
|
||||
"papdendidx=61" "\x00"
|
||||
"" "\x00"
|
||||
"" "\x00"
|
||||
"wl0id=0x431b" "\x00"
|
||||
"" "\x00"
|
||||
"deadman_to=0xffffffff" "\x00"
|
||||
"muxenab=0x11" "\x00"
|
||||
"" "\x00"
|
||||
"spurconfig=0x3 " "\x00"
|
||||
"" "\x00"
|
||||
"rssicorrnorm=1" "\x00"
|
||||
"\x00\x00";
|
||||
#ifdef __cplusplus
|
||||
} /*extern "C" */
|
||||
#endif
|
||||
|
||||
#else /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
|
||||
|
||||
#error Wi-Fi NVRAM image included twice
|
||||
|
||||
#endif /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
|
||||
|
|
@ -0,0 +1,138 @@
|
|||
/*
|
||||
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
|
||||
* SPDX-License-Identifier: LicenseRef-PBL
|
||||
*
|
||||
* This file and the related binary are licensed under the
|
||||
* Permissive Binary License, Version 1.0 (the "License")
|
||||
* you may not use these files except in compliance with the License.
|
||||
*
|
||||
* You may obtain a copy of the License here:
|
||||
* LICENSE-permissive-binary-license-1.0.txt and at
|
||||
* https://www.mbed.com/licenses/PBL-1.0
|
||||
*
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef INCLUDED_NVRAM_IMAGE_H_
|
||||
#define INCLUDED_NVRAM_IMAGE_H_
|
||||
|
||||
#include <string.h>
|
||||
#include <stdint.h>
|
||||
#include "generated_mac_address.txt"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Character array of NVRAM image
|
||||
* Generated from brcmfmac4373-sdio.txt
|
||||
*/
|
||||
|
||||
static const char wifi_nvram_image[] =
|
||||
"NVRAMRev=$Rev: 722807 $" "\x00"
|
||||
"sromrev=11" "\x00"
|
||||
"vendid=0x14e4" "\x00"
|
||||
"devid=0x4418" "\x00"
|
||||
"manfid=0x2d0" "\x00"
|
||||
"prodid=0x070f" "\x00"
|
||||
NVRAM_GENERATED_MAC_ADDRESS "\x00"
|
||||
"nocrc=1" "\x00"
|
||||
"boardtype=0x83d" "\x00"
|
||||
"boardrev=0x1353" "\x00"
|
||||
"xtalfreq=37400" "\x00"
|
||||
"boardflags=0x00000001" "\x00"
|
||||
"boardflags2=0x00000000" "\x00"
|
||||
"boardflags3=0x48202100" "\x00"
|
||||
"ext_lpo_margin_frac=0" "\x00"
|
||||
"tx_duty_cycle_thermal=40" "\x00"
|
||||
"temp_threshold=105" "\x00"
|
||||
"temp_delta=30" "\x00"
|
||||
"phycal_tempdelta=15" "\x00"
|
||||
"rxgains2gelnagaina0=0" "\x00"
|
||||
"rxgains2gtrisoa0=0" "\x00"
|
||||
"rxgains2gtrelnabypa0=0" "\x00"
|
||||
"rxgains5gelnagaina0=0" "\x00"
|
||||
"rxgains5gtrisoa0=0" "\x00"
|
||||
"rxgains5gtrelnabypa0=0" "\x00"
|
||||
"pdgain5g=3" "\x00"
|
||||
"pdgain2g=3" "\x00"
|
||||
"antswitch=0x6" "\x00"
|
||||
"rxchain=1" "\x00"
|
||||
"txchain=1" "\x00"
|
||||
"aa2g=3" "\x00"
|
||||
"aa5g=3" "\x00"
|
||||
"tssipos5g=1" "\x00"
|
||||
"tssipos2g=1" "\x00"
|
||||
"femctrl=0" "\x00"
|
||||
"pa2ga0=-176,5552,-658" "\x00"
|
||||
"pa5ga0=-153,5528,-664,-153,5528,-664,-155,5563,-666,-167,5492,-668" "\x00"
|
||||
"pdoffsetcckma0=0xf" "\x00"
|
||||
"pdoffset2g40ma0=0xc" "\x00"
|
||||
"pdoffset40ma0=0xffff" "\x00"
|
||||
"pdoffset80ma0=0xeeee" "\x00"
|
||||
"extpagain5g=2" "\x00"
|
||||
"extpagain2g=2" "\x00"
|
||||
"AvVmid_c0=1,130,0,160,0,160,0,160,0,160" "\x00"
|
||||
"maxp2ga0=76" "\x00"
|
||||
"maxp5ga0=70,70,70,70" "\x00"
|
||||
"cckbw202gpo=0x0000" "\x00"
|
||||
"dot11agofdmhrbw202gpo=0x2222" "\x00"
|
||||
"ofdmlrbw202gpo=0x3222" "\x00"
|
||||
"mcsbw202gpo=0x88764422" "\x00"
|
||||
"mcsbw402gpo=0x88764422" "\x00"
|
||||
"mcsbw205glpo=0x87664422" "\x00"
|
||||
"mcsbw205gmpo=0x87664422" "\x00"
|
||||
"mcsbw205ghpo=0x87664422" "\x00"
|
||||
"mcsbw405glpo=0x98664422" "\x00"
|
||||
"mcsbw405gmpo=0x98664422" "\x00"
|
||||
"mcsbw405ghpo=0x98664422" "\x00"
|
||||
"mcsbw805glpo=0xEA886622" "\x00"
|
||||
"mcsbw805gmpo=0xEA886622" "\x00"
|
||||
"mcsbw805ghpo=0xEA886622" "\x00"
|
||||
"swctrlmap_2g=0x00001131,0x00001131,0x00001131,0x313131,0x1ff" "\x00"
|
||||
"swctrlmap_5g=0x00201131,0x40405171,0x40405171,0x313131,0x1ff" "\x00"
|
||||
"swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000" "\x00"
|
||||
"swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000" "\x00"
|
||||
"fem_table_init_val=0x1131,0x1131" "\x00"
|
||||
"nb_papdcalidx=0x280f" "\x00"
|
||||
"nb_txattn=0x0303" "\x00"
|
||||
"nb_rxattn=0x0303" "\x00"
|
||||
"nb_bbmult=0x3948" "\x00"
|
||||
"nb_eps_offset=0x01e601ea" "\x00"
|
||||
"rssi_delta_2g_c0=-2,-2,-2,-2" "\x00"
|
||||
"rssi_delta_5gl_c0=-2,-2,-3,-3,-1,-1" "\x00"
|
||||
"rssi_delta_5gml_c0=-2,-2,-3,-3,-1,-1" "\x00"
|
||||
"rssi_delta_5gmu_c0=0,0,-1,-1,0,0" "\x00"
|
||||
"rssi_delta_5gh_c0=-1,-1,-2,-2,0,0" "\x00"
|
||||
"ATErcalmode=0" "\x00"
|
||||
"swdiv_en=1" "\x00"
|
||||
"swdiv_gpio=0" "\x00"
|
||||
"swdiv_swctrl_en=2" "\x00"
|
||||
"swdiv_swctrl_ant0=0" "\x00"
|
||||
"swdiv_swctrl_ant1=1" "\x00"
|
||||
"swdiv_antmap2g_main=1" "\x00"
|
||||
"swdiv_antmap5g_main=1" "\x00"
|
||||
"swdiv_snrlim=290" "\x00"
|
||||
"swdiv_thresh=2000" "\x00"
|
||||
"swdiv_snrthresh=24" "\x00"
|
||||
"swdiv_timeon=10" "\x00"
|
||||
"swdiv_timeoff=1" "\x00"
|
||||
"swdiv_snr2g20=232" "\x00"
|
||||
"swdiv_snr2g40=257" "\x00"
|
||||
"swdiv_snr5g20=296" "\x00"
|
||||
"swdiv_snr5g40=312" "\x00"
|
||||
"swdiv_snr5g80=296" "\x00"
|
||||
"swdiv_ap_dead_check=1" "\x00"
|
||||
"swdiv_ap_div=1" "\x00"
|
||||
"\x00\x00";
|
||||
#ifdef __cplusplus
|
||||
} /*extern "C" */
|
||||
#endif
|
||||
|
||||
#else /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
|
||||
|
||||
#error Wi-Fi NVRAM image included twice
|
||||
|
||||
#endif /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
|
||||
|
|
@ -208,7 +208,7 @@ void whd_bus_sdio_detach(whd_driver_t whd_driver)
|
|||
|
||||
whd_result_t whd_bus_sdio_ack_interrupt(whd_driver_t whd_driver, uint32_t intstatus)
|
||||
{
|
||||
return whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS, (uint8_t)4, intstatus);
|
||||
return whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS(whd_driver), (uint8_t)4, intstatus);
|
||||
}
|
||||
|
||||
whd_result_t whd_bus_sdio_wait_for_wlan_event(whd_driver_t whd_driver, cy_semaphore_t *transceive_semaphore)
|
||||
|
|
@ -507,7 +507,7 @@ whd_bool_t whd_bus_sdio_wake_interrupt_present(whd_driver_t whd_driver)
|
|||
if (WHD_SUCCESS != whd_ensure_wlan_bus_is_up(whd_driver) )
|
||||
return WHD_FALSE;
|
||||
|
||||
if (whd_bus_read_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS, (uint8_t)4,
|
||||
if (whd_bus_read_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS(whd_driver), (uint8_t)4,
|
||||
(uint8_t *)&int_status) != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("%s: Error reading interrupt status\n", __FUNCTION__) );
|
||||
|
|
@ -516,13 +516,13 @@ whd_bool_t whd_bus_sdio_wake_interrupt_present(whd_driver_t whd_driver)
|
|||
if ( (I_HMB_HOST_INT & int_status) != 0 )
|
||||
{
|
||||
/* Clear any interrupts */
|
||||
if (whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS, (uint8_t)4,
|
||||
if (whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS(whd_driver), (uint8_t)4,
|
||||
I_HMB_HOST_INT) != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("%s: Error clearing interrupts\n", __FUNCTION__) );
|
||||
goto exit;
|
||||
}
|
||||
if (whd_bus_read_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS, (uint8_t)4,
|
||||
if (whd_bus_read_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS(whd_driver), (uint8_t)4,
|
||||
(uint8_t *)&int_status) != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("%s: Error reading interrupt status\n", __FUNCTION__) );
|
||||
|
|
@ -544,7 +544,7 @@ uint32_t whd_bus_sdio_packet_available_to_read(whd_driver_t whd_driver)
|
|||
CHECK_RETURN(whd_ensure_wlan_bus_is_up(whd_driver) );
|
||||
|
||||
/* Read the IntStatus */
|
||||
if (whd_bus_read_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS, (uint8_t)4,
|
||||
if (whd_bus_read_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS(whd_driver), (uint8_t)4,
|
||||
(uint8_t *)&int_status) != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("%s: Error reading interrupt status\n", __FUNCTION__) );
|
||||
|
|
@ -555,7 +555,7 @@ uint32_t whd_bus_sdio_packet_available_to_read(whd_driver_t whd_driver)
|
|||
if ( (HOSTINTMASK & int_status) != 0 )
|
||||
{
|
||||
/* Clear any interrupts */
|
||||
if (whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS, (uint8_t)4,
|
||||
if (whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_INT_STATUS(whd_driver), (uint8_t)4,
|
||||
int_status & HOSTINTMASK) != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("%s: Error clearing interrupts\n", __FUNCTION__) );
|
||||
|
|
@ -903,7 +903,6 @@ static whd_result_t whd_bus_sdio_download_firmware(whd_driver_t whd_driver)
|
|||
uint32_t ram_start_address;
|
||||
|
||||
ram_start_address = GET_C_VAR(whd_driver, ATCM_RAM_BASE_ADDRESS);
|
||||
|
||||
if (ram_start_address != 0)
|
||||
{
|
||||
CHECK_RETURN(whd_reset_core(whd_driver, WLAN_ARM_CORE, SICF_CPUHALT, SICF_CPUHALT) );
|
||||
|
|
@ -988,10 +987,10 @@ static whd_result_t whd_bus_sdio_download_firmware(whd_driver_t whd_driver)
|
|||
}
|
||||
|
||||
/* Set up the interrupt mask and enable interrupts */
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SDIO_INT_HOST_MASK, (uint8_t)4, HOSTINTMASK) );
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SDIO_INT_HOST_MASK(whd_driver), (uint8_t)4, HOSTINTMASK) );
|
||||
|
||||
/* Enable F2 interrupts. This wasn't required for 4319 but is for the 43362 */
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SDIO_FUNCTION_INT_MASK, (uint8_t)1,
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SDIO_FUNCTION_INT_MASK(whd_driver), (uint8_t)1,
|
||||
SDIO_FUNC_MASK_F1 | SDIO_FUNC_MASK_F2) );
|
||||
|
||||
/* Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped. */
|
||||
|
|
@ -1036,7 +1035,8 @@ static whd_result_t whd_bus_sdio_abort_read(whd_driver_t whd_driver, whd_bool_t
|
|||
/* If we want to retry message, send NAK */
|
||||
if (retry == WHD_TRUE)
|
||||
{
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_TO_SB_MAIL_BOX, (uint8_t)1, SMB_NAK) );
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, (uint32_t)SDIO_TO_SB_MAIL_BOX(whd_driver), (uint8_t)1,
|
||||
SMB_NAK) );
|
||||
}
|
||||
|
||||
return WHD_SUCCESS;
|
||||
|
|
@ -1052,7 +1052,7 @@ whd_result_t whd_bus_sdio_read_register_value(whd_driver_t whd_driver, whd_bus_f
|
|||
whd_result_t whd_bus_sdio_poke_wlan(whd_driver_t whd_driver)
|
||||
{
|
||||
/*TODO: change 1<<3 to a register hash define */
|
||||
return whd_bus_write_backplane_value(whd_driver, SDIO_TO_SB_MAILBOX, (uint8_t)4, (uint32_t)(1 << 3) );
|
||||
return whd_bus_write_backplane_value(whd_driver, SDIO_TO_SB_MAILBOX(whd_driver), (uint8_t)4, (uint32_t)(1 << 3) );
|
||||
}
|
||||
|
||||
whd_result_t whd_bus_sdio_wakeup(whd_driver_t whd_driver)
|
||||
|
|
|
|||
|
|
@ -932,7 +932,8 @@ static whd_result_t whd_spi_download_firmware(whd_driver_t whd_driver)
|
|||
}
|
||||
|
||||
/* Set up the interrupt mask and enable interrupts */
|
||||
CHECK_RETURN(whd_bus_spi_write_backplane_value(whd_driver, SDIO_INT_HOST_MASK, (uint8_t)4, I_HMB_SW_MASK) );
|
||||
CHECK_RETURN(whd_bus_spi_write_backplane_value(whd_driver, SDIO_INT_HOST_MASK(
|
||||
whd_driver), (uint8_t)4, I_HMB_SW_MASK) );
|
||||
|
||||
/* Lower F2 Watermark to avoid DMA Hang in F2 when SD Clock is stopped. */
|
||||
return whd_bus_spi_write_register_value(whd_driver, BACKPLANE_FUNCTION, SDIO_FUNCTION2_WATERMARK, (uint8_t)1,
|
||||
|
|
|
|||
|
|
@ -72,12 +72,7 @@ enum ds1_ctrl_status
|
|||
#define USB20H0_BASE_ADDRESS 0x18006000 /* USB20H0 core register region */
|
||||
#define USB20D_BASE_ADDRESS 0x18007000 /* USB20D core register region */
|
||||
#define SDIOH_BASE_ADDRESS 0x18008000 /* SDIOH Device core register region */
|
||||
#define WLAN_ARMCM3_BASE_ADDRESS 0x18003000 /* ARMCM3 core register region */
|
||||
#define PMU_BASE_ADDRESS 0x18012000 /* PMU core register region */
|
||||
#define DOT11MAC_BASE_ADDRESS 0x18001000
|
||||
#define SDIO_BASE_ADDRESS 0x18002000
|
||||
#define SOCSRAM_BASE_ADDRESS 0x18004000
|
||||
#define WLAN_ARMCR4_BASE_ADDRESS 0x18003000 /* ARMCR4 core register region */
|
||||
|
||||
#define BACKPLANE_ADDRESS_MASK 0x7FFF
|
||||
#define BACKPLANE_WINDOW_SIZE (BACKPLANE_ADDRESS_MASK + 1)
|
||||
|
|
@ -98,11 +93,11 @@ enum ds1_ctrl_status
|
|||
#define CHIPCOMMON_SR_CONTROL1 ( (uint32_t)(CHIPCOMMON_BASE_ADDRESS + 0x508) )
|
||||
|
||||
/* SOCSRAM core registers */
|
||||
#define SOCSRAM_BANKX_INDEX ( (uint32_t)(SOCSRAM_BASE_ADDRESS + 0x10) )
|
||||
#define SOCSRAM_BANKX_PDA ( (uint32_t)(SOCSRAM_BASE_ADDRESS + 0x44) )
|
||||
#define SOCSRAM_BANKX_INDEX(wd) ( (uint32_t)(GET_C_VAR(wd, SOCSRAM_BASE_ADDRESS) + 0x10) )
|
||||
#define SOCSRAM_BANKX_PDA(wd) ( (uint32_t)(GET_C_VAR(wd, SOCSRAM_BASE_ADDRESS) + 0x44) )
|
||||
|
||||
/* PMU core registers */
|
||||
#define RETENTION_CTL ( (uint32_t)(PMU_BASE_ADDRESS + 0x670) )
|
||||
#define RETENTION_CTL(wd) ( (uint32_t)(GET_C_VAR(wd, PMU_BASE_ADDRESS) + 0x670) )
|
||||
#define RCTL_MACPHY_DISABLE ( (uint32_t)(1 << 26) )
|
||||
#define RCTL_LOGIC_DISABLE ( (uint32_t)(1 << 27) )
|
||||
|
||||
|
|
|
|||
|
|
@ -28,14 +28,14 @@ extern "C" {
|
|||
/* CurrentSdiodProgGuide r23 */
|
||||
|
||||
/* Base registers */
|
||||
#define SDIO_CORE ( (uint32_t)(SDIO_BASE_ADDRESS + 0x00) )
|
||||
#define SDIO_INT_STATUS ( (uint32_t)(SDIO_BASE_ADDRESS + 0x20) )
|
||||
#define SDIO_TO_SB_MAILBOX ( (uint32_t)(SDIO_BASE_ADDRESS + 0x40) )
|
||||
#define SDIO_TO_SB_MAILBOX_DATA ( (uint32_t)(SDIO_BASE_ADDRESS + 0x48) )
|
||||
#define SDIO_TO_HOST_MAILBOX_DATA ( (uint32_t)(SDIO_BASE_ADDRESS + 0x4C) )
|
||||
#define SDIO_TO_SB_MAIL_BOX ( (uint32_t)(SDIO_BASE_ADDRESS + 0x40) )
|
||||
#define SDIO_INT_HOST_MASK ( (uint32_t)(SDIO_BASE_ADDRESS + 0x24) )
|
||||
#define SDIO_FUNCTION_INT_MASK ( (uint32_t)(SDIO_BASE_ADDRESS + 0x34) )
|
||||
#define SDIO_CORE(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x00) )
|
||||
#define SDIO_INT_STATUS(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x20) )
|
||||
#define SDIO_TO_SB_MAILBOX(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x40) )
|
||||
#define SDIO_TO_SB_MAILBOX_DATA(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x48) )
|
||||
#define SDIO_TO_HOST_MAILBOX_DATA(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x4C) )
|
||||
#define SDIO_TO_SB_MAIL_BOX(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x40) )
|
||||
#define SDIO_INT_HOST_MASK(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x24) )
|
||||
#define SDIO_FUNCTION_INT_MASK(wd) ( (uint32_t)(GET_C_VAR(wd, SDIOD_CORE_BASE_ADDRESS) + 0x34) )
|
||||
|
||||
/* SDIO Function 0 (SDIO Bus) register addresses */
|
||||
|
||||
|
|
|
|||
|
|
@ -24,9 +24,15 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define WRAPPER_REGISTER_OFFSET (0x100000)
|
||||
typedef enum chip_var
|
||||
{
|
||||
BUS_CREDIT_DIFF = 1,
|
||||
ARM_CORE_BASE_ADDRESS = 1,
|
||||
SOCSRAM_BASE_ADDRESS,
|
||||
SOCSRAM_WRAPPER_BASE_ADDRESS,
|
||||
SDIOD_CORE_BASE_ADDRESS,
|
||||
PMU_BASE_ADDRESS,
|
||||
BUS_CREDIT_DIFF,
|
||||
CHIP_RAM_SIZE,
|
||||
ATCM_RAM_BASE_ADDRESS,
|
||||
SOCRAM_SRMEM_SIZE,
|
||||
|
|
@ -53,6 +59,10 @@ typedef enum chip_var
|
|||
|
||||
uint32_t get_whd_var(whd_driver_t whd_driver, chip_var_t var);
|
||||
|
||||
whd_result_t get_arm_core_base_address(uint16_t, uint32_t *);
|
||||
whd_result_t get_socsram_base_address(uint16_t, uint32_t *, whd_bool_t);
|
||||
whd_result_t get_sdiod_core_base_address(uint16_t, uint32_t *);
|
||||
whd_result_t get_pmu_base_address(uint16_t, uint32_t *);
|
||||
whd_result_t get_chip_max_bus_data_credit_diff(uint16_t, uint32_t *);
|
||||
whd_result_t get_chip_ram_size(uint16_t, uint32_t *);
|
||||
whd_result_t get_atcm_ram_base_address(uint16_t, uint32_t *);
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ extern "C"
|
|||
+ * this interrupts communication between WL TOOL and MFG Test APP
|
||||
+ * via STDIO UART causing Wrong Message Exchange and failure.
|
||||
+ */
|
||||
#ifdef WLAN_MFG_FIRMWARE
|
||||
#if defined(WLAN_MFG_FIRMWARE) || defined(WHD_PRINT_DISABLE)
|
||||
#define WPRINT_MACRO(args)
|
||||
#else
|
||||
#if defined(WHD_LOGGING_BUFFER_ENABLE)
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ whd_result_t whd_wifi_set_ampdu_parameters(whd_interface_t ifp)
|
|||
/* Get the chip number */
|
||||
uint16_t wlan_chip_id = whd_chip_get_chip_id(whd_driver);
|
||||
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43455) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
return whd_wifi_set_ampdu_parameters_common(ifp, AMPDU_STA_DEFAULT_BA_WSIZE, AMPDU_MPDU_AUTO,
|
||||
AMPDU_RX_FACTOR_64K);
|
||||
|
|
@ -628,7 +628,8 @@ uint32_t whd_wifi_start_ap(whd_interface_t ifp)
|
|||
data = (uint32_t *)whd_cdc_get_iovar_buffer(whd_driver, &buffer, (uint16_t)8, IOVAR_STR_BSS);
|
||||
CHECK_IOCTL_BUFFER_WITH_SEMAPHORE(data, &ap->whd_wifi_sleep_flag);
|
||||
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43362) || (wlan_chip_id == 43455) || (wlan_chip_id == 43430) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43362) ||
|
||||
(wlan_chip_id == 43430) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
data[0] = htod32(ifp->bsscfgidx);
|
||||
}
|
||||
|
|
@ -677,7 +678,8 @@ uint32_t whd_wifi_stop_ap(whd_interface_t ifp)
|
|||
|
||||
/* Get Chip Number */
|
||||
uint16_t wlan_chip_id = whd_chip_get_chip_id(whd_driver);
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43362) || (wlan_chip_id == 43455) || (wlan_chip_id == 43430) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43362) ||
|
||||
(wlan_chip_id == 43430) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
/* Query bss state (does it exist? if so is it UP?) */
|
||||
data = (uint32_t *)whd_cdc_get_iovar_buffer(whd_driver, &buffer, (uint16_t)4, IOVAR_STR_BSS);
|
||||
|
|
@ -714,7 +716,8 @@ uint32_t whd_wifi_stop_ap(whd_interface_t ifp)
|
|||
|
||||
ap->is_waiting_event = WHD_TRUE;
|
||||
/* set BSS down */
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43362) || (wlan_chip_id == 43455) || (wlan_chip_id == 43430) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43362) ||
|
||||
(wlan_chip_id == 43430) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
data = (uint32_t *)whd_cdc_get_iovar_buffer(whd_driver, &buffer, (uint16_t)8, IOVAR_STR_BSS);
|
||||
CHECK_IOCTL_BUFFER(data);
|
||||
|
|
@ -730,13 +733,13 @@ uint32_t whd_wifi_stop_ap(whd_interface_t ifp)
|
|||
data[1] = htod32( (uint32_t)BSS_DOWN );
|
||||
CHECK_RETURN(whd_cdc_send_iovar(ifp, CDC_SET, buffer, 0) );
|
||||
}
|
||||
if ( (wlan_chip_id != 43430) && (wlan_chip_id != 43455) )
|
||||
if (wlan_chip_id != 43430)
|
||||
{
|
||||
result = cy_rtos_get_semaphore(&ap->whd_wifi_sleep_flag, (uint32_t)10000, WHD_FALSE);
|
||||
if (result != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("Error getting a semaphore, %s failed at %d \n", __func__, __LINE__) );
|
||||
return result;
|
||||
goto sema_fail;
|
||||
}
|
||||
}
|
||||
/* Disable AP mode only if AP is on primary interface */
|
||||
|
|
@ -746,9 +749,16 @@ uint32_t whd_wifi_stop_ap(whd_interface_t ifp)
|
|||
CHECK_IOCTL_BUFFER(data);
|
||||
*data = 0;
|
||||
CHECK_RETURN(whd_cdc_send_ioctl(ifp, CDC_SET, WLC_SET_AP, buffer, 0) );
|
||||
/* Wait until AP is brought down */
|
||||
result = cy_rtos_get_semaphore(&ap->whd_wifi_sleep_flag, (uint32_t)10000, WHD_FALSE);
|
||||
if (result != WHD_SUCCESS)
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("Error getting a semaphore, %s failed at %d \n", __func__, __LINE__) );
|
||||
goto sema_fail;
|
||||
}
|
||||
}
|
||||
/* Wait until AP is brought down */
|
||||
result = cy_rtos_get_semaphore(&ap->whd_wifi_sleep_flag, (uint32_t)10000, WHD_FALSE);
|
||||
|
||||
sema_fail:
|
||||
ap->is_waiting_event = WHD_FALSE;
|
||||
result2 = cy_rtos_deinit_semaphore(&ap->whd_wifi_sleep_flag);
|
||||
if (result != WHD_SUCCESS)
|
||||
|
|
|
|||
|
|
@ -74,13 +74,6 @@
|
|||
* Variables
|
||||
******************************************************/
|
||||
|
||||
static const uint32_t cm3_core_base_address[] =
|
||||
{ ( uint32_t )(WLAN_ARMCM3_BASE_ADDRESS + WRAPPER_REGISTER_OFFSET),
|
||||
( uint32_t )(SOCSRAM_BASE_ADDRESS + WRAPPER_REGISTER_OFFSET), ( uint32_t )(SDIO_BASE_ADDRESS) };
|
||||
|
||||
static const uint32_t cr4_core_base_address[] =
|
||||
{ ( uint32_t )(WLAN_ARMCR4_BASE_ADDRESS + WRAPPER_REGISTER_OFFSET),
|
||||
( uint32_t )(SOCSRAM_BASE_ADDRESS + WRAPPER_REGISTER_OFFSET), ( uint32_t )(SDIO_BASE_ADDRESS) };
|
||||
|
||||
/******************************************************
|
||||
* Static Function Declarations
|
||||
|
|
@ -116,12 +109,25 @@ void whd_internal_info_init(whd_driver_t whd_driver)
|
|||
*/
|
||||
uint32_t whd_get_core_address(whd_driver_t whd_driver, device_core_t core_id)
|
||||
{
|
||||
uint16_t chip_id = whd_chip_get_chip_id(whd_driver);
|
||||
|
||||
if (chip_id == 43455)
|
||||
return cr4_core_base_address[(int)core_id];
|
||||
if (core_id == WLAN_ARM_CORE)
|
||||
{
|
||||
return GET_C_VAR(whd_driver, ARM_CORE_BASE_ADDRESS);
|
||||
}
|
||||
else if (core_id == SOCRAM_CORE)
|
||||
{
|
||||
return GET_C_VAR(whd_driver, SOCSRAM_WRAPPER_BASE_ADDRESS);
|
||||
}
|
||||
else if (core_id == SDIOD_CORE)
|
||||
{
|
||||
return GET_C_VAR(whd_driver, SDIOD_CORE_BASE_ADDRESS);
|
||||
}
|
||||
else
|
||||
return cm3_core_base_address[(int)core_id];
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("%s:%d Invalid core ID(%d)\n", __FUNCTION__, __LINE__, core_id) );
|
||||
}
|
||||
|
||||
return WHD_BADARG;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -173,7 +179,6 @@ whd_result_t whd_reset_core(whd_driver_t whd_driver, device_core_t core_id, uint
|
|||
whd_result_t result;
|
||||
uint8_t regdata;
|
||||
uint32_t loop_counter = 10;
|
||||
|
||||
/* ensure there are no pending backplane operations */
|
||||
SPINWAIT( ( ( (result = whd_bus_read_backplane_value(whd_driver, base + AI_RESETSTATUS_OFFSET, (uint8_t)1,
|
||||
®data) ) == WHD_SUCCESS ) && regdata != 0 ), 300 );
|
||||
|
|
@ -722,8 +727,8 @@ whd_result_t whd_chip_specific_socsram_init(whd_driver_t whd_driver)
|
|||
uint16_t wlan_chip_id = whd_chip_get_chip_id(whd_driver);
|
||||
if (wlan_chip_id == 43430)
|
||||
{
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SOCSRAM_BANKX_INDEX, 4, 0x3) );
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SOCSRAM_BANKX_PDA, 4, 0) );
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SOCSRAM_BANKX_INDEX(whd_driver), 4, 0x3) );
|
||||
CHECK_RETURN(whd_bus_write_backplane_value(whd_driver, SOCSRAM_BANKX_PDA(whd_driver), 4, 0) );
|
||||
return WHD_SUCCESS;
|
||||
}
|
||||
else
|
||||
|
|
@ -999,8 +1004,10 @@ static whd_bool_t whd_is_fw_sr_capable(whd_driver_t whd_driver)
|
|||
else
|
||||
{
|
||||
/* check if fw initialized sr engine */
|
||||
result = whd_bus_read_backplane_value(whd_driver, (uint32_t)RETENTION_CTL, (uint8_t)sizeof(retention_ctl),
|
||||
(uint8_t *)&retention_ctl);
|
||||
result =
|
||||
whd_bus_read_backplane_value(whd_driver, (uint32_t)RETENTION_CTL(
|
||||
whd_driver), (uint8_t)sizeof(retention_ctl),
|
||||
(uint8_t *)&retention_ctl);
|
||||
if (result != WHD_SUCCESS)
|
||||
{
|
||||
return WHD_FALSE;
|
||||
|
|
@ -1021,7 +1028,7 @@ static whd_result_t whd_enable_save_restore(whd_driver_t whd_driver)
|
|||
|
||||
if (whd_is_fw_sr_capable(whd_driver) == WHD_TRUE)
|
||||
{
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43455) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
/* Configure WakeupCtrl register to set AlpAvail request bit in chipClockCSR register
|
||||
* after the sdiod core is powered on.
|
||||
|
|
@ -1050,7 +1057,7 @@ static whd_result_t whd_enable_save_restore(whd_driver_t whd_driver)
|
|||
*/
|
||||
CHECK_RETURN(whd_bus_write_register_value(whd_driver, BUS_FUNCTION, (uint32_t)SDIOD_CCCR_BRCM_CARDCAP,
|
||||
(uint8_t)1, SDIOD_CCCR_BRCM_CARDCAP_CMD_NODEC) );
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43455) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
CHECK_RETURN(whd_bus_write_register_value(whd_driver, BACKPLANE_FUNCTION, (uint32_t)SDIO_CHIP_CLOCK_CSR,
|
||||
(uint8_t)1, SBSDIO_HT_AVAIL_REQ) );
|
||||
|
|
@ -1062,7 +1069,7 @@ static whd_result_t whd_enable_save_restore(whd_driver_t whd_driver)
|
|||
}
|
||||
|
||||
/* Enable KeepSdioOn (KSO) bit for normal operation */
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43455) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
CHECK_RETURN(whd_bus_read_register_value(whd_driver, BACKPLANE_FUNCTION, (uint32_t)SDIO_SLEEP_CSR,
|
||||
(uint8_t)sizeof(data), &data) );
|
||||
|
|
@ -1075,7 +1082,7 @@ static whd_result_t whd_enable_save_restore(whd_driver_t whd_driver)
|
|||
if ( (data & SBSDIO_SLPCSR_KEEP_SDIO_ON) == 0 )
|
||||
{
|
||||
data |= SBSDIO_SLPCSR_KEEP_SDIO_ON;
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 43455) )
|
||||
if ( (wlan_chip_id == 43012) || (wlan_chip_id == 0x4373) )
|
||||
{
|
||||
CHECK_RETURN(whd_bus_write_register_value(whd_driver, BACKPLANE_FUNCTION, (uint32_t)SDIO_SLEEP_CSR,
|
||||
(uint8_t)sizeof(data), data) );
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
#include "whd_wlioctl.h"
|
||||
#include "whd_int.h"
|
||||
#include "whd_types_int.h"
|
||||
|
||||
#include "bus_protocols/whd_chip_reg.h"
|
||||
|
||||
/******************************************************
|
||||
* Function Definitions
|
||||
|
|
@ -44,6 +44,21 @@ uint32_t get_whd_var(whd_driver_t whd_driver, chip_var_t var)
|
|||
uint16_t wlan_chip_id = whd_chip_get_chip_id(whd_driver);
|
||||
switch (var)
|
||||
{
|
||||
case ARM_CORE_BASE_ADDRESS:
|
||||
CHECK_RETURN(get_arm_core_base_address(wlan_chip_id, &val) );
|
||||
break;
|
||||
case SOCSRAM_BASE_ADDRESS:
|
||||
CHECK_RETURN(get_socsram_base_address(wlan_chip_id, &val, false) );
|
||||
break;
|
||||
case SOCSRAM_WRAPPER_BASE_ADDRESS:
|
||||
CHECK_RETURN(get_socsram_base_address(wlan_chip_id, &val, true) );
|
||||
break;
|
||||
case SDIOD_CORE_BASE_ADDRESS:
|
||||
CHECK_RETURN(get_sdiod_core_base_address(wlan_chip_id, &val) );
|
||||
break;
|
||||
case PMU_BASE_ADDRESS:
|
||||
CHECK_RETURN(get_pmu_base_address(wlan_chip_id, &val) );
|
||||
break;
|
||||
case BUS_CREDIT_DIFF:
|
||||
CHECK_RETURN(get_chip_max_bus_data_credit_diff(wlan_chip_id, &val) );
|
||||
break;
|
||||
|
|
@ -98,10 +113,79 @@ uint32_t get_whd_var(whd_driver_t whd_driver, chip_var_t var)
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
whd_result_t get_arm_core_base_address(uint16_t wlan_chip_id, uint32_t *addr)
|
||||
{
|
||||
switch (wlan_chip_id)
|
||||
{
|
||||
case 0x4373:
|
||||
*addr = 0x18002000 + WRAPPER_REGISTER_OFFSET;
|
||||
break;
|
||||
case 43012:
|
||||
case 43430:
|
||||
*addr = 0x18003000 + WRAPPER_REGISTER_OFFSET;
|
||||
break;
|
||||
default:
|
||||
return WHD_BADARG;
|
||||
}
|
||||
return WHD_SUCCESS;
|
||||
}
|
||||
|
||||
whd_result_t get_socsram_base_address(uint16_t wlan_chip_id, uint32_t *addr, whd_bool_t wrapper)
|
||||
{
|
||||
uint32_t offset = 0;
|
||||
if (wrapper)
|
||||
{
|
||||
offset = WRAPPER_REGISTER_OFFSET;
|
||||
}
|
||||
switch (wlan_chip_id)
|
||||
{
|
||||
case 43012:
|
||||
case 43430:
|
||||
*addr = 0x18004000 + offset;
|
||||
break;
|
||||
default:
|
||||
return WHD_BADARG;
|
||||
}
|
||||
return WHD_SUCCESS;
|
||||
}
|
||||
|
||||
whd_result_t get_sdiod_core_base_address(uint16_t wlan_chip_id, uint32_t *addr)
|
||||
{
|
||||
switch (wlan_chip_id)
|
||||
{
|
||||
case 0x4373:
|
||||
*addr = 0x18005000;
|
||||
break;
|
||||
case 43012:
|
||||
case 43430:
|
||||
*addr = 0x18002000;
|
||||
break;
|
||||
default:
|
||||
return WHD_BADARG;
|
||||
}
|
||||
return WHD_SUCCESS;
|
||||
}
|
||||
|
||||
whd_result_t get_pmu_base_address(uint16_t wlan_chip_id, uint32_t *addr)
|
||||
{
|
||||
switch (wlan_chip_id)
|
||||
{
|
||||
case 0x4373:
|
||||
case 43430:
|
||||
*addr = CHIPCOMMON_BASE_ADDRESS;
|
||||
break;
|
||||
case 43012:
|
||||
*addr = 0x18012000;
|
||||
break;
|
||||
default:
|
||||
return WHD_BADARG;
|
||||
}
|
||||
return WHD_SUCCESS;
|
||||
}
|
||||
|
||||
whd_result_t get_chip_max_bus_data_credit_diff(uint16_t wlan_chip_id, uint32_t *credit_diff)
|
||||
{
|
||||
*credit_diff = 0;
|
||||
|
|
@ -109,7 +193,7 @@ whd_result_t get_chip_max_bus_data_credit_diff(uint16_t wlan_chip_id, uint32_t *
|
|||
{
|
||||
*credit_diff = 7;
|
||||
}
|
||||
else if (wlan_chip_id == 43455)
|
||||
else if (wlan_chip_id == 0x4373)
|
||||
{
|
||||
*credit_diff = 50;
|
||||
}
|
||||
|
|
@ -139,6 +223,10 @@ whd_result_t get_chip_ram_size(uint16_t wlan_chip_id, uint32_t *size)
|
|||
{
|
||||
*size = 0xA0000;
|
||||
}
|
||||
else if (wlan_chip_id == 0x4373)
|
||||
{
|
||||
*size = 0xE0000;
|
||||
}
|
||||
else
|
||||
{
|
||||
*size = 0x80000;
|
||||
|
|
@ -149,9 +237,9 @@ whd_result_t get_chip_ram_size(uint16_t wlan_chip_id, uint32_t *size)
|
|||
whd_result_t get_atcm_ram_base_address(uint16_t wlan_chip_id, uint32_t *size)
|
||||
{
|
||||
*size = 0;
|
||||
if (wlan_chip_id == 43455)
|
||||
if (wlan_chip_id == 0x4373)
|
||||
{
|
||||
*size = 0x198000;
|
||||
*size = 0x160000;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@
|
|||
#include "whd_poll.h"
|
||||
#include "whd_sdpcm.h"
|
||||
#include "whd_buffer_api.h"
|
||||
#include "whd_chip_constants.h"
|
||||
|
||||
/******************************************************
|
||||
* Static Function Prototypes
|
||||
|
|
@ -304,6 +305,9 @@ static void whd_thread_func(whd_thread_arg_t thread_input)
|
|||
/* Check if the interrupt indicated there is a packet to read */
|
||||
if (whd_bus_packet_available_to_read(whd_driver) != 0)
|
||||
{
|
||||
/* workaround solution for CMD53 error on PSOC6 1M + 4343w */
|
||||
if (whd_chip_get_chip_id(whd_driver) == 43430)
|
||||
(void )cy_rtos_delay_milliseconds( (uint32_t)1 );
|
||||
/* Receive all available packets */
|
||||
do
|
||||
{
|
||||
|
|
|
|||
|
|
@ -79,6 +79,8 @@
|
|||
#define RSPEC_TO_KBPS(rate) (RSPEC_500KBPS( (rate) ) * (unsigned int)500)
|
||||
#define UNSIGNED_CHAR_TO_CHAR(uch) ( (uch) & 0x7f )
|
||||
|
||||
#define KEY_MAX_LEN (64) /* Maximum key length */
|
||||
#define KEY_MIN_LEN (8) /* Minimum key length */
|
||||
/******************************************************
|
||||
* Local Structures
|
||||
******************************************************/
|
||||
|
|
@ -543,7 +545,7 @@ uint32_t whd_wifi_set_passphrase(whd_interface_t ifp, const uint8_t *security_ke
|
|||
whd_driver_t whd_driver;
|
||||
wsec_pmk_t *psk;
|
||||
|
||||
if (!ifp || !security_key)
|
||||
if (!ifp || !security_key || (key_length < KEY_MIN_LEN) || (key_length > KEY_MAX_LEN) )
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("Invalid param in func %s at line %d \n",
|
||||
__func__, __LINE__) );
|
||||
|
|
@ -575,7 +577,7 @@ uint32_t whd_wifi_sae_password(whd_interface_t ifp, const uint8_t *security_key,
|
|||
whd_driver_t whd_driver;
|
||||
wsec_sae_password_t *sae_password;
|
||||
|
||||
if (!ifp || !security_key)
|
||||
if (!ifp || !security_key || (key_length < KEY_MIN_LEN) || (key_length > KEY_MAX_LEN) )
|
||||
{
|
||||
WPRINT_WHD_ERROR( ("Invalid param in func %s at line %d \n",
|
||||
__func__, __LINE__) );
|
||||
|
|
@ -1547,7 +1549,7 @@ uint32_t whd_wifi_join_specific(whd_interface_t ifp, const whd_scan_result_t *ap
|
|||
|
||||
result = whd_wifi_join_wait_for_complete(ifp, &join_semaphore);
|
||||
|
||||
if (chip_id == 43455)
|
||||
if (chip_id == 0x4373)
|
||||
{
|
||||
/* For 11 AC MAX throughput set the frame burst and MPDU per AMPDU */
|
||||
CHECK_RETURN(whd_wifi_set_iovar_value(ifp, IOVAR_STR_MPDU_PER_AMPDU, 64) );
|
||||
|
|
|
|||
|
|
@ -1 +0,0 @@
|
|||
1.91.2.3926
|
||||
|
|
@ -1,27 +1,27 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_network_buffer.c
|
||||
*
|
||||
* \brief
|
||||
* Basic set of APIs for dealing with network packet buffers. This is used by WHD
|
||||
* for relaying data between the network stack and the connectivity chip.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file cy_network_buffer.c
|
||||
*
|
||||
* \brief
|
||||
* Basic set of APIs for dealing with network packet buffers. This is used by WHD
|
||||
* for relaying data between the network stack and the connectivity chip.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include "cy_network_buffer.h"
|
||||
|
|
@ -31,25 +31,29 @@
|
|||
|
||||
#define SDIO_BLOCK_SIZE (64U)
|
||||
|
||||
whd_result_t cy_host_buffer_get(whd_buffer_t *buffer, whd_buffer_dir_t direction, unsigned short size, unsigned long timeout_ms)
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cy_host_buffer_get
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
whd_result_t cy_host_buffer_get(whd_buffer_t* buffer, whd_buffer_dir_t direction,
|
||||
unsigned short size, unsigned long timeout_ms)
|
||||
{
|
||||
CY_UNUSED_PARAMETER( direction );
|
||||
CY_UNUSED_PARAMETER( timeout_ms );
|
||||
struct pbuf *p = NULL;
|
||||
if ( ( direction == WHD_NETWORK_TX) && ( size <= PBUF_POOL_BUFSIZE ) )
|
||||
CY_UNUSED_PARAMETER(direction);
|
||||
CY_UNUSED_PARAMETER(timeout_ms);
|
||||
struct pbuf* p = NULL;
|
||||
if ((direction == WHD_NETWORK_TX) && (size <= PBUF_POOL_BUFSIZE))
|
||||
{
|
||||
p = pbuf_alloc(PBUF_RAW, size, PBUF_POOL);
|
||||
}
|
||||
else
|
||||
{
|
||||
p = pbuf_alloc(PBUF_RAW, size+SDIO_BLOCK_SIZE, PBUF_RAM);
|
||||
if ( p != NULL )
|
||||
if (p != NULL)
|
||||
{
|
||||
p->len = size;
|
||||
p->len = size;
|
||||
p->tot_len -= SDIO_BLOCK_SIZE;
|
||||
}
|
||||
}
|
||||
if (p != NULL )
|
||||
if (p != NULL)
|
||||
{
|
||||
*buffer = p;
|
||||
return WHD_SUCCESS;
|
||||
|
|
@ -60,48 +64,70 @@ whd_result_t cy_host_buffer_get(whd_buffer_t *buffer, whd_buffer_dir_t direction
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cy_buffer_release
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
void cy_buffer_release(whd_buffer_t buffer, whd_buffer_dir_t direction)
|
||||
{
|
||||
CY_UNUSED_PARAMETER( direction );
|
||||
(void) pbuf_free( (struct pbuf *)buffer );
|
||||
CY_UNUSED_PARAMETER(direction);
|
||||
(void)pbuf_free((struct pbuf*)buffer);
|
||||
}
|
||||
|
||||
uint8_t *cy_buffer_get_current_piece_data_pointer(whd_buffer_t buffer)
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cy_buffer_get_current_piece_data_pointer
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
uint8_t* cy_buffer_get_current_piece_data_pointer(whd_buffer_t buffer)
|
||||
{
|
||||
CY_ASSERT(buffer != NULL);
|
||||
struct pbuf *pbuffer= (struct pbuf*) buffer;
|
||||
return (uint8_t*) pbuffer->payload;
|
||||
struct pbuf* pbuffer= (struct pbuf*)buffer;
|
||||
return (uint8_t*)pbuffer->payload;
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cy_buffer_get_current_piece_size
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
uint16_t cy_buffer_get_current_piece_size(whd_buffer_t buffer)
|
||||
{
|
||||
CY_ASSERT(buffer != NULL);
|
||||
struct pbuf *pbuffer = (struct pbuf*) buffer;
|
||||
return (uint16_t) pbuffer->len;
|
||||
struct pbuf* pbuffer = (struct pbuf*)buffer;
|
||||
return (uint16_t)pbuffer->len;
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cy_buffer_set_size
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
whd_result_t cy_buffer_set_size(whd_buffer_t buffer, unsigned short size)
|
||||
{
|
||||
CY_ASSERT(buffer != NULL);
|
||||
struct pbuf * pbuffer = (struct pbuf *) buffer;
|
||||
struct pbuf* pbuffer = (struct pbuf*)buffer;
|
||||
|
||||
if ( size > (unsigned short) WHD_LINK_MTU + LWIP_MEM_ALIGN_SIZE(LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf))) + LWIP_MEM_ALIGN_SIZE(size) )
|
||||
if (size > ((unsigned short)WHD_LINK_MTU +
|
||||
LWIP_MEM_ALIGN_SIZE(LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf))) +
|
||||
LWIP_MEM_ALIGN_SIZE(size)))
|
||||
{
|
||||
return WHD_PMK_WRONG_LENGTH;
|
||||
}
|
||||
|
||||
pbuffer->tot_len = size;
|
||||
pbuffer->len = size;
|
||||
pbuffer->len = size;
|
||||
|
||||
return CY_RSLT_SUCCESS;
|
||||
}
|
||||
|
||||
whd_result_t cy_buffer_add_remove_at_front(whd_buffer_t *buffer, int32_t add_remove_amount)
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cy_buffer_add_remove_at_front
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
whd_result_t cy_buffer_add_remove_at_front(whd_buffer_t* buffer, int32_t add_remove_amount)
|
||||
{
|
||||
CY_ASSERT(buffer != NULL);
|
||||
struct pbuf **pbuffer = (struct pbuf**) buffer;
|
||||
struct pbuf** pbuffer = (struct pbuf**)buffer;
|
||||
|
||||
if ( (u8_t) 0 != pbuf_header( *pbuffer, ( s16_t )( -add_remove_amount ) ) )
|
||||
if ((u8_t)0 != pbuf_header(*pbuffer, (s16_t)(-add_remove_amount)))
|
||||
{
|
||||
return WHD_PMK_WRONG_LENGTH;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,33 +1,33 @@
|
|||
/***************************************************************************//**
|
||||
* \file cy_network_buffer.h
|
||||
*
|
||||
* \brief
|
||||
* Basic set of APIs for dealing with network packet buffers. This is used by WHD
|
||||
* for relaying data between the network stack and the connectivity chip.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file cy_network_buffer.h
|
||||
*
|
||||
* \brief
|
||||
* Basic set of APIs for dealing with network packet buffers. This is used by WHD
|
||||
* for relaying data between the network stack and the connectivity chip.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_bsp_network_buffer Buffer management
|
||||
* \{
|
||||
* Basic set of APIs for dealing with network packet buffers
|
||||
*/
|
||||
* \addtogroup group_bsp_network_buffer Buffer management
|
||||
* \{
|
||||
* Basic set of APIs for dealing with network packet buffers
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
|
|
@ -59,7 +59,8 @@ extern "C" {
|
|||
*
|
||||
* @return : CY_RSLT_SUCCESS or WHD_BUFFER_ALLOC_FAIL if the buffer could not be allocated
|
||||
*/
|
||||
whd_result_t cy_host_buffer_get(whd_buffer_t *buffer, whd_buffer_dir_t direction, unsigned short size, unsigned long timeout_ms);
|
||||
whd_result_t cy_host_buffer_get(whd_buffer_t* buffer, whd_buffer_dir_t direction,
|
||||
unsigned short size, unsigned long timeout_ms);
|
||||
|
||||
/** Releases a packet buffer
|
||||
*
|
||||
|
|
@ -85,7 +86,7 @@ void cy_buffer_release(whd_buffer_t buffer, whd_buffer_dir_t direction);
|
|||
*
|
||||
* @return : The packet buffer's current pointer.
|
||||
*/
|
||||
uint8_t *cy_buffer_get_current_piece_data_pointer(whd_buffer_t buffer);
|
||||
uint8_t* cy_buffer_get_current_piece_data_pointer(whd_buffer_t buffer);
|
||||
|
||||
/** Retrieves the size of a packet buffer
|
||||
*
|
||||
|
|
@ -121,16 +122,16 @@ whd_result_t cy_buffer_set_size(whd_buffer_t buffer, unsigned short size);
|
|||
* @param buffer : A pointer to the handle of the current packet buffer for which the
|
||||
* current pointer will be moved. On return this may contain a pointer
|
||||
* to a newly allocated packet buffer which has been daisy chained to
|
||||
* the front of the given one. This would be the case if the given packet
|
||||
* buffer didn't have enough space at the front.
|
||||
* the front of the given one. This would be the case if the given
|
||||
* packet buffer didn't have enough space at the front.
|
||||
* @param add_remove_amount : This is the number of bytes to move the current pointer of the packet
|
||||
* buffer - a negative value increases the space for headers at the front
|
||||
* of the packet, a positive value decreases the space.
|
||||
* buffer - a negative value increases the space for headers at the
|
||||
* front of the packet, a positive value decreases the space.
|
||||
*
|
||||
* @return : CY_RSLT_SUCCESS or WHD_PMK_WRONG_LENGTH if the added amount is outside
|
||||
* the size of the buffer
|
||||
* @return : CY_RSLT_SUCCESS or WHD_PMK_WRONG_LENGTH if the added amount is
|
||||
* outside the size of the buffer
|
||||
*/
|
||||
whd_result_t cy_buffer_add_remove_at_front(whd_buffer_t *buffer, int32_t add_remove_amount);
|
||||
whd_result_t cy_buffer_add_remove_at_front(whd_buffer_t* buffer, int32_t add_remove_amount);
|
||||
|
||||
|
||||
/** Called by WHD to pass received data to the network stack
|
||||
|
|
@ -164,6 +165,6 @@ void cy_network_process_ethernet_data(whd_interface_t interface, whd_buffer_t bu
|
|||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
#endif // __cplusplus
|
||||
|
||||
/** \} group_bsp_network_buffer */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,75 @@
|
|||
/***********************************************************************************************//**
|
||||
* \file cy_wifi_fw_section.h
|
||||
*
|
||||
* \brief
|
||||
* Determines the start and end of the region the WiFi firmware is stored in.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#if defined(CY_STORAGE_WIFI_DATA_OUTPUT)
|
||||
|
||||
#include "cy_utils.h"
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
|
||||
#define CY_SECTION_BASE_SYMBOL_BASE(SECTION) Image$$ ## SECTION ## $$Base
|
||||
#define CY_SECTION_BASE_SYMBOL(SECTION) CY_SECTION_BASE_SYMBOL_BASE(SECTION)
|
||||
extern char CY_SECTION_BASE_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT);
|
||||
#define CY_WIFI_FW_SECTION_START (&CY_SECTION_BASE_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT))
|
||||
|
||||
#define CY_SECTION_LIMIT_SYMBOL_BASE(SECTION) Image$$ ## SECTION ## $$Limit
|
||||
#define CY_SECTION_LIMIT_SYMBOL(SECTION) CY_SECTION_LIMIT_SYMBOL_BASE(SECTION)
|
||||
extern char CY_SECTION_LIMIT_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT);
|
||||
#define CY_WIFI_FW_SECTION_END (&CY_SECTION_LIMIT_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT))
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
// Must define __<Output Section Name>_start and __<Output Section Name>_end in the linker script
|
||||
|
||||
#define CY_SECTION_START_SYMBOL_BASE(SECTION) __ ## SECTION ## _start
|
||||
#define CY_SECTION_START_SYMBOL(SECTION) CY_SECTION_START_SYMBOL_BASE(SECTION)
|
||||
extern char CY_SECTION_START_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT);
|
||||
#define CY_WIFI_FW_SECTION_START (&CY_SECTION_START_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT))
|
||||
|
||||
#define CY_SECTION_END_SYMBOL_BASE(SECTION) __ ## SECTION ## _end
|
||||
#define CY_SECTION_END_SYMBOL(SECTION) CY_SECTION_END_SYMBOL_BASE(SECTION)
|
||||
extern char CY_SECTION_END_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT);
|
||||
#define CY_WIFI_FW_SECTION_END (&CY_SECTION_END_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT))
|
||||
|
||||
#elif defined(__ICCARM__)
|
||||
|
||||
#define CY_DECLARE_SECTION_BASE(SECTION) CY_PRAGMA(section = #SECTION)
|
||||
#define CY_DECLARE_SECTION(SECTION) CY_DECLARE_SECTION_BASE(SECTION)
|
||||
CY_DECLARE_SECTION(CY_STORAGE_WIFI_DATA_OUTPUT)
|
||||
|
||||
#define CY_SECTION_BEGIN_SYMBOL_BASE(SECTION) __section_begin(#SECTION)
|
||||
#define CY_SECTION_BEGIN_SYMBOL(SECTION) CY_SECTION_BEGIN_SYMBOL_BASE(SECTION)
|
||||
#define CY_WIFI_FW_SECTION_START (CY_SECTION_BEGIN_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT))
|
||||
|
||||
#define CY_SECTION_END_SYMBOL_BASE(SECTION) __section_end(#SECTION)
|
||||
#define CY_SECTION_END_SYMBOL(SECTION) CY_SECTION_END_SYMBOL_BASE(SECTION)
|
||||
#define CY_WIFI_FW_SECTION_END (CY_SECTION_END_SYMBOL(CY_STORAGE_WIFI_DATA_OUTPUT))
|
||||
|
||||
#else // if defined(__ARMCC_VERSION)
|
||||
#error "An unsupported toolchain"
|
||||
#endif // defined(__ARMCC_VERSION)
|
||||
|
||||
#endif // defined(CY_STORAGE_WIFI_DATA_OUTPUT)
|
||||
|
|
@ -1,26 +1,26 @@
|
|||
/***************************************************************************//**
|
||||
* \file cybsp_wifi.c
|
||||
*
|
||||
* \brief
|
||||
* Provides utility functions that are used by board support packages.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file cybsp_wifi.c
|
||||
*
|
||||
* \brief
|
||||
* Provides utility functions that are used by board support packages.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
#include "cybsp.h"
|
||||
#include "cybsp_wifi.h"
|
||||
|
|
@ -48,178 +48,218 @@ extern "C" {
|
|||
#define CY_WIFI_OOB_INTR_PRIORITY 2
|
||||
#endif
|
||||
|
||||
/* Determine whether to use the SDIO oob interrupt.
|
||||
* Use CY_WIFI_HOST_WAKE_SW_FORCE to force the enable status.
|
||||
*/
|
||||
// Determine whether to use the SDIO oob interrupt.
|
||||
// Use CY_WIFI_HOST_WAKE_SW_FORCE to force the enable status.
|
||||
#if !defined(CY_WIFI_HOST_WAKE_SW_FORCE)
|
||||
#define CY_SDIO_BUS_USE_OOB_INTR (1u)
|
||||
#else
|
||||
#define CY_SDIO_BUS_USE_OOB_INTR CY_WIFI_HOST_WAKE_SW_FORCE
|
||||
#endif /* defined(CY_WIFI_HOST_WAKE_SW_FORCE) */
|
||||
#endif // defined(CY_WIFI_HOST_WAKE_SW_FORCE)
|
||||
|
||||
// *SUSPEND-FORMATTING*
|
||||
#if (CY_SDIO_BUS_USE_OOB_INTR != 0)
|
||||
/* Setup configuration based on configurator or BSP, where configurator has precedence. */
|
||||
// Setup configuration based on configurator or BSP, where configurator has precedence.
|
||||
#if defined(CYCFG_WIFI_HOST_WAKE_ENABLED)
|
||||
#define CY_WIFI_HOST_WAKE_GPIO CYCFG_WIFI_HOST_WAKE_GPIO
|
||||
#define CY_WIFI_HOST_WAKE_IRQ_EVENT CYCFG_WIFI_HOST_WAKE_IRQ_EVENT
|
||||
#else
|
||||
/* Setup host-wake pin */
|
||||
// Setup host-wake pin
|
||||
#if defined(CYBSP_WIFI_HOST_WAKE)
|
||||
#define CY_WIFI_HOST_WAKE_GPIO CYBSP_WIFI_HOST_WAKE
|
||||
#else
|
||||
#error "CYBSP_WIFI_HOST_WAKE must be defined"
|
||||
#endif
|
||||
/* Setup host-wake irq */
|
||||
// Setup host-wake irq
|
||||
#if defined(CYBSP_WIFI_HOST_WAKE_IRQ_EVENT)
|
||||
#define CY_WIFI_HOST_WAKE_IRQ_EVENT CYBSP_WIFI_HOST_WAKE_IRQ_EVENT
|
||||
#else
|
||||
#error "CYBSP_WIFI_HOST_WAKE_IRQ_EVENT must be defined"
|
||||
#endif
|
||||
#endif
|
||||
#else
|
||||
#endif // if defined(CYCFG_WIFI_HOST_WAKE_ENABLED)
|
||||
#else // if (CY_SDIO_BUS_USE_OOB_INTR != 0)
|
||||
#define CY_WIFI_HOST_WAKE_GPIO CYHAL_NC_PIN_VALUE
|
||||
#define CY_WIFI_HOST_WAKE_IRQ_EVENT 0
|
||||
#endif /* (CY_SDIO_BUS_USE_OOB_INTR != 0) */
|
||||
#endif // (CY_SDIO_BUS_USE_OOB_INTR != 0)
|
||||
// *RESUME-FORMATTING*
|
||||
|
||||
static whd_driver_t whd_drv;
|
||||
|
||||
static whd_buffer_funcs_t buffer_ops =
|
||||
extern whd_resource_source_t resource_ops;
|
||||
|
||||
static whd_buffer_funcs_t buffer_if_default =
|
||||
{
|
||||
.whd_host_buffer_get = cy_host_buffer_get,
|
||||
.whd_buffer_release = cy_buffer_release,
|
||||
.whd_host_buffer_get = cy_host_buffer_get,
|
||||
.whd_buffer_release = cy_buffer_release,
|
||||
.whd_buffer_get_current_piece_data_pointer = cy_buffer_get_current_piece_data_pointer,
|
||||
.whd_buffer_get_current_piece_size = cy_buffer_get_current_piece_size,
|
||||
.whd_buffer_set_size = cy_buffer_set_size,
|
||||
.whd_buffer_add_remove_at_front = cy_buffer_add_remove_at_front,
|
||||
.whd_buffer_get_current_piece_size = cy_buffer_get_current_piece_size,
|
||||
.whd_buffer_set_size = cy_buffer_set_size,
|
||||
.whd_buffer_add_remove_at_front = cy_buffer_add_remove_at_front,
|
||||
};
|
||||
|
||||
static whd_netif_funcs_t netif_ops =
|
||||
static whd_netif_funcs_t netif_if_default =
|
||||
{
|
||||
.whd_network_process_ethernet_data = cy_network_process_ethernet_data,
|
||||
};
|
||||
|
||||
extern whd_resource_source_t resource_ops;
|
||||
|
||||
static cy_rslt_t sdio_try_send_cmd(const cyhal_sdio_t *sdio_object, cyhal_transfer_t direction, \
|
||||
cyhal_sdio_command_t command, uint32_t argument, uint32_t* response)
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// sdio_try_send_cmd
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
static cy_rslt_t sdio_try_send_cmd(const cyhal_sdio_t* sdio_object, cyhal_transfer_t direction, \
|
||||
cyhal_sdio_command_t command, uint32_t argument,
|
||||
uint32_t* response)
|
||||
{
|
||||
uint8_t loop_count = 0;
|
||||
cy_rslt_t result = CYBSP_RSLT_WIFI_SDIO_ENUM_TIMEOUT;
|
||||
uint8_t loop_count = 0;
|
||||
cy_rslt_t result = CYBSP_RSLT_WIFI_SDIO_ENUM_TIMEOUT;
|
||||
do
|
||||
{
|
||||
result = cyhal_sdio_send_cmd(sdio_object, direction, command, argument, response);
|
||||
if(result != CY_RSLT_SUCCESS)
|
||||
if (result != CY_RSLT_SUCCESS)
|
||||
{
|
||||
cyhal_system_delay_ms(SDIO_RETRY_DELAY_MS);
|
||||
}
|
||||
loop_count++;
|
||||
}
|
||||
while(result != CY_RSLT_SUCCESS && loop_count <= SDIO_BUS_LEVEL_MAX_RETRIES);
|
||||
} while(result != CY_RSLT_SUCCESS && loop_count <= SDIO_BUS_LEVEL_MAX_RETRIES);
|
||||
return result;
|
||||
}
|
||||
|
||||
static cy_rslt_t cybsp_sdio_enumerate(const cyhal_sdio_t *sdio_object)
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cybsp_sdio_enumerate
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
static cy_rslt_t cybsp_sdio_enumerate(const cyhal_sdio_t* sdio_object)
|
||||
{
|
||||
cy_rslt_t result = CYBSP_RSLT_WIFI_SDIO_ENUM_TIMEOUT;
|
||||
uint32_t loop_count = 0;
|
||||
uint32_t rel_addr;
|
||||
uint32_t response_ignored = 0;
|
||||
uint32_t no_argument = 0;
|
||||
cy_rslt_t result = CYBSP_RSLT_WIFI_SDIO_ENUM_TIMEOUT;
|
||||
uint32_t loop_count = 0;
|
||||
uint32_t rel_addr;
|
||||
uint32_t response_ignored = 0;
|
||||
uint32_t no_argument = 0;
|
||||
|
||||
do
|
||||
{
|
||||
/* Send CMD0 to set it to idle state */
|
||||
sdio_try_send_cmd(sdio_object, CYHAL_WRITE, CYHAL_SDIO_CMD_GO_IDLE_STATE, no_argument, &response_ignored /*ignored*/);
|
||||
// Send CMD0 to set it to idle state
|
||||
sdio_try_send_cmd(sdio_object, CYHAL_WRITE, CYHAL_SDIO_CMD_GO_IDLE_STATE, no_argument,
|
||||
&response_ignored /*ignored*/);
|
||||
|
||||
/* CMD5. */
|
||||
sdio_try_send_cmd(sdio_object, CYHAL_READ, CYHAL_SDIO_CMD_IO_SEND_OP_COND, no_argument, &response_ignored /*ignored*/);
|
||||
// CMD5.
|
||||
sdio_try_send_cmd(sdio_object, CYHAL_READ, CYHAL_SDIO_CMD_IO_SEND_OP_COND, no_argument,
|
||||
&response_ignored /*ignored*/);
|
||||
|
||||
/* Send CMD3 to get RCA. */
|
||||
result = sdio_try_send_cmd(sdio_object, CYHAL_READ, CYHAL_SDIO_CMD_SEND_RELATIVE_ADDR, no_argument, &rel_addr);
|
||||
if(result != CY_RSLT_SUCCESS)
|
||||
// Send CMD3 to get RCA.
|
||||
result = sdio_try_send_cmd(sdio_object, CYHAL_READ, CYHAL_SDIO_CMD_SEND_RELATIVE_ADDR,
|
||||
no_argument, &rel_addr);
|
||||
if (result != CY_RSLT_SUCCESS)
|
||||
{
|
||||
cyhal_system_delay_ms(SDIO_RETRY_DELAY_MS);
|
||||
}
|
||||
loop_count++;
|
||||
} while (result != CY_RSLT_SUCCESS && loop_count <= SDIO_ENUMERATION_TRIES);
|
||||
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
/* Send CMD7 with the returned RCA to select the card */
|
||||
result = sdio_try_send_cmd(sdio_object, CYHAL_WRITE, CYHAL_SDIO_CMD_SELECT_CARD, rel_addr, &response_ignored);
|
||||
// Send CMD7 with the returned RCA to select the card
|
||||
result = sdio_try_send_cmd(sdio_object, CYHAL_WRITE, CYHAL_SDIO_CMD_SELECT_CARD, rel_addr,
|
||||
&response_ignored);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// reset_wifi_chip
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
static cy_rslt_t reset_wifi_chip(void)
|
||||
{
|
||||
/* WiFi into reset */
|
||||
cy_rslt_t result = cyhal_gpio_init(CYBSP_WIFI_WL_REG_ON, CYHAL_GPIO_DIR_OUTPUT, CYHAL_GPIO_DRIVE_PULLUP, 0);
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
// WiFi into reset
|
||||
cy_rslt_t result = cyhal_gpio_init(CYBSP_WIFI_WL_REG_ON, CYHAL_GPIO_DIR_OUTPUT,
|
||||
CYHAL_GPIO_DRIVE_PULLUP, 0);
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
/* WiFi out of reset */
|
||||
// WiFi out of reset
|
||||
cyhal_gpio_write(CYBSP_WIFI_WL_REG_ON, true);
|
||||
cyhal_system_delay_ms(WLAN_POWER_UP_DELAY_MS);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// init_sdio_bus
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
static cy_rslt_t init_sdio_bus(void)
|
||||
{
|
||||
cy_rslt_t result = reset_wifi_chip();
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
cyhal_sdio_t* sdio_p = cybsp_get_wifi_sdio_obj();
|
||||
cy_rslt_t result = cybsp_sdio_enumerate(sdio_p);
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
result = cybsp_sdio_enumerate(sdio_p);
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
whd_sdio_config_t whd_sdio_config;
|
||||
whd_oob_config_t oob_config;
|
||||
cyhal_sdio_cfg_t config;
|
||||
whd_oob_config_t oob_config;
|
||||
cyhal_sdio_cfg_t config;
|
||||
|
||||
/* If the configurator reserved the pin, we need to release it here since
|
||||
WHD will try to reserve it again. WHD has no idea about configurators
|
||||
and expects it can reserve the pin that it is going to manage.
|
||||
*/
|
||||
// If the configurator reserved the pin, we need to release it here since
|
||||
// WHD will try to reserve it again. WHD has no idea about configurators
|
||||
// and expects it can reserve the pin that it is going to manage.
|
||||
#if defined(CYCFG_WIFI_HOST_WAKE_ENABLED)
|
||||
cyhal_resource_inst_t pinRsc = cyhal_utils_get_gpio_resource(CY_WIFI_HOST_WAKE_GPIO);
|
||||
cyhal_hwmgr_free(&pinRsc);
|
||||
cyhal_resource_inst_t pinRsc = cyhal_utils_get_gpio_resource(CY_WIFI_HOST_WAKE_GPIO);
|
||||
cyhal_hwmgr_free(&pinRsc);
|
||||
#endif
|
||||
|
||||
oob_config.host_oob_pin = CY_WIFI_HOST_WAKE_GPIO;
|
||||
oob_config.dev_gpio_sel = DEFAULT_OOB_PIN;
|
||||
oob_config.host_oob_pin = CY_WIFI_HOST_WAKE_GPIO;
|
||||
oob_config.dev_gpio_sel = DEFAULT_OOB_PIN;
|
||||
oob_config.is_falling_edge = (CY_WIFI_HOST_WAKE_IRQ_EVENT == CYHAL_GPIO_IRQ_FALL)
|
||||
? WHD_TRUE
|
||||
: WHD_FALSE;
|
||||
oob_config.intr_priority = CY_WIFI_OOB_INTR_PRIORITY;
|
||||
|
||||
whd_sdio_config.sdio_1bit_mode = WHD_FALSE;
|
||||
whd_sdio_config.sdio_1bit_mode = WHD_FALSE;
|
||||
whd_sdio_config.high_speed_sdio_clock = WHD_FALSE;
|
||||
whd_sdio_config.oob_config = oob_config;
|
||||
whd_sdio_config.oob_config = oob_config;
|
||||
whd_bus_sdio_attach(whd_drv, &whd_sdio_config, sdio_p);
|
||||
|
||||
/* Increase frequency to 25 MHz for better performance */
|
||||
// Increase frequency to 25 MHz for better performance
|
||||
config.frequencyhal_hz = 25000000;
|
||||
config.block_size = 0;
|
||||
config.block_size = 0;
|
||||
cyhal_sdio_configure(sdio_p, &config);
|
||||
}
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
cy_rslt_t cybsp_wifi_init_primary(whd_interface_t* interface)
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cybsp_wifi_init_primary_extended
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
cy_rslt_t cybsp_wifi_init_primary_extended(whd_interface_t* interface,
|
||||
whd_resource_source_t* resource_if,
|
||||
whd_buffer_funcs_t* buffer_if,
|
||||
whd_netif_funcs_t* netif_if)
|
||||
{
|
||||
whd_init_config_t whd_init_config;
|
||||
whd_init_config.thread_stack_size = (uint32_t)THREAD_STACK_SIZE;
|
||||
whd_init_config.thread_stack_size = (uint32_t)THREAD_STACK_SIZE;
|
||||
whd_init_config.thread_stack_start = NULL;
|
||||
whd_init_config.thread_priority = (uint32_t)THREAD_PRIORITY;
|
||||
whd_init_config.country = COUNTRY;
|
||||
whd_init_config.thread_priority = (uint32_t)THREAD_PRIORITY;
|
||||
whd_init_config.country = COUNTRY;
|
||||
|
||||
cy_rslt_t result = whd_init(&whd_drv, &whd_init_config, &resource_ops, &buffer_ops, &netif_ops);
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
if (resource_if == NULL)
|
||||
{
|
||||
resource_if = &resource_ops;
|
||||
}
|
||||
if (buffer_if == NULL)
|
||||
{
|
||||
buffer_if = &buffer_if_default;
|
||||
}
|
||||
if (netif_if == NULL)
|
||||
{
|
||||
netif_if = &netif_if_default;
|
||||
}
|
||||
|
||||
cy_rslt_t result = whd_init(&whd_drv, &whd_init_config, resource_if, buffer_if, netif_if);
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
result = init_sdio_bus();
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
result = whd_wifi_on(whd_drv, interface);
|
||||
}
|
||||
|
|
@ -227,30 +267,44 @@ cy_rslt_t cybsp_wifi_init_primary(whd_interface_t* interface)
|
|||
return result;
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cybsp_wifi_init_secondary
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
cy_rslt_t cybsp_wifi_init_secondary(whd_interface_t* interface, whd_mac_t* mac_address)
|
||||
{
|
||||
return whd_add_secondary_interface(whd_drv, mac_address, interface);
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cybsp_wifi_deinit
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
cy_rslt_t cybsp_wifi_deinit(whd_interface_t interface)
|
||||
{
|
||||
cy_rslt_t result = whd_wifi_off(interface);
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
result = whd_deinit(interface);
|
||||
if(result == CY_RSLT_SUCCESS)
|
||||
if (result == CY_RSLT_SUCCESS)
|
||||
{
|
||||
whd_bus_sdio_detach(whd_drv);
|
||||
cyhal_gpio_free(CYBSP_WIFI_WL_REG_ON);
|
||||
}
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// cybsp_get_wifi_driver
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
whd_driver_t cybsp_get_wifi_driver(void)
|
||||
{
|
||||
return whd_drv;
|
||||
}
|
||||
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,35 +1,35 @@
|
|||
/***************************************************************************//**
|
||||
* \file cybsp_wifi.h
|
||||
*
|
||||
* \brief
|
||||
* Basic abstraction layer for dealing with boards containing a Cypress MCU. This
|
||||
* API provides convenience methods for initializing and manipulating different
|
||||
* hardware found on the board.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file cybsp_wifi.h
|
||||
*
|
||||
* \brief
|
||||
* Basic abstraction layer for dealing with boards containing a Cypress MCU. This
|
||||
* API provides convenience methods for initializing and manipulating different
|
||||
* hardware found on the board.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_bsp_wifi WiFi Initialization
|
||||
* \{
|
||||
* Basic integration code for interfacing the WiFi Host Driver (WHD) with the Board
|
||||
* Support Packages (BSPs).
|
||||
*/
|
||||
* \addtogroup group_bsp_wifi WiFi Initialization
|
||||
* \{
|
||||
* Basic integration code for interfacing the WiFi Host Driver (WHD) with the Board
|
||||
* Support Packages (BSPs).
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include "cy_result.h"
|
||||
|
|
@ -40,10 +40,12 @@ extern "C" {
|
|||
#endif
|
||||
|
||||
/** Initialization of the WiFi driver failed. */
|
||||
#define CYBSP_RSLT_WIFI_INIT_FAILED (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_BOARD_LIB_WHD_INTEGRATION, 0))
|
||||
#define CYBSP_RSLT_WIFI_INIT_FAILED \
|
||||
(CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_BOARD_LIB_WHD_INTEGRATION, 0))
|
||||
|
||||
/** SDIO enumeration failed. */
|
||||
#define CYBSP_RSLT_WIFI_SDIO_ENUM_TIMEOUT (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_BOARD_LIB_WHD_INTEGRATION, 1))
|
||||
#define CYBSP_RSLT_WIFI_SDIO_ENUM_TIMEOUT \
|
||||
(CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_BOARD_LIB_WHD_INTEGRATION, 1))
|
||||
|
||||
/** Initializes the primary interface for the WiFi driver on the board. This sets up
|
||||
* the WHD interface to use the \ref group_bsp_network_buffer APIs and to communicate
|
||||
|
|
@ -55,10 +57,35 @@ extern "C" {
|
|||
* reinitialized, \ref cybsp_wifi_deinit must be called before calling this function
|
||||
* again.
|
||||
*
|
||||
* @param[out] interface Interface to be initialized
|
||||
* @param[out] interface Interface to be initialized
|
||||
* @param[in] resource_if Pointer to resource interface to provide resources to the driver
|
||||
* initialization process. Passing NULL will use the default.
|
||||
* @param[in] buffer_if Pointer to a buffer interface to provide buffer related services to the
|
||||
* driver instance. Passing NULL will use the default.
|
||||
* @param[in] netif_if Pointer to a whd_netif_funcs_t to provide network stack services to the
|
||||
* driver instance. Passing NULL will use the default.
|
||||
*
|
||||
* @return CY_RSLT_SUCCESS for successful initialization or error if initialization failed.
|
||||
*/
|
||||
cy_rslt_t cybsp_wifi_init_primary(whd_interface_t* interface);
|
||||
cy_rslt_t cybsp_wifi_init_primary_extended(whd_interface_t* interface,
|
||||
whd_resource_source_t* resource_if,
|
||||
whd_buffer_funcs_t* buffer_if,
|
||||
whd_netif_funcs_t* netif_if);
|
||||
|
||||
/**
|
||||
* Initializes the primary interface for the WiFi driver on the board using the default resource,
|
||||
* buffer, and network interfaces.
|
||||
* See cybsp_wifi_init_primary_extended() for more details.
|
||||
*
|
||||
* @param[out] interface Interface to be initialized
|
||||
*
|
||||
* @return CY_RSLT_SUCCESS for successful initialization or error if initialization failed.
|
||||
*/
|
||||
static inline cy_rslt_t cybsp_wifi_init_primary(whd_interface_t* interface)
|
||||
{
|
||||
return cybsp_wifi_init_primary_extended(interface, NULL, NULL, NULL);
|
||||
}
|
||||
|
||||
|
||||
/** This function initializes and adds a secondary interface to the WiFi driver.
|
||||
* @note This function does not initialize the WiFi driver or turn on the WiFi chip.
|
||||
|
|
@ -66,6 +93,7 @@ cy_rslt_t cybsp_wifi_init_primary(whd_interface_t* interface);
|
|||
*
|
||||
* @param[out] interface Interface to be initialized
|
||||
* @param[in] mac_address Mac address for secondary interface
|
||||
*
|
||||
* @return CY_RSLT_SUCCESS for successful initialization or error if initialization failed.
|
||||
*/
|
||||
cy_rslt_t cybsp_wifi_init_secondary(whd_interface_t* interface, whd_mac_t* mac_address);
|
||||
|
|
@ -76,6 +104,7 @@ cy_rslt_t cybsp_wifi_init_secondary(whd_interface_t* interface, whd_mac_t* mac_a
|
|||
* 2) Turns off the WiFi chip.
|
||||
*
|
||||
* @param[in] interface Interface to be de-initialized.
|
||||
*
|
||||
* @return CY_RSLT_SUCCESS for successful de-initialization or error if de-initialization failed.
|
||||
*/
|
||||
cy_rslt_t cybsp_wifi_deinit(whd_interface_t interface);
|
||||
|
|
@ -91,6 +120,6 @@ whd_driver_t cybsp_get_wifi_driver(void);
|
|||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
#endif // __cplusplus
|
||||
|
||||
/** \} group_bsp_wifi */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,165 @@
|
|||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction, and
|
||||
distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
"Licensor" shall mean the copyright owner or entity authorized by the copyright
|
||||
owner that is granting the License.
|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all other entities
|
||||
that control, are controlled by, or are under common control with that entity.
|
||||
For the purposes of this definition, "control" means (i) the power, direct or
|
||||
indirect, to cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
|
||||
outstanding shares, or (iii) beneficial ownership of such entity.
|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity exercising
|
||||
permissions granted by this License.
|
||||
|
||||
"Source" form shall mean the preferred form for making modifications, including
|
||||
but not limited to software source code, documentation source, and configuration
|
||||
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|
||||
|
||||
"Object" form shall mean any form resulting from mechanical transformation or
|
||||
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|
||||
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|
||||
|
||||
"Work" shall mean the work of authorship, whether in Source or Object form, made
|
||||
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|
||||
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|
||||
|
||||
"Derivative Works" shall mean any work, whether in Source or Object form, that
|
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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||||
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|
||||
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|
||||
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||||
|
||||
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|
||||
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|
||||
offer, and charge a fee for, acceptance of support, warranty, indemnity, or
|
||||
other liability obligations and/or rights consistent with this License. However,
|
||||
in accepting such obligations, You may act only on Your own behalf and on Your
|
||||
sole responsibility, not on behalf of any other Contributor, and only if You
|
||||
agree to indemnify, defend, and hold each Contributor harmless for any liability
|
||||
incurred by, or claims asserted against, such Contributor by reason of your
|
||||
accepting any such warranty or additional liability.
|
||||
|
|
@ -10,7 +10,7 @@
|
|||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2019 Cypress Semiconductor Corporation
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2019 Cypress Semiconductor Corporation
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
|
|
@ -160,6 +160,12 @@ size_t cy_serial_flash_qspi_get_erase_size(uint32_t addr)
|
|||
return (size_t)qspi_block_config.memConfig[MEM_SLOT]->deviceCfg->eraseSize;
|
||||
}
|
||||
|
||||
size_t cy_serial_flash_qspi_get_prog_size(uint32_t addr)
|
||||
{
|
||||
CY_UNUSED_PARAMETER(addr);
|
||||
return (size_t)qspi_block_config.memConfig[MEM_SLOT]->deviceCfg->programSize;
|
||||
}
|
||||
|
||||
cy_rslt_t cy_serial_flash_qspi_read(uint32_t addr, size_t length, uint8_t *buf)
|
||||
{
|
||||
/* Cy_SMIF_MemRead() returns error if (addr + length) > total flash size. */
|
||||
|
|
@ -215,6 +221,11 @@ cy_rslt_t cy_serial_flash_qspi_enable_xip(bool enable)
|
|||
return CY_RSLT_SUCCESS;
|
||||
}
|
||||
|
||||
void cy_serial_flash_qspi_set_interrupt_priority(uint8_t priority)
|
||||
{
|
||||
NVIC_SetPriority(smif_interrupt_IRQn, priority);
|
||||
}
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2019 Cypress Semiconductor Corporation
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
|
|
@ -48,11 +48,11 @@ extern "C" {
|
|||
/**
|
||||
* \brief Initializes the serial flash memory. This function accepts up to 8
|
||||
* I/Os. Number of I/Os depend on the type of memory interface. Pass NC when an
|
||||
* I/O is unused.
|
||||
* I/O is unused.
|
||||
* Single SPI - (io0, io1) or (io2, io3) or (io4, io5) or (io6, io7)
|
||||
* Dual SPI - (io0, io1) or (io2, io3) or (io4, io5) or (io6, io7)
|
||||
* Quad SPI - (io0, io1, io2, io3) or (io4, io5, io6, io7)
|
||||
* Octal SPI - All 8 I/Os are used.
|
||||
* Dual SPI - (io0, io1) or (io2, io3) or (io4, io5) or (io6, io7)
|
||||
* Quad SPI - (io0, io1, io2, io3) or (io4, io5, io6, io7)
|
||||
* Octal SPI - All 8 I/Os are used.
|
||||
* \param mem_config Memory configuration to be used for initializing
|
||||
* \param io0 Data/IO pin 0 connected to the memory, Pass NC when unused.
|
||||
* \param io1 Data/IO pin 1 connected to the memory, Pass NC when unused.
|
||||
|
|
@ -64,24 +64,22 @@ extern "C" {
|
|||
* \param io7 Data/IO pin 7 connected to the memory, Pass NC when unused.
|
||||
* \param sclk Clock pin connected to the memory
|
||||
* \param ssel Slave select pin connected to the memory
|
||||
* \param hz Clock frequency to be used with the memory. This parameter is
|
||||
* ignored currently. Change the CLK_HF frequency using either the
|
||||
Device Configurator tool or the clock driver.
|
||||
* \param hz Clock frequency to be used with the memory.
|
||||
* \returns CY_RSLT_SUCCESS if the initialization was successful, an error code
|
||||
* otherwise.
|
||||
*/
|
||||
cy_rslt_t cy_serial_flash_qspi_init(
|
||||
cy_rslt_t cy_serial_flash_qspi_init(
|
||||
const cy_stc_smif_mem_config_t* mem_config,
|
||||
cyhal_gpio_t io0,
|
||||
cyhal_gpio_t io1,
|
||||
cyhal_gpio_t io2,
|
||||
cyhal_gpio_t io0,
|
||||
cyhal_gpio_t io1,
|
||||
cyhal_gpio_t io2,
|
||||
cyhal_gpio_t io3,
|
||||
cyhal_gpio_t io4,
|
||||
cyhal_gpio_t io5,
|
||||
cyhal_gpio_t io6,
|
||||
cyhal_gpio_t io7,
|
||||
cyhal_gpio_t io4,
|
||||
cyhal_gpio_t io5,
|
||||
cyhal_gpio_t io6,
|
||||
cyhal_gpio_t io7,
|
||||
cyhal_gpio_t sclk,
|
||||
cyhal_gpio_t ssel,
|
||||
cyhal_gpio_t ssel,
|
||||
uint32_t hz);
|
||||
|
||||
/**
|
||||
|
|
@ -103,6 +101,14 @@ size_t cy_serial_flash_qspi_get_size(void);
|
|||
*/
|
||||
size_t cy_serial_flash_qspi_get_erase_size(uint32_t addr);
|
||||
|
||||
/**
|
||||
* \brief Returns the page size for programming of the sector to which the given
|
||||
* address belongs. Address is used only for a memory with hybrid sector size.
|
||||
* \param addr Address that belongs to the sector for which size is returned.
|
||||
* \returns Page size in bytes.
|
||||
*/
|
||||
size_t cy_serial_flash_qspi_get_prog_size(uint32_t addr);
|
||||
|
||||
/**
|
||||
* \brief Utility function to calculate the starting address of an erase sector
|
||||
* to which the given address belongs.
|
||||
|
|
@ -165,6 +171,12 @@ cy_rslt_t cy_serial_flash_qspi_erase(uint32_t addr, size_t length);
|
|||
*/
|
||||
cy_rslt_t cy_serial_flash_qspi_enable_xip(bool enable);
|
||||
|
||||
/**
|
||||
* \brief Changes QSPI interrupt priority
|
||||
* \param priority interrupt priority to be set
|
||||
*/
|
||||
void cy_serial_flash_qspi_set_interrupt_priority(uint8_t priority);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,29 +1,28 @@
|
|||
/***************************************************************************//**
|
||||
* \file SDIO_HOST_cfg.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides the configuration of the UDB based SDIO driver.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file COMPONENT_UDB_SDIO_P12/SDIO_HOST_cfg.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides the configuration of the UDB based SDIO driver.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
#if !defined(CY_SDIO_CFG_H)
|
||||
#define CY_SDIO_CFG_H
|
||||
#pragma once
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
|
@ -95,10 +94,10 @@ extern "C" {
|
|||
|
||||
#define CYREG_UDB_UDBIF_INT_CLK_CTL 0x40347904u
|
||||
|
||||
/*************Defines for UDBs from Creator*****************************/
|
||||
/***********These come for cyfitter.h**********************************/
|
||||
// *************Defines for UDBs from Creator*****************************
|
||||
// ***********These come for cyfitter.h**********************************
|
||||
|
||||
/* SDIO_HOST_bSDIO */
|
||||
// SDIO_HOST_bSDIO
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_A0_REG 0x40341008u
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_A1_REG 0x40341108u
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_D0_REG 0x40341208u
|
||||
|
|
@ -764,79 +763,80 @@ extern "C" {
|
|||
#define SDIO_HOST_Write_DMA_DW__TR_IN TRIG1_OUT_CPUSS_DW1_TR_IN1
|
||||
|
||||
|
||||
/***************************CMD DMA***************************************/
|
||||
// **************************CMD DMA***************************************
|
||||
#define SDIO_HOST_CMD_DMA_DW_BLOCK (0u)
|
||||
#define SDIO_HOST_CMD_DMA_DW_CHANNEL (1u)
|
||||
#define SDIO_HOST_CMD_DMA_HW (DW0)
|
||||
#define SDIO_HOST_CMD_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_CMD_DMA_PRIORITY (1u)
|
||||
#define SDIO_HOST_CMD_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_CMD_DMA_PREEMPTABLE (true)
|
||||
#define SDIO_HOST_CMD_DMA_BUFFERABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc;
|
||||
|
||||
/***************************Read DMA***************************************/
|
||||
// **************************Read DMA***************************************
|
||||
#define SDIO_HOST_Read_DMA_DW_BLOCK (1u)
|
||||
#define SDIO_HOST_Read_DMA_DW_CHANNEL (3u)
|
||||
#define SDIO_HOST_Read_DMA_HW (DW1)
|
||||
#define SDIO_HOST_Read_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Read_DMA_PRIORITY (0u)
|
||||
#define SDIO_HOST_Read_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Read_DMA_PREEMPTABLE (false)
|
||||
#define SDIO_HOST_Read_DMA_BUFFERABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Read_DMA_Read_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Read_DMA_Read_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Read_DMA_Read_DMA_Desc;
|
||||
|
||||
/***************************Resp DMA***************************************/
|
||||
// **************************Resp DMA***************************************
|
||||
#define SDIO_HOST_Resp_DMA_DW_BLOCK (0u)
|
||||
#define SDIO_HOST_Resp_DMA_DW_CHANNEL (0u)
|
||||
#define SDIO_HOST_Resp_DMA_HW (DW0)
|
||||
#define SDIO_HOST_Resp_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Resp_DMA_PRIORITY (1u)
|
||||
#define SDIO_HOST_Resp_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Resp_DMA_PREEMPTABLE (true)
|
||||
#define SDIO_HOST_Resp_DMA_BUFFERABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc;
|
||||
|
||||
/***************************Write DMA***************************************/
|
||||
// **************************Write DMA***************************************
|
||||
#define SDIO_HOST_Write_DMA_DW_BLOCK (1u)
|
||||
#define SDIO_HOST_Write_DMA_DW_CHANNEL (1u)
|
||||
#define SDIO_HOST_Write_DMA_HW (DW1)
|
||||
#define SDIO_HOST_Write_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Write_DMA_PRIORITY (0u)
|
||||
#define SDIO_HOST_Write_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Write_DMA_PREEMPTABLE (false)
|
||||
#define SDIO_HOST_Write_DMA_BUFFERABLE (true)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Write_DMA_Write_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Write_DMA_Write_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Write_DMA_Write_DMA_Desc;
|
||||
|
||||
/***************************SDIO Clock**************************************/
|
||||
// **************************SDIO Clock**************************************
|
||||
/** The peripheral clock divider number */
|
||||
#define SDIO_HOST_Internal_Clock_DIV_NUM ((uint32_t)SDIO_HOST_Internal_Clock__DIV_NUM)
|
||||
/** The peripheral clock divider type */
|
||||
#define SDIO_HOST_Internal_Clock_DIV_TYPE ((cy_en_divider_types_t)SDIO_HOST_Internal_Clock__DIV_TYPE)
|
||||
#define SDIO_HOST_Internal_Clock_DIV_TYPE \
|
||||
((cy_en_divider_types_t)SDIO_HOST_Internal_Clock__DIV_TYPE)
|
||||
|
||||
/*Function for configuring TriggerMuxes*/
|
||||
// Function for configuring TriggerMuxes
|
||||
void SDIO_Host_Config_TriggerMuxes(void);
|
||||
|
||||
/*Function for configuring UDBs*/
|
||||
// Function for configuring UDBs
|
||||
void SDIO_Host_Config_UDBs(void);
|
||||
|
||||
/* SDIO_HOST_Read_Int */
|
||||
// SDIO_HOST_Read_Int
|
||||
#define SDIO_HOST_Read_Int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_Read_Int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Read_Int__INTC_NUMBER 69u
|
||||
|
|
@ -844,7 +844,7 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#define SDIO_HOST_Read_Int_INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Read_Int_INTC_NUMBER 69u
|
||||
|
||||
/* SDIO_HOST_sdio_int */
|
||||
// SDIO_HOST_sdio_int
|
||||
#define SDIO_HOST_sdio_int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_sdio_int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_sdio_int__INTC_NUMBER 122u
|
||||
|
|
@ -852,7 +852,7 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#define SDIO_HOST_sdio_int_INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_sdio_int_INTC_NUMBER 122u
|
||||
|
||||
/* SDIO_HOST_Write_Int */
|
||||
// SDIO_HOST_Write_Int
|
||||
#define SDIO_HOST_Write_Int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_Write_Int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Write_Int__INTC_NUMBER 67u
|
||||
|
|
@ -863,7 +863,3 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !defined(CY_SDIO_CFG_H) */
|
||||
|
||||
/* [] END OF FILE */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,29 +1,28 @@
|
|||
/***************************************************************************//**
|
||||
* \file SDIO_HOST_cfg.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides the configuration of the UDB based SDIO driver.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file COMPONENT_UDB_SDIO_P2/SDIO_HOST_cfg.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides the configuration of the UDB based SDIO driver.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
#if !defined(CY_SDIO_CFG_H)
|
||||
#define CY_SDIO_CFG_H
|
||||
#pragma once
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
|
@ -95,10 +94,10 @@ extern "C" {
|
|||
|
||||
#define CYREG_UDB_UDBIF_INT_CLK_CTL 0x40347904u
|
||||
|
||||
/*************Defines for UDBs from Creator*****************************/
|
||||
/***********These come for cyfitter.h**********************************/
|
||||
// *************Defines for UDBs from Creator*****************************
|
||||
// ***********These come for cyfitter.h**********************************
|
||||
|
||||
/* TFT_DMA */
|
||||
// TFT_DMA
|
||||
#define TFT_DMA_DW__BLOCK_HW DW0
|
||||
#define TFT_DMA_DW__BLOCK_NUMBER 0u
|
||||
#define TFT_DMA_DW__CHANNEL_HW DW0_CH_STRUCT2
|
||||
|
|
@ -106,7 +105,7 @@ extern "C" {
|
|||
#define TFT_DMA_DW__TR_IN TRIG0_OUT_CPUSS_DW0_TR_IN2
|
||||
#define TFT_DMA_DW__TR_OUT TRIG10_IN_CPUSS_DW0_TR_OUT2
|
||||
|
||||
/* TFT_CTRL */
|
||||
// TFT_CTRL
|
||||
#define TFT_CTRL_Sync_ctrl_reg__0__MASK 0x01u
|
||||
#define TFT_CTRL_Sync_ctrl_reg__0__POS 0
|
||||
#define TFT_CTRL_Sync_ctrl_reg__1__MASK 0x02u
|
||||
|
|
@ -137,7 +136,7 @@ extern "C" {
|
|||
#define TFT_CTRL_Sync_ctrl_reg__SC_CFG0 0x40342AD4u
|
||||
#define TFT_CTRL_Sync_ctrl_reg__SC_CFG1 0x40342AD8u
|
||||
|
||||
/* SDIO_HOST */
|
||||
// SDIO_HOST
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_A0_REG 0x4034101Cu
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_A1_REG 0x4034111Cu
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_D0_REG 0x4034121Cu
|
||||
|
|
@ -830,75 +829,75 @@ extern "C" {
|
|||
#define SDIO_HOST_Write_DMA_DW__TR_IN TRIG1_OUT_CPUSS_DW1_TR_IN1
|
||||
|
||||
|
||||
/***************************CMD DMA***************************************/
|
||||
// ***************************CMD DMA***************************************
|
||||
#define SDIO_HOST_CMD_DMA_DW_BLOCK (0u)
|
||||
#define SDIO_HOST_CMD_DMA_DW_CHANNEL (1u)
|
||||
#define SDIO_HOST_CMD_DMA_HW (DW0)
|
||||
#define SDIO_HOST_CMD_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_CMD_DMA_PRIORITY (1u)
|
||||
#define SDIO_HOST_CMD_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_CMD_DMA_PREEMPTABLE (true)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc;
|
||||
|
||||
/***************************Read DMA***************************************/
|
||||
// ***************************Read DMA***************************************
|
||||
#define SDIO_HOST_Read_DMA_DW_BLOCK (1u)
|
||||
#define SDIO_HOST_Read_DMA_DW_CHANNEL (3u)
|
||||
#define SDIO_HOST_Read_DMA_HW (DW1)
|
||||
#define SDIO_HOST_Read_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Read_DMA_PRIORITY (0u)
|
||||
#define SDIO_HOST_Read_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Read_DMA_PREEMPTABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Read_DMA_Read_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Read_DMA_Read_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Read_DMA_Read_DMA_Desc;
|
||||
|
||||
/***************************Resp DMA***************************************/
|
||||
// ***************************Resp DMA***************************************
|
||||
#define SDIO_HOST_Resp_DMA_DW_BLOCK (0u)
|
||||
#define SDIO_HOST_Resp_DMA_DW_CHANNEL (0u)
|
||||
#define SDIO_HOST_Resp_DMA_HW (DW0)
|
||||
#define SDIO_HOST_Resp_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Resp_DMA_PRIORITY (1u)
|
||||
#define SDIO_HOST_Resp_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Resp_DMA_PREEMPTABLE (true)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc;
|
||||
|
||||
/***************************Write DMA***************************************/
|
||||
// ***************************Write DMA***************************************
|
||||
#define SDIO_HOST_Write_DMA_DW_BLOCK (1u)
|
||||
#define SDIO_HOST_Write_DMA_DW_CHANNEL (1u)
|
||||
#define SDIO_HOST_Write_DMA_HW (DW1)
|
||||
#define SDIO_HOST_Write_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Write_DMA_PRIORITY (0u)
|
||||
#define SDIO_HOST_Write_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Write_DMA_PREEMPTABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Write_DMA_Write_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Write_DMA_Write_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Write_DMA_Write_DMA_Desc;
|
||||
|
||||
/***************************SDIO Clock**************************************/
|
||||
/* The peripheral clock divider number */
|
||||
// ***************************SDIO Clock**************************************
|
||||
// The peripheral clock divider number
|
||||
#define SDIO_HOST_Internal_Clock_DIV_NUM ((uint32_t)0)
|
||||
/* The peripheral clock divider type */
|
||||
// The peripheral clock divider type
|
||||
#define SDIO_HOST_Internal_Clock_DIV_TYPE ((cy_en_divider_types_t)CY_SYSCLK_DIV_8_BIT)
|
||||
|
||||
/*Function for configuring TriggerMuxes*/
|
||||
// Function for configuring TriggerMuxes
|
||||
void SDIO_Host_Config_TriggerMuxes(void);
|
||||
|
||||
/*Function for configuring UDBs*/
|
||||
// Function for configuring UDBs
|
||||
void SDIO_Host_Config_UDBs(void);
|
||||
|
||||
/* SDIO_HOST_Read_Int */
|
||||
// SDIO_HOST_Read_Int
|
||||
#define SDIO_HOST_Read_Int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_Read_Int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Read_Int__INTC_NUMBER 69u
|
||||
|
|
@ -906,7 +905,7 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#define SDIO_HOST_Read_Int_INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Read_Int_INTC_NUMBER 69u
|
||||
|
||||
/* SDIO_HOST_sdio_int */
|
||||
// SDIO_HOST_sdio_int
|
||||
#define SDIO_HOST_sdio_int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_sdio_int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_sdio_int__INTC_NUMBER 122u
|
||||
|
|
@ -914,7 +913,7 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#define SDIO_HOST_sdio_int_INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_sdio_int_INTC_NUMBER 122u
|
||||
|
||||
/* SDIO_HOST_Write_Int */
|
||||
// SDIO_HOST_Write_Int
|
||||
#define SDIO_HOST_Write_Int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_Write_Int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Write_Int__INTC_NUMBER 67u
|
||||
|
|
@ -925,7 +924,3 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !defined(CY_SDIO_CFG_H) */
|
||||
|
||||
/* [] END OF FILE */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,29 +1,28 @@
|
|||
/***************************************************************************//**
|
||||
* \file SDIO_HOST_cfg.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides the configuration of the UDB based SDIO driver.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file COMPONENT_UDB_SDIO_P9/SDIO_HOST_cfg.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides the configuration of the UDB based SDIO driver.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
#if !defined(CY_SDIO_CFG_H)
|
||||
#define CY_SDIO_CFG_H
|
||||
#pragma once
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
|
@ -95,10 +94,10 @@ extern "C" {
|
|||
|
||||
#define CYREG_UDB_UDBIF_INT_CLK_CTL 0x40347904u
|
||||
|
||||
/*************Defines for UDBs from Creator*****************************/
|
||||
/***********These come for cyfitter.h**********************************/
|
||||
// *************Defines for UDBs from Creator*****************************
|
||||
// ***********These come for cyfitter.h**********************************
|
||||
|
||||
/* SDIO_HOST_bSDIO */
|
||||
// SDIO_HOST_bSDIO
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_A0_REG 0x40341008u
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_A1_REG 0x40341108u
|
||||
#define SDIO_HOST_bSDIO_blockCounter_u0__16BIT_D0_REG 0x40341208u
|
||||
|
|
@ -764,75 +763,76 @@ extern "C" {
|
|||
#define SDIO_HOST_Write_DMA_DW__TR_IN TRIG1_OUT_CPUSS_DW1_TR_IN1
|
||||
|
||||
|
||||
/***************************CMD DMA***************************************/
|
||||
// ***************************CMD DMA***************************************
|
||||
#define SDIO_HOST_CMD_DMA_DW_BLOCK (0u)
|
||||
#define SDIO_HOST_CMD_DMA_DW_CHANNEL (1u)
|
||||
#define SDIO_HOST_CMD_DMA_HW (DW0)
|
||||
#define SDIO_HOST_CMD_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_CMD_DMA_PRIORITY (1u)
|
||||
#define SDIO_HOST_CMD_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_CMD_DMA_PREEMPTABLE (true)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_CMD_DMA_CMD_DMA_Desc;
|
||||
|
||||
/***************************Read DMA***************************************/
|
||||
// ***************************Read DMA***************************************
|
||||
#define SDIO_HOST_Read_DMA_DW_BLOCK (1u)
|
||||
#define SDIO_HOST_Read_DMA_DW_CHANNEL (3u)
|
||||
#define SDIO_HOST_Read_DMA_HW (DW1)
|
||||
#define SDIO_HOST_Read_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Read_DMA_PRIORITY (0u)
|
||||
#define SDIO_HOST_Read_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Read_DMA_PREEMPTABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Read_DMA_Read_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Read_DMA_Read_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Read_DMA_Read_DMA_Desc;
|
||||
|
||||
/***************************Resp DMA***************************************/
|
||||
// ***************************Resp DMA***************************************
|
||||
#define SDIO_HOST_Resp_DMA_DW_BLOCK (0u)
|
||||
#define SDIO_HOST_Resp_DMA_DW_CHANNEL (0u)
|
||||
#define SDIO_HOST_Resp_DMA_HW (DW0)
|
||||
#define SDIO_HOST_Resp_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Resp_DMA_PRIORITY (1u)
|
||||
#define SDIO_HOST_Resp_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Resp_DMA_PREEMPTABLE (true)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Resp_DMA_Resp_DMA_Desc;
|
||||
|
||||
/***************************Write DMA***************************************/
|
||||
// ***************************Write DMA***************************************
|
||||
#define SDIO_HOST_Write_DMA_DW_BLOCK (1u)
|
||||
#define SDIO_HOST_Write_DMA_DW_CHANNEL (1u)
|
||||
#define SDIO_HOST_Write_DMA_HW (DW1)
|
||||
#define SDIO_HOST_Write_DMA_INTR_MASK (CY_DMA_INTR_MASK)
|
||||
|
||||
/* Channel settings */
|
||||
// Channel settings
|
||||
#define SDIO_HOST_Write_DMA_PRIORITY (0u)
|
||||
#define SDIO_HOST_Write_DMA_DESCRIPTOR_NUM (1u)
|
||||
#define SDIO_HOST_Write_DMA_PREEMPTABLE (false)
|
||||
|
||||
extern cy_stc_dma_descriptor_config_t SDIO_HOST_Write_DMA_Write_DMA_Desc_config;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Write_DMA_Write_DMA_Desc;
|
||||
extern cy_stc_dma_descriptor_t SDIO_HOST_Write_DMA_Write_DMA_Desc;
|
||||
|
||||
/***************************SDIO Clock**************************************/
|
||||
// ***************************SDIO Clock**************************************
|
||||
/** The peripheral clock divider number */
|
||||
#define SDIO_HOST_Internal_Clock_DIV_NUM ((uint32_t)SDIO_HOST_Internal_Clock__DIV_NUM)
|
||||
/** The peripheral clock divider type */
|
||||
#define SDIO_HOST_Internal_Clock_DIV_TYPE ((cy_en_divider_types_t)SDIO_HOST_Internal_Clock__DIV_TYPE)
|
||||
#define SDIO_HOST_Internal_Clock_DIV_TYPE \
|
||||
((cy_en_divider_types_t)SDIO_HOST_Internal_Clock__DIV_TYPE)
|
||||
|
||||
/*Function for configuring TriggerMuxes*/
|
||||
// Function for configuring TriggerMuxes
|
||||
void SDIO_Host_Config_TriggerMuxes(void);
|
||||
|
||||
/*Function for configuring UDBs*/
|
||||
// Function for configuring UDBs
|
||||
void SDIO_Host_Config_UDBs(void);
|
||||
|
||||
/* SDIO_HOST_Read_Int */
|
||||
// SDIO_HOST_Read_Int
|
||||
#define SDIO_HOST_Read_Int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_Read_Int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Read_Int__INTC_NUMBER 69u
|
||||
|
|
@ -840,7 +840,7 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#define SDIO_HOST_Read_Int_INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Read_Int_INTC_NUMBER 69u
|
||||
|
||||
/* SDIO_HOST_sdio_int */
|
||||
// SDIO_HOST_sdio_int
|
||||
#define SDIO_HOST_sdio_int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_sdio_int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_sdio_int__INTC_NUMBER 122u
|
||||
|
|
@ -848,7 +848,7 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#define SDIO_HOST_sdio_int_INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_sdio_int_INTC_NUMBER 122u
|
||||
|
||||
/* SDIO_HOST_Write_Int */
|
||||
// SDIO_HOST_Write_Int
|
||||
#define SDIO_HOST_Write_Int__INTC_CORTEXM4_ASSIGNED 1
|
||||
#define SDIO_HOST_Write_Int__INTC_CORTEXM4_PRIORITY 7u
|
||||
#define SDIO_HOST_Write_Int__INTC_NUMBER 67u
|
||||
|
|
@ -859,7 +859,3 @@ void SDIO_Host_Config_UDBs(void);
|
|||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !defined(CY_SDIO_CFG_H) */
|
||||
|
||||
/* [] END OF FILE */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,165 @@
|
|||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction, and
|
||||
distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
"Licensor" shall mean the copyright owner or entity authorized by the copyright
|
||||
owner that is granting the License.
|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all other entities
|
||||
that control, are controlled by, or are under common control with that entity.
|
||||
For the purposes of this definition, "control" means (i) the power, direct or
|
||||
indirect, to cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
|
||||
outstanding shares, or (iii) beneficial ownership of such entity.
|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity exercising
|
||||
permissions granted by this License.
|
||||
|
||||
"Source" form shall mean the preferred form for making modifications, including
|
||||
but not limited to software source code, documentation source, and configuration
|
||||
files.
|
||||
|
||||
"Object" form shall mean any form resulting from mechanical transformation or
|
||||
translation of a Source form, including but not limited to compiled object code,
|
||||
generated documentation, and conversions to other media types.
|
||||
|
||||
"Work" shall mean the work of authorship, whether in Source or Object form, made
|
||||
available under the License, as indicated by a copyright notice that is included
|
||||
in or attached to the work (an example is provided in the Appendix below).
|
||||
|
||||
"Derivative Works" shall mean any work, whether in Source or Object form, that
|
||||
is based on (or derived from) the Work and for which the editorial revisions,
|
||||
annotations, elaborations, or other modifications represent, as a whole, an
|
||||
original work of authorship. For the purposes of this License, Derivative Works
|
||||
shall not include works that remain separable from, or merely link (or bind by
|
||||
name) to the interfaces of, the Work and Derivative Works thereof.
|
||||
|
||||
"Contribution" shall mean any work of authorship, including the original version
|
||||
of the Work and any modifications or additions to that Work or Derivative Works
|
||||
thereof, that is intentionally submitted to Licensor for inclusion in the Work
|
||||
by the copyright owner or by an individual or Legal Entity authorized to submit
|
||||
on behalf of the copyright owner. For the purposes of this definition,
|
||||
"submitted" means any form of electronic, verbal, or written communication sent
|
||||
to the Licensor or its representatives, including but not limited to
|
||||
communication on electronic mailing lists, source code control systems, and
|
||||
issue tracking systems that are managed by, or on behalf of, the Licensor for
|
||||
the purpose of discussing and improving the Work, but excluding communication
|
||||
that is conspicuously marked or otherwise designated in writing by the copyright
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File diff suppressed because it is too large
Load Diff
|
|
@ -1,59 +1,58 @@
|
|||
/***************************************************************************//**
|
||||
* \file SDIO_HOST.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides types definition, constants and function definition for
|
||||
* the SDIO driver.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
/***********************************************************************************************//**
|
||||
* \file SDIO_HOST.h
|
||||
*
|
||||
* \brief
|
||||
* This file provides types definition, constants and function definition for
|
||||
* the SDIO driver.
|
||||
*
|
||||
***************************************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
**************************************************************************************************/
|
||||
|
||||
/**
|
||||
* \defgroup group_bsp_pin_state Pin States
|
||||
* \defgroup group_bsp_pins Pin Mappings
|
||||
* \defgroup group_bsp_macros Macros
|
||||
* \defgroup group_bsp_functions Functions
|
||||
*
|
||||
* \defgroup group_udb_sdio UDB_SDIO
|
||||
* \{
|
||||
* SDIO - Secure Digital Input Output is a standard for communicating with various
|
||||
* \defgroup group_bsp_pin_state Pin States
|
||||
* \defgroup group_bsp_pins Pin Mappings
|
||||
* \defgroup group_bsp_macros Macros
|
||||
* \defgroup group_bsp_functions Functions
|
||||
*
|
||||
* \defgroup group_udb_sdio UDB_SDIO
|
||||
* \{
|
||||
* SDIO - Secure Digital Input Output is a standard for communicating with various
|
||||
external devices such as Wifi and bluetooth devices.
|
||||
* <p>
|
||||
* The driver is currently designed to only support communication with certain
|
||||
* Cypress Wifi and Bluetooth chipsets, it is not designed to work with a general
|
||||
* SDIO card, or even and SD card. It is only intended to be used by the WiFi
|
||||
* driver for communication.
|
||||
* <p>
|
||||
* This is not intended to be used as a general purpose API.
|
||||
*
|
||||
* \section group_udb_sdio_section_configuration_considerations Configuration Considerations
|
||||
* Features:
|
||||
* * Always Four Wire Mode
|
||||
* * Supports Card Interrupt
|
||||
* * Uses DMA for command and data transfer
|
||||
*
|
||||
* \defgroup group_udb_sdio_macros Macros
|
||||
* \defgroup group_udb_sdio_functions Functions
|
||||
* \defgroup group_udb_sdio_data_structures Data Structures
|
||||
*/
|
||||
* <p>
|
||||
* The driver is currently designed to only support communication with certain
|
||||
* Cypress Wifi and Bluetooth chipsets, it is not designed to work with a general
|
||||
* SDIO card, or even and SD card. It is only intended to be used by the WiFi
|
||||
* driver for communication.
|
||||
* <p>
|
||||
* This is not intended to be used as a general purpose API.
|
||||
*
|
||||
* \section group_udb_sdio_section_configuration_considerations Configuration Considerations
|
||||
* Features:
|
||||
* * Always Four Wire Mode
|
||||
* * Supports Card Interrupt
|
||||
* * Uses DMA for command and data transfer
|
||||
*
|
||||
* \defgroup group_udb_sdio_macros Macros
|
||||
* \defgroup group_udb_sdio_functions Functions
|
||||
* \defgroup group_udb_sdio_data_structures Data Structures
|
||||
*/
|
||||
|
||||
#if !defined(CY_SDIO_H)
|
||||
#define CY_SDIO_H
|
||||
#pragma once
|
||||
|
||||
#if defined(CYHAL_UDB_SDIO)
|
||||
#include "SDIO_HOST_cfg.h"
|
||||
|
|
@ -63,23 +62,25 @@ extern "C" {
|
|||
#endif
|
||||
|
||||
|
||||
/***************************************
|
||||
* API Constants
|
||||
***************************************/
|
||||
//==================================================================================================
|
||||
// API Constants
|
||||
//==================================================================================================
|
||||
|
||||
/**
|
||||
* \addtogroup group_udb_sdio_macros
|
||||
* \{
|
||||
*/
|
||||
* \addtogroup group_udb_sdio_macros
|
||||
* \{
|
||||
*/
|
||||
|
||||
#define SDIO_CMD_TIMEOUT (100000u) /**< Value used for firmware timeout*/
|
||||
#define SDIO_DAT_TIMEOUT (500000u) /**< Value used for firmware timeout*/
|
||||
#define SDIO_SRC_CLK_FREQ_HZ (10000000u) /**< Frequency of CLK_PERI*/
|
||||
#define SDIO_ENABLE_CNT (0x20u) /**< Bit to set in Aux Ctrl reg to enable 7 bit counters.*/
|
||||
#define SDIO_CMD_TIMEOUT (100000u) /**< Value used for firmware timeout*/
|
||||
#define SDIO_DAT_TIMEOUT (500000u) /**< Value used for firmware timeout*/
|
||||
#define SDIO_DAT_BUSY_TIMEOUT_MS (500u) /**< Value used for firmware timeout*/
|
||||
#define SDIO_SRC_CLK_FREQ_HZ (10000000u) /**< Frequency of CLK_PERI*/
|
||||
#define SDIO_ENABLE_CNT (0x20u) /**< Bit to set in Aux Ctrl reg to enable 7
|
||||
bit counters*/
|
||||
|
||||
/*!
|
||||
\defgroup group_sdio_cmd_constants Constants for the command channel
|
||||
*/
|
||||
\defgroup group_sdio_cmd_constants Constants for the command channel
|
||||
*/
|
||||
/* @{*/
|
||||
#define SDIO_HOST_DIR (0x40u) /**< Direction bit set in command */
|
||||
#define SDIO_CMD_END_BIT (0x01u) /**< End bit set in command*/
|
||||
|
|
@ -88,35 +89,41 @@ extern "C" {
|
|||
/*@} group_sdio_cmd_constants */
|
||||
|
||||
/*!
|
||||
\defgroup group_sdio_ctrl_reg SDIO control register bits
|
||||
*/
|
||||
\defgroup group_sdio_ctrl_reg SDIO control register bits
|
||||
*/
|
||||
/* @{*/
|
||||
#define SDIO_CTRL_INT_CLK (0x01u) /**< Enable the internal clock running the SDIO block*/
|
||||
#define SDIO_CTRL_INT_CLK (0x01u) /**< Enable the internal clock running the SDIO
|
||||
block*/
|
||||
#define SDIO_CTRL_SD_CLK (0x02u) /**< Enable the the SD Clock*/
|
||||
#define SDIO_CTRL_ENABLE_WRITE (0x04u) /**< Enable a write, should not be set if ENABLE_READ is set*/
|
||||
#define SDIO_CTRL_ENABLE_READ (0x08u) /**< Enable a read, should not be set if ENABLE_WRITE is set*/
|
||||
#define SDIO_CTRL_SKIP_RESPONSE (0x10u) /**< If set no response is required for the command*/
|
||||
#define SDIO_CTRL_ENABLE_WRITE (0x04u) /**< Enable a write, should not be set if
|
||||
ENABLE_READ is set*/
|
||||
#define SDIO_CTRL_ENABLE_READ (0x08u) /**< Enable a read, should not be set if
|
||||
ENABLE_WRITE is set*/
|
||||
#define SDIO_CTRL_SKIP_RESPONSE (0x10u) /**< If set no response is required for the
|
||||
command*/
|
||||
#define SDIO_CTRL_RESET (0x20u) /**< If set the SDIO interface is reset*/
|
||||
#define SDIO_CTRL_RESET_DP (0x40u) /**< If set the SDIO interface is reset*/
|
||||
#define SDIO_CTRL_ENABLE_INT (0x80u) /**< Enables logic to detect card interrupt*/
|
||||
/*@} group_sdio_ctrl_reg */
|
||||
|
||||
/*!
|
||||
\defgroup group_sdio_status_reg SDIO status register bits
|
||||
*/
|
||||
\defgroup group_sdio_status_reg SDIO status register bits
|
||||
*/
|
||||
/* @{*/
|
||||
#define SDIO_STS_CMD_DONE (0x01u) /**< The command is done*/
|
||||
#define SDIO_STS_WRITE_DONE (0x02u) /**< All data for a write has been sent*/
|
||||
#define SDIO_STS_READ_DONE (0x04u) /**< All data for a read has been read*/
|
||||
#define SDIO_STS_CRC_ERR (0x08u) /**< A CRC error was detected during a read or write*/
|
||||
#define SDIO_STS_CRC_ERR (0x08u) /**< A CRC error was detected during a read or
|
||||
write*/
|
||||
#define SDIO_STS_CMD_IDLE (0x10u) /**< The command channel is idle*/
|
||||
#define SDIO_STS_DAT_IDLE (0x20u) /**< The data channel is idle*/
|
||||
#define SDIO_STS_CARD_INT (0x40u) /**< The SDIO card indicated an interrupt by driving DAT[1] low*/
|
||||
#define SDIO_STS_CARD_INT (0x40u) /**< The SDIO card indicated an interrupt by
|
||||
driving DAT[1] low*/
|
||||
/*@} group_sdio_status_reg */
|
||||
|
||||
/*!
|
||||
\defgroup group_sdio_crc Constants for 7bit CRC for command
|
||||
*/
|
||||
\defgroup group_sdio_crc Constants for 7bit CRC for command
|
||||
*/
|
||||
/* @{*/
|
||||
#define SDIO_CRC7_POLY (0x12u) /**< Value of CRC polynomial*/
|
||||
#define SDIO_CRC_UPPER_BIT (0x80u) /**< Upper bit to test if it is high*/
|
||||
|
|
@ -125,166 +132,168 @@ extern "C" {
|
|||
/** \} group_udb_sdio_macros */
|
||||
|
||||
|
||||
/***************************************
|
||||
* Type Definitions
|
||||
***************************************/
|
||||
//==================================================================================================
|
||||
// Type Definitions
|
||||
//==================================================================================================
|
||||
|
||||
/**
|
||||
* \addtogroup group_udb_sdio_data_structures
|
||||
* \{
|
||||
*/
|
||||
* \addtogroup group_udb_sdio_data_structures
|
||||
* \{
|
||||
*/
|
||||
|
||||
/**
|
||||
* Create a type for the card interrupt call back
|
||||
*/
|
||||
* Create a type for the card interrupt call back
|
||||
*/
|
||||
typedef void (* sdio_card_int_cb_t)(void);
|
||||
|
||||
/**
|
||||
* \brief This enum is used when checking for specific events
|
||||
*/
|
||||
* \brief This enum is used when checking for specific events
|
||||
*/
|
||||
typedef enum en_sdio_event
|
||||
{
|
||||
SdCmdEventCmdDone = (1u), /**< Check to see if a command is done*/
|
||||
SdCmdEventTransferDone = (2u) /**< Check to see if a transfer is done*/
|
||||
|
||||
}en_sdio_event_t;
|
||||
SdCmdEventCmdDone = (1u), /**< Check to see if a command is done*/
|
||||
SdCmdEventTransferDone = (2u) /**< Check to see if a transfer is done*/
|
||||
} en_sdio_event_t;
|
||||
|
||||
/**
|
||||
* \brief Used to indicate the result of a function
|
||||
*/
|
||||
* \brief Used to indicate the result of a function
|
||||
*/
|
||||
typedef enum en_sdio_result
|
||||
{
|
||||
Ok = 0x00, /**< No error*/
|
||||
Error = 0x01, /**< Non-specific error code*/
|
||||
CommandCrcError = 0x02, /**< There was a CRC error on the Command/Response*/
|
||||
CommandIdxError = 0x04, /**< The index for the command didn't match*/
|
||||
CommandEndError = 0x08, /**< There was an end bit error on the command*/
|
||||
DataCrcError = 0x10, /**< There was a data CRC Error*/
|
||||
CMDTimeout = 0x20, /**< The command didn't finish before the timeout period was over*/
|
||||
DataTimeout = 0x40, /**< The data didn't finish before the timeout period was over*/
|
||||
Ok = 0x00, /**< No error*/
|
||||
Error = 0x01, /**< Non-specific error code*/
|
||||
CommandCrcError = 0x02, /**< There was a CRC error on the Command/Response*/
|
||||
CommandIdxError = 0x04, /**< The index for the command didn't match*/
|
||||
CommandEndError = 0x08, /**< There was an end bit error on the command*/
|
||||
DataCrcError = 0x10, /**< There was a data CRC Error*/
|
||||
CMDTimeout = 0x20, /**< The command didn't finish before the timeout period
|
||||
was over*/
|
||||
DataTimeout = 0x40, /**< The data didn't finish before the timeout period
|
||||
was over*/
|
||||
ResponseFlagError = 0x80 /**< There was an error in the response flag for command 53*/
|
||||
|
||||
} en_sdio_result_t;
|
||||
|
||||
/**
|
||||
* \brief Flags used to indicate an event occurred, set in the interrupt, cleared in the check events function
|
||||
*/
|
||||
* \brief Flags used to indicate an event occurred, set in the interrupt, cleared in the check
|
||||
* events function
|
||||
*/
|
||||
typedef struct stc_sdcmd_event_flag
|
||||
{
|
||||
uint8_t u8CmdComplete; /**< If non-zero a command has completed*/
|
||||
uint8_t u8TransComplete; /**< If non-zero a transfer has completed*/
|
||||
uint8_t u8CRCError; /**< If non-zero a CRC error was detected in a data transfer*/
|
||||
|
||||
}stc_sdio_event_flag_t;
|
||||
uint8_t u8CmdComplete; /**< If non-zero a command has completed*/
|
||||
uint8_t u8TransComplete; /**< If non-zero a transfer has completed*/
|
||||
uint8_t u8CRCError; /**< If non-zero a CRC error was detected in a data
|
||||
transfer*/
|
||||
} stc_sdio_event_flag_t;
|
||||
|
||||
/**
|
||||
* \brief Holds pointers to callback functions
|
||||
*/
|
||||
* \brief Holds pointers to callback functions
|
||||
*/
|
||||
typedef struct stc_sdio_irq_cb
|
||||
{
|
||||
sdio_card_int_cb_t pfnCardIntCb; /**< Pointer to card interrupt callback function*/
|
||||
}stc_sdio_irq_cb_t;
|
||||
} stc_sdio_irq_cb_t;
|
||||
|
||||
/**
|
||||
* \brief Global structure used to hold data from interrupt and other functions
|
||||
*/
|
||||
* \brief Global structure used to hold data from interrupt and other functions
|
||||
*/
|
||||
typedef struct stc_sdio_gInternalData
|
||||
{
|
||||
stc_sdio_irq_cb_t pstcCallBacks; /**< Holds pointers to all the call back functions*/
|
||||
stc_sdio_event_flag_t stcEvents; /**< Holds all of the event count flags, set in interrupt used in check events*/
|
||||
}stc_sdio_gInternalData_t;
|
||||
stc_sdio_irq_cb_t pstcCallBacks; /**< Holds pointers to all the call back functions*/
|
||||
stc_sdio_event_flag_t stcEvents; /**< Holds all of the event count flags, set in
|
||||
interrupt used in check events*/
|
||||
} stc_sdio_gInternalData_t;
|
||||
|
||||
/**
|
||||
* \brief structure used for configuring command
|
||||
*/
|
||||
* \brief structure used for configuring command
|
||||
*/
|
||||
typedef struct stc_sdio_cmd_config
|
||||
{
|
||||
uint8_t u8CmdIndex; /**< Command index*/
|
||||
uint32_t u32Argument; /**< The argument of command */
|
||||
uint8_t bResponseRequired; /**< TRUE: A Response is required*/
|
||||
uint8_t *pu8ResponseBuf; /**< Pointer to location to store response*/
|
||||
|
||||
}stc_sdio_cmd_config_t;
|
||||
uint8_t u8CmdIndex; /**< Command index*/
|
||||
uint32_t u32Argument; /**< The argument of command */
|
||||
uint8_t bResponseRequired; /**< TRUE: A Response is required*/
|
||||
uint8_t* pu8ResponseBuf; /**< Pointer to location to store response*/
|
||||
} stc_sdio_cmd_config_t;
|
||||
|
||||
/**
|
||||
* \brief structure used for the data channel
|
||||
*/
|
||||
* \brief structure used for the data channel
|
||||
*/
|
||||
typedef struct stc_sdio_data_config
|
||||
{
|
||||
uint8_t bRead; /**< TRUE: Read, FALSE: write*/
|
||||
uint16_t u16BlockSize; /**< Block size*/
|
||||
uint16_t u16BlockCount; /**< Holds the number of blocks to send*/
|
||||
uint8_t *pu8Data; /**< Pointer data buffer*/
|
||||
|
||||
}stc_sdio_data_config_t;
|
||||
uint8_t bRead; /**< TRUE: Read, FALSE: write*/
|
||||
uint16_t u16BlockSize; /**< Block size*/
|
||||
uint16_t u16BlockCount; /**< Holds the number of blocks to send*/
|
||||
uint8_t* pu8Data; /**< Pointer data buffer*/
|
||||
} stc_sdio_data_config_t;
|
||||
|
||||
/**
|
||||
* \brief structure used for configuring command and data
|
||||
*/
|
||||
* \brief structure used for configuring command and data
|
||||
*/
|
||||
typedef struct stc_sdio_cmd
|
||||
{
|
||||
uint32_t u32CmdIdx; /**< Command index*/
|
||||
uint32_t u32Arg; /**< The argument of command*/
|
||||
uint32_t *pu32Response; /**< Pointer to location to store response*/
|
||||
uint8_t *pu8Data; /**< Pointer data buffer*/
|
||||
uint8_t bRead; /**< TRUE: Read, FALSE: write*/
|
||||
uint16_t u16BlockCnt; /**< Number of blocks to send*/
|
||||
uint16_t u16BlockSize; /**< Block size*/
|
||||
}stc_sdio_cmd_t;
|
||||
uint32_t u32CmdIdx; /**< Command index*/
|
||||
uint32_t u32Arg; /**< The argument of command*/
|
||||
uint32_t* pu32Response; /**< Pointer to location to store response*/
|
||||
uint8_t* pu8Data; /**< Pointer data buffer*/
|
||||
uint8_t bRead; /**< TRUE: Read, FALSE: write*/
|
||||
uint16_t u16BlockCnt; /**< Number of blocks to send*/
|
||||
uint16_t u16BlockSize; /**< Block size*/
|
||||
} stc_sdio_cmd_t;
|
||||
|
||||
/** \} group_udb_sdio_data_structures */
|
||||
|
||||
/***************************************
|
||||
* Function Prototypes
|
||||
***************************************/
|
||||
//==================================================================================================
|
||||
// Function Prototypes
|
||||
//==================================================================================================
|
||||
|
||||
/**
|
||||
* \addtogroup group_udb_sdio_functions
|
||||
* \{
|
||||
*/
|
||||
* \addtogroup group_udb_sdio_functions
|
||||
* \{
|
||||
*/
|
||||
|
||||
/* Main functions*/
|
||||
void SDIO_Init(stc_sdio_irq_cb_t* pfuCb);
|
||||
en_sdio_result_t SDIO_SendCommandAndWait(stc_sdio_cmd_t *pstcCmd);
|
||||
void SDIO_EnableIntClock(void);
|
||||
void SDIO_DisableIntClock(void);
|
||||
void SDIO_EnableSdClk(void);
|
||||
void SDIO_DisableSdClk(void);
|
||||
void SDIO_SetSdClkFrequency(uint32_t u32SdClkFreqHz);
|
||||
void SDIO_Reset(void);
|
||||
void SDIO_EnableChipInt(void);
|
||||
void SDIO_DisableChipInt(void);
|
||||
void SDIO_Free(void);
|
||||
// Main functions
|
||||
void SDIO_Init(stc_sdio_irq_cb_t* pfuCb);
|
||||
en_sdio_result_t SDIO_SendCommandAndWait(stc_sdio_cmd_t* pstcCmd);
|
||||
void SDIO_EnableIntClock(void);
|
||||
void SDIO_DisableIntClock(void);
|
||||
void SDIO_EnableSdClk(void);
|
||||
void SDIO_DisableSdClk(void);
|
||||
void SDIO_SetSdClkFrequency(uint32_t u32SdClkFreqHz);
|
||||
void SDIO_Reset(void);
|
||||
void SDIO_EnableChipInt(void);
|
||||
void SDIO_DisableChipInt(void);
|
||||
void SDIO_Free(void);
|
||||
|
||||
/*Low Level Functions*/
|
||||
void SDIO_SendCommand(stc_sdio_cmd_config_t *pstcCmdConfig);
|
||||
en_sdio_result_t SDIO_GetResponse(uint8_t bCmdIndexCheck, uint8_t bCmdCrcCheck, uint8_t u8CmdIdx, uint32_t* pu32Response, uint8_t* pu8ResponseBuf);
|
||||
void SDIO_InitDataTransfer(stc_sdio_data_config_t *pstcDataConfig);
|
||||
en_sdio_result_t SDIO_CheckForEvent(en_sdio_event_t enEventType);
|
||||
uint8_t SDIO_CalculateCrc7(uint8_t* pu8Data, uint8_t pu8Size);
|
||||
void SDIO_SetBlockSize(uint8_t u8ByteCount);
|
||||
void SDIO_SetNumBlocks(uint8_t u8BlockCount);
|
||||
// Low Level Functions
|
||||
void SDIO_SendCommand(stc_sdio_cmd_config_t* pstcCmdConfig);
|
||||
en_sdio_result_t SDIO_GetResponse(uint8_t bCmdIndexCheck, uint8_t bCmdCrcCheck, uint8_t u8CmdIdx,
|
||||
uint32_t* pu32Response, uint8_t* pu8ResponseBuf);
|
||||
void SDIO_InitDataTransfer(stc_sdio_data_config_t* pstcDataConfig);
|
||||
en_sdio_result_t SDIO_CheckForEvent(en_sdio_event_t enEventType);
|
||||
uint8_t SDIO_CalculateCrc7(uint8_t* pu8Data, uint8_t pu8Size);
|
||||
void SDIO_SetBlockSize(uint8_t u8ByteCount);
|
||||
void SDIO_SetNumBlocks(uint8_t u8BlockCount);
|
||||
|
||||
/*DMA setup function*/
|
||||
void SDIO_SetupDMA(void);
|
||||
// DMA setup function
|
||||
void SDIO_SetupDMA(void);
|
||||
|
||||
/*Interrupt Function*/
|
||||
void SDIO_IRQ(void);
|
||||
void SDIO_READ_DMA_IRQ(void);
|
||||
void SDIO_WRITE_DMA_IRQ(void);
|
||||
// Interrupt Function
|
||||
void SDIO_IRQ(void);
|
||||
void SDIO_READ_DMA_IRQ(void);
|
||||
void SDIO_WRITE_DMA_IRQ(void);
|
||||
|
||||
void SDIO_Crc7Init(void);
|
||||
void SDIO_Crc7Init(void);
|
||||
|
||||
cy_en_syspm_status_t SDIO_DeepSleepCallback(cy_stc_syspm_callback_params_t *params, cy_en_syspm_callback_mode_t mode);
|
||||
cy_en_syspm_status_t SDIO_DeepSleepCallback(cy_stc_syspm_callback_params_t* params,
|
||||
cy_en_syspm_callback_mode_t mode);
|
||||
|
||||
/** \endcond */
|
||||
|
||||
/** \} group_udb_sdio_functions */
|
||||
|
||||
|
||||
/***************************************
|
||||
* Hardware Registers
|
||||
***************************************/
|
||||
//==================================================================================================
|
||||
// Hardware Registers
|
||||
//==================================================================================================
|
||||
|
||||
/** \cond INTERNAL */
|
||||
|
||||
|
|
@ -390,10 +399,6 @@ SDIO_HOST_bSDIO_byteCounter__PERIOD_REG)
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* defined(CYHAL_UDB_SDIO) */
|
||||
|
||||
#endif /* (CY_SDIO_H) */
|
||||
#endif // defined(CYHAL_UDB_SDIO)
|
||||
|
||||
/** \} group_udb_sdio */
|
||||
|
||||
/* [] END OF FILE */
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
<version>.19666</version>
|
||||
|
|
@ -0,0 +1 @@
|
|||
<version>.19214</version>
|
||||
|
|
@ -34,8 +34,8 @@ static bool cy_us_ticker_initialized = false;
|
|||
static cy_en_syspm_status_t cy_us_ticker_pm_callback(cy_stc_syspm_callback_params_t *params, cy_en_syspm_callback_mode_t mode)
|
||||
{
|
||||
if (mode == CY_SYSPM_AFTER_TRANSITION) {
|
||||
Cy_TCPWM_Counter_Enable(cy_us_timer.base, cy_us_timer.resource.channel_num);
|
||||
Cy_TCPWM_TriggerStart(cy_us_timer.base, 1u << cy_us_timer.resource.channel_num);
|
||||
Cy_TCPWM_Counter_Enable(cy_us_timer.tcpwm.base, cy_us_timer.tcpwm.resource.channel_num);
|
||||
Cy_TCPWM_TriggerStart(cy_us_timer.tcpwm.base, 1u << cy_us_timer.tcpwm.resource.channel_num);
|
||||
}
|
||||
return CY_SYSPM_SUCCESS;
|
||||
}
|
||||
|
|
@ -89,8 +89,8 @@ void us_ticker_init(void)
|
|||
MBED_ASSERT(cy_PeriClkFreqHz >= 1000000);
|
||||
uint32_t div_value = cy_PeriClkFreqHz / 1000000;
|
||||
cy_us_ticker_info.frequency = cy_PeriClkFreqHz / div_value;
|
||||
cy_us_ticker_info.bits = CYHAL_TCPWM_DATA[cy_us_timer.resource.block_num].max_count;
|
||||
Cy_SysClk_PeriphSetDivider(cy_us_timer.clock.div_type, cy_us_timer.clock.div_num, div_value - 1u);
|
||||
cy_us_ticker_info.bits = CYHAL_TCPWM_DATA[cy_us_timer.tcpwm.resource.block_num].max_count;
|
||||
Cy_SysClk_PeriphSetDivider(cy_us_timer.tcpwm.clock.div_type, cy_us_timer.tcpwm.clock.div_num, div_value - 1u);
|
||||
const cyhal_timer_cfg_t cfg = {
|
||||
.is_continuous = true,
|
||||
.direction = CYHAL_TIMER_DIR_UP,
|
||||
|
|
@ -102,7 +102,7 @@ void us_ticker_init(void)
|
|||
if (CY_RSLT_SUCCESS != cyhal_timer_configure(&cy_us_timer, &cfg)) {
|
||||
MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_DRIVER, MBED_ERROR_CODE_FAILED_OPERATION), "cyhal_timer_set_cfg");
|
||||
}
|
||||
Cy_TCPWM_ClearInterrupt(cy_us_timer.base, cy_us_timer.resource.channel_num, CY_TCPWM_INT_ON_CC_OR_TC);
|
||||
Cy_TCPWM_ClearInterrupt(cy_us_timer.tcpwm.base, cy_us_timer.tcpwm.resource.channel_num, CY_TCPWM_INT_ON_CC_OR_TC);
|
||||
cyhal_timer_register_callback(&cy_us_timer, &cy_us_ticker_irq_handler, NULL);
|
||||
if (CY_RSLT_SUCCESS != cyhal_timer_start(&cy_us_timer)) {
|
||||
MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_DRIVER, MBED_ERROR_CODE_FAILED_OPERATION), "cyhal_timer_start");
|
||||
|
|
@ -131,15 +131,15 @@ void us_ticker_free(void)
|
|||
uint32_t us_ticker_read(void)
|
||||
{
|
||||
MBED_ASSERT(cy_us_ticker_initialized);
|
||||
return Cy_TCPWM_Counter_GetCounter(cy_us_timer.base, cy_us_timer.resource.channel_num);
|
||||
return Cy_TCPWM_Counter_GetCounter(cy_us_timer.tcpwm.base, cy_us_timer.tcpwm.resource.channel_num);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
MBED_ASSERT(cy_us_ticker_initialized);
|
||||
Cy_TCPWM_Counter_SetCompare0(cy_us_timer.base, cy_us_timer.resource.channel_num, timestamp);
|
||||
if (CY_TCPWM_INT_NONE == Cy_TCPWM_GetInterruptMask(cy_us_timer.base, cy_us_timer.resource.channel_num)) {
|
||||
Cy_TCPWM_ClearInterrupt(cy_us_timer.base, cy_us_timer.resource.channel_num, CY_TCPWM_INT_ON_CC_OR_TC);
|
||||
Cy_TCPWM_Counter_SetCompare0(cy_us_timer.tcpwm.base, cy_us_timer.tcpwm.resource.channel_num, timestamp);
|
||||
if (CY_TCPWM_INT_NONE == Cy_TCPWM_GetInterruptMask(cy_us_timer.tcpwm.base, cy_us_timer.tcpwm.resource.channel_num)) {
|
||||
Cy_TCPWM_ClearInterrupt(cy_us_timer.tcpwm.base, cy_us_timer.tcpwm.resource.channel_num, CY_TCPWM_INT_ON_CC_OR_TC);
|
||||
cyhal_timer_enable_event(&cy_us_timer, CYHAL_TIMER_IRQ_CAPTURE_COMPARE, CY_US_TICKER_IRQ_PRIORITY, true);
|
||||
}
|
||||
}
|
||||
|
|
@ -159,9 +159,9 @@ void us_ticker_fire_interrupt(void)
|
|||
{
|
||||
MBED_ASSERT(cy_us_ticker_initialized);
|
||||
// TODO: no HAL function for this. Needs to work even when masked
|
||||
IRQn_Type irq = cy_us_timer.resource.block_num == 0
|
||||
IRQn_Type irq = cy_us_timer.tcpwm.resource.block_num == 0
|
||||
? tcpwm_0_interrupts_0_IRQn : tcpwm_1_interrupts_0_IRQn;
|
||||
irq = (IRQn_Type)(irq + cy_us_timer.resource.channel_num);
|
||||
irq = (IRQn_Type)(irq + cy_us_timer.tcpwm.resource.channel_num);
|
||||
NVIC_SetPendingIRQ(irq);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,165 @@
|
|||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction, and
|
||||
distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
"Licensor" shall mean the copyright owner or entity authorized by the copyright
|
||||
owner that is granting the License.
|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all other entities
|
||||
that control, are controlled by, or are under common control with that entity.
|
||||
For the purposes of this definition, "control" means (i) the power, direct or
|
||||
indirect, to cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
|
||||
outstanding shares, or (iii) beneficial ownership of such entity.
|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity exercising
|
||||
permissions granted by this License.
|
||||
|
||||
"Source" form shall mean the preferred form for making modifications, including
|
||||
but not limited to software source code, documentation source, and configuration
|
||||
files.
|
||||
|
||||
"Object" form shall mean any form resulting from mechanical transformation or
|
||||
translation of a Source form, including but not limited to compiled object code,
|
||||
generated documentation, and conversions to other media types.
|
||||
|
||||
"Work" shall mean the work of authorship, whether in Source or Object form, made
|
||||
available under the License, as indicated by a copyright notice that is included
|
||||
in or attached to the work (an example is provided in the Appendix below).
|
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|
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"Derivative Works" shall mean any work, whether in Source or Object form, that
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|
||||
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|
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|
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shall not include works that remain separable from, or merely link (or bind by
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"Contribution" shall mean any work of authorship, including the original version
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|
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"submitted" means any form of electronic, verbal, or written communication sent
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|
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|
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|
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|
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|
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2. Grant of Copyright License.
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|
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Subject to the terms and conditions of this License, each Contributor hereby
|
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|
||||
7. Disclaimer of Warranty.
|
||||
|
||||
Unless required by applicable law or agreed to in writing, Licensor provides the
|
||||
Work (and each Contributor provides its Contributions) on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
|
||||
including, without limitation, any warranties or conditions of TITLE,
|
||||
NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are
|
||||
solely responsible for determining the appropriateness of using or
|
||||
redistributing the Work and assume any risks associated with Your exercise of
|
||||
permissions under this License.
|
||||
|
||||
8. Limitation of Liability.
|
||||
|
||||
In no event and under no legal theory, whether in tort (including negligence),
|
||||
contract, or otherwise, unless required by applicable law (such as deliberate
|
||||
and grossly negligent acts) or agreed to in writing, shall any Contributor be
|
||||
liable to You for damages, including any direct, indirect, special, incidental,
|
||||
or consequential damages of any character arising as a result of this License or
|
||||
out of the use or inability to use the Work (including but not limited to
|
||||
damages for loss of goodwill, work stoppage, computer failure or malfunction, or
|
||||
any and all other commercial damages or losses), even if such Contributor has
|
||||
been advised of the possibility of such damages.
|
||||
|
||||
9. Accepting Warranty or Additional Liability.
|
||||
|
||||
While redistributing the Work or Derivative Works thereof, You may choose to
|
||||
offer, and charge a fee for, acceptance of support, warranty, indemnity, or
|
||||
other liability obligations and/or rights consistent with this License. However,
|
||||
in accepting such obligations, You may act only on Your own behalf and on Your
|
||||
sole responsibility, not on behalf of any other Contributor, and only if You
|
||||
agree to indemnify, defend, and hold each Contributor harmless for any liability
|
||||
incurred by, or claims asserted against, such Contributor by reason of your
|
||||
accepting any such warranty or additional liability.
|
||||
|
|
@ -6,7 +6,7 @@
|
|||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2019 Cypress Semiconductor Corporation
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2019 Cypress Semiconductor Corporation
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
|
|
@ -89,6 +89,7 @@ cy_rslt_t cy_resource_read(const cy_resource_handle_t *handle, uint32_t blockno,
|
|||
switch (handle->location)
|
||||
{
|
||||
case CY_RESOURCE_IN_MEMORY:
|
||||
CY_UNUSED_PARAMETER(blockno); /* CY_ASSERT only processes in DEBUG, ignores for others */
|
||||
CY_ASSERT(0 == blockno);
|
||||
memcpy(*buffer, handle->val.mem_data, *size);
|
||||
return CY_RSLT_SUCCESS;
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
<version>1.0.0.17634</version>
|
||||
|
|
@ -0,0 +1,165 @@
|
|||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction, and
|
||||
distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
"Licensor" shall mean the copyright owner or entity authorized by the copyright
|
||||
owner that is granting the License.
|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all other entities
|
||||
that control, are controlled by, or are under common control with that entity.
|
||||
For the purposes of this definition, "control" means (i) the power, direct or
|
||||
indirect, to cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
|
||||
outstanding shares, or (iii) beneficial ownership of such entity.
|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity exercising
|
||||
permissions granted by this License.
|
||||
|
||||
"Source" form shall mean the preferred form for making modifications, including
|
||||
but not limited to software source code, documentation source, and configuration
|
||||
files.
|
||||
|
||||
"Object" form shall mean any form resulting from mechanical transformation or
|
||||
translation of a Source form, including but not limited to compiled object code,
|
||||
generated documentation, and conversions to other media types.
|
||||
|
||||
"Work" shall mean the work of authorship, whether in Source or Object form, made
|
||||
available under the License, as indicated by a copyright notice that is included
|
||||
in or attached to the work (an example is provided in the Appendix below).
|
||||
|
||||
"Derivative Works" shall mean any work, whether in Source or Object form, that
|
||||
is based on (or derived from) the Work and for which the editorial revisions,
|
||||
annotations, elaborations, or other modifications represent, as a whole, an
|
||||
original work of authorship. For the purposes of this License, Derivative Works
|
||||
shall not include works that remain separable from, or merely link (or bind by
|
||||
name) to the interfaces of, the Work and Derivative Works thereof.
|
||||
|
||||
"Contribution" shall mean any work of authorship, including the original version
|
||||
of the Work and any modifications or additions to that Work or Derivative Works
|
||||
thereof, that is intentionally submitted to Licensor for inclusion in the Work
|
||||
by the copyright owner or by an individual or Legal Entity authorized to submit
|
||||
on behalf of the copyright owner. For the purposes of this definition,
|
||||
"submitted" means any form of electronic, verbal, or written communication sent
|
||||
to the Licensor or its representatives, including but not limited to
|
||||
communication on electronic mailing lists, source code control systems, and
|
||||
issue tracking systems that are managed by, or on behalf of, the Licensor for
|
||||
the purpose of discussing and improving the Work, but excluding communication
|
||||
that is conspicuously marked or otherwise designated in writing by the copyright
|
||||
owner as "Not a Contribution."
|
||||
|
||||
"Contributor" shall mean Licensor and any individual or Legal Entity on behalf
|
||||
of whom a Contribution has been received by Licensor and subsequently
|
||||
incorporated within the Work.
|
||||
|
||||
2. Grant of Copyright License.
|
||||
|
||||
Subject to the terms and conditions of this License, each Contributor hereby
|
||||
grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
|
||||
irrevocable copyright license to reproduce, prepare Derivative Works of,
|
||||
publicly display, publicly perform, sublicense, and distribute the Work and such
|
||||
Derivative Works in Source or Object form.
|
||||
|
||||
3. Grant of Patent License.
|
||||
|
||||
Subject to the terms and conditions of this License, each Contributor hereby
|
||||
grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
|
||||
irrevocable (except as stated in this section) patent license to make, have
|
||||
made, use, offer to sell, sell, import, and otherwise transfer the Work, where
|
||||
such license applies only to those patent claims licensable by such Contributor
|
||||
that are necessarily infringed by their Contribution(s) alone or by combination
|
||||
of their Contribution(s) with the Work to which such Contribution(s) was
|
||||
submitted. If You institute patent litigation against any entity (including a
|
||||
cross-claim or counterclaim in a lawsuit) alleging that the Work or a
|
||||
Contribution incorporated within the Work constitutes direct or contributory
|
||||
patent infringement, then any patent licenses granted to You under this License
|
||||
for that Work shall terminate as of the date such litigation is filed.
|
||||
|
||||
4. Redistribution.
|
||||
|
||||
You may reproduce and distribute copies of the Work or Derivative Works thereof
|
||||
in any medium, with or without modifications, and in Source or Object form,
|
||||
provided that You meet the following conditions:
|
||||
|
||||
You must give any other recipients of the Work or Derivative Works a copy of
|
||||
this License; and
|
||||
You must cause any modified files to carry prominent notices stating that You
|
||||
changed the files; and
|
||||
You must retain, in the Source form of any Derivative Works that You distribute,
|
||||
all copyright, patent, trademark, and attribution notices from the Source form
|
||||
of the Work, excluding those notices that do not pertain to any part of the
|
||||
Derivative Works; and
|
||||
If the Work includes a "NOTICE" text file as part of its distribution, then any
|
||||
Derivative Works that You distribute must include a readable copy of the
|
||||
attribution notices contained within such NOTICE file, excluding those notices
|
||||
that do not pertain to any part of the Derivative Works, in at least one of the
|
||||
following places: within a NOTICE text file distributed as part of the
|
||||
Derivative Works; within the Source form or documentation, if provided along
|
||||
with the Derivative Works; or, within a display generated by the Derivative
|
||||
Works, if and wherever such third-party notices normally appear. The contents of
|
||||
the NOTICE file are for informational purposes only and do not modify the
|
||||
License. You may add Your own attribution notices within Derivative Works that
|
||||
You distribute, alongside or as an addendum to the NOTICE text from the Work,
|
||||
provided that such additional attribution notices cannot be construed as
|
||||
modifying the License.
|
||||
You may add Your own copyright statement to Your modifications and may provide
|
||||
additional or different license terms and conditions for use, reproduction, or
|
||||
distribution of Your modifications, or for any such Derivative Works as a whole,
|
||||
provided Your use, reproduction, and distribution of the Work otherwise complies
|
||||
with the conditions stated in this License.
|
||||
|
||||
5. Submission of Contributions.
|
||||
|
||||
Unless You explicitly state otherwise, any Contribution intentionally submitted
|
||||
for inclusion in the Work by You to the Licensor shall be under the terms and
|
||||
conditions of this License, without any additional terms or conditions.
|
||||
Notwithstanding the above, nothing herein shall supersede or modify the terms of
|
||||
any separate license agreement you may have executed with Licensor regarding
|
||||
such Contributions.
|
||||
|
||||
6. Trademarks.
|
||||
|
||||
This License does not grant permission to use the trade names, trademarks,
|
||||
service marks, or product names of the Licensor, except as required for
|
||||
reasonable and customary use in describing the origin of the Work and
|
||||
reproducing the content of the NOTICE file.
|
||||
|
||||
7. Disclaimer of Warranty.
|
||||
|
||||
Unless required by applicable law or agreed to in writing, Licensor provides the
|
||||
Work (and each Contributor provides its Contributions) on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
|
||||
including, without limitation, any warranties or conditions of TITLE,
|
||||
NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are
|
||||
solely responsible for determining the appropriateness of using or
|
||||
redistributing the Work and assume any risks associated with Your exercise of
|
||||
permissions under this License.
|
||||
|
||||
8. Limitation of Liability.
|
||||
|
||||
In no event and under no legal theory, whether in tort (including negligence),
|
||||
contract, or otherwise, unless required by applicable law (such as deliberate
|
||||
and grossly negligent acts) or agreed to in writing, shall any Contributor be
|
||||
liable to You for damages, including any direct, indirect, special, incidental,
|
||||
or consequential damages of any character arising as a result of this License or
|
||||
out of the use or inability to use the Work (including but not limited to
|
||||
damages for loss of goodwill, work stoppage, computer failure or malfunction, or
|
||||
any and all other commercial damages or losses), even if such Contributor has
|
||||
been advised of the possibility of such damages.
|
||||
|
||||
9. Accepting Warranty or Additional Liability.
|
||||
|
||||
While redistributing the Work or Derivative Works thereof, You may choose to
|
||||
offer, and charge a fee for, acceptance of support, warranty, indemnity, or
|
||||
other liability obligations and/or rights consistent with this License. However,
|
||||
in accepting such obligations, You may act only on Your own behalf and on Your
|
||||
sole responsibility, not on behalf of any other Contributor, and only if You
|
||||
agree to indemnify, defend, and hold each Contributor harmless for any liability
|
||||
incurred by, or claims asserted against, such Contributor by reason of your
|
||||
accepting any such warranty or additional liability.
|
||||
|
|
@ -66,7 +66,7 @@ typedef osSemaphoreId_t cy_semaphore_t; /** CMSIS definition of a
|
|||
typedef osEventFlagsId_t cy_event_t; /** CMSIS definition of an event */
|
||||
typedef osMessageQueueId_t cy_queue_t; /** CMSIS definition of a message queue */
|
||||
typedef osTimerId_t cy_timer_t; /** CMSIS definition of a timer */
|
||||
typedef uint32_t cy_timer_callback_arg_t; /** Argument passed to the timer callback function */
|
||||
typedef void * cy_timer_callback_arg_t; /** Argument passed to the timer callback function */
|
||||
typedef uint32_t cy_time_t; /** Time in milliseconds */
|
||||
typedef osStatus_t cy_rtos_error_t; /** CMSIS definition of a error status */
|
||||
|
||||
|
|
|
|||
|
|
@ -176,8 +176,8 @@ cy_rtos_error_t cy_rtos_last_error();
|
|||
*
|
||||
* This function is called to startup a new thread. If the thread can exit, it must call
|
||||
* \ref cy_rtos_exit_thread() just before doing so. All created threads that can terminate, either
|
||||
* by themselves or forcefully by another thread MUST be joined in order to cleanup any resources
|
||||
* that might have been allocated for them.
|
||||
* by themselves or forcefully by another thread MUST have \ref cy_rtos_join_thread() called on them
|
||||
* by another thread in order to cleanup any resources that might have been allocated for them.
|
||||
*
|
||||
* @param[out] thread Pointer to a variable which will receive the new thread handle
|
||||
* @param[in] entry_function Function pointer which points to the main function for the new thread
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
<version>1.2.1.13635</version>
|
||||
<version>1.3.0.17634</version>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,165 @@
|
|||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction, and
|
||||
distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
"Licensor" shall mean the copyright owner or entity authorized by the copyright
|
||||
owner that is granting the License.
|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all other entities
|
||||
that control, are controlled by, or are under common control with that entity.
|
||||
For the purposes of this definition, "control" means (i) the power, direct or
|
||||
indirect, to cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
|
||||
outstanding shares, or (iii) beneficial ownership of such entity.
|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity exercising
|
||||
permissions granted by this License.
|
||||
|
||||
"Source" form shall mean the preferred form for making modifications, including
|
||||
but not limited to software source code, documentation source, and configuration
|
||||
files.
|
||||
|
||||
"Object" form shall mean any form resulting from mechanical transformation or
|
||||
translation of a Source form, including but not limited to compiled object code,
|
||||
generated documentation, and conversions to other media types.
|
||||
|
||||
"Work" shall mean the work of authorship, whether in Source or Object form, made
|
||||
available under the License, as indicated by a copyright notice that is included
|
||||
in or attached to the work (an example is provided in the Appendix below).
|
||||
|
||||
"Derivative Works" shall mean any work, whether in Source or Object form, that
|
||||
is based on (or derived from) the Work and for which the editorial revisions,
|
||||
annotations, elaborations, or other modifications represent, as a whole, an
|
||||
original work of authorship. For the purposes of this License, Derivative Works
|
||||
shall not include works that remain separable from, or merely link (or bind by
|
||||
name) to the interfaces of, the Work and Derivative Works thereof.
|
||||
|
||||
"Contribution" shall mean any work of authorship, including the original version
|
||||
of the Work and any modifications or additions to that Work or Derivative Works
|
||||
thereof, that is intentionally submitted to Licensor for inclusion in the Work
|
||||
by the copyright owner or by an individual or Legal Entity authorized to submit
|
||||
on behalf of the copyright owner. For the purposes of this definition,
|
||||
"submitted" means any form of electronic, verbal, or written communication sent
|
||||
to the Licensor or its representatives, including but not limited to
|
||||
communication on electronic mailing lists, source code control systems, and
|
||||
issue tracking systems that are managed by, or on behalf of, the Licensor for
|
||||
the purpose of discussing and improving the Work, but excluding communication
|
||||
that is conspicuously marked or otherwise designated in writing by the copyright
|
||||
owner as "Not a Contribution."
|
||||
|
||||
"Contributor" shall mean Licensor and any individual or Legal Entity on behalf
|
||||
of whom a Contribution has been received by Licensor and subsequently
|
||||
incorporated within the Work.
|
||||
|
||||
2. Grant of Copyright License.
|
||||
|
||||
Subject to the terms and conditions of this License, each Contributor hereby
|
||||
grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
|
||||
irrevocable copyright license to reproduce, prepare Derivative Works of,
|
||||
publicly display, publicly perform, sublicense, and distribute the Work and such
|
||||
Derivative Works in Source or Object form.
|
||||
|
||||
3. Grant of Patent License.
|
||||
|
||||
Subject to the terms and conditions of this License, each Contributor hereby
|
||||
grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
|
||||
irrevocable (except as stated in this section) patent license to make, have
|
||||
made, use, offer to sell, sell, import, and otherwise transfer the Work, where
|
||||
such license applies only to those patent claims licensable by such Contributor
|
||||
that are necessarily infringed by their Contribution(s) alone or by combination
|
||||
of their Contribution(s) with the Work to which such Contribution(s) was
|
||||
submitted. If You institute patent litigation against any entity (including a
|
||||
cross-claim or counterclaim in a lawsuit) alleging that the Work or a
|
||||
Contribution incorporated within the Work constitutes direct or contributory
|
||||
patent infringement, then any patent licenses granted to You under this License
|
||||
for that Work shall terminate as of the date such litigation is filed.
|
||||
|
||||
4. Redistribution.
|
||||
|
||||
You may reproduce and distribute copies of the Work or Derivative Works thereof
|
||||
in any medium, with or without modifications, and in Source or Object form,
|
||||
provided that You meet the following conditions:
|
||||
|
||||
You must give any other recipients of the Work or Derivative Works a copy of
|
||||
this License; and
|
||||
You must cause any modified files to carry prominent notices stating that You
|
||||
changed the files; and
|
||||
You must retain, in the Source form of any Derivative Works that You distribute,
|
||||
all copyright, patent, trademark, and attribution notices from the Source form
|
||||
of the Work, excluding those notices that do not pertain to any part of the
|
||||
Derivative Works; and
|
||||
If the Work includes a "NOTICE" text file as part of its distribution, then any
|
||||
Derivative Works that You distribute must include a readable copy of the
|
||||
attribution notices contained within such NOTICE file, excluding those notices
|
||||
that do not pertain to any part of the Derivative Works, in at least one of the
|
||||
following places: within a NOTICE text file distributed as part of the
|
||||
Derivative Works; within the Source form or documentation, if provided along
|
||||
with the Derivative Works; or, within a display generated by the Derivative
|
||||
Works, if and wherever such third-party notices normally appear. The contents of
|
||||
the NOTICE file are for informational purposes only and do not modify the
|
||||
License. You may add Your own attribution notices within Derivative Works that
|
||||
You distribute, alongside or as an addendum to the NOTICE text from the Work,
|
||||
provided that such additional attribution notices cannot be construed as
|
||||
modifying the License.
|
||||
You may add Your own copyright statement to Your modifications and may provide
|
||||
additional or different license terms and conditions for use, reproduction, or
|
||||
distribution of Your modifications, or for any such Derivative Works as a whole,
|
||||
provided Your use, reproduction, and distribution of the Work otherwise complies
|
||||
with the conditions stated in this License.
|
||||
|
||||
5. Submission of Contributions.
|
||||
|
||||
Unless You explicitly state otherwise, any Contribution intentionally submitted
|
||||
for inclusion in the Work by You to the Licensor shall be under the terms and
|
||||
conditions of this License, without any additional terms or conditions.
|
||||
Notwithstanding the above, nothing herein shall supersede or modify the terms of
|
||||
any separate license agreement you may have executed with Licensor regarding
|
||||
such Contributions.
|
||||
|
||||
6. Trademarks.
|
||||
|
||||
This License does not grant permission to use the trade names, trademarks,
|
||||
service marks, or product names of the Licensor, except as required for
|
||||
reasonable and customary use in describing the origin of the Work and
|
||||
reproducing the content of the NOTICE file.
|
||||
|
||||
7. Disclaimer of Warranty.
|
||||
|
||||
Unless required by applicable law or agreed to in writing, Licensor provides the
|
||||
Work (and each Contributor provides its Contributions) on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
|
||||
including, without limitation, any warranties or conditions of TITLE,
|
||||
NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are
|
||||
solely responsible for determining the appropriateness of using or
|
||||
redistributing the Work and assume any risks associated with Your exercise of
|
||||
permissions under this License.
|
||||
|
||||
8. Limitation of Liability.
|
||||
|
||||
In no event and under no legal theory, whether in tort (including negligence),
|
||||
contract, or otherwise, unless required by applicable law (such as deliberate
|
||||
and grossly negligent acts) or agreed to in writing, shall any Contributor be
|
||||
liable to You for damages, including any direct, indirect, special, incidental,
|
||||
or consequential damages of any character arising as a result of this License or
|
||||
out of the use or inability to use the Work (including but not limited to
|
||||
damages for loss of goodwill, work stoppage, computer failure or malfunction, or
|
||||
any and all other commercial damages or losses), even if such Contributor has
|
||||
been advised of the possibility of such damages.
|
||||
|
||||
9. Accepting Warranty or Additional Liability.
|
||||
|
||||
While redistributing the Work or Derivative Works thereof, You may choose to
|
||||
offer, and charge a fee for, acceptance of support, warranty, indemnity, or
|
||||
other liability obligations and/or rights consistent with this License. However,
|
||||
in accepting such obligations, You may act only on Your own behalf and on Your
|
||||
sole responsibility, not on behalf of any other Contributor, and only if You
|
||||
agree to indemnify, defend, and hold each Contributor harmless for any liability
|
||||
incurred by, or claims asserted against, such Contributor by reason of your
|
||||
accepting any such warranty or additional liability.
|
||||
|
|
@ -188,13 +188,31 @@ typedef uint32_t cy_rslt_t;
|
|||
/** Module identifier for the WiFi Host Driver + Board Support Integration Library */
|
||||
#define CY_RSLT_MODULE_BOARD_LIB_WHD_INTEGRATION (0x01A3U)
|
||||
|
||||
/** Base module identifier for Shield Board Libraries (0x01C0 - 0x01FF) */
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_BASE (0x01C0U)
|
||||
/** Base module identifier for Shield Board Libraries (0x01B8 - 0x01BF) */
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_BASE (0x01B8U)
|
||||
/** Module identifier for Shield Board CY8CKIT-028-EPD */
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_028_EPD (0x01C0U)
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_028_EPD (0x01B8U)
|
||||
/** Module identifier for Shield Board CY8CKIT-028-TFT */
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_028_TFT (0x01C1U)
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_028_TFT (0x01B9U)
|
||||
/** Module identifier for Shield Board CY8CKIT-032 */
|
||||
#define CY_RSLT_MODULE_BOARD_SHIELD_032 (0x01BAU)
|
||||
|
||||
/** Base module identifier for Board Hardware Libraries (0x01C0 - 0x01FF) */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_BASE (0x01C0U)
|
||||
/** Module identifier for the BMI160 Motion Sensor Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_BMI160 (0x01C0U)
|
||||
/** Module identifier for the E2271CS021 E-Ink Controller Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_E2271CS021 (0x01C1U)
|
||||
/** Module identifier for the NTC GPIO Thermistor Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_THERMISTOR (0x01C2U)
|
||||
/** Module identifier for the SSD1306 OLED Controller Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_SSD1306 (0x01C3U)
|
||||
/** Module identifier for the ST7789V TFT Controller Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_ST7789V (0x01C4U)
|
||||
/** Module identifier for the Light Sensor Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_LIGHT_SENSOR (0x01C5U)
|
||||
/** Module identifier for the AK4954A Audio Codec Library */
|
||||
#define CY_RSLT_MODULE_BOARD_HARDWARE_AK4954A (0x01C6U)
|
||||
|
||||
/** Base module identifier for Middleware Libraries (0x0200 - 0x02FF) */
|
||||
#define CY_RSLT_MODULE_MIDDLEWARE_BASE (0x0200U)
|
||||
|
|
|
|||
|
|
@ -32,6 +32,9 @@
|
|||
#if !defined(CY_UTILS_H)
|
||||
#define CY_UTILS_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
|
@ -53,14 +56,14 @@ static inline void CY_HALT(void)
|
|||
/** Utility macro when neither NDEBUG or CY_NO_ASSERT is not declared to check a condition and, if false, trigger a breakpoint */
|
||||
#if defined(NDEBUG) || defined(CY_NO_ASSERT)
|
||||
#define CY_ASSERT(x) do { \
|
||||
} while(0)
|
||||
} while(false)
|
||||
#else
|
||||
#define CY_ASSERT(x) do { \
|
||||
if(!(x)) \
|
||||
{ \
|
||||
CY_HALT(); \
|
||||
} \
|
||||
} while(0)
|
||||
} while(false)
|
||||
#endif /* defined(NDEBUG) */
|
||||
|
||||
|
||||
|
|
@ -385,6 +388,41 @@ static inline void CY_HALT(void)
|
|||
*******************************************************************************/
|
||||
#define CY_SYSLIB_DIV_ROUNDUP(a, b) ((((a) - 1U) / (b)) + 1U)
|
||||
|
||||
/*******************************************************************************
|
||||
* Provides the macros for MISRA violation documentation in Coverity tool.
|
||||
*******************************************************************************/
|
||||
|
||||
/** \cond INTERNAL */
|
||||
|
||||
#ifdef CY_COVERITY_2012_CHECK /* Check MISRA-C:2012 with Coverity tool */
|
||||
#define CY_COVERITY_PRAGMA_STR(a) #a
|
||||
|
||||
#define CY_MISRA_DEVIATE_LINE(MISRA,MESSAGE) \
|
||||
_Pragma(CY_COVERITY_PRAGMA_STR(coverity compliance deviate MISRA MESSAGE))
|
||||
|
||||
#define CY_MISRA_FP_LINE(MISRA,MESSAGE) \
|
||||
_Pragma(CY_COVERITY_PRAGMA_STR(coverity compliance fp MISRA MESSAGE))
|
||||
|
||||
#define CY_MISRA_DEVIATE_BLOCK_START(MISRA,COUNT,MESSAGE) \
|
||||
_Pragma(CY_COVERITY_PRAGMA_STR(coverity compliance block (deviate:COUNT MISRA MESSAGE)))
|
||||
|
||||
#define CY_MISRA_FP_BLOCK_START(MISRA,COUNT,MESSAGE) \
|
||||
_Pragma(CY_COVERITY_PRAGMA_STR(coverity compliance block (fp:COUNT MISRA MESSAGE)))
|
||||
|
||||
#define CY_MISRA_BLOCK_END(MISRA) \
|
||||
_Pragma(CY_COVERITY_PRAGMA_STR(coverity compliance end_block MISRA))
|
||||
|
||||
#else /* General usage */
|
||||
|
||||
#define CY_MISRA_DEVIATE_LINE(MISRA,MESSAGE) do{}while(false)
|
||||
#define CY_MISRA_FP_LINE(MISRA,MESSAGE) do{}while(false)
|
||||
#define CY_MISRA_DEVIATE_BLOCK_START(MISRA,COUNT,MESSAGE)
|
||||
#define CY_MISRA_FP_BLOCK_START(MISRA,COUNT,MESSAGE)
|
||||
#define CY_MISRA_BLOCK_END(MISRA)
|
||||
|
||||
#endif /* CY_COVERITY_2012_CHECK */
|
||||
|
||||
/** \endcond */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1 +0,0 @@
|
|||
<version>1.1.2.12585</version>
|
||||
|
|
@ -1 +1 @@
|
|||
<version>1.1.1.11109</version>
|
||||
<version>1.1.4.17634</version>
|
||||
|
|
|
|||
|
|
@ -0,0 +1,165 @@
|
|||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
|
||||
|
||||
1. Definitions.
|
||||
|
||||
"License" shall mean the terms and conditions for use, reproduction, and
|
||||
distribution as defined by Sections 1 through 9 of this document.
|
||||
|
||||
"Licensor" shall mean the copyright owner or entity authorized by the copyright
|
||||
owner that is granting the License.
|
||||
|
||||
"Legal Entity" shall mean the union of the acting entity and all other entities
|
||||
that control, are controlled by, or are under common control with that entity.
|
||||
For the purposes of this definition, "control" means (i) the power, direct or
|
||||
indirect, to cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
|
||||
outstanding shares, or (iii) beneficial ownership of such entity.
|
||||
|
||||
"You" (or "Your") shall mean an individual or Legal Entity exercising
|
||||
permissions granted by this License.
|
||||
|
||||
"Source" form shall mean the preferred form for making modifications, including
|
||||
but not limited to software source code, documentation source, and configuration
|
||||
files.
|
||||
|
||||
"Object" form shall mean any form resulting from mechanical transformation or
|
||||
translation of a Source form, including but not limited to compiled object code,
|
||||
generated documentation, and conversions to other media types.
|
||||
|
||||
"Work" shall mean the work of authorship, whether in Source or Object form, made
|
||||
available under the License, as indicated by a copyright notice that is included
|
||||
in or attached to the work (an example is provided in the Appendix below).
|
||||
|
||||
"Derivative Works" shall mean any work, whether in Source or Object form, that
|
||||
is based on (or derived from) the Work and for which the editorial revisions,
|
||||
annotations, elaborations, or other modifications represent, as a whole, an
|
||||
original work of authorship. For the purposes of this License, Derivative Works
|
||||
shall not include works that remain separable from, or merely link (or bind by
|
||||
name) to the interfaces of, the Work and Derivative Works thereof.
|
||||
|
||||
"Contribution" shall mean any work of authorship, including the original version
|
||||
of the Work and any modifications or additions to that Work or Derivative Works
|
||||
thereof, that is intentionally submitted to Licensor for inclusion in the Work
|
||||
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|
||||
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|
||||
"submitted" means any form of electronic, verbal, or written communication sent
|
||||
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|
||||
communication on electronic mailing lists, source code control systems, and
|
||||
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|
||||
the purpose of discussing and improving the Work, but excluding communication
|
||||
that is conspicuously marked or otherwise designated in writing by the copyright
|
||||
owner as "Not a Contribution."
|
||||
|
||||
"Contributor" shall mean Licensor and any individual or Legal Entity on behalf
|
||||
of whom a Contribution has been received by Licensor and subsequently
|
||||
incorporated within the Work.
|
||||
|
||||
2. Grant of Copyright License.
|
||||
|
||||
Subject to the terms and conditions of this License, each Contributor hereby
|
||||
grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
|
||||
irrevocable copyright license to reproduce, prepare Derivative Works of,
|
||||
publicly display, publicly perform, sublicense, and distribute the Work and such
|
||||
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|
||||
|
||||
3. Grant of Patent License.
|
||||
|
||||
Subject to the terms and conditions of this License, each Contributor hereby
|
||||
grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
|
||||
irrevocable (except as stated in this section) patent license to make, have
|
||||
made, use, offer to sell, sell, import, and otherwise transfer the Work, where
|
||||
such license applies only to those patent claims licensable by such Contributor
|
||||
that are necessarily infringed by their Contribution(s) alone or by combination
|
||||
of their Contribution(s) with the Work to which such Contribution(s) was
|
||||
submitted. If You institute patent litigation against any entity (including a
|
||||
cross-claim or counterclaim in a lawsuit) alleging that the Work or a
|
||||
Contribution incorporated within the Work constitutes direct or contributory
|
||||
patent infringement, then any patent licenses granted to You under this License
|
||||
for that Work shall terminate as of the date such litigation is filed.
|
||||
|
||||
4. Redistribution.
|
||||
|
||||
You may reproduce and distribute copies of the Work or Derivative Works thereof
|
||||
in any medium, with or without modifications, and in Source or Object form,
|
||||
provided that You meet the following conditions:
|
||||
|
||||
You must give any other recipients of the Work or Derivative Works a copy of
|
||||
this License; and
|
||||
You must cause any modified files to carry prominent notices stating that You
|
||||
changed the files; and
|
||||
You must retain, in the Source form of any Derivative Works that You distribute,
|
||||
all copyright, patent, trademark, and attribution notices from the Source form
|
||||
of the Work, excluding those notices that do not pertain to any part of the
|
||||
Derivative Works; and
|
||||
If the Work includes a "NOTICE" text file as part of its distribution, then any
|
||||
Derivative Works that You distribute must include a readable copy of the
|
||||
attribution notices contained within such NOTICE file, excluding those notices
|
||||
that do not pertain to any part of the Derivative Works, in at least one of the
|
||||
following places: within a NOTICE text file distributed as part of the
|
||||
Derivative Works; within the Source form or documentation, if provided along
|
||||
with the Derivative Works; or, within a display generated by the Derivative
|
||||
Works, if and wherever such third-party notices normally appear. The contents of
|
||||
the NOTICE file are for informational purposes only and do not modify the
|
||||
License. You may add Your own attribution notices within Derivative Works that
|
||||
You distribute, alongside or as an addendum to the NOTICE text from the Work,
|
||||
provided that such additional attribution notices cannot be construed as
|
||||
modifying the License.
|
||||
You may add Your own copyright statement to Your modifications and may provide
|
||||
additional or different license terms and conditions for use, reproduction, or
|
||||
distribution of Your modifications, or for any such Derivative Works as a whole,
|
||||
provided Your use, reproduction, and distribution of the Work otherwise complies
|
||||
with the conditions stated in this License.
|
||||
|
||||
5. Submission of Contributions.
|
||||
|
||||
Unless You explicitly state otherwise, any Contribution intentionally submitted
|
||||
for inclusion in the Work by You to the Licensor shall be under the terms and
|
||||
conditions of this License, without any additional terms or conditions.
|
||||
Notwithstanding the above, nothing herein shall supersede or modify the terms of
|
||||
any separate license agreement you may have executed with Licensor regarding
|
||||
such Contributions.
|
||||
|
||||
6. Trademarks.
|
||||
|
||||
This License does not grant permission to use the trade names, trademarks,
|
||||
service marks, or product names of the Licensor, except as required for
|
||||
reasonable and customary use in describing the origin of the Work and
|
||||
reproducing the content of the NOTICE file.
|
||||
|
||||
7. Disclaimer of Warranty.
|
||||
|
||||
Unless required by applicable law or agreed to in writing, Licensor provides the
|
||||
Work (and each Contributor provides its Contributions) on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
|
||||
including, without limitation, any warranties or conditions of TITLE,
|
||||
NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are
|
||||
solely responsible for determining the appropriateness of using or
|
||||
redistributing the Work and assume any risks associated with Your exercise of
|
||||
permissions under this License.
|
||||
|
||||
8. Limitation of Liability.
|
||||
|
||||
In no event and under no legal theory, whether in tort (including negligence),
|
||||
contract, or otherwise, unless required by applicable law (such as deliberate
|
||||
and grossly negligent acts) or agreed to in writing, shall any Contributor be
|
||||
liable to You for damages, including any direct, indirect, special, incidental,
|
||||
or consequential damages of any character arising as a result of this License or
|
||||
out of the use or inability to use the Work (including but not limited to
|
||||
damages for loss of goodwill, work stoppage, computer failure or malfunction, or
|
||||
any and all other commercial damages or losses), even if such Contributor has
|
||||
been advised of the possibility of such damages.
|
||||
|
||||
9. Accepting Warranty or Additional Liability.
|
||||
|
||||
While redistributing the Work or Derivative Works thereof, You may choose to
|
||||
offer, and charge a fee for, acceptance of support, warranty, indemnity, or
|
||||
other liability obligations and/or rights consistent with this License. However,
|
||||
in accepting such obligations, You may act only on Your own behalf and on Your
|
||||
sole responsibility, not on behalf of any other Contributor, and only if You
|
||||
agree to indemnify, defend, and hold each Contributor harmless for any liability
|
||||
incurred by, or claims asserted against, such Contributor by reason of your
|
||||
accepting any such warranty or additional liability.
|
||||
|
|
@ -2,11 +2,12 @@
|
|||
* File Name: cyhal.h
|
||||
*
|
||||
* Description:
|
||||
* Top-level HAL header file that includes all available HAL header files. This
|
||||
* will pull in all of the specific HAL files needed. Not all of these may be
|
||||
* supported in the target device. The target device must provide a
|
||||
* cyhal_hw_types.h file that is in the include path for the hal headers to
|
||||
* depend on. The cyhal_hw_types.h file must provide the following:
|
||||
* Top-level HAL header file that can be referenced to pull in all relevant
|
||||
* drivers for the current device architecture. Not all of these may be
|
||||
* supported in the current target device. The implementation must provide a
|
||||
* cyhal_hw_types.h and a cyhal_drivers.h file in the include path for this
|
||||
* to depend on.
|
||||
* The cyhal_hw_types.h file must provide the following:
|
||||
* 1) definitions for each of the resource types consumed by the HAL driver
|
||||
* functions.
|
||||
* 2) A CYHAL_ISR_PRIORITY_DEFAULT define for the default interrupt priority
|
||||
|
|
@ -15,6 +16,8 @@
|
|||
* a #define in cyhal_hw_types.h with a name of CYHAL_<DRIVER>_IMPL_HEADER
|
||||
* and the value being the name of the header file. eg:
|
||||
* #define CYHAL_GPIO_IMPL_HEADER "cyhal_gpio_impl.h"
|
||||
* The cyhal_drivers.h file must simply be a list of include directives to pull
|
||||
* in the relevant driver header files.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
|
|
@ -51,35 +54,12 @@
|
|||
* rely only on functionality documented in this section.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_impl
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cyhal_general_types.h"
|
||||
#include "cyhal_hw_types.h"
|
||||
|
||||
#include "cyhal_adc.h"
|
||||
#include "cyhal_clock.h"
|
||||
#include "cyhal_crc.h"
|
||||
#include "cyhal_dac.h"
|
||||
#include "cyhal_dma.h"
|
||||
#include "cyhal_ezi2c.h"
|
||||
#include "cyhal_flash.h"
|
||||
#include "cyhal_gpio.h"
|
||||
#include "cyhal_hwmgr.h"
|
||||
#include "cyhal_i2c.h"
|
||||
#include "cyhal_i2s.h"
|
||||
#include "cyhal_interconnect.h"
|
||||
#include "cyhal_lptimer.h"
|
||||
#include "cyhal_pdmpcm.h"
|
||||
#include "cyhal_pwm.h"
|
||||
#include "cyhal_qspi.h"
|
||||
#include "cyhal_rtc.h"
|
||||
#include "cyhal_sdhc.h"
|
||||
#include "cyhal_sdio.h"
|
||||
#include "cyhal_spi.h"
|
||||
#include "cyhal_syspm.h"
|
||||
#include "cyhal_system.h"
|
||||
#include "cyhal_timer.h"
|
||||
#include "cyhal_trng.h"
|
||||
#include "cyhal_uart.h"
|
||||
#include "cyhal_usb_dev.h"
|
||||
#include "cyhal_wdt.h"
|
||||
#include "cyhal_drivers.h"
|
||||
|
|
|
|||
|
|
@ -31,12 +31,14 @@
|
|||
* \{
|
||||
* High level interface for interacting with the analog to digital converter (ADC).
|
||||
*
|
||||
* \section cyhal_adc_features Features
|
||||
* Each ADC instance supports one or more selectable channels, each
|
||||
* of which can perform conversions on a different pin.
|
||||
* See the device datasheet for details about which pins support ADC conversion.
|
||||
*
|
||||
* All channels are single-ended. The values returned by the read API are relative
|
||||
* to the ADC's voltage range, which is device specific.
|
||||
* Both single-ended and differential channels are supported. The values returned
|
||||
* by the read API are relative to the ADC's voltage range, which is device specific.
|
||||
* See the BSP documentation for details.
|
||||
*
|
||||
* \section cyhal_adc_quickstart Quickstart
|
||||
* Call \ref cyhal_adc_init to initialize an ADC instance by providing the ADC
|
||||
|
|
@ -44,9 +46,9 @@
|
|||
* pin argument is just to signify which ADC instance to initialize. It does not
|
||||
* actually reserve the pin or create an ADC channel for it. The clock parameter can
|
||||
* be left NULL to use an available clock resource with a default frequency.<br>
|
||||
* Use \ref cyhal_adc_channel_init to initialize one or more channels associated
|
||||
* Use \ref cyhal_adc_channel_init_diff to initialize one or more channels associated
|
||||
* with that instance.<br>
|
||||
* Use \ref cyhal_adc_read_u16 for reading the results.<br>
|
||||
* Use \ref cyhal_adc_read for reading the results.<br>
|
||||
* See \ref subsection_adc_snippet_1.
|
||||
*
|
||||
* \note \ref cyhal_adc_read_u16 always returns a 16 bit value in the range
|
||||
|
|
@ -54,12 +56,24 @@
|
|||
* value is scaled linearly to cover the full 16 bits.
|
||||
*
|
||||
* \section subsection_adc_snippets Code snippets
|
||||
* \subsection subsection_adc_snippet_1 Snippet 1: Simple ADC initialization and
|
||||
* reading conversion result
|
||||
* \note Error checking is omitted for clarity
|
||||
* \subsection subsection_adc_snippet_1 Snippet 1: Simple ADC initialization and reading conversion result
|
||||
* The following snippet initializes an ADC and one channel.
|
||||
* One ADC conversion result is returned corresponding to the input at the specified
|
||||
* pin.
|
||||
* \snippet adc.c snippet_cyhal_adc_simple_init
|
||||
*
|
||||
* \subsection subsection_adc_snippet_2 Snippet 2: Multi-channel ADC initialization and reading conversion result
|
||||
* The following snippet initializes an ADC with one single-ended channel and one differential channel
|
||||
* \snippet adc.c snippet_cyhal_adc_multi_init
|
||||
*
|
||||
* \subsection subsection_adc_snippet_3 Snippet 3: Asynchronously read multiple channels
|
||||
* The following snippet illustrates how to asynchronously read multiple scans of multiple channels.
|
||||
* \snippet adc.c snippet_cyhal_adc_async_read
|
||||
*
|
||||
* \subsection subsection_adc_snippet_4 Snippet 4: Continuous scanning
|
||||
* This snippet shows how to run the ADC in continuous mode and process results as each scan completes.
|
||||
* \snippet adc.c snippet_cyhal_adc_continuous_read
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
|
@ -68,14 +82,16 @@
|
|||
#include <stdbool.h>
|
||||
#include "cy_result.h"
|
||||
#include "cyhal_hw_types.h"
|
||||
#include "cyhal_gpio.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_adc ADC HAL Results
|
||||
* ADC specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name ADC Results
|
||||
*/
|
||||
|
||||
/** Bad argument */
|
||||
|
|
@ -92,13 +108,132 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_ADC, 3))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** Number of bits populated with meaningful data by each ADC sample */
|
||||
#define CYHAL_ADC_BITS 16
|
||||
/** Maximum value that the ADC can return */
|
||||
#define CYHAL_ADC_MAX_VALUE 0xFFFF
|
||||
#define CYHAL_ADC_MAX_VALUE ((1 << CYHAL_ADC_BITS) - 1)
|
||||
|
||||
/** Possible selections for ADC reference */
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_ADC_REF_INTERNAL, //!< Internal reference. See the BSP documentation for the value of this reference. (Default)
|
||||
CYHAL_ADC_REF_EXTERNAL, //!< Reference from external pin.
|
||||
CYHAL_ADC_REF_VDDA, //!< Reference from VDDA (analog supply)
|
||||
CYHAL_ADC_REF_VDDA_DIV_2, //!< Reference from VDDA (analog supply) divided by 2
|
||||
} cyhal_adc_vref_t;
|
||||
|
||||
/** Vminus selection for single-ended channels */
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_ADC_VNEG_VSSA, //!< Connect vminus to ground.
|
||||
CYHAL_ADC_VNEG_VREF, //!< Connect vminus to the selected vref (see @ref cyhal_adc_vref_t)
|
||||
} cyhal_adc_vneg_t;
|
||||
|
||||
/** ADC events */
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_ADC_EOS = 1u, //!< End of scan: a scan of all channels has completed. Only applicable when continuously scanning
|
||||
CYHAL_ADC_ASYNC_READ_COMPLETE = 2u, //!< An asynchronous read operation has completed.
|
||||
} cyhal_adc_event_t;
|
||||
|
||||
/** Perform standard averaging. Divide the accumulated value by the number of samples.
|
||||
* @note This is not supported in combination with @ref CYHAL_ADC_AVG_MODE_ACCUMULATE */
|
||||
#define CYHAL_ADC_AVG_MODE_AVERAGE (1u << 0)
|
||||
/** Accumulate samples as in @ref CYHAL_ADC_AVG_MODE_AVERAGE, but do not divide by the number of samples */
|
||||
#define CYHAL_ADC_AVG_MODE_ACCUMULATE (1u << 1)
|
||||
/** Average mode flag position indices shifted by greater than this are implementation specific. The value
|
||||
* of this macro is subject to change between HAL versions. */
|
||||
#define CYHAL_ADC_AVG_MODE_MAX_SHIFT (1u)
|
||||
|
||||
/** Selects the default connection for the inverting input to achieve a single-ended channel. This connection
|
||||
* is controlled by the `vneg` member of @ref cyhal_adc_config_t.
|
||||
*/
|
||||
#define CYHAL_ADC_VNEG CYHAL_NC_PIN_VALUE
|
||||
|
||||
/** ADC Configuration */
|
||||
typedef struct
|
||||
{
|
||||
/** Whether the ADC samples continuously (true) or only on demand (false).
|
||||
*
|
||||
* When configured to true, the ADC will immediately begin scanning all configured channels.
|
||||
* When configured to false, the ADC will stop continuous scanning at the completion of the current scan
|
||||
*/
|
||||
bool continuous_scanning;
|
||||
/** ADC resolution. See the implementation specific documentation for supported values */
|
||||
uint8_t resolution;
|
||||
/** The number of samples that should be averaged together to obtain a result. A value of 1 disables averaging. */
|
||||
uint16_t average_count;
|
||||
/** Flags to control the behavior of the averaging functionality when @ref average_count is greater than 1.
|
||||
* This field contains zero or more flags that are OR'd together. All implementations define
|
||||
* @ref CYHAL_ADC_AVG_MODE_AVERAGE and @ref CYHAL_ADC_AVG_MODE_ACCUMULATE (though some may not support both modes).
|
||||
* Some implementations may define other flags to control additional aspects of the averaging functionality; see
|
||||
* the implementation-specific documentation for details.
|
||||
*/
|
||||
uint32_t average_mode_flags;
|
||||
/** The external voltage reference value, in millivolts.
|
||||
* If vref is set to @ref CYHAL_ADC_REF_EXTERNAL, this must be nonzero.
|
||||
* If vref is set to anything other than @ref CYHAL_ADC_REF_EXTERNAL, this must be zero.
|
||||
*/
|
||||
uint32_t ext_vref_mv;
|
||||
/** Vminus selection for single-ended channels */
|
||||
cyhal_adc_vneg_t vneg;
|
||||
/** ADC voltage reference */
|
||||
cyhal_adc_vref_t vref;
|
||||
/** The GPIO that should be used for the external reference. If @ref CYHAL_ADC_REF_EXTERNAL
|
||||
* is selected and the current target uses a GPIO for ADC ext_vref (see the BSP documentation),
|
||||
* this must not be @ref NC. If the current target uses a dedicated pin (not a GPIO) for ADC ext_vref,
|
||||
* or if any other reference is selected, this must be @ref NC.
|
||||
*/
|
||||
cyhal_gpio_t ext_vref;
|
||||
/** Whether an external bypass capacitor should be used. Depending on the platform this may be required
|
||||
* to reduce noise at sufficiently high sample rates. See the implementation specific documentation
|
||||
* for details.
|
||||
*/
|
||||
bool is_bypassed;
|
||||
/** The GPIO pin that should be used for the bypass capacitor. If `is_bypassed` is true and the current target
|
||||
* uses a GPIO for the bypass capacitor connection, this must not be @ref NC. Otherwise, this must be @ref NC.
|
||||
* Depending on the device, this may be the same GPIO as `ext_vref`. See the BSP documentation for details.
|
||||
*/
|
||||
cyhal_gpio_t bypass_pin;
|
||||
} cyhal_adc_config_t;
|
||||
|
||||
/** ADC Channel Configuration */
|
||||
typedef struct
|
||||
{
|
||||
/** Whether this channel should be sampled when the ADC performs a scan */
|
||||
bool enabled;
|
||||
/** Enable or disable averaging for this channel.
|
||||
* All other aspects of the averging functionality are configured in @ref cyhal_adc_config_t
|
||||
*/
|
||||
bool enable_averaging;
|
||||
/** Minimum time that this channel should be sampled, in nanoseconds. The actual time may be greater
|
||||
* than this depending on hardware limitations, the sample rate, and the configuration of other channels.
|
||||
* @note While this value is specified in ns, the underlying hardware generally does not support
|
||||
* acquisition time with a granularity of 1 ns. See the implementation specific documentation for details.
|
||||
*/
|
||||
uint32_t min_acquisition_ns;
|
||||
} cyhal_adc_channel_config_t;
|
||||
|
||||
/** Handler for ADC event callbacks */
|
||||
typedef void (*cyhal_adc_event_callback_t)(void *callback_arg, cyhal_adc_event_t event);
|
||||
|
||||
/** Initialize ADC peripheral
|
||||
*
|
||||
* The ADC will be initialized with the following default configuration:
|
||||
* - Sample rate: See implementation-specific documentation
|
||||
* - Average count: 1 (averaging disabled).
|
||||
* - Continuous scanning: false
|
||||
* - Single ended vneg: @ref CYHAL_ADC_VNEG_VREF
|
||||
* - Vref: @ref CYHAL_ADC_REF_INTERNAL
|
||||
* - External vref: @ref NC
|
||||
* - Bypassed: false
|
||||
* - Bypass pin: @ref NC
|
||||
* - Power level: @ref CYHAL_POWER_LEVEL_DEFAULT
|
||||
*
|
||||
* To change the configuration, see @ref cyhal_adc_configure
|
||||
*
|
||||
* @param[out] obj Pointer to an ADC object. The caller must allocate the memory
|
||||
* for this object but the init function will initialize its contents.
|
||||
|
|
@ -106,7 +241,7 @@ extern "C" {
|
|||
* Note: This pin is not reserved, it is just used to identify which ADC block to allocate.
|
||||
* If multiple channels will be allocated for a single ADC instance, only one pin should be
|
||||
* passed here; it does not matter which one. After calling this function once, call
|
||||
* cyhal_adc_channel_init once for each pin whose value should be measured.
|
||||
* @ref cyhal_adc_channel_init_diff once for each pin whose value should be measured.
|
||||
* @param[in] clk The clock to use can be shared, if not provided a new clock will be allocated
|
||||
* @return The status of the init request. \ref CY_RSLT_SUCCESS is returned on success.
|
||||
* On failure, a problem specific error code will be returned.
|
||||
|
|
@ -121,19 +256,89 @@ cy_rslt_t cyhal_adc_init(cyhal_adc_t *obj, cyhal_gpio_t pin, const cyhal_clock_t
|
|||
*/
|
||||
void cyhal_adc_free(cyhal_adc_t *obj);
|
||||
|
||||
/** Initialize a single-ended ADC channel.
|
||||
/** Update the ADC configuration.
|
||||
*
|
||||
* @note If a scan is in progress, this may cause it to be interrupted.
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @param[in] config The configuration to apply
|
||||
* @return The status of the configuration request
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_configure(cyhal_adc_t *obj, const cyhal_adc_config_t *config);
|
||||
|
||||
/** Changes the current operating power level of the ADC.
|
||||
*
|
||||
* Configures the pin used by ADC.
|
||||
* @param[out] obj The adc channel object to initialize
|
||||
* @param[in] adc The adc for which the channel should be initialized
|
||||
* @param[in] pin The adc pin name
|
||||
* @return The status of the init request. The status of the init request.
|
||||
* \ref CY_RSLT_SUCCESS is returned on success.<br>
|
||||
* If the power level is set to @ref CYHAL_POWER_LEVEL_OFF, the ADC will be powered-off
|
||||
* but it will retain its configuration, so it is not necessary to reconfigure it when changing
|
||||
* the power level from @ref CYHAL_POWER_LEVEL_OFF to any other value.
|
||||
*
|
||||
* @param[in] obj ADC object
|
||||
* @param[in] power The power level to set
|
||||
* @return The status of the set power request
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_channel_init(cyhal_adc_channel_t *obj, cyhal_adc_t* adc, cyhal_gpio_t pin);
|
||||
cy_rslt_t cyhal_adc_set_power(cyhal_adc_t *obj, cyhal_power_level_t power);
|
||||
|
||||
/** Configure the number of samples per second.
|
||||
*
|
||||
* This is the number of times each enabled channel is sampled per second. The total number of samples performed
|
||||
* by the ADC hardware per second is equal to `sample_rate_hz / num_channels_enabled`.
|
||||
* Depending on the system clock configuration or limitations of the underlying hardware, it may not be possible
|
||||
* to achieve precisely the desired sample rate. The `achived_sample_rate_hz` parameter will be updated to indicate
|
||||
* the sample rate that was achived.
|
||||
* @note The `achieved_sample_rate_hz` value is only valid while the configuration of the ADC and its channels remains
|
||||
* umodified. If @ref cyhal_adc_configure, @ref cyhal_adc_channel_init_diff, @ref cyhal_adc_channel_configure,
|
||||
* or @ref cyhal_adc_channel_free is called, it is necessary to call this function again in order to update the sample rate.
|
||||
* Therefore, it is recommended to call this function after the ADC and all channels have been configured.
|
||||
*
|
||||
* @param[in] obj The ADC object to configure
|
||||
* @param[in] desired_sample_rate_hz The desired sample rate, in hertz
|
||||
* @param[out] achieved_sample_rate_hz The achieved sample rate, in hertz
|
||||
*
|
||||
* @return The status of the sample rate request. Note that inability to exactly match the requested sample
|
||||
* rate is not considered an error. It is the application's responsibility to determine whether the achived rate
|
||||
* is within the tolerance that it requires.
|
||||
* \ref CY_RSLT_SUCCESS is returned on success.<br>
|
||||
* On failure, a problem specific error code will be returned. This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_set_sample_rate(cyhal_adc_t* obj, uint32_t desired_sample_rate_hz, uint32_t* achieved_sample_rate_hz);
|
||||
|
||||
/** Initialize a differential ADC channel.
|
||||
* @note: Some platforms may restrict which pins can be used as part of a differential pair. See the
|
||||
* implementation-specific documentation for details.
|
||||
*
|
||||
* Configures the pin used by ADC.
|
||||
* @param[out] obj The ADC channel object to initialize
|
||||
* @param[in] adc The ADC for which the channel should be initialized
|
||||
* @param[in] vplus Non-inverting input
|
||||
* @param[in] vminus Inverting input. For a single ended channel, use @ref CYHAL_ADC_VNEG.
|
||||
* @param[in] cfg The ADC channel configuration
|
||||
* @return The status of the init request.
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_channel_init_diff(cyhal_adc_channel_t *obj, cyhal_adc_t* adc, cyhal_gpio_t vplus, cyhal_gpio_t vminus, const cyhal_adc_channel_config_t* cfg);
|
||||
|
||||
/** Update the ADC channel configuration.
|
||||
*
|
||||
* @note If a scan is in progress, this may cause it to be interrupted. It is not valid to change the enabled state
|
||||
* of a channel while an asynchronous read operation is in progress.
|
||||
*
|
||||
* @param[in] obj The ADC channel object
|
||||
* @param[in] config The configuration to apply
|
||||
* @return The status of the configuration request
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_channel_configure(cyhal_adc_channel_t *obj, const cyhal_adc_channel_config_t *config);
|
||||
|
||||
/** Uninitialize the ADC channel and cyhal_adc_channel_t object
|
||||
*
|
||||
|
|
@ -141,16 +346,153 @@ cy_rslt_t cyhal_adc_channel_init(cyhal_adc_channel_t *obj, cyhal_adc_t* adc, cyh
|
|||
*/
|
||||
void cyhal_adc_channel_free(cyhal_adc_channel_t *obj);
|
||||
|
||||
/** Read the value from ADC pin, represented as an unsigned 16bit value
|
||||
/** Read the value from the ADC pin, represented as an unsigned 16bit value
|
||||
* where 0x0000 represents the minimum value in the ADC's range, and 0xFFFF
|
||||
* represents the maximum value in the ADC's range.
|
||||
* Depending on the ADC speed this function may block for some time.
|
||||
* If continous scanning is disabled, this will block while a conversion is
|
||||
* performed on the selected channel, then return the result. Depending on the
|
||||
* ADC speed this function may block for some time.
|
||||
* If continuous scanning is enabled, this will return the value from the most
|
||||
* recent conversion of the specified channel (if called shortly after enabling
|
||||
* continuous scanning it may block until at least one conversion has been performed
|
||||
* on this channel).
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @return An unsigned 16bit value representing the current input voltage
|
||||
*/
|
||||
uint16_t cyhal_adc_read_u16(const cyhal_adc_channel_t *obj);
|
||||
|
||||
/** Read the value from ADC pin, represented as a 32-bit signed, right-aligned value.
|
||||
*
|
||||
* This is a 'resolution'-bit value, sign-extended to 32 bits. If the vplus signal is
|
||||
* below the vminus signal, the result will be negative. If the vplus signal is above
|
||||
* the vminus signal, the result will be positive.
|
||||
* If continous scanning is disabled, this will block while a conversion is
|
||||
* performed on the selected channel, then return the result. Depending on the
|
||||
* ADC speed this function may block for some time.
|
||||
* If continuous scanning is enabled, this will return the value from the most
|
||||
* recent conversion of the specified channel (if called shortly after enabling
|
||||
* continuous scanning it may block until at least one conversion has been performed
|
||||
* on this channel).
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @return A signed 32 bit value representing the current input voltage
|
||||
*/
|
||||
int32_t cyhal_adc_read(const cyhal_adc_channel_t *obj);
|
||||
|
||||
/** Read the value from ADC pin, in microvolts.
|
||||
*
|
||||
* If continous scanning is disabled, this will block while a conversion is
|
||||
* performed on the selected channel, then return the result. Depending on the
|
||||
* ADC speed this function may block for some time.
|
||||
* If continuous scanning is enabled, this will return the value from the most
|
||||
* recent conversion of the specified channel (if called shortly after enabling
|
||||
* continuous scanning it may block until at least one conversion has been performed
|
||||
* on this channel).
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @return An unsigned 32 bit value representing the current input in microvolts
|
||||
*/
|
||||
int32_t cyhal_adc_read_uv(const cyhal_adc_channel_t *obj);
|
||||
|
||||
/** Scan the specified ADC channels in the background and copy the results
|
||||
* into the array pointed to by `result_list`.
|
||||
*
|
||||
* Results are represented as 32-bit signed, right-aligned values. That is, they are
|
||||
* 'resolution'-bit values, sign-extended to 32 bits. If the vplus signal is
|
||||
* below the vminus signal, the result will be negative. If the vplus signal is above
|
||||
* the vminus signal, the result will be positive.
|
||||
*
|
||||
* If continuous scanning is disabled, this will trigger num_scan new scans and copy the results
|
||||
* into `result_list` once the scan is completed.
|
||||
*
|
||||
* If continuous scanning is enabled, this will copy the results of num_scan scans into the result_list as
|
||||
* they complete, beginning with the most recently completed scan (if one exists).
|
||||
*
|
||||
* Scan results are placed sequentially into result_list. That is, result_list will contain all of the results from the
|
||||
* first scan, followed by all of the results from the second scan, etc. If channels exist that are initialized but not
|
||||
* enabled, they will consume locations in result_list, but these values are undefined.
|
||||
*
|
||||
* When the requested number of scans have been completed, the @ref CYHAL_ADC_ASYNC_READ_COMPLETE event will be raised.
|
||||
*
|
||||
* @ref cyhal_adc_set_async_mode can be used to control whether this uses DMA or a SW (CPU-driven) transfer.
|
||||
*
|
||||
* @param[in] obj ADC to read from
|
||||
* @param[in] num_scan The number of scans of each channel that should be read
|
||||
* @param[in] result_list The array where results should be. This must be of length num_scan * initialized_channels,
|
||||
* where initialized_channels is the number of channels that have been initialized for this ADC
|
||||
* (and not later freed) via @ref cyhal_adc_channel_init_diff
|
||||
* @return The status of the read async request
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_read_async(cyhal_adc_t* obj, size_t num_scan, int32_t* result_list);
|
||||
|
||||
/** Scan the specified ADC channels in the background and copy the conversion results in microvolts
|
||||
* into the array pointed to by `result_list`.
|
||||
*
|
||||
* If continuous scanning is disabled, this will trigger num_scan new scans and copy the results
|
||||
* into `result_list` once the scan is completed.
|
||||
*
|
||||
* If continuous scanning is enabled, this will copy the results of num_scan scans into the result_list as
|
||||
* they complete, beginning with the most recently completed scan (if one exists).
|
||||
*
|
||||
* Scan results are placed sequentially into result_list. That is, result_list will contain all of the results from the
|
||||
* first scan, followed by all of the results from the second scan, etc. If channels exist that are initialized but not
|
||||
* enabled, they will consume locations in result_list, but these values are undefined.
|
||||
*
|
||||
* When the requested number of scans have been completed, the @ref CYHAL_ADC_ASYNC_READ_COMPLETE event will be raised.
|
||||
*
|
||||
* @ref cyhal_adc_set_async_mode can be used to control whether this uses DMA or a SW (CPU-driven) transfer.
|
||||
*
|
||||
* @param[in] obj ADC to read from
|
||||
* @param[in] num_scan The number of scans of each channel that should be read
|
||||
* @param[in] result_list The array where results should be. This must be of length num_scan * initialized_channels,
|
||||
* where initialized_channels is the number of channels that have been initialized for this ADC
|
||||
* (and not later freed) via @ref cyhal_adc_channel_init_diff
|
||||
* @return The status of the read async request
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_read_async_uv(cyhal_adc_t* obj, size_t num_scan, int32_t* result_list);
|
||||
|
||||
/** Set the mechanism that is used to perform ADC asynchronous transfers. The default is SW.
|
||||
* @warning The effect of calling this function while an async transfer is pending is undefined.
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @param[in] mode The transfer mode
|
||||
* @param[in] dma_priority The priority, if DMA is used. Valid values are the same as for @ref cyhal_dma_init.
|
||||
* If DMA is not selected, the only valid value is CYHAL_DMA_PRIORITY_DEFAULT, and no
|
||||
guarantees are made about prioritization.
|
||||
* @return The status of the set mode request
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_set_async_mode(cyhal_adc_t *obj, cyhal_async_mode_t mode, uint8_t dma_priority);
|
||||
|
||||
/** Register an ADC callback handler
|
||||
*
|
||||
* This function will be called when one of the events enabled by \ref cyhal_adc_enable_event occurs.
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @param[in] callback The callback handler which will be invoked when the interrupt fires
|
||||
* @param[in] callback_arg Generic argument that will be provided to the callback when called
|
||||
*/
|
||||
void cyhal_adc_register_callback(cyhal_adc_t *obj, cyhal_adc_event_callback_t callback, void *callback_arg);
|
||||
|
||||
/** Configure ADC events.
|
||||
*
|
||||
* When an enabled event occurs, the function specified by \ref cyhal_adc_register_callback will be called.
|
||||
*
|
||||
* @param[in] obj The ADC object
|
||||
* @param[in] event The ADC event type
|
||||
* @param[in] intr_priority The priority for NVIC interrupt events
|
||||
* @param[in] enable True to turn on specified events, False to turn off
|
||||
*/
|
||||
void cyhal_adc_enable_event(cyhal_adc_t *obj, cyhal_adc_event_t event, uint8_t intr_priority, bool enable);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,59 @@
|
|||
/*******************************************************************************
|
||||
* File Name: cyhal_clock_impl.h
|
||||
*
|
||||
* Description:
|
||||
* PSoC 6 specific implementation for clocks API.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2019 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cyhal_hw_resources.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup group_hal_impl_impl_adc
|
||||
* \{
|
||||
*/
|
||||
|
||||
/** Convert all samples to be averaged back to back, before proceeding to the next channel.
|
||||
* This is the default behavior. */
|
||||
#define CYHAL_ADC_AVG_MODE_SEQUENTIAL (1u << (CYHAL_ADC_AVG_MODE_MAX_SHIFT + 1u))
|
||||
|
||||
/** Convert one sample to be averaged per scan, interleaved with the rest of the channels.
|
||||
* This maintains a consistent spacing of samples regardless of whether samples are averaged
|
||||
* or not. However, it also means that a new value will only be provided once every n scans,
|
||||
* where n is the configured averaging count. At the conclusion of any other scan, the read
|
||||
* operation will return the same value as the previous scan. The application is responsible
|
||||
* for keeping tracks of the scans on which the value will be updated.
|
||||
* \note This mode is incompatible with \ref CYHAL_ADC_AVG_MODE_ACCUMULATE
|
||||
* \note In this mode, the averaging count should be set to less than 16 to avoid overflowing
|
||||
* the working register that is used to accumulate intermediate results.
|
||||
*/
|
||||
#define CYHAL_ADC_AVG_MODE_INTERLEAVED (1u << (CYHAL_ADC_AVG_MODE_MAX_SHIFT + 2u))
|
||||
|
||||
/** \} group_hal_impl_adc */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
|
@ -25,6 +25,15 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include "cyhal_hw_types.h"
|
||||
#include "cyhal_general_types.h"
|
||||
#include "cyhal_gpio.h"
|
||||
|
||||
#if defined(CY_IP_MXS40PASS_CTB_INSTANCES) && (CY_IP_MXS40PASS_CTB_INSTANCES > 0)
|
||||
#include "cy_ctb.h"
|
||||
#endif
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
|
@ -33,14 +42,116 @@ extern "C" {
|
|||
* Initialize the programmable analog. This utilizes reference counting to avoid
|
||||
* repeatedly initializing the analog subsystem when multiple analog blocks are in use
|
||||
* */
|
||||
void cyhal_analog_init(void);
|
||||
void _cyhal_analog_init(void);
|
||||
|
||||
/**
|
||||
* Uninitialize the programmable analog. This utilizes reference counting to avoid
|
||||
* disabling the analog subsystem until all blocks which require it have been freed.
|
||||
*/
|
||||
void cyhal_analog_free(void);
|
||||
void _cyhal_analog_free(void);
|
||||
|
||||
#if defined(CY_IP_MXS40PASS_CTB_INSTANCES) && (CY_IP_MXS40PASS_CTB_INSTANCES > 0)
|
||||
|
||||
#define _CYHAL_OPAMP_PER_CTB (2u)
|
||||
|
||||
/**
|
||||
* Initialize the programmable analog for CTB. This utilizes reference counting to avoid
|
||||
* repeatedly initializing the analog subsystem when multiple analog blocks are in use
|
||||
*
|
||||
* @param[in] base CTB(m) base address
|
||||
* */
|
||||
void cyhal_analog_ctb_init(CTBM_Type *base);
|
||||
|
||||
/**
|
||||
* Uninitialize the programmable analog. This utilizes reference counting to avoid
|
||||
* disabling the analog subsystem until all blocks which require it have been freed.
|
||||
*
|
||||
* @param[in] base CTB(m) base address
|
||||
*/
|
||||
void cyhal_analog_ctb_free(CTBM_Type *base);
|
||||
|
||||
/** Base address for each CTB */
|
||||
extern CTBM_Type *const _cyhal_ctb_base[];
|
||||
|
||||
/**
|
||||
* Computes the switch mask to use for a set of opamp pins
|
||||
*
|
||||
* @param[in] opamp_num Opamp number (index within CTB(m))
|
||||
* @param[in] vin_p Non-inverting input pin. Must be specified.
|
||||
* @param[in] vin_m Inverting input pin. May be NC.
|
||||
* @param[in] vout Opamp output pin (analog). May be NC.
|
||||
* @return the switch mask to use
|
||||
*/
|
||||
uint32_t _cyhal_opamp_pin_to_mask(uint8_t opamp_num, cyhal_gpio_t vin_p, cyhal_gpio_t vin_m, cyhal_gpio_t vout);
|
||||
|
||||
/**
|
||||
* Performs basic initialization of an opamp and its associated set of pins that is common to
|
||||
* both opamp and comparator mode.
|
||||
* This reserves resources and configures switches to connect the pins. It does not configure the
|
||||
* opamp hardware.
|
||||
* If this returns success, the opamp and all pins will be reserved. If an error is returned, all resources
|
||||
* that were successfully reserved will have been freed.
|
||||
*
|
||||
* @param[out] rsc The opamp resource to use.
|
||||
* @param[in] bad_arg_error The driver-specific error that should be returned if an invalid pin is specified
|
||||
* @param[in] vin_p Non-inverting input pin. Must be specified.
|
||||
* @param[in] vin_m Inverting input pin. May be NC.
|
||||
* @param[in] vout Opamp output pin (analog). May be NC. Generally not specified in combination with comp_out
|
||||
* @param[in] comp_out Comparator output pin (digital). May be NC. Generally not specified in combination with vout
|
||||
* @return Whether the init operation succeeded.
|
||||
*/
|
||||
cy_rslt_t _cyhal_opamp_init_common(cyhal_resource_inst_t* rsc, cy_rslt_t bad_arg_error, cyhal_gpio_t vin_p, cyhal_gpio_t vin_m, cyhal_gpio_t vout, cyhal_gpio_t comp_out);
|
||||
|
||||
/**
|
||||
* Converts a HAL power level enum to a PDL-level opamp power enum value
|
||||
*
|
||||
* @param[in] hal_power power level as a HAL enum value
|
||||
* @return the equivalent pdl-level enum value
|
||||
*/
|
||||
uint32_t _cyhal_opamp_convert_power(cyhal_power_level_t hal_power);
|
||||
|
||||
/**
|
||||
* Converts an opamp number into a PDL-level `cy_en_ctb_opamp_sel` value.
|
||||
*
|
||||
* @param[in] oa_num the opamp number within its CTB(m)
|
||||
* @return the PDL-level `cy_en_ctb_switch_register_sel_t` value.
|
||||
*/
|
||||
__STATIC_INLINE cy_en_ctb_switch_register_sel_t _cyhal_opamp_convert_switch(uint8_t oa_num)
|
||||
{
|
||||
CY_ASSERT(oa_num < 2);
|
||||
return (oa_num == 0) ? CY_CTB_SWITCH_OA0_SW : CY_CTB_SWITCH_OA1_SW;
|
||||
}
|
||||
|
||||
/**
|
||||
* Converts an opamp number into a PDL-level `cy_en_ctb_opamp_sel` value.
|
||||
*
|
||||
* @param[in] oa_num the opamp number within its CTB(m)
|
||||
* @return the PDL-level `cy_en_ctb_opamp_sel` value.
|
||||
*/
|
||||
__STATIC_INLINE cy_en_ctb_opamp_sel_t _cyhal_opamp_convert_sel(uint8_t oa_num)
|
||||
{
|
||||
CY_ASSERT(oa_num < 2);
|
||||
return (oa_num == 0) ? CY_CTB_OPAMP_0 : CY_CTB_OPAMP_1;
|
||||
}
|
||||
|
||||
/**
|
||||
* Opens or closes the isolation switch if an opamp requires it
|
||||
*
|
||||
* @param[in] oa_num The opamp number within its CTB(m)
|
||||
* @param[in] state Whether to open or close the switch
|
||||
*/
|
||||
__STATIC_INLINE void _cyhal_opamp_set_isolation_switch(uint8_t oa_num, CTBM_Type *base, cy_en_ctb_switch_state_t state)
|
||||
{
|
||||
if(0u == oa_num)
|
||||
{
|
||||
// OA0 has an additional isolation switch (CIS) on its vplus line
|
||||
Cy_CTB_SetAnalogSwitch(base, CY_CTB_SWITCH_CTD_SW, CY_CTB_SW_CTD_CHOLD_OA0_POS_ISOLATE_MASK, state);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -111,9 +111,7 @@
|
|||
* \snippet clock.c snippet_cyhal_clock_change_source
|
||||
*
|
||||
* \subsection subsection_clock_snippet_5 Snippet 5: System initialization
|
||||
* The following snippet shows the clock driver can be used to initialize all clocks in the system.
|
||||
* \note This example is device specific.
|
||||
* \snippet clock.c snippet_cyhal_clock_system_init
|
||||
* \note This example is device specific. See \ref subsection_clock_snippet_5_impl for specific implementation.
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
@ -129,9 +127,10 @@ extern "C"
|
|||
{
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_clock Clock HAL Results
|
||||
* Clock specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name Clock Results
|
||||
*/
|
||||
|
||||
|
||||
|
|
@ -147,6 +146,25 @@ extern "C"
|
|||
/** The specified resource is not valid. */
|
||||
#define CYHAL_CLOCK_RSLT_ERR_RESOURCE \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_CLOCK, 3))
|
||||
/** The clock did not lock after being enabled. */
|
||||
#define CYHAL_CLOCK_RSLT_ERR_LOCK \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_CLOCK, 4))
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** \addtogroup group_hal_tolerance
|
||||
* \{ *//**
|
||||
* \{ @name Clock Tolerance
|
||||
*/
|
||||
|
||||
/** Clock tolerance 0 percent */
|
||||
extern const cyhal_clock_tolerance_t CYHAL_CLOCK_TOLERANCE_0_P;
|
||||
/** Clock tolerance 1 percent */
|
||||
extern const cyhal_clock_tolerance_t CYHAL_CLOCK_TOLERANCE_1_P;
|
||||
/** Clock tolerance 5 percent */
|
||||
extern const cyhal_clock_tolerance_t CYHAL_CLOCK_TOLERANCE_5_P;
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
|
|
|
|||
|
|
@ -32,8 +32,8 @@ extern "C"
|
|||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6_clock Clocks
|
||||
* \ingroup group_hal_psoc6
|
||||
* \addtogroup group_hal_impl_clock Clocks
|
||||
* \ingroup group_hal_impl
|
||||
* \{
|
||||
* Implementation specific interface for using the Clock driver. These items, while usable
|
||||
* within the HAL, are <b>not</b> necessarily portable between devices. The diagram below
|
||||
|
|
@ -41,7 +41,15 @@ extern "C"
|
|||
* the device specific Data Sheet for the exact set of clocks that are available on a
|
||||
* specific device.
|
||||
*
|
||||
* \image html psoc6_clock_tree.png
|
||||
* \image html mxs40_clock_tree.png
|
||||
*
|
||||
* \section section_clock_snippets_impl Code snippets
|
||||
* \note Error handling code has been intentionally left out of snippets to highlight API usage.
|
||||
*
|
||||
* \subsection subsection_clock_snippet_5_impl Snippet: System initialization
|
||||
* The following snippet shows the clock driver can be used to initialize all clocks in the system.
|
||||
* \note This example is device specific.
|
||||
* \snippet clock.c snippet_cyhal_clock_system_init_p6
|
||||
*/
|
||||
|
||||
/** \cond INTERNAL */
|
||||
|
|
@ -113,7 +121,7 @@ extern const cyhal_resource_inst_t CYHAL_CLOCK_PLL[SRSS_NUM_PLL];
|
|||
/** High Frequency Clock: A high-frequency clock output driving specific peripherals. */
|
||||
extern const cyhal_resource_inst_t CYHAL_CLOCK_HF[SRSS_NUM_HFROOT];
|
||||
|
||||
/** \} group_hal_psoc6_clock */
|
||||
/** \} group_hal_impl_clock */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,212 @@
|
|||
/***************************************************************************//**
|
||||
* \file cyhal_comp.h
|
||||
*
|
||||
* Provides a high level interface for interacting with the Cypress Analog Comparator.
|
||||
* This interface abstracts out the chip specific details.
|
||||
* If any chip specific functionality is required the low level functions can
|
||||
* be used directly.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_comp COMP (Analog Comparator)
|
||||
* \ingroup group_hal
|
||||
* \{
|
||||
* High level interface for interacting with an analog Comparator.
|
||||
*
|
||||
* \section cyhal_comp_features Features
|
||||
* The analog comparator measures one input voltage from the non-inverting pin against
|
||||
* a second voltage provided on the inverting pin. The result of this comparison can
|
||||
* be used in three ways:
|
||||
* - Output to pin
|
||||
* - Read state via firmware (see @ref cyhal_comp_read)
|
||||
* - Event triggered on rising or falling edge (see @ref cyhal_comp_event_t)
|
||||
*
|
||||
* These three abilities can be used in any combination.
|
||||
*
|
||||
* \section cyhal_comp_quickstart Quickstart
|
||||
* Call \ref cyhal_comp_init to initialize a comparator instance by providing the comparator
|
||||
* object (**obj**), non-inverting input pin (**vin_p**), inverting input pin (**vin_m**), optional
|
||||
* output pin (**output**), and configuration (**cfg**).
|
||||
*
|
||||
* Use \ref cyhal_comp_read to read the comparator state from firmware.
|
||||
*
|
||||
* Use \ref cyhal_comp_register_callback and \ref cyhal_comp_enable_event to configure a
|
||||
* callback that will be invoked on a rising and/or falling edge of the comparator output.
|
||||
*
|
||||
* \section subsection_comp_snippets Code Snippets:
|
||||
* \note Error checking is omitted for clarity
|
||||
* \section subsection_comp_snippet_1 Snippet 1: Comparator initialization
|
||||
* The following snippet initializes the comparator and powers it on
|
||||
* \snippet comp.c snippet_cyhal_comp_init
|
||||
*
|
||||
* \section subsection_comp_snippet_2 Snippet 2: Comparator read value
|
||||
* The following snippet reads the current comparator value into a variable
|
||||
* \snippet comp.c snippet_cyhal_comp_read
|
||||
*
|
||||
* \section subsection_comp_snippet_3 Snippet 3: Comparator event registration
|
||||
* The following snippet registers a callback that will be called on either a rising or falling
|
||||
* edge of the comparator output.
|
||||
* \snippet comp.c snippet_cyhal_comp_event
|
||||
*
|
||||
* \section subsection_comp_snippet_4 Snippet 4: Comparator powering-off and on
|
||||
* The following snippet demonstrates temporarily powering-off the comparator without freeing it.
|
||||
* \snippet comp.c snippet_cyhal_comp_start_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "cyhal_gpio.h"
|
||||
#include "cy_result.h"
|
||||
#include "cyhal_hw_types.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results_comp Comparator HAL Results
|
||||
* Comparator specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
*/
|
||||
|
||||
/** The requested pins are invalid */
|
||||
#define CYHAL_COMP_RSLT_ERR_INVALID_PIN \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_COMP, 1))
|
||||
/** Bad argument */
|
||||
#define CYHAL_COMP_RSLT_ERR_BAD_ARGUMENT \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_COMP, 2))
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** Comparator event types */
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_COMP_RISING_EDGE = 0x01, //!< Rising edge on comparator output
|
||||
CYHAL_COMP_FALLING_EDGE = 0x02, //!< Falling edge on comparator output
|
||||
} cyhal_comp_event_t;
|
||||
|
||||
/** Configuration options for the Comparator */
|
||||
typedef struct
|
||||
{
|
||||
/** Power mode the comparator should operate in. Lower modes save power but operate at lower speed. */
|
||||
cyhal_power_level_t power;
|
||||
/** Whether hysteresis should be used. See the implementation-specific documentation for the hysteresis value */
|
||||
bool hysteresis;
|
||||
} cyhal_comp_config_t;
|
||||
|
||||
/**
|
||||
* Handler for Comparator events
|
||||
*
|
||||
* \note Not all hardware is capable of differentiating which type of edge triggered an
|
||||
* event when both rising and falling edges are enabled. If the edge cannot be determined,
|
||||
* the `event` argument will be `CYHAL_COMP_RISING_EDGE | CYHAL_COMP_FALLING_EDGE`
|
||||
*/
|
||||
typedef void (*cyhal_comp_event_callback_t)(void *callback_arg, cyhal_comp_event_t event);
|
||||
|
||||
|
||||
/** Initialize the Comparator peripheral.
|
||||
*
|
||||
* @param[out] obj Pointer to a Comparator object. The caller must allocate the memory
|
||||
* for this object but the init function will initialize its contents.
|
||||
* @param[in] vin_p Non-inverting input pin
|
||||
* @param[in] vin_m Inverting input pin
|
||||
* @param[in] output Comparator output pin. May be @ref NC.
|
||||
* @param[in] cfg Configuration structure
|
||||
* @return The status of the init request
|
||||
*/
|
||||
cy_rslt_t cyhal_comp_init(cyhal_comp_t *obj, cyhal_gpio_t vin_p, cyhal_gpio_t vin_m, cyhal_gpio_t output, cyhal_comp_config_t *cfg);
|
||||
|
||||
/** Deinitialize the Comparator peripheral.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
*/
|
||||
void cyhal_comp_free(cyhal_comp_t *obj);
|
||||
|
||||
/** Changes the current operating power level of the comparator.
|
||||
*
|
||||
* If the power level is set to @ref CYHAL_POWER_LEVEL_OFF, the comparator will be powered-off
|
||||
* but it will retain its configuration, so it is not necessary to reconfigure it when changing
|
||||
* the power level from @ref CYHAL_POWER_LEVEL_OFF to any other value.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] power The power level to set
|
||||
* @return The status of the set power request
|
||||
*/
|
||||
cy_rslt_t cyhal_comp_set_power(cyhal_comp_t *obj, cyhal_power_level_t power);
|
||||
|
||||
/** Reconfigure the Comparator.
|
||||
*
|
||||
* This retains the powered state of the comparator.
|
||||
* Depending on the implementation, it may be necessary to temporarily deconfigure and/or
|
||||
* power off the comparator in order to apply the new configuration. However, if the
|
||||
* comparator is powered-off when this function is called, it will remain powered-off after
|
||||
* it returns. Likewise, if the comparator is powered-on when this function is called,
|
||||
* it will remain powered-on after it returns.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] cfg New configuration to apply
|
||||
* @return The status of the configure request
|
||||
*/
|
||||
cy_rslt_t cyhal_comp_configure(cyhal_comp_t *obj, cyhal_comp_config_t *cfg);
|
||||
|
||||
/** Reads the Comparator state.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @return The Comparator state. True if the non-inverting pin voltage is greater than the
|
||||
* inverting pin voltage, false otherwise.
|
||||
*/
|
||||
bool cyhal_comp_read(cyhal_comp_t *obj);
|
||||
|
||||
/** Register/clear a callback handler for Comparator events
|
||||
*
|
||||
* This function will be called when one of the events enabled by \ref cyhal_comp_enable_event occurs.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] callback Function to call when the specified event happens
|
||||
* @param[in] callback_arg Generic argument that will be provided to the handler when called
|
||||
*/
|
||||
void cyhal_comp_register_callback(cyhal_comp_t *obj, cyhal_comp_event_callback_t callback, void *callback_arg);
|
||||
|
||||
/** Enable or Disable a Comparator event
|
||||
*
|
||||
* When an enabled event occurs, the function specified by \ref cyhal_comp_register_callback will be called.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] event Comparator event
|
||||
* @param[in] intr_priority Priority for NVIC interrupt events
|
||||
* @param[in] enable True to turn on event, False to turn off
|
||||
*/
|
||||
void cyhal_comp_enable_event(cyhal_comp_t *obj, cyhal_comp_event_t event, uint8_t intr_priority, bool enable);
|
||||
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CYHAL_COMP_IMPL_HEADER
|
||||
#include CYHAL_COMP_IMPL_HEADER
|
||||
#endif /* CYHAL_COMP_IMPL_HEADER */
|
||||
|
||||
/** \} group_hal_comp */
|
||||
|
|
@ -0,0 +1,109 @@
|
|||
/***************************************************************************//**
|
||||
* \file cyhal_comp_ctb.h
|
||||
*
|
||||
* Provides an implementation of the comp HAL on top of the CTB opamps.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_comp_ctb COMP (CTB Opamps)
|
||||
* \ingroup group_hal_impl
|
||||
* \{
|
||||
* Implementation of the analog comparator (COMP) driver on top of the CTB opamps.
|
||||
*
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cyhal_comp.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** Initialize the Comparator peripheral for a CTB-based comparator.
|
||||
*
|
||||
* @param[out] obj Pointer to a Comparator object. The caller must allocate the memory
|
||||
* for this object but the init function will initialize its contents.
|
||||
* @param[in] vin_p Non-inverting input pin
|
||||
* @param[in] vin_m Inverting input pin
|
||||
* @param[in] output Comparator output pin. May be @ref NC.
|
||||
* @param[in] cfg Configuration structure
|
||||
* @return The status of the init request
|
||||
*/
|
||||
cy_rslt_t _cyhal_comp_ctb_init(cyhal_comp_t *obj, cyhal_gpio_t vin_p, cyhal_gpio_t vin_m, cyhal_gpio_t output, cyhal_comp_config_t *cfg);
|
||||
|
||||
/** Deinitialize the Comparator peripheral for a CTB-based comparator.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
*/
|
||||
void _cyhal_comp_ctb_free(cyhal_comp_t *obj);
|
||||
|
||||
/** Changes the current operating power level of the comparator for a CTB-based comparator.
|
||||
*
|
||||
* If the power level is set to @ref CYHAL_POWER_LEVEL_OFF, the comparator will be powered-off
|
||||
* but it will retain its configuration, so it is not necessary to reconfigure it when changing
|
||||
* the power level from @ref CYHAL_POWER_LEVEL_OFF to any other value.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] power The power level to set
|
||||
* @return The status of the set power request
|
||||
*/
|
||||
cy_rslt_t _cyhal_comp_ctb_set_power(cyhal_comp_t *obj, cyhal_power_level_t power);
|
||||
|
||||
/** Reconfigure the Comparator for a CTB-based comparator.
|
||||
*
|
||||
* This retains the powered state of the comparator.
|
||||
* Depending on the implementation, it may be necessary to temporarily deconfigure and/or
|
||||
* power off the comparator in order to apply the new configuration. However, if the
|
||||
* comparator is powered-off when this function is called, it will remain powered-off after
|
||||
* it returns. Likewise, if the comparator is powered-on when this function is called,
|
||||
* it will remain powered-on after it returns.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] cfg New configuration to apply
|
||||
* @return The status of the configure request
|
||||
*/
|
||||
cy_rslt_t _cyhal_comp_ctb_configure(cyhal_comp_t *obj, cyhal_comp_config_t *cfg);
|
||||
|
||||
/** Reads the Comparator state for a CTB-based comparator.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @return The Comparator state. True if the non-inverting pin voltage is greater than the
|
||||
* inverting pin voltage, false otherwise.
|
||||
*/
|
||||
bool _cyhal_comp_ctb_read(cyhal_comp_t *obj);
|
||||
|
||||
/** Enable or Disable a Comparator event for a CTB-based comparator
|
||||
*
|
||||
* When an enabled event occurs, the function specified by \ref cyhal_comp_register_callback will be called.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] event Comparator event
|
||||
* @param[in] intr_priority Priority for NVIC interrupt events
|
||||
* @param[in] enable True to turn on event, False to turn off
|
||||
*/
|
||||
void _cyhal_comp_ctb_enable_event(cyhal_comp_t *obj, cyhal_comp_event_t event, uint8_t intr_priority, bool enable);
|
||||
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/** \} group_hal_comp */
|
||||
|
|
@ -0,0 +1,109 @@
|
|||
/***************************************************************************//**
|
||||
* \file cyhal_comp_lp.h
|
||||
*
|
||||
* Provides an implementation of the comp HAL on top of the LP (low power) block
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_comp_lp COMP (LP Comparator block)
|
||||
* \ingroup group_hal_impl
|
||||
* \{
|
||||
* Implementation of the analog comparator (COMP) driver on top of the LP (low power) comparator.
|
||||
*
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cyhal_comp.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** Initialize the Comparator peripheral for a LP-based comparator.
|
||||
*
|
||||
* @param[out] obj Pointer to a Comparator object. The caller must allocate the memory
|
||||
* for this object but the init function will initialize its contents.
|
||||
* @param[in] vin_p Non-inverting input pin
|
||||
* @param[in] vin_m Inverting input pin
|
||||
* @param[in] output Comparator output pin. May be @ref NC.
|
||||
* @param[in] cfg Configuration structure
|
||||
* @return The status of the init request
|
||||
*/
|
||||
cy_rslt_t _cyhal_comp_lp_init(cyhal_comp_t *obj, cyhal_gpio_t vin_p, cyhal_gpio_t vin_m, cyhal_gpio_t output, cyhal_comp_config_t *cfg);
|
||||
|
||||
/** Deinitialize the Comparator peripheral for a LP-based comparator.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
*/
|
||||
void _cyhal_comp_lp_free(cyhal_comp_t *obj);
|
||||
|
||||
/** Changes the current operating power level of the comparator for a LP-based comparator.
|
||||
*
|
||||
* If the power level is set to @ref CYHAL_POWER_LEVEL_OFF, the comparator will be powered-off
|
||||
* but it will retain its configuration, so it is not necessary to reconfigure it when changing
|
||||
* the power level from @ref CYHAL_POWER_LEVEL_OFF to any other value.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] power The power level to set
|
||||
* @return The status of the set power request
|
||||
*/
|
||||
cy_rslt_t _cyhal_comp_lp_set_power(cyhal_comp_t *obj, cyhal_power_level_t power);
|
||||
|
||||
/** Reconfigure the Comparator for a LP-based comparator.
|
||||
*
|
||||
* This retains the powered state of the comparator.
|
||||
* Depending on the implementation, it may be necessary to temporarily deconfigure and/or
|
||||
* power off the comparator in order to apply the new configuration. However, if the
|
||||
* comparator is powered-off when this function is called, it will remain powered-off after
|
||||
* it returns. Likewise, if the comparator is powered-on when this function is called,
|
||||
* it will remain powered-on after it returns.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] cfg New configuration to apply
|
||||
* @return The status of the configure request
|
||||
*/
|
||||
cy_rslt_t _cyhal_comp_lp_configure(cyhal_comp_t *obj, cyhal_comp_config_t *cfg);
|
||||
|
||||
/** Reads the Comparator state for a LP-based comparator.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @return The Comparator state. True if the non-inverting pin voltage is greater than the
|
||||
* inverting pin voltage, false otherwise.
|
||||
*/
|
||||
bool _cyhal_comp_lp_read(cyhal_comp_t *obj);
|
||||
|
||||
/** Enable or Disable a Comparator event for a LP-based comparator
|
||||
*
|
||||
* When an enabled event occurs, the function specified by \ref cyhal_comp_register_callback will be called.
|
||||
*
|
||||
* @param[in] obj Comparator object
|
||||
* @param[in] event Comparator event
|
||||
* @param[in] intr_priority Priority for NVIC interrupt events
|
||||
* @param[in] enable True to turn on event, False to turn off
|
||||
*/
|
||||
void _cyhal_comp_lp_enable_event(cyhal_comp_t *obj, cyhal_comp_event_t event, uint8_t intr_priority, bool enable);
|
||||
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/** \} group_hal_comp */
|
||||
|
|
@ -62,9 +62,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_crc CRC HAL Results
|
||||
* CRC specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name CRC Results
|
||||
*/
|
||||
|
||||
/** Invalid argument */
|
||||
|
|
@ -72,7 +73,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_CRC, 0))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** @brief CRC algorithm parameters */
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
/***************************************************************************//**
|
||||
/***************************************************************************//**
|
||||
* \file cyhal_crc_impl.h
|
||||
*
|
||||
* Description:
|
||||
* Provides a high level interface for interacting with the Cypress CRC accelerator.
|
||||
* Provides a high level interface for interacting with the Cypress CRC accelerator.
|
||||
* This is a wrapper around the lower level PDL API.
|
||||
*
|
||||
********************************************************************************
|
||||
|
|
@ -36,7 +36,7 @@ extern "C" {
|
|||
#endif /* __cplusplus */
|
||||
|
||||
// This helper function mirrors the definition of cyhal_crc_start
|
||||
__STATIC_INLINE cy_rslt_t cyhal_crc_start_internal(cyhal_crc_t *obj, const crc_algorithm_t *algorithm)
|
||||
__STATIC_INLINE cy_rslt_t _cyhal_crc_start(cyhal_crc_t *obj, const crc_algorithm_t *algorithm)
|
||||
{
|
||||
CY_ASSERT(NULL != obj);
|
||||
if(NULL == algorithm)
|
||||
|
|
@ -53,10 +53,10 @@ __STATIC_INLINE cy_rslt_t cyhal_crc_start_internal(cyhal_crc_t *obj, const crc_a
|
|||
algorithm->lfsrInitState);
|
||||
}
|
||||
|
||||
#define cyhal_crc_start(obj, algorithm) cyhal_crc_start_internal(obj, algorithm)
|
||||
#define cyhal_crc_start(obj, algorithm) _cyhal_crc_start(obj, algorithm)
|
||||
|
||||
// This helper function mirrors the definition of cyhal_crc_compute
|
||||
__STATIC_INLINE cy_rslt_t cyhal_crc_compute_internal(const cyhal_crc_t *obj, const uint8_t *data, size_t length)
|
||||
__STATIC_INLINE cy_rslt_t _cyhal_crc_compute(const cyhal_crc_t *obj, const uint8_t *data, size_t length)
|
||||
{
|
||||
CY_ASSERT(NULL != obj);
|
||||
if(NULL == data || 0 == length)
|
||||
|
|
@ -65,10 +65,10 @@ __STATIC_INLINE cy_rslt_t cyhal_crc_compute_internal(const cyhal_crc_t *obj, con
|
|||
return Cy_Crypto_Core_Crc_CalcPartial(obj->base, data, length);
|
||||
}
|
||||
|
||||
#define cyhal_crc_compute(obj, data, length) cyhal_crc_compute_internal(obj, data, length)
|
||||
#define cyhal_crc_compute(obj, data, length) _cyhal_crc_compute(obj, data, length)
|
||||
|
||||
// This helper function mirrors the definition of cyhal_crc_finish
|
||||
__STATIC_INLINE cy_rslt_t cyhal_crc_finish_internal(const cyhal_crc_t *obj, uint32_t *crc)
|
||||
__STATIC_INLINE cy_rslt_t _cyhal_crc_finish(const cyhal_crc_t *obj, uint32_t *crc)
|
||||
{
|
||||
CY_ASSERT(NULL != obj);
|
||||
if(NULL == crc)
|
||||
|
|
@ -77,7 +77,7 @@ __STATIC_INLINE cy_rslt_t cyhal_crc_finish_internal(const cyhal_crc_t *obj, uint
|
|||
return Cy_Crypto_Core_Crc_CalcFinish(obj->base, obj->crc_width, crc);
|
||||
}
|
||||
|
||||
#define cyhal_crc_finish(obj, crc) cyhal_crc_finish_internal(obj, crc)
|
||||
#define cyhal_crc_finish(obj, crc) _cyhal_crc_finish(obj, crc)
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
* \file cyhal_crypto_common.h
|
||||
*
|
||||
* Description:
|
||||
* This file provides common defines, addresses, and functions required by drivers
|
||||
* This file provides common defines, addresses, and functions required by drivers
|
||||
* using the Crypto block.
|
||||
*
|
||||
********************************************************************************
|
||||
|
|
@ -51,6 +51,7 @@ typedef enum
|
|||
CYHAL_CRYPTO_COMMON,
|
||||
} cyhal_crypto_feature_t;
|
||||
|
||||
|
||||
/** Reserve the Crypto block and enable it.
|
||||
*
|
||||
* @param[out] base Base address to the Crypto block.
|
||||
|
|
|
|||
|
|
@ -70,9 +70,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_dac DAC HAL Results
|
||||
* DAC specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name DAC Results
|
||||
*/
|
||||
|
||||
/** Bad argument */
|
||||
|
|
@ -81,14 +82,27 @@ extern "C" {
|
|||
/** Failed to initialize DAC */
|
||||
#define CYHAL_DAC_RSLT_FAILED_INIT \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_DAC, 1))
|
||||
/** Reference voltage is not set */
|
||||
#define CYHAL_DAC_RSLT_BAD_REF_VOLTAGE \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_DAC, 2))
|
||||
/** Bad OPAMP instance is selected */
|
||||
#define CYHAL_DAC_RSLT_BAD_OPAMP_INSTANCE \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_DAC, 1))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** Reference choices for the DAC */
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_DAC_REF_VDDA, //!< Analog supply (default)
|
||||
CYHAL_DAC_REF_VREF //!< Internal reference. See the BSP documentation for the reference value.
|
||||
} cyhal_dac_ref_t;
|
||||
|
||||
/** Initialize the DAC peripheral
|
||||
*
|
||||
* Configures the pin used by dac.
|
||||
* By default, the reference will be set to @ref CYHAL_DAC_REF_VDDA.
|
||||
*
|
||||
* @param[out] obj Pointer to a DAC object. The caller must allocate the memory
|
||||
* for this object but the init function will initialize its contents.
|
||||
|
|
@ -106,15 +120,40 @@ cy_rslt_t cyhal_dac_init(cyhal_dac_t *obj, cyhal_gpio_t pin);
|
|||
*/
|
||||
void cyhal_dac_free(cyhal_dac_t *obj);
|
||||
|
||||
/** Set the DAC voltage reference. This determines the highest value that the DAC can output.
|
||||
*
|
||||
* @param obj The DAC object
|
||||
* @param ref The selected voltage reference.
|
||||
* @return The status of the reference selection request
|
||||
*/
|
||||
cy_rslt_t cyhal_dac_set_reference(cyhal_dac_t *obj, cyhal_dac_ref_t ref);
|
||||
|
||||
/** Set the output voltage, as a normalized unsigned 16-bit value
|
||||
* (where 0 is the lowest value the DAC can output and 0xFFFF
|
||||
* is the highest)
|
||||
*
|
||||
* @note While the input value is 16 bits, the actual resolution that can be achieved
|
||||
* is dependent on what the underlying hardware supports. See the device datasheet for details.
|
||||
*
|
||||
* @param[in] obj The dac object
|
||||
* @param[in] value The 16-bit output value to set
|
||||
*/
|
||||
void cyhal_dac_write(const cyhal_dac_t *obj, uint16_t value);
|
||||
|
||||
/** Set the output voltage, as an unsigned number of millivolts.
|
||||
*
|
||||
* @note Depending on the resolution of the underlying hardware, it may not
|
||||
* be possible to achieve the precise voltage requested. See the device datasheet
|
||||
* for more details about the DAC resolution.
|
||||
*
|
||||
* It is an error to specify a value that is outside of the DAC's operating range.
|
||||
*
|
||||
* @param[in] obj The dac object
|
||||
* @param[in] value The number of millivolts to output set.
|
||||
* @return The status of the write request.
|
||||
*/
|
||||
cy_rslt_t cyhal_dac_write_mv(const cyhal_dac_t *obj, uint16_t value);
|
||||
|
||||
/** Read the current DAC output voltage setting, as a normalized unsigned
|
||||
* 16-bit value (where 0 is the lowest value the DAC can output and 0xFFFF
|
||||
* is the highest).
|
||||
|
|
@ -126,6 +165,18 @@ void cyhal_dac_write(const cyhal_dac_t *obj, uint16_t value);
|
|||
*/
|
||||
uint16_t cyhal_dac_read(cyhal_dac_t *obj);
|
||||
|
||||
/** Changes the current operating power level of the DAC.
|
||||
*
|
||||
* If the power level is set to @ref CYHAL_POWER_LEVEL_OFF, the DAC will be powered-off
|
||||
* but it will retain its configuration, so it is not necessary to reconfigure it when changing
|
||||
* the power level from @ref CYHAL_POWER_LEVEL_OFF to any other value.
|
||||
*
|
||||
* @param[in] obj dac object
|
||||
* @param[in] power The power level to set
|
||||
* @return The status of the set power request
|
||||
*/
|
||||
cy_rslt_t cyhal_dac_set_power(cyhal_dac_t *obj, cyhal_power_level_t power);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -37,14 +37,16 @@ extern "C" {
|
|||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6_deprecated Deprecated
|
||||
* \ingroup group_hal_psoc6
|
||||
* \addtogroup group_hal_impl_deprecated Deprecated
|
||||
* \ingroup group_hal_impl
|
||||
* \{
|
||||
* The following PSoC 6 specific items have been deprecated and replaced by more generic item. Each item
|
||||
* The following PSoC 6 specific items have been deprecated and replaced by more generic items. Each item
|
||||
* will continue to work for now, but will be removed in a future release. All deprecated items reference
|
||||
* the item that replaces it.
|
||||
*/
|
||||
|
||||
/** An error occurred in System module */
|
||||
#define CYHAL_SYSTEM_RSLT_ERROR (CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_SYSTEM , 0))
|
||||
/** An error occurred in System module */
|
||||
#define CYHAL_SYSTEM_RSLT_INVALID_CLK_DIVIDER (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_SYSTEM , 1))
|
||||
/** An error occurred in System module */
|
||||
|
|
@ -54,6 +56,17 @@ extern "C" {
|
|||
/** An error occurred in System module */
|
||||
#define CYHAL_SYSTEM_RSLT_NO_VALID_DIVIDER (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_SYSTEM , 4))
|
||||
|
||||
/**
|
||||
* Attempts to put the device to sleep until an interrupt wakes it up.
|
||||
* \warning This function is deprecated. Use \ref cyhal_syspm_sleep instead.
|
||||
*/
|
||||
#define cyhal_system_sleep() Cy_SysPm_CpuEnterSleep(CY_SYSPM_WAIT_FOR_INTERRUPT)
|
||||
/**
|
||||
* Attempts to put the device into deep sleep until an interrupt wakes it up.
|
||||
* \warning This function is deprecated. Use \ref cyhal_syspm_deepsleep instead.
|
||||
*/
|
||||
#define cyhal_system_deepsleep() Cy_SysPm_CpuEnterDeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT)
|
||||
|
||||
/** Enum for clock type to configure. HFCLKs are configured using different APIs and does not using this enum.
|
||||
* \warning This type is deprecated. Use \ref cyhal_clock_block_t instead.
|
||||
*/
|
||||
|
|
@ -129,7 +142,41 @@ cy_rslt_t cyhal_system_clock_set_frequency(uint8_t clock, uint32_t frequency_hz)
|
|||
*/
|
||||
cy_rslt_t cyhal_system_clock_set_divider(cyhal_system_clock_t clock, cyhal_system_divider_t divider) /* __attribute__ ((deprecated)) */;
|
||||
|
||||
/** \} group_hal_psoc6_deprecated */
|
||||
/** Register the specified handler with the power manager to be notified of power
|
||||
* state changes.
|
||||
* \warning This function is deprecated. Use \ref cyhal_syspm_register_callback() instead.
|
||||
*
|
||||
* @param[in] callback The callback configuration data
|
||||
* @return The status of the register_callback request
|
||||
*/
|
||||
cy_rslt_t cyhal_system_register_callback(cyhal_system_callback_t *callback);
|
||||
|
||||
/** Removes the registered handler from the power manager so no future notifications are made.
|
||||
*
|
||||
* \warning This function is deprecated. Use \ref cyhal_syspm_unregister_callback() instead.
|
||||
*
|
||||
* @param[in] callback The callback configuration data
|
||||
* @return The status of the unregister_callback request
|
||||
*/
|
||||
cy_rslt_t cyhal_system_unregister_callback(cyhal_system_callback_t const *callback);
|
||||
|
||||
/** Initialize a single-ended ADC channel.
|
||||
*
|
||||
* \warning This function is deprecated. Use \ref cyhal_adc_channel_init_diff() instead with
|
||||
* @ref CYHAL_ADC_VNEG specified for the `vminus` argument.
|
||||
*
|
||||
* Configures the pin used by ADC.
|
||||
* @param[out] obj The adc channel object to initialize
|
||||
* @param[in] adc The adc for which the channel should be initialized
|
||||
* @param[in] pin The adc pin name
|
||||
* @return The status of the init request. The status of the init request.
|
||||
* On failure, a problem specific error code will be returned.
|
||||
* This error could be from the HAL or lower level driver.<br>
|
||||
* For all other return codes, please refer to device driver documentation available in the BSP landing page
|
||||
*/
|
||||
cy_rslt_t cyhal_adc_channel_init(cyhal_adc_channel_t *obj, cyhal_adc_t* adc, cyhal_gpio_t pin);
|
||||
|
||||
/** \} group_hal_impl_deprecated */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -88,9 +88,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_dma DMA HAL Results
|
||||
* DMA specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name DMA Results
|
||||
*/
|
||||
|
||||
/** Invalid transfer width parameter error */
|
||||
|
|
@ -119,7 +120,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_FATAL, CYHAL_RSLT_MODULE_DMA, 7))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** Direction for DMA transfers. */
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
#include "cyhal_dma.h"
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6_dma_dmac DMAC (Direct Memory Access Controller)
|
||||
* \ingroup group_hal_psoc6_dma
|
||||
* \addtogroup group_hal_impl_dma_dmac DMAC (Direct Memory Access Controller)
|
||||
* \ingroup group_hal_impl_dma
|
||||
* \{
|
||||
* Implementation specific interface for using the DMAC DMA peripheral
|
||||
*/
|
||||
|
|
@ -45,29 +45,29 @@ extern "C" {
|
|||
* @param[in] priority The priority of this DMA operation relative to others. Values must be between 0-3 with 0 being the highest priority.
|
||||
* @return The status of the init request
|
||||
*/
|
||||
cy_rslt_t cyhal_dma_init_dmac(cyhal_dma_t *obj, uint8_t priority);
|
||||
cy_rslt_t _cyhal_dma_dmac_init(cyhal_dma_t *obj, uint8_t priority);
|
||||
|
||||
/** Frees the DMAC specific object
|
||||
/** Frees the DMAC specific object
|
||||
*
|
||||
* @param[in,out] obj The DMA object
|
||||
*/
|
||||
void cyhal_dma_free_dmac(cyhal_dma_t *obj);
|
||||
void _cyhal_dma_dmac_free(cyhal_dma_t *obj);
|
||||
|
||||
/** Setup a DMAC descriptor for the dma resource
|
||||
/** Setup a DMAC descriptor for the dma resource
|
||||
*
|
||||
* @param[in] obj The DMA object
|
||||
* @param[in] cfg Configuration parameters for the transfer
|
||||
* @return The status of the configure request
|
||||
*/
|
||||
cy_rslt_t cyhal_dma_configure_dmac(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg);
|
||||
cy_rslt_t _cyhal_dma_dmac_configure(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg);
|
||||
|
||||
/** Start a DMAC transfer
|
||||
/** Start a DMAC transfer
|
||||
*
|
||||
* Initiates DMA channel transfer for specified DMA object
|
||||
* @param[in] obj The DMA object
|
||||
* @return The status of the start_transfer request
|
||||
*/
|
||||
cy_rslt_t cyhal_dma_start_transfer_dmac(cyhal_dma_t *obj);
|
||||
cy_rslt_t _cyhal_dma_dmac_start_transfer(cyhal_dma_t *obj);
|
||||
|
||||
/** Configure DMAC event enablement.
|
||||
*
|
||||
|
|
@ -76,14 +76,14 @@ cy_rslt_t cyhal_dma_start_transfer_dmac(cyhal_dma_t *obj);
|
|||
* @param[in] intr_priority The priority for NVIC interrupt events. The priority from the most recent call will take precedence, i.e all events will have the same priority.
|
||||
* @param[in] enable True to turn on interrupts, False to turn off
|
||||
*/
|
||||
void cyhal_dma_enable_event_dmac(cyhal_dma_t *obj, cyhal_dma_event_t event, uint8_t intr_priority, bool enable);
|
||||
void _cyhal_dma_dmac_enable_event(cyhal_dma_t *obj, cyhal_dma_event_t event, uint8_t intr_priority, bool enable);
|
||||
|
||||
/** Checks whether a transfer is pending or running on the DMA channel
|
||||
*
|
||||
* @param[in] obj The DMA object
|
||||
* @return True if DMA channel is busy
|
||||
*/
|
||||
bool cyhal_dma_is_busy_dmac(cyhal_dma_t *obj);
|
||||
bool _cyhal_dma_dmac_is_busy(cyhal_dma_t *obj);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
@ -91,4 +91,4 @@ bool cyhal_dma_is_busy_dmac(cyhal_dma_t *obj);
|
|||
|
||||
#endif /* CY_IP_M4CPUSS_DMAC */
|
||||
|
||||
/** \} group_hal_psoc6_dma_dmac */
|
||||
/** \} group_hal_impl_dma_dmac */
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
#include "cyhal_dma.h"
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6_dma_dw DW (Datawire)
|
||||
* \ingroup group_hal_psoc6_dma
|
||||
* \addtogroup group_hal_impl_dma_dw DW (Datawire)
|
||||
* \ingroup group_hal_impl_dma
|
||||
* \{
|
||||
* Implementation specific interface for using the Datawire DMA peripheral
|
||||
*/
|
||||
|
|
@ -39,19 +39,19 @@
|
|||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** Initialize the Datawire peripheral.
|
||||
/** Initialize the Datawire peripheral.
|
||||
*
|
||||
* @param[out] obj The DMA object to initialize
|
||||
* @param[in] priority The priority of this DMA operation relative to others. Values must be between 0-3 with 0 being the highest priority.
|
||||
* @return The status of the init request
|
||||
*/
|
||||
cy_rslt_t cyhal_dma_init_dw(cyhal_dma_t *obj, uint8_t priority);
|
||||
cy_rslt_t _cyhal_dma_dw_init(cyhal_dma_t *obj, uint8_t priority);
|
||||
|
||||
/** Frees the Datawire specific DMA object
|
||||
/** Frees the Datawire specific DMA object
|
||||
*
|
||||
* @param[in,out] obj The DMA object
|
||||
*/
|
||||
void cyhal_dma_free_dw(cyhal_dma_t *obj);
|
||||
void _cyhal_dma_dw_free(cyhal_dma_t *obj);
|
||||
|
||||
/** Setup a Datawire descriptor for the dma resource
|
||||
*
|
||||
|
|
@ -59,15 +59,15 @@ void cyhal_dma_free_dw(cyhal_dma_t *obj);
|
|||
* @param[in] cfg Configuration prameters for the transfer
|
||||
* @return The status of the configure request
|
||||
*/
|
||||
cy_rslt_t cyhal_dma_configure_dw(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg);
|
||||
cy_rslt_t _cyhal_dma_dw_configure(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg);
|
||||
|
||||
/** Start a Datawire transfer
|
||||
/** Start a Datawire transfer
|
||||
*
|
||||
* Initiates DMA channel transfer for specified DMA object
|
||||
* @param[in] obj The DMA object
|
||||
* @return The status of the start_transfer request
|
||||
*/
|
||||
cy_rslt_t cyhal_dma_start_transfer_dw(cyhal_dma_t *obj);
|
||||
cy_rslt_t _cyhal_dma_dw_start_transfer(cyhal_dma_t *obj);
|
||||
|
||||
/** Configure Datawire event enablement.
|
||||
*
|
||||
|
|
@ -76,14 +76,14 @@ cy_rslt_t cyhal_dma_start_transfer_dw(cyhal_dma_t *obj);
|
|||
* @param[in] intr_priority The priority for NVIC interrupt events. The priority from the most recent call will take precedence, i.e all events will have the same priority.
|
||||
* @param[in] enable True to turn on interrupts, False to turn off
|
||||
*/
|
||||
void cyhal_dma_enable_event_dw(cyhal_dma_t *obj, cyhal_dma_event_t event, uint8_t intr_priority, bool enable);
|
||||
void _cyhal_dma_dw_enable_event(cyhal_dma_t *obj, cyhal_dma_event_t event, uint8_t intr_priority, bool enable);
|
||||
|
||||
/** Checks whether a transfer is pending or running on the DMA channel
|
||||
*
|
||||
* @param[in] obj The DMA object
|
||||
* @return True if DMA channel is busy
|
||||
*/
|
||||
bool cyhal_dma_is_busy_dw(cyhal_dma_t *obj);
|
||||
bool _cyhal_dma_dw_is_busy(cyhal_dma_t *obj);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
@ -91,4 +91,4 @@ bool cyhal_dma_is_busy_dw(cyhal_dma_t *obj);
|
|||
|
||||
#endif /* CY_IP_M4CPUSS_DMA */
|
||||
|
||||
/** \} group_hal_psoc6_dma_dw */
|
||||
/** \} group_hal_impl_dma_dw */
|
||||
|
|
|
|||
|
|
@ -30,8 +30,8 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_psoc6_dma DMA (Direct Memory Access)
|
||||
* \ingroup group_hal_psoc6
|
||||
/** \addtogroup group_hal_impl_dma DMA (Direct Memory Access)
|
||||
* \ingroup group_hal_impl
|
||||
* \{
|
||||
* DW (DataWire) is one of two DMA hardware implementations for PSOC6. DW is
|
||||
* designed for low latency memory to peripheral or peripheral to memory
|
||||
|
|
@ -60,11 +60,11 @@ extern "C" {
|
|||
/** \cond INTERNAL */
|
||||
/** Hal-Triggers uses bit 8 to denote a one to one trigger, whereas, the PDL
|
||||
* SwTrigger function uses bit 5 to denote a one to one trigger. */
|
||||
#define HAL_TRIGGERS_1TO1_MASK (0x80)
|
||||
#define PDL_TRIGGERS_1TO1_MASK (0x10)
|
||||
#define _CYHAL_DMA_TRIGGERS_1TO1_MASK (0x80)
|
||||
#define _CYHAL_DMA_PDL_TRIGGERS_1TO1_MASK (0x10)
|
||||
/** \endcond */
|
||||
|
||||
/** \} group_hal_psoc6_dma */
|
||||
/** \} group_hal_impl_dma */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,55 @@
|
|||
/*******************************************************************************
|
||||
* File Name: cyhal_drivers.h
|
||||
*
|
||||
* Description:
|
||||
* Implementation specific HAL header file that pulls in all driver files that are
|
||||
* applicable for this implementation.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2018-2020 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cyhal_adc.h"
|
||||
#include "cyhal_clock.h"
|
||||
#include "cyhal_crc.h"
|
||||
#include "cyhal_dac.h"
|
||||
#include "cyhal_dma.h"
|
||||
#include "cyhal_ezi2c.h"
|
||||
#include "cyhal_flash.h"
|
||||
#include "cyhal_gpio.h"
|
||||
#include "cyhal_hwmgr.h"
|
||||
#include "cyhal_i2c.h"
|
||||
#include "cyhal_i2s.h"
|
||||
#include "cyhal_interconnect.h"
|
||||
#include "cyhal_lptimer.h"
|
||||
#include "cyhal_opamp.h"
|
||||
#include "cyhal_pdmpcm.h"
|
||||
#include "cyhal_pwm.h"
|
||||
#include "cyhal_qspi.h"
|
||||
#include "cyhal_rtc.h"
|
||||
#include "cyhal_sdhc.h"
|
||||
#include "cyhal_sdio.h"
|
||||
#include "cyhal_spi.h"
|
||||
#include "cyhal_syspm.h"
|
||||
#include "cyhal_system.h"
|
||||
#include "cyhal_timer.h"
|
||||
#include "cyhal_trng.h"
|
||||
#include "cyhal_uart.h"
|
||||
#include "cyhal_usb_dev.h"
|
||||
#include "cyhal_wdt.h"
|
||||
|
|
@ -78,9 +78,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_ezi2c EZI2C HAL Results
|
||||
* EZI2C specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name EZI2C Results
|
||||
*/
|
||||
|
||||
/** The requested resource type is invalid */
|
||||
|
|
@ -97,7 +98,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_EZI2C, 3))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** CYHAL_EZI2C_EVENT_NONE event is deprecated and that CYHAL_EZI2C_STATUS_OK should be used instead */
|
||||
|
|
@ -110,7 +111,7 @@ typedef enum
|
|||
CYHAL_EZI2C_SUB_ADDR16_BITS /**< Sub-address is 16 bits */
|
||||
} cyhal_ezi2c_sub_addr_size_t;
|
||||
|
||||
/** Size of Sub-Address */
|
||||
/** Data rate of the slave */
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_EZI2C_DATA_RATE_100KHZ = 100000,
|
||||
|
|
|
|||
|
|
@ -96,9 +96,10 @@ extern "C" {
|
|||
* Defines
|
||||
*******************************************************************************/
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_flash Flash HAL Results
|
||||
* Flash specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name Flash Results
|
||||
*/
|
||||
|
||||
/** Invalid argument */
|
||||
|
|
@ -106,7 +107,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_FLASH, 0))
|
||||
/** Unable to support due to power state */
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** @brief Information about a single block of flash memory */
|
||||
|
|
|
|||
|
|
@ -77,19 +77,42 @@ enum cyhal_rslt_module_chip
|
|||
CYHAL_RSLT_MODULE_PDMPCM = (0x0F << 8), //!< An error occurred in PDM/PCM module
|
||||
CYHAL_RSLT_MODULE_PWM = (0x10 << 8), //!< An error occurred in PWM module
|
||||
CYHAL_RSLT_MODULE_QSPI = (0x11 << 8), //!< An error occurred in QSPI module
|
||||
CYHAL_RSLT_MODULE_RTC = (0x12 << 8), //!< An error occurred in RTC module
|
||||
CYHAL_RSLT_MODULE_SDHC = (0x13 << 8), //!< An error occurred in SDHC module
|
||||
CYHAL_RSLT_MODULE_SDIO = (0x14 << 8), //!< An error occurred in SDIO module
|
||||
CYHAL_RSLT_MODULE_SPI = (0x15 << 8), //!< An error occurred in SPI module
|
||||
CYHAL_RSLT_MODULE_SYSPM = (0x16 << 8), //!< An error occurred in SysPM module
|
||||
CYHAL_RSLT_MODULE_SYSTEM = (0x17 << 8), //!< An error occurred in System module
|
||||
CYHAL_RSLT_MODULE_TIMER = (0x18 << 8), //!< An error occurred in Timer module
|
||||
CYHAL_RSLT_MODULE_TRNG = (0x19 << 8), //!< An error occurred in RNG module
|
||||
CYHAL_RSLT_MODULE_UART = (0x1A << 8), //!< An error occurred in UART module
|
||||
CYHAL_RSLT_MODULE_USB = (0x1B << 8), //!< An error occurred in USB module
|
||||
CYHAL_RSLT_MODULE_WDT = (0x1C << 8), //!< An error occurred in WDT module
|
||||
CYHAL_RSLT_MODULE_QUADDEC = (0x12 << 8), //!< An error occurred in Quadrature Decoder module
|
||||
CYHAL_RSLT_MODULE_RTC = (0x13 << 8), //!< An error occurred in RTC module
|
||||
CYHAL_RSLT_MODULE_SDHC = (0x14 << 8), //!< An error occurred in SDHC module
|
||||
CYHAL_RSLT_MODULE_SDIO = (0x15 << 8), //!< An error occurred in SDIO module
|
||||
CYHAL_RSLT_MODULE_SPI = (0x16 << 8), //!< An error occurred in SPI module
|
||||
CYHAL_RSLT_MODULE_SYSPM = (0x17 << 8), //!< An error occurred in SysPM module
|
||||
CYHAL_RSLT_MODULE_SYSTEM = (0x18 << 8), //!< An error occurred in System module
|
||||
CYHAL_RSLT_MODULE_TIMER = (0x19 << 8), //!< An error occurred in Timer module
|
||||
CYHAL_RSLT_MODULE_TRNG = (0x1A << 8), //!< An error occurred in RNG module
|
||||
CYHAL_RSLT_MODULE_UART = (0x1B << 8), //!< An error occurred in UART module
|
||||
CYHAL_RSLT_MODULE_USB = (0x1C << 8), //!< An error occurred in USB module
|
||||
CYHAL_RSLT_MODULE_WDT = (0x1D << 8), //!< An error occurred in WDT module
|
||||
};
|
||||
|
||||
/**
|
||||
* Enum to specify all of the digital output signals supported by different hardware peripherals. These can be used
|
||||
* as inputs to other peripherals if the selected device has internal routing resources.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CYHAL_SIGNAL_DMA_COMPLETE, //!< DMA complete signal
|
||||
|
||||
CYHAL_SIGNAL_PWM_OUT, //!< PWM output signal
|
||||
CYHAL_SIGNAL_PWM_OUT_INV, //!< PWM output signal inverted
|
||||
CYHAL_SIGNAL_PWM_OVERFLOW, //!< PWM overflow signal
|
||||
CYHAL_SIGNAL_PWM_UNDERFLOW, //!< PWM underflow signal
|
||||
CYHAL_SIGNAL_PWM_COMPARE, //!< PWM period match signal
|
||||
|
||||
CYHAL_SIGNAL_TIMER_OVERFLOW, //!< Timer overflow signal
|
||||
CYHAL_SIGNAL_TIMER_UNDERFLOW, //!< Timer underflow signal
|
||||
CYHAL_SIGNAL_TIMER_CAPTURE, //!< Timer capture match signal
|
||||
|
||||
CYHAL_SIGNAL_QUADDEC_TC, //!< Quadrature Decoder terminal count signal. High on index event,
|
||||
//!< or when counter reaches min/max value.
|
||||
} cyhal_signal_digital_out_t;
|
||||
|
||||
/**
|
||||
* \} group_hal_results
|
||||
*/
|
||||
|
|
@ -102,6 +125,35 @@ typedef enum {
|
|||
CYHAL_ASYNC_SW,
|
||||
} cyhal_async_mode_t;
|
||||
|
||||
/** @brief Selectable power levels.
|
||||
*
|
||||
* Power levels are defined relative to others. Higher power levels
|
||||
* offer better performance but consume more power.
|
||||
*
|
||||
* Not all hardware supports four discrete power levels. If fewer
|
||||
* power levels are supported, the values will be mapped as follows:
|
||||
* | 4 Levels | 3 Levels | 2 Levels |
|
||||
* | ---------------| -------------- | ----------------------------- |
|
||||
* | Off | Off | Off |
|
||||
* | Low | Low = Medium | Low = Medium = High = Default |
|
||||
* | Medium | High = Default | |
|
||||
* | High = Default | | |
|
||||
* See the implementation specific documentation for details.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
/** Power-off the comparator, while retaining configuration */
|
||||
CYHAL_POWER_LEVEL_OFF,
|
||||
/** Low comparator power and speed */
|
||||
CYHAL_POWER_LEVEL_LOW,
|
||||
/** Medium comparator power and speed */
|
||||
CYHAL_POWER_LEVEL_MEDIUM,
|
||||
/** High comparator power and speed */
|
||||
CYHAL_POWER_LEVEL_HIGH,
|
||||
/** Default comparator power and speed */
|
||||
CYHAL_POWER_LEVEL_DEFAULT
|
||||
} cyhal_power_level_t;
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_syspm System Power Management
|
||||
* \ingroup group_hal
|
||||
|
|
@ -182,7 +234,7 @@ typedef struct cyhal_syspm_callback_data
|
|||
} cyhal_syspm_callback_data_t;
|
||||
|
||||
/**
|
||||
* \} group_hal_syspm_apis
|
||||
* \} group_hal_syspm
|
||||
*/
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
#include "cyhal_utils.h"
|
||||
#include "cy_utils.h"
|
||||
|
||||
#ifdef CY_IP_MXS40IOSS
|
||||
#if defined(CY_IP_MXS40IOSS) || defined(CY_IP_M0S8IOSS)
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
|
|
@ -70,4 +70,4 @@ __STATIC_INLINE void cyhal_gpio_toggle_internal(cyhal_gpio_t pin)
|
|||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* CY_IP_MXS40IOSS */
|
||||
#endif /* defined(CY_IP_MXS40IOSS) || defined(CY_IP_M0S8IOSS) */
|
||||
|
|
|
|||
|
|
@ -23,8 +23,8 @@
|
|||
*******************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6_hw_types
|
||||
* \ingroup group_hal_psoc6
|
||||
* \addtogroup group_hal_impl_hw_types
|
||||
* \ingroup group_hal_impl
|
||||
* \{
|
||||
*/
|
||||
|
||||
|
|
@ -140,4 +140,4 @@ typedef struct
|
|||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** \} group_hal_psoc6_hw_types */
|
||||
/** \} group_hal_impl_hw_types */
|
||||
|
|
|
|||
|
|
@ -23,57 +23,59 @@
|
|||
*******************************************************************************/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6 PSoC 6 Implementation Specific
|
||||
* \addtogroup group_hal_impl PSoC 6 Implementation Specific
|
||||
* \{
|
||||
* This section provides details about the PSoC 6 implementation of the Cypress HAL.
|
||||
* All information within this section is platform specific and is provided for reference.
|
||||
* Portable application code should depend only on the APIs and types which are documented
|
||||
* in the @ref group_hal section.
|
||||
*
|
||||
* \section group_hal_psoc6_mapping HAL Resource Hardware Mapping
|
||||
* \section group_hal_impl_mapping HAL Resource Hardware Mapping
|
||||
* The following table shows a mapping of each HAL driver to the lower level firmware driver
|
||||
* and the corresponding hardware resource. This is intended to help understand how the HAL
|
||||
* is implemented for PSoC 6 and what features the underlying hardware supports.
|
||||
*
|
||||
* | HAL Resource | PDL Driver(s) | PSoC 6 Hardware |
|
||||
* | ---------------- | ------------------- | -------------------------------- |
|
||||
* | ADC | cy_adc | SAR ADC |
|
||||
* | Clock | cy_sysclk | All clocks (system & peripheral) |
|
||||
* | CRC | cy_crypto_core_crc | Crypto |
|
||||
* | DAC | cy_ctdac | DAC |
|
||||
* | DMA | cy_dma, cy_dmac | DMA Controller |
|
||||
* | EZI2C | cy_scb_ezi2c | SCB |
|
||||
* | Flash | cy_flash | Flash |
|
||||
* | GPIO | cy_gpio | GPIO |
|
||||
* | Hardware Manager | NA | NA |
|
||||
* | I2C | cy_scb_i2c | SCB |
|
||||
* | I2S | cy_i2s | I2S |
|
||||
* | LPTimer | cy_mcwdt | MCWDT |
|
||||
* | PDM/PCM | cy_pdm_pcm | PDM-PCM |
|
||||
* | PWM | cy_pwm | TCPWM |
|
||||
* | QSPI | cy_smif | QSPI (SMIF) |
|
||||
* | RTC | cy_rtc | RTC |
|
||||
* | SDHC | cy_sd_host | SD Host |
|
||||
* | SDIO | cy_sd_host, or NA | SD Host, or UDB |
|
||||
* | SPI | cy_scb_spi | SCB |
|
||||
* | SysPM | cy_syspm | System Power Resources |
|
||||
* | System | cy_syslib | System Resources |
|
||||
* | Timer | cy_tcpwm_counter | TCPWM |
|
||||
* | TRNG | cy_crypto_core_trng | Crypto |
|
||||
* | UART | cy_scb_uart | SCB |
|
||||
* | USB Device | cy_usbfs_dev_drv | USB-FS |
|
||||
* | WDT | cy_wdt | WDT |
|
||||
* | HAL Resource | PDL Driver(s) | PSoC 6 Hardware |
|
||||
* | ------------------ | ------------------- | -------------------------------- |
|
||||
* | ADC | cy_adc | SAR ADC |
|
||||
* | Clock | cy_sysclk | All clocks (system & peripheral) |
|
||||
* | Comparator | cy_ctb or cy_lpcomp | CTBm or LPComp |
|
||||
* | CRC | cy_crypto_core_crc | Crypto |
|
||||
* | DAC | cy_ctdac | DAC |
|
||||
* | DMA | cy_dma, cy_dmac | DMA Controller |
|
||||
* | EZ-I2C | cy_scb_ezi2c | SCB |
|
||||
* | Flash | cy_flash | Flash |
|
||||
* | GPIO | cy_gpio | GPIO |
|
||||
* | Hardware Manager | NA | NA |
|
||||
* | I2C | cy_scb_i2c | SCB |
|
||||
* | I2S | cy_i2s | I2S |
|
||||
* | LPTimer | cy_mcwdt | MCWDT |
|
||||
* | Opamp | cy_ctb | CTBm |
|
||||
* | PDM/PCM | cy_pdm_pcm | PDM-PCM |
|
||||
* | PWM | cy_pwm | TCPWM |
|
||||
* | QSPI | cy_smif | QSPI (SMIF) |
|
||||
* | RTC | cy_rtc | RTC |
|
||||
* | SDHC | cy_sd_host | SD Host |
|
||||
* | SDIO | cy_sd_host, or NA | SD Host, or UDB |
|
||||
* | SPI | cy_scb_spi | SCB |
|
||||
* | SysPM | cy_syspm | System Power Resources |
|
||||
* | System | cy_syslib | System Resources |
|
||||
* | Timer | cy_tcpwm_counter | TCPWM |
|
||||
* | TRNG | cy_crypto_core_trng | Crypto |
|
||||
* | UART | cy_scb_uart | SCB |
|
||||
* | USB Device | cy_usbfs_dev_drv | USB-FS |
|
||||
* | WDT | cy_wdt | WDT |
|
||||
*
|
||||
* \section group_hal_psoc6_errors Device Specific Errors
|
||||
* \section group_hal_impl_errors Device Specific Errors
|
||||
* Error codes generated by the low level level PDL driver all use module IDs starting
|
||||
* with \ref CY_RSLT_MODULE_DRIVERS_PDL_BASE. The exact errors are documented for each
|
||||
* driver in the
|
||||
* <a href="https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html">
|
||||
* psoc6pdl documentation</a>.
|
||||
* <a href="https://cypresssemiconductorco.github.io/mtb-pdl-cat1/pdl_api_reference_manual/html/index.html">
|
||||
* mtb-pdl-cat1 documentation</a>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \addtogroup group_hal_psoc6_hw_types PSoC 6 Specific Hardware Types
|
||||
* \addtogroup group_hal_impl_hw_types PSoC 6 Specific Hardware Types
|
||||
* \{
|
||||
* Aliases for types which are part of the public HAL interface but whose representations
|
||||
* need to vary per HAL implementation
|
||||
|
|
@ -108,10 +110,12 @@ extern "C" {
|
|||
* \cond INTERNAL
|
||||
*/
|
||||
|
||||
#define CYHAL_ADC_IMPL_HEADER "cyhal_adc_impl.h" //!< Implementation specific header for ADC
|
||||
#define CYHAL_CRC_IMPL_HEADER "cyhal_crc_impl.h" //!< Implementation specific header for CRC
|
||||
#define CYHAL_DMA_IMPL_HEADER "cyhal_dma_impl.h" //!< Implementation specific header for DMA
|
||||
#define CYHAL_CLOCK_IMPL_HEADER "cyhal_clock_impl.h" //!< Implementation specific header for Clocks
|
||||
#define CYHAL_GPIO_IMPL_HEADER "cyhal_gpio_impl.h" //!< Implementation specific header for GPIO
|
||||
#define CYHAL_PDMPCM_IMPL_HEADER "cyhal_pdmpcm_impl.h" //!< Implementation specific header for PDMPCM
|
||||
#define CYHAL_PWM_IMPL_HEADER "cyhal_pwm_impl.h" //!< Implementation specific header for PWM
|
||||
#define CYHAL_SYSTEM_IMPL_HEADER "cyhal_system_impl.h" //!< Implementation specific header for System
|
||||
#define CYHAL_SYSPM_IMPL_HEADER "cyhal_syspm_impl.h" //!< Implementation specific header for System Power Management
|
||||
|
|
@ -140,92 +144,20 @@ typedef struct {
|
|||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct cyhal_tcpwm_common {
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXTCPWM
|
||||
TCPWM_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_gpio_t pin;
|
||||
cyhal_clock_t clock;
|
||||
bool dedicated_clock;
|
||||
uint32_t clock_hz;
|
||||
cyhal_event_callback_data_t callback_data;
|
||||
cyhal_gpio_t pin_compl; /* PWM Only */
|
||||
uint32_t default_value; /* Timer only */
|
||||
#else
|
||||
void *empty
|
||||
#endif
|
||||
} cyhal_tcpwm_common_t;
|
||||
|
||||
/**
|
||||
* @brief ADC object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXS40PASS_SAR
|
||||
SAR_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_clock_t clock;
|
||||
bool dedicated_clock;
|
||||
// channel_used is a bit field. The maximum channel count
|
||||
// supported by the SAR IP is 16
|
||||
uint16_t channel_used;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_adc_t;
|
||||
|
||||
/**
|
||||
* @brief ADC channel object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXS40PASS_SAR
|
||||
cyhal_adc_t* adc;
|
||||
cyhal_gpio_t pin;
|
||||
uint8_t channel_idx;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_adc_channel_t;
|
||||
|
||||
/**
|
||||
* @brief CRC object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#if defined(CY_IP_MXCRYPTO_INSTANCES) || defined(CPUSS_CRYPTO_PRESENT)
|
||||
CRYPTO_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
uint32_t crc_width;
|
||||
#endif
|
||||
} cyhal_crc_t;
|
||||
|
||||
/**
|
||||
* @brief DAC object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXS40PASS_CTDAC
|
||||
CTDAC_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_gpio_t pin;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_dac_t;
|
||||
} cyhal_tcpwm_t;
|
||||
|
||||
/* This is presented out of order because many other structs depend on it */
|
||||
/**
|
||||
* @brief DMA object
|
||||
*
|
||||
|
|
@ -270,6 +202,133 @@ typedef struct {
|
|||
#endif
|
||||
} cyhal_dma_t;
|
||||
|
||||
struct _cyhal_adc_channel_s;
|
||||
|
||||
/**
|
||||
* @brief ADC object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXS40PASS_SAR
|
||||
SAR_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_clock_t clock;
|
||||
bool dedicated_clock;
|
||||
bool continuous_scanning;
|
||||
/* Has at least one conversion completed since the last configuration change */
|
||||
volatile bool conversion_complete;
|
||||
struct _cyhal_adc_channel_s* channel_config[CY_SAR_MAX_NUM_CHANNELS];
|
||||
uint8_t user_enabled_events;
|
||||
cyhal_event_callback_data_t callback_data;
|
||||
cyhal_async_mode_t async_mode;
|
||||
cyhal_dma_t dma;
|
||||
/* Always updated to contain the location where the next result should be stored */
|
||||
int32_t *async_buff_orig;
|
||||
int32_t *async_buff_next;
|
||||
bool async_transfer_in_uv; /* Default is counts */
|
||||
/* Only decremented after all elements from a scan have been copied into async_buff */
|
||||
size_t async_scans_remaining;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_adc_t;
|
||||
|
||||
/**
|
||||
* @brief ADC channel object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct _cyhal_adc_channel_s { /* Struct given an explicit name to make the forward declaration above work */
|
||||
#ifdef CY_IP_MXS40PASS_SAR
|
||||
cyhal_adc_t* adc;
|
||||
cyhal_gpio_t vplus;
|
||||
cyhal_gpio_t vminus;
|
||||
uint8_t channel_idx;
|
||||
uint32_t minimum_acquisition_ns;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_adc_channel_t;
|
||||
|
||||
/** @brief Comparator object */
|
||||
typedef struct {
|
||||
#if defined(CY_IP_MXLPCOMP_INSTANCES) || defined(CY_IP_MXS40PASS_CTB_INSTANCES)
|
||||
cyhal_resource_inst_t resource;
|
||||
union
|
||||
{
|
||||
#if defined(CY_IP_MXS40PASS_CTB_INSTANCES)
|
||||
CTBM_Type *base_ctb;
|
||||
#endif
|
||||
#if defined(CY_IP_MXLPCOMP_INSTANCES)
|
||||
LPCOMP_Type *base_lpcomp;
|
||||
#endif
|
||||
};
|
||||
cyhal_gpio_t pin_vin_p;
|
||||
cyhal_gpio_t pin_vin_m;
|
||||
cyhal_gpio_t pin_out;
|
||||
cyhal_event_callback_data_t callback_data;
|
||||
uint32_t irq_cause;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_comp_t;
|
||||
|
||||
/**
|
||||
* @brief CRC object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#if defined(CY_IP_MXCRYPTO_INSTANCES) || defined(CPUSS_CRYPTO_PRESENT)
|
||||
CRYPTO_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
uint32_t crc_width;
|
||||
#endif
|
||||
} cyhal_crc_t;
|
||||
|
||||
/**
|
||||
* @brief DAC object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXS40PASS_CTDAC
|
||||
CTDAC_Type* base_dac;
|
||||
CTBM_Type* base_opamp;
|
||||
cyhal_resource_inst_t resource_dac;
|
||||
cyhal_resource_inst_t resource_opamp;
|
||||
cyhal_resource_inst_t resource_aref_opamp;
|
||||
cyhal_gpio_t pin;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_dac_t;
|
||||
|
||||
/**
|
||||
* @brief OPAMP object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef struct {
|
||||
CTBM_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_gpio_t pin_vin_p;
|
||||
cyhal_gpio_t pin_vin_m;
|
||||
cyhal_gpio_t pin_vout;
|
||||
bool is_init_success;
|
||||
} cyhal_opamp_t;
|
||||
|
||||
/**
|
||||
* @brief Flash object
|
||||
*
|
||||
|
|
@ -367,10 +426,10 @@ typedef struct {
|
|||
cyhal_dma_t rx_dma;
|
||||
// Note: When the async DMA mode is in use, these variables will always reflect the state
|
||||
// that the transfer will be in after the in-progress DMA transfer, if any, is complete
|
||||
const void *async_tx_buff;
|
||||
size_t async_tx_length;
|
||||
void *async_rx_buff;
|
||||
size_t async_rx_length;
|
||||
volatile const void *async_tx_buff;
|
||||
volatile size_t async_tx_length;
|
||||
volatile void *async_rx_buff;
|
||||
volatile size_t async_rx_length;
|
||||
volatile bool pm_transition_ready;
|
||||
cyhal_syspm_callback_data_t pm_callback;
|
||||
#else
|
||||
|
|
@ -390,6 +449,7 @@ typedef struct {
|
|||
MCWDT_STRUCT_Type *base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_event_callback_data_t callback_data;
|
||||
bool clear_int_mask;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
|
|
@ -430,10 +490,18 @@ typedef struct {
|
|||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef cyhal_tcpwm_common_t cyhal_pwm_t;
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXTCPWM
|
||||
cyhal_tcpwm_t tcpwm;
|
||||
cyhal_gpio_t pin;
|
||||
cyhal_gpio_t pin_compl;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_pwm_t;
|
||||
|
||||
/**
|
||||
* @brief SMIF object
|
||||
* @brief QSPI object
|
||||
*
|
||||
* Application code should not rely on the specific contents of this struct.
|
||||
* They are considered an implementation detail which is subject to change
|
||||
|
|
@ -445,11 +513,13 @@ typedef struct {
|
|||
cyhal_resource_inst_t resource;
|
||||
cyhal_gpio_t pin_ios[8];
|
||||
cyhal_gpio_t pin_sclk;
|
||||
cyhal_gpio_t pin_ssel;
|
||||
uint32_t frequency;
|
||||
cyhal_gpio_t pin_ssel[SMIF_CHIP_TOP_SPI_SEL_NR];
|
||||
/* Active slave select */
|
||||
cy_en_smif_slave_select_t slave_select;
|
||||
cyhal_clock_t clock;
|
||||
bool is_clock_owned;
|
||||
uint8_t mode;
|
||||
cy_stc_smif_context_t context;
|
||||
cy_en_smif_slave_select_t slave_select;
|
||||
cy_en_smif_data_select_t data_select;
|
||||
uint32_t irq_cause;
|
||||
cyhal_event_callback_data_t callback_data;
|
||||
|
|
@ -502,6 +572,7 @@ typedef struct {
|
|||
#ifdef CY_IP_MXSDHC
|
||||
SDHC_Type* base;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_clock_t clock;
|
||||
bool emmc;
|
||||
cy_en_sd_host_dma_type_t dmaType;
|
||||
bool enableLedControl;
|
||||
|
|
@ -538,7 +609,6 @@ typedef struct {
|
|||
cy_en_sd_host_dma_type_t dmaType;
|
||||
cy_stc_sd_host_context_t context;
|
||||
#elif defined(CYHAL_UDB_SDIO)
|
||||
cyhal_clock_t clock;
|
||||
cyhal_dma_t dma0Ch0;
|
||||
cyhal_dma_t dma0Ch1;
|
||||
cyhal_dma_t dma1Ch1;
|
||||
|
|
@ -547,6 +617,7 @@ typedef struct {
|
|||
#endif /* defined(CY_IP_MXSDHC) */
|
||||
|
||||
#if defined(CYHAL_UDB_SDIO) || defined(CY_IP_MXSDHC)
|
||||
cyhal_clock_t clock;
|
||||
cyhal_resource_inst_t resource;
|
||||
cyhal_gpio_t pin_clk;
|
||||
cyhal_gpio_t pin_cmd;
|
||||
|
|
@ -583,7 +654,9 @@ typedef struct {
|
|||
cyhal_gpio_t pin_miso;
|
||||
cyhal_gpio_t pin_mosi;
|
||||
cyhal_gpio_t pin_sclk;
|
||||
cyhal_gpio_t pin_ssel;
|
||||
cyhal_gpio_t pin_ssel[4];
|
||||
cy_en_scb_spi_polarity_t ssel_pol[4];
|
||||
uint8_t active_ssel;
|
||||
cyhal_clock_t clock;
|
||||
cy_en_scb_spi_sclk_mode_t clk_mode;
|
||||
uint8_t mode;
|
||||
|
|
@ -614,7 +687,14 @@ typedef struct {
|
|||
* They are considered an implementation detail which is subject to change
|
||||
* between platforms and/or HAL releases.
|
||||
*/
|
||||
typedef cyhal_tcpwm_common_t cyhal_timer_t;
|
||||
typedef struct {
|
||||
#ifdef CY_IP_MXTCPWM
|
||||
cyhal_tcpwm_t tcpwm;
|
||||
uint32_t default_value;
|
||||
#else
|
||||
void *empty;
|
||||
#endif
|
||||
} cyhal_timer_t;
|
||||
|
||||
/**
|
||||
* @brief UART object
|
||||
|
|
@ -687,5 +767,5 @@ typedef struct {
|
|||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** \} group_hal_psoc6_hw_types */
|
||||
/** \} group_hal_psoc6 */
|
||||
/** \} group_hal_impl_hw_types */
|
||||
/** \} group_hal_impl */
|
||||
|
|
|
|||
|
|
@ -64,9 +64,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_hwmgr HWMGR HAL Results
|
||||
* HWMGR specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name Hardware Manager Results
|
||||
*/
|
||||
|
||||
/** The requested resource type is invalid */
|
||||
|
|
@ -83,7 +84,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_WARNING, CYHAL_RSLT_MODULE_HWMGR, 50))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -99,9 +99,10 @@ PSoC 6 MCU: I2C Slave Using Callbacks</b></a>
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_i2c I2C HAL Results
|
||||
* I2C specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name I2C Results
|
||||
*/
|
||||
|
||||
/** The requested resource type is invalid */
|
||||
|
|
@ -123,9 +124,13 @@ extern "C" {
|
|||
#define CYHAL_I2C_RSLT_ERR_PM_CALLBACK \
|
||||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_I2C, 5))
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** Named define for Slave mode for use when initializing the \ref cyhal_i2c_cfg_t structure. */
|
||||
#define CYHAL_I2C_MODE_SLAVE (true)
|
||||
/** Named define for Master mode for use when initializing the \ref cyhal_i2c_cfg_t structure. */
|
||||
#define CYHAL_I2C_MODE_MASTER (false)
|
||||
|
||||
/** Enum to enable/disable/report interrupt cause flags. */
|
||||
typedef enum
|
||||
|
|
|
|||
|
|
@ -105,9 +105,10 @@ PSoC 6 MCU: PDM to I2S</b></a>
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_i2s I2S HAL Results
|
||||
* I2S specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name I2S Results
|
||||
*/
|
||||
|
||||
/** An invalid pin location was specified */
|
||||
|
|
@ -124,7 +125,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_I2S, 3))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** I2S events */
|
||||
|
|
@ -233,6 +234,13 @@ cy_rslt_t cyhal_i2s_start_tx(cyhal_i2s_t *obj);
|
|||
*/
|
||||
cy_rslt_t cyhal_i2s_stop_tx(cyhal_i2s_t *obj);
|
||||
|
||||
/** Clears the tx hardware buffer
|
||||
*
|
||||
* @param[in] obj The i2s peripheral
|
||||
* @return The status of the clear request
|
||||
*/
|
||||
cy_rslt_t cyhal_i2s_clear_tx(cyhal_i2s_t *obj);
|
||||
|
||||
/** Starts receiving data.
|
||||
*
|
||||
* @param[in] obj The I2S object
|
||||
|
|
@ -247,6 +255,13 @@ cy_rslt_t cyhal_i2s_start_rx(cyhal_i2s_t *obj);
|
|||
*/
|
||||
cy_rslt_t cyhal_i2s_stop_rx(cyhal_i2s_t *obj);
|
||||
|
||||
/** Clears the rx hardware buffer
|
||||
*
|
||||
* @param[in] obj The i2s peripheral
|
||||
* @return The status of the clear request
|
||||
*/
|
||||
cy_rslt_t cyhal_i2s_clear_rx(cyhal_i2s_t *obj);
|
||||
|
||||
/** Read data synchronously
|
||||
*
|
||||
* This will read either `length` words or the number of words that are currently available in the
|
||||
|
|
@ -282,6 +297,17 @@ cy_rslt_t cyhal_i2s_read(cyhal_i2s_t *obj, void *data, size_t* length);
|
|||
*/
|
||||
cy_rslt_t cyhal_i2s_write(cyhal_i2s_t *obj, const void *data, size_t *length);
|
||||
|
||||
/** Checks if the transmit functionality is enabled for the specified I2S peripheral (regardless of whether data
|
||||
* is currently queued for transmission).
|
||||
*
|
||||
* The transmit functionality can be enabled by calling @ref cyhal_i2s_start_tx and disabled by calling
|
||||
* @ref cyhal_i2s_stop_tx
|
||||
*
|
||||
* @param[in] obj The I2S peripheral to check
|
||||
* @return Whether the I2S transmit function is enabled.
|
||||
*/
|
||||
bool cyhal_i2s_is_tx_enabled(cyhal_i2s_t *obj);
|
||||
|
||||
/** Checks if the specified I2S peripheral is transmitting data, including if a pending async transfer is waiting
|
||||
* to write more data to the transmit buffer.
|
||||
*
|
||||
|
|
@ -290,6 +316,17 @@ cy_rslt_t cyhal_i2s_write(cyhal_i2s_t *obj, const void *data, size_t *length);
|
|||
*/
|
||||
bool cyhal_i2s_is_tx_busy(cyhal_i2s_t *obj);
|
||||
|
||||
/** Checks if the receive functionality is enabled for the specified I2S peripheral (regardless of whether any
|
||||
* unread data has been received).
|
||||
*
|
||||
* The receive functionality can be enabled by calling @ref cyhal_i2s_start_rx and disabled by calling
|
||||
* @ref cyhal_i2s_stop_rx
|
||||
*
|
||||
* @param[in] obj The I2S peripheral to check
|
||||
* @return Whether the I2S receive function is enabled.
|
||||
*/
|
||||
bool cyhal_i2s_is_rx_enabled(cyhal_i2s_t *obj);
|
||||
|
||||
/** Checks if the specified I2S peripheral has received data that has not yet been read out of the hardware buffer.
|
||||
* This includes if an async read transfer is pending.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -63,9 +63,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_interconnect Interconnect HAL Results
|
||||
* Interconnect specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name Interconnect Results
|
||||
*/
|
||||
|
||||
/** No connection is available */
|
||||
|
|
@ -79,7 +80,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_INTERCONNECT, 2))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** Indicates that a mux output does not continue to another mux */
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
* LPTimer can operate in all possible low power modes. It can be used either to measure timing between events, or to perform
|
||||
* some action after a specified interval of time.
|
||||
* \section subsection_lptimer_features Features
|
||||
* * Wake the device up from deepsleep
|
||||
* * Configurable to create a free-running timer or generate periodic interrupts.
|
||||
* * Configurable to update the match value of an already configured LPTimer set up to generate an interrupt on match.
|
||||
* * Used for measuring time between events in free-running mode.
|
||||
|
|
@ -50,9 +51,10 @@
|
|||
* The following snippet initializes a LPTimer in free running mode.
|
||||
* \snippet lptimer.c snippet_cyhal_lptimer_simple_init_def
|
||||
*
|
||||
* \subsection subsection_lptimer_snippet_2 Snippet 2: Simple LPTimer initialization with set Match value
|
||||
* The following snippet initializes a LPTimer and assigns the Match value to the LPTimer.
|
||||
* \snippet lptimer.c snippet_cyhal_lptimer_simple_init
|
||||
* \subsection subsection_lptimer_snippet_2 Snippet 2: LPTimer interrupts
|
||||
* The following snippet initializes a LPTimer and uses \ref cyhal_lptimer_set_match() to trigger an interrupt
|
||||
* on match. Subsequent interrupts can be triggered at required times using \ref cyhal_lptimer_set_delay() called from the ISR.
|
||||
* \snippet lptimer.c snippet_cyhal_lptimer_interrupt
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
|
@ -66,9 +68,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \addtogroup group_hal_results
|
||||
/** \addtogroup group_hal_results_lptimer LPTimer HAL Results
|
||||
* LPTimer specific return codes
|
||||
* \ingroup group_hal_results
|
||||
* \{ *//**
|
||||
* \{ @name LPTimer Results
|
||||
*/
|
||||
|
||||
/** Failed to configure power management callback */
|
||||
|
|
@ -76,7 +79,7 @@ extern "C" {
|
|||
(CYHAL_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CYHAL_RSLT_MODULE_WDT, 0))
|
||||
|
||||
/**
|
||||
* \} \}
|
||||
* \}
|
||||
*/
|
||||
|
||||
/** LPTimer Information */
|
||||
|
|
@ -135,6 +138,7 @@ cy_rslt_t cyhal_lptimer_reload(cyhal_lptimer_t *obj);
|
|||
* to generate an interrupt on match. Note that this function does not
|
||||
* reinitialize the counter or the associated peripheral initialization
|
||||
* sequence.
|
||||
* \note This does not reset the counter.
|
||||
*
|
||||
* @param[in] obj The LPTimer object
|
||||
* @param[in] value The tick value to match
|
||||
|
|
@ -150,6 +154,7 @@ cy_rslt_t cyhal_lptimer_set_match(cyhal_lptimer_t *obj, uint32_t value);
|
|||
* Note that this function does not reinitialize the counter or the
|
||||
* associated peripheral initialization
|
||||
* sequence.
|
||||
* \note This does not reset the counter.
|
||||
*
|
||||
* @param[in] obj The LPTimer object
|
||||
* @param[in] delay The ticks to wait. The minimum permitted delay value can be
|
||||
|
|
@ -214,4 +219,4 @@ void cyhal_lptimer_get_info(cyhal_lptimer_t *obj, cyhal_lptimer_info_t *info);
|
|||
#include CYHAL_LPTIMER_IMPL_HEADER
|
||||
#endif /* CYHAL_LPTIMER_IMPL_HEADER */
|
||||
|
||||
/** \} group_hal_lptimer */
|
||||
/** \} group_hal_lptimer */
|
||||
|
|
|
|||
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Reference in New Issue