mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #14075 from MaximIntegrated/maxim-usb-stack-dev
Maxim targets; Add USB stack implementationpull/14173/head
Martin Kojtal
GitHub
commit
4cf0365582
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@ -13,3 +13,8 @@ target_include_directories(mbed-core
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INTERFACE
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.
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)
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target_sources(mbed-core
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INTERFACE
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USBPhy_Maxim.cpp
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)
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@ -0,0 +1,92 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2018-2020 ARM Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef USBENDPOINTS_H
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#define USBENDPOINTS_H
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/* SETUP packet size */
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#define SETUP_PACKET_SIZE (8)
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/* Options flags for configuring endpoints */
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#define DEFAULT_OPTIONS (0)
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#define SINGLE_BUFFERED (1U << 0)
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#define ISOCHRONOUS (1U << 1)
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#define RATE_FEEDBACK_MODE (1U << 2) /* Interrupt endpoints only */
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#define NUMBER_OF_LOGICAL_ENDPOINTS (8)
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#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2)
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#define EP_TO_INDEX(endpoint) (((endpoint & 0xf) << 1) | (endpoint & 0x80 ? 1 : 0))
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#define DIR_OUT 0x00
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#define DIR_IN 0x80
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#define EP_NUM(ep) (ep & 0x0F)
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#define IN_EP(ep) (ep & DIR_IN)
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#define OUT_EP(ep) (!(ep & DIR_IN))
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/* Define physical endpoint numbers */
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/* Endpoint No. */
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/* ---------------- */
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#define EP0OUT ((0 << 1) | DIR_OUT)
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#define EP0IN ((0 << 1) | DIR_IN)
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#define EP1OUT ((1 << 1) | DIR_OUT)
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#define EP1IN ((1 << 1) | DIR_IN)
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#define EP2OUT ((2 << 1) | DIR_OUT)
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#define EP2IN ((2 << 1) | DIR_IN)
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#define EP3OUT ((3 << 1) | DIR_OUT)
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#define EP3IN ((3 << 1) | DIR_IN)
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#define EP4OUT ((4 << 1) | DIR_OUT)
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#define EP4IN ((4 << 1) | DIR_IN)
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#define EP5OUT ((5 << 1) | DIR_OUT)
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#define EP5IN ((5 << 1) | DIR_IN)
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#define EP6OUT ((6 << 1) | DIR_OUT)
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#define EP6IN ((6 << 1) | DIR_IN)
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#define EP7OUT ((7 << 1) | DIR_OUT)
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#define EP7IN ((7 << 1) | DIR_IN)
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/* Maximum Packet sizes */
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#define MAX_PACKET_SIZE_EP0 (64)
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#define MAX_PACKET_SIZE_EP1 (64)
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#define MAX_PACKET_SIZE_EP2 (64)
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#define MAX_PACKET_SIZE_EP3 (64)
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#define MAX_PACKET_SIZE_EP4 (64)
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#define MAX_PACKET_SIZE_EP5 (64)
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#define MAX_PACKET_SIZE_EP6 (64)
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#define MAX_PACKET_SIZE_EP7 (64)
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/* Generic endpoints - intended to be portable accross devices */
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/* and be suitable for simple USB devices. */
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/* Bulk endpoints */
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#define EPBULK_OUT (EP1OUT)
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#define EPBULK_IN (EP2IN)
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/* Interrupt endpoints */
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#define EPINT_OUT (EP3OUT)
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#define EPINT_IN (EP4IN)
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/* Isochronous endpoints */
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/* NOT SUPPORTED - use invalid endpoint number to prevent built errors */
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#define EPISO_OUT (EP0OUT)
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#define EPISO_IN (EP0IN)
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#define MAX_PACKET_SIZE_EPBULK (64)
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#define MAX_PACKET_SIZE_EPINT (64)
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#endif
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@ -0,0 +1,66 @@
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/*
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* Copyright (c) 2018-2019, Arm Limited and affiliates.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef USBPHYHW_H
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#define USBPHYHW_H
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#include "USBPhy.h"
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class USBPhyHw : public USBPhy {
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public:
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USBPhyHw();
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virtual ~USBPhyHw();
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virtual void init(USBPhyEvents *events);
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virtual void deinit();
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virtual bool powered();
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virtual void connect();
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virtual void disconnect();
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virtual void configure();
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virtual void unconfigure();
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virtual void sof_enable();
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virtual void sof_disable();
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virtual void set_address(uint8_t address);
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virtual void remote_wakeup();
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virtual const usb_ep_table_t *endpoint_table();
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virtual uint32_t ep0_set_max_packet(uint32_t max_packet);
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virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size);
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virtual void ep0_read(uint8_t *data, uint32_t size);
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virtual uint32_t ep0_read_result();
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virtual void ep0_write(uint8_t *buffer, uint32_t size);
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virtual void ep0_stall();
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virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type);
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virtual void endpoint_remove(usb_ep_t endpoint);
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virtual void endpoint_stall(usb_ep_t endpoint);
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virtual void endpoint_unstall(usb_ep_t endpoint);
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virtual bool endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size);
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virtual uint32_t endpoint_read_result(usb_ep_t endpoint);
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virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size);
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virtual void endpoint_abort(usb_ep_t endpoint);
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virtual void process();
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private:
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USBPhyEvents *events;
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static void _usbisr(void);
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};
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#endif
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@ -0,0 +1,519 @@
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/*
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* Copyright (c) 2018-2019, Arm Limited and affiliates.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined(DEVICE_USBDEVICE) && (DEVICE_USBDEVICE) && \
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(defined(TARGET_MAX32620) || defined(TARGET_MAX32625) || defined(TARGET_MAX32630))
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#include "mbed.h"
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#include "USBPhyHw.h"
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#include "usb_phy_api.h"
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#include "USBEndpoints_Maxim.h"
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#include "usb_regs.h"
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#include "clkman_regs.h"
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#if defined(TARGET_MAX32625) || defined(TARGET_MAX32630)
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#include "pwrman_regs.h"
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#endif
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#define CONNECT_INTS (MXC_F_USB_DEV_INTEN_BRST | MXC_F_USB_DEV_INTEN_SETUP | MXC_F_USB_DEV_INTEN_EP_IN | MXC_F_USB_DEV_INTEN_EP_OUT | MXC_F_USB_DEV_INTEN_DMA_ERR)
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typedef struct {
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volatile uint32_t buf0_desc;
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volatile uint32_t buf0_address;
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volatile uint32_t buf1_desc;
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volatile uint32_t buf1_address;
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} ep_buffer_t;
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typedef struct {
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ep_buffer_t out_buffer;
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ep_buffer_t in_buffer;
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} ep0_buffer_t;
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typedef struct {
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ep0_buffer_t ep0;
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ep_buffer_t ep[MXC_USB_NUM_EP - 1];
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} ep_buffer_descriptor_t;
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// control packet state
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static enum {
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CTRL_NONE = 0,
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CTRL_SETUP,
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CTRL_OUT,
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CTRL_IN,
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} control_state;
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// Static storage for endpoint buffer descriptor table. Must be 512 byte aligned for DMA.
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MBED_ALIGN(512)
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ep_buffer_descriptor_t ep_buffer_descriptor;
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// static storage for temporary data buffers. Must be 32 byte aligned.
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MBED_ALIGN(4)
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static uint8_t aligned_buffer[NUMBER_OF_LOGICAL_ENDPOINTS][MXC_USB_MAX_PACKET];
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static uint8_t* read_buf_addr[NUMBER_OF_LOGICAL_ENDPOINTS];
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static USBPhyHw *instance;
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static ep_buffer_t *get_desc(uint8_t endpoint)
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{
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uint8_t epnum = EP_NUM(endpoint);
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ep_buffer_t *desc;
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if (epnum == 0) {
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if (IN_EP(endpoint)) {
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desc = &ep_buffer_descriptor.ep0.in_buffer;
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} else {
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desc = &ep_buffer_descriptor.ep0.out_buffer;
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}
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} else {
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desc = &ep_buffer_descriptor.ep[epnum - 1];
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}
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return desc;
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}
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USBPhy *get_usb_phy()
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{
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static USBPhyHw usbphy;
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return &usbphy;
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}
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USBPhyHw::USBPhyHw(): events(NULL)
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{
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}
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USBPhyHw::~USBPhyHw()
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{
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}
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void USBPhyHw::init(USBPhyEvents *events)
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{
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this->events = events;
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// Disable IRQ
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NVIC_DisableIRQ(USB_IRQn);
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// Enable the USB clock
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#if defined(TARGET_MAX32620)
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MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_CLOCK_ENABLE;
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#elif defined(TARGET_MAX32625) || defined(TARGET_MAX32630)
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MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED;
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MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_CLOCK_ENABLE;
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#endif
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// reset the device
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MXC_USB->cn = 0;
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MXC_USB->cn = MXC_F_USB_CN_USB_EN;
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MXC_USB->dev_inten = 0;
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MXC_USB->dev_cn = 0;
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MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
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MXC_USB->dev_cn = 0;
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// clear driver state
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control_state = CTRL_NONE;
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// set the descriptor location
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MXC_USB->ep_base = (uint32_t)&ep_buffer_descriptor;
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// enable VBUS interrupts
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MXC_USB->dev_inten = MXC_F_USB_DEV_INTEN_NO_VBUS | MXC_F_USB_DEV_INTEN_VBUS;
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// Attach IRQ handler and Enable IRQ
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instance = this;
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NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
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NVIC_EnableIRQ(USB_IRQn);
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}
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void USBPhyHw::deinit()
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{
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// Disconnect and disable interrupt
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MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
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MXC_USB->dev_cn = 0;
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MXC_USB->cn = 0;
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disconnect();
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NVIC_DisableIRQ(USB_IRQn);
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}
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bool USBPhyHw::powered()
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{
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return true;
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}
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void USBPhyHw::connect()
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{
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// enable interrupts
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MXC_USB->dev_inten |= CONNECT_INTS;
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// allow interrupts on ep0
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MXC_USB->ep[0] |= MXC_F_USB_EP_INT_EN;
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// pullup enable
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MXC_USB->dev_cn |= (MXC_F_USB_DEV_CN_CONNECT | MXC_F_USB_DEV_CN_FIFO_MODE);
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}
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void USBPhyHw::disconnect()
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{
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// disable interrupts
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MXC_USB->dev_inten &= ~CONNECT_INTS;
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// disable pullup
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MXC_USB->dev_cn &= ~MXC_F_USB_DEV_CN_CONNECT;
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}
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void USBPhyHw::configure()
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{
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// Do nothing
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}
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void USBPhyHw::unconfigure()
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{
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// reset endpoints
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for (int i = 0; i < MXC_USB_NUM_EP; i++) {
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// Disable endpoint and clear the data toggle
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MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
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MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
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}
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}
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void USBPhyHw::sof_enable()
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{
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// Do nothing
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}
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void USBPhyHw::sof_disable()
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{
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// Do nothing
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}
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void USBPhyHw::set_address(uint8_t address)
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{
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// Do nothing
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}
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void USBPhyHw::remote_wakeup()
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{
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// Do nothing
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}
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const usb_ep_table_t *USBPhyHw::endpoint_table()
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{
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static const usb_ep_table_t endpoint_table = {
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4096 - 32 * 4, // 32 words for endpoint buffers
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// +3 based added to interrupt and isochronous to ensure enough
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// space for 4 byte alignment
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{
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{USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
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{USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_OUT, 0, 0},
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{USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN, 0, 0},
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{USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_OUT, 0, 0},
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{USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN, 0, 0},
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{USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
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{USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
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{USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
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}
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};
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return &endpoint_table;
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}
|
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|
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uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet)
|
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{
|
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return MAX_PACKET_SIZE_EP0;
|
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}
|
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|
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void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size)
|
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{
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uint32_t *ptr32 = (uint32_t*)buffer;
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// read setup packet
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ptr32[0] = (uint32_t)MXC_USB->setup0;
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ptr32[1] = (uint32_t)MXC_USB->setup1;
|
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}
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|
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void USBPhyHw::ep0_read(uint8_t *data, uint32_t size)
|
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{
|
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// Setup data buffer to receive next endpoint 0 OUT packet
|
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if (control_state == CTRL_IN) {
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// This is the status stage. ACK.
|
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MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
|
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control_state = CTRL_NONE;
|
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return;
|
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}
|
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|
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control_state = CTRL_OUT;
|
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|
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endpoint_read(EP0OUT, data, size);
|
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}
|
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|
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uint32_t USBPhyHw::ep0_read_result()
|
||||
{
|
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// Return the size of the last OUT packet received on endpoint 0
|
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return endpoint_read_result(EP0OUT);
|
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}
|
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|
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void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size)
|
||||
{
|
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// Start transferring buffer on endpoint 0 IN
|
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if ((size == 0) && (control_state != CTRL_IN)) {
|
||||
// This is a status stage ACK. Handle in hardware.
|
||||
MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
|
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control_state = CTRL_NONE;
|
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return;
|
||||
}
|
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|
||||
control_state = CTRL_IN;
|
||||
|
||||
endpoint_write(EP0IN, buffer, size);
|
||||
}
|
||||
|
||||
void USBPhyHw::ep0_stall()
|
||||
{
|
||||
endpoint_stall(EP0OUT);
|
||||
}
|
||||
|
||||
bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type)
|
||||
{
|
||||
uint8_t epnum = EP_NUM(endpoint);
|
||||
uint32_t ep_ctrl = 0;
|
||||
|
||||
if (epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (IN_EP(endpoint)) {
|
||||
ep_ctrl = MXC_S_USB_EP_DIR_IN;
|
||||
} else {
|
||||
ep_ctrl = MXC_S_USB_EP_DIR_OUT;
|
||||
}
|
||||
|
||||
ep_ctrl |= (MXC_F_USB_EP_DT | MXC_F_USB_EP_INT_EN);
|
||||
|
||||
MXC_USB->ep[epnum] = ep_ctrl;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_remove(usb_ep_t endpoint)
|
||||
{
|
||||
uint8_t epnum = EP_NUM(endpoint);
|
||||
// Disable and remove this endpoint
|
||||
MXC_USB->ep[epnum] &= ~MXC_F_USB_EP_DIR;
|
||||
MXC_USB->ep[epnum] |= MXC_F_USB_EP_DT;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_stall(usb_ep_t endpoint)
|
||||
{
|
||||
// Stall this endpoint until it is explicitly cleared
|
||||
uint8_t epnum = EP_NUM(endpoint);
|
||||
|
||||
if (epnum == 0) {
|
||||
MXC_USB->ep[epnum] |= MXC_F_USB_EP_ST_STALL;
|
||||
}
|
||||
|
||||
MXC_USB->ep[epnum] |= MXC_F_USB_EP_STALL;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_unstall(usb_ep_t endpoint)
|
||||
{
|
||||
// Unstall this endpoint
|
||||
MXC_USB->ep[EP_NUM(endpoint)] &= ~MXC_F_USB_EP_STALL;
|
||||
}
|
||||
|
||||
bool USBPhyHw::endpoint_read(usb_ep_t endpoint, uint8_t *data, uint32_t size)
|
||||
{
|
||||
// Setup data buffer to receive next endpoint OUT packet and return true if successful
|
||||
uint8_t epnum = EP_NUM(endpoint);
|
||||
|
||||
if ((epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) ||
|
||||
IN_EP(endpoint) ||
|
||||
(size > MAX_PACKET_SIZE_EP0)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
uint32_t mask = (1 << epnum);
|
||||
if (MXC_USB->out_owner & mask) {
|
||||
return false;
|
||||
}
|
||||
|
||||
read_buf_addr[epnum] = data;
|
||||
|
||||
ep_buffer_t *desc = get_desc(endpoint);
|
||||
desc->buf0_desc = size;
|
||||
desc->buf0_address = (uint32_t)aligned_buffer[epnum];
|
||||
|
||||
MXC_USB->out_owner = mask;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t USBPhyHw::endpoint_read_result(usb_ep_t endpoint)
|
||||
{
|
||||
uint32_t size = 0;
|
||||
uint8_t epnum = EP_NUM(endpoint);
|
||||
|
||||
if ((epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint32_t mask = (1 << epnum);
|
||||
if (MXC_USB->out_owner & mask) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// get the packet length and contents
|
||||
ep_buffer_t *desc = get_desc(endpoint);
|
||||
size = desc->buf0_desc;
|
||||
memcpy(read_buf_addr[epnum], aligned_buffer[epnum], size);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size)
|
||||
{
|
||||
// Start transferring buffer on endpoint IN
|
||||
uint8_t epnum = EP_NUM(endpoint);
|
||||
|
||||
if ((epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) ||
|
||||
OUT_EP(endpoint) ||
|
||||
(size > MAX_PACKET_SIZE_EP0)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
uint32_t mask = (1 << epnum);
|
||||
if (MXC_USB->in_owner & mask) {
|
||||
return false;
|
||||
}
|
||||
|
||||
memcpy(aligned_buffer[epnum], data, size);
|
||||
|
||||
ep_buffer_t *desc = get_desc(endpoint);
|
||||
desc->buf0_desc = size;
|
||||
desc->buf0_address = (uint32_t)aligned_buffer[epnum];
|
||||
|
||||
// start the DMA
|
||||
MXC_USB->in_owner = mask;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_abort(usb_ep_t endpoint)
|
||||
{
|
||||
// Stop the current transfer on this endpoint and don't call the IN or OUT callback
|
||||
ep_buffer_t *desc = get_desc(endpoint);
|
||||
desc->buf0_desc = 0;
|
||||
desc->buf0_address = 0;
|
||||
}
|
||||
|
||||
void USBPhyHw::process()
|
||||
{
|
||||
// get and clear irqs
|
||||
uint32_t irq_flags = MXC_USB->dev_intfl;
|
||||
MXC_USB->dev_intfl = irq_flags;
|
||||
|
||||
// process only enabled interrupts
|
||||
irq_flags &= MXC_USB->dev_inten;
|
||||
|
||||
// suspend
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_SUSP) {
|
||||
events->suspend(true);
|
||||
}
|
||||
|
||||
// bus reset
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_BRST) {
|
||||
|
||||
// reset endpoints
|
||||
for (int i = 0; i < NUMBER_OF_LOGICAL_ENDPOINTS; i++) {
|
||||
// Disable endpoint and clear the data toggle
|
||||
MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
|
||||
MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
|
||||
}
|
||||
|
||||
events->reset();
|
||||
|
||||
// clear driver state
|
||||
control_state = CTRL_NONE;
|
||||
|
||||
}
|
||||
|
||||
// power applied
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_VBUS) {
|
||||
events->power(true);
|
||||
}
|
||||
|
||||
// power lost
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_NO_VBUS) {
|
||||
events->power(false);
|
||||
}
|
||||
|
||||
// Setup packet
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_SETUP) {
|
||||
events->ep0_setup();
|
||||
}
|
||||
|
||||
// IN packets
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_EP_IN) {
|
||||
// get and clear IN irqs
|
||||
uint32_t in_irqs = MXC_USB->in_int;
|
||||
MXC_USB->in_int = in_irqs;
|
||||
|
||||
if (in_irqs & 1) {
|
||||
events->ep0_in();
|
||||
}
|
||||
|
||||
for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
|
||||
uint32_t irq_mask = (1 << epnum);
|
||||
if (in_irqs & irq_mask) {
|
||||
uint8_t endpoint = epnum | DIR_IN;
|
||||
events->in(endpoint);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// OUT packets
|
||||
if (irq_flags & MXC_F_USB_DEV_INTFL_EP_OUT) {
|
||||
// get and clear OUT irqs
|
||||
uint32_t out_irqs = MXC_USB->out_int;
|
||||
MXC_USB->out_int = out_irqs;
|
||||
|
||||
if (out_irqs & 1) {
|
||||
events->ep0_out();
|
||||
}
|
||||
|
||||
for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
|
||||
uint32_t irq_mask = (1 << epnum);
|
||||
if (out_irqs & irq_mask) {
|
||||
uint8_t endpoint = epnum | DIR_OUT;
|
||||
events->out(endpoint);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Re-enable interrupt
|
||||
NVIC_ClearPendingIRQ(USB_IRQn);
|
||||
NVIC_EnableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
void USBPhyHw::_usbisr(void)
|
||||
{
|
||||
NVIC_DisableIRQ(USB_IRQn);
|
||||
// Handle interrupts
|
||||
instance->events->start_process();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -5105,7 +5105,8 @@
|
|||
"STDIO_MESSAGES",
|
||||
"USTICKER",
|
||||
"MPU",
|
||||
"SLEEP"
|
||||
"SLEEP",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"release_versions": [
|
||||
"5"
|
||||
|
|
|
|||
Loading…
Reference in New Issue