mirror of https://github.com/ARMmbed/mbed-os.git
Added Ref Count
Offir Kochalsky
parent
ed83b8e4c1
commit
4cd9132db8
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@ -100,7 +100,7 @@ static unsigned int local_math_power(int base, int exp);
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//***********************
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SPIFBlockDevice::SPIFBlockDevice(
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PinName mosi, PinName miso, PinName sclk, PinName csel, int freq)
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: _spi(mosi, miso, sclk), _cs(csel), _device_size_bytes(0), _is_initialized(false)
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: _spi(mosi, miso, sclk), _cs(csel), _device_size_bytes(0), _is_initialized(false), _init_ref_count(0)
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{
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_address_size = SPIF_ADDR_SIZE_3_BYTES;
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// Initial SFDP read tables are read with 8 dummy cycles
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@ -132,7 +132,14 @@ int SPIFBlockDevice::init()
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spif_bd_error spi_status = SPIF_BD_ERROR_OK;
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_mutex->lock();
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if (_is_initialized == true) {
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if (!_is_initialized) {
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_init_ref_count = 0;
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}
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_init_ref_count++;
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if (_init_ref_count != 1) {
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goto exit_point;
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}
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@ -214,18 +221,29 @@ exit_point:
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int SPIFBlockDevice::deinit()
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{
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spif_bd_error status = SPIF_BD_ERROR_OK;
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_mutex->lock();
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if (_is_initialized == false) {
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_mutex->unlock();
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return SPIF_BD_ERROR_OK;
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if (!_is_initialized) {
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_init_ref_count = 0;
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goto exit_point;
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}
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_init_ref_count--;
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if (_init_ref_count) {
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goto exit_point;
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}
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// Disable Device for Writing
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spif_bd_error status = _spi_send_general_command(SPIF_WRDI, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
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status = _spi_send_general_command(SPIF_WRDI, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
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if (status != SPIF_BD_ERROR_OK) {
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tr_error("ERROR: Write Disable failed");
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}
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_is_initialized = false;
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exit_point:
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_mutex->unlock();
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return status;
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@ -251,7 +269,6 @@ int SPIFBlockDevice::read(void *buffer, bd_addr_t addr, bd_size_t size)
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_mutex->unlock();
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return status;
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}
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int SPIFBlockDevice::program(const void *buffer, bd_addr_t addr, bd_size_t size)
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@ -461,7 +478,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_read_command(int read_inst, uint8_t *bu
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_spi.write(read_inst);
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// Write Address (can be either 3 or 4 bytes long)
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for (int address_shift = ((_address_size-1) * 8); address_shift >= 0; address_shift -= 8) {
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for (int address_shift = ((_address_size - 1) * 8); address_shift >= 0; address_shift -= 8) {
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_spi.write((addr >> address_shift) & 0xFF);
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}
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@ -480,7 +497,8 @@ spif_bd_error SPIFBlockDevice::_spi_send_read_command(int read_inst, uint8_t *bu
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return SPIF_BD_ERROR_OK;
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}
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spif_bd_error SPIFBlockDevice::_spi_send_program_command(int prog_inst, const void *buffer, bd_addr_t addr, bd_size_t size)
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spif_bd_error SPIFBlockDevice::_spi_send_program_command(int prog_inst, const void *buffer, bd_addr_t addr,
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bd_size_t size)
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{
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// Send Program (write) command to device driver
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uint32_t dummy_bytes = _dummy_and_mode_cycles / 8;
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@ -494,7 +512,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_program_command(int prog_inst, const vo
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_spi.write(prog_inst);
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// Write Address (can be either 3 or 4 bytes long)
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for (int address_shift = ((_address_size-1) * 8); address_shift >= 0; address_shift -= 8) {
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for (int address_shift = ((_address_size - 1) * 8); address_shift >= 0; address_shift -= 8) {
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_spi.write((addr >> address_shift) & 0xFF);
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}
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@ -538,7 +556,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_general_command(int instruction, bd_add
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// Reading SPI Bus registers does not require Flash Address
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if (addr != SPI_NO_ADDRESS_COMMAND) {
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// Write Address (can be either 3 or 4 bytes long)
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for (int address_shift = ((_address_size-1) * 8); address_shift >= 0; address_shift -= 8) {
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for (int address_shift = ((_address_size - 1) * 8); address_shift >= 0; address_shift -= 8) {
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_spi.write((addr >> address_shift) & 0xFF);
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}
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@ -654,7 +672,8 @@ int SPIFBlockDevice::_sfdp_parse_basic_param_table(uint32_t basic_table_addr, si
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_page_size_bytes = _sfdp_detect_page_size(param_table, basic_table_size);
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// Detect and Set Erase Types
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_sfdp_detect_erase_types_inst_and_size(param_table, basic_table_size, _erase4k_inst, _erase_type_inst_arr, _erase_type_size_arr);
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_sfdp_detect_erase_types_inst_and_size(param_table, basic_table_size, _erase4k_inst, _erase_type_inst_arr,
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_erase_type_size_arr);
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_erase_instruction = _erase4k_inst;
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// Detect and Set fastest Bus mode (default 1-1-1)
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@ -744,14 +763,14 @@ unsigned int SPIFBlockDevice::_sfdp_detect_page_size(uint8_t *basic_param_table_
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int page_to_power_size = ( (int)basic_param_table_ptr[SPIF_BASIC_PARAM_TABLE_PAGE_SIZE_BYTE]) >> 4;
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page_size = local_math_power(2, page_to_power_size);
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tr_debug("DEBUG: Detected Page Size: %d", page_size);
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}
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else {
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} else {
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tr_debug("DEBUG: Using Default Page Size: %d", page_size);
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}
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return page_size;
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}
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int SPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size, int& erase4k_inst,
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int SPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size,
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int& erase4k_inst,
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int *erase_type_inst_arr, unsigned int *erase_type_size_arr)
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{
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erase4k_inst = 0xff;
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@ -803,7 +822,8 @@ int SPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param
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return 0;
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}
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int SPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size, int& read_inst)
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int SPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size,
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int& read_inst)
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{
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do {
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@ -83,7 +83,7 @@ public:
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* @param csel SPI chip select pin
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* @param freq Clock speed of the SPI bus (defaults to 40MHz)
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*/
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SPIFBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName csel, int freq=40000000);
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SPIFBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName csel, int freq = 40000000);
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/** Initialize a block device
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*
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@ -210,7 +210,8 @@ private:
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unsigned int _sfdp_detect_page_size(uint8_t *basic_param_table_ptr, int basic_param_table_size);
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// Detect all supported erase types
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int _sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size, int& erase4k_inst,
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int _sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size,
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int& erase4k_inst,
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int *erase_type_inst_arr, unsigned int *erase_type_size_arr);
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/***********************/
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@ -289,7 +290,7 @@ private:
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unsigned int _read_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Read Bus Mode
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unsigned int _write_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Write Bus Mode
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unsigned int _dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Current Bus Mode
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uint32_t _init_ref_count;
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bool _is_initialized;
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};
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