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Added Ref Count

pull/7774/head
Offir Kochalsky 2018-08-16 18:45:48 +03:00
parent ed83b8e4c1
commit 4cd9132db8
2 changed files with 203 additions and 182 deletions
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52
SPIFBlockDevice.cpp
View File

@ -100,7 +100,7 @@ static unsigned int local_math_power(int base, int exp);
//*********************** //***********************
SPIFBlockDevice::SPIFBlockDevice( SPIFBlockDevice::SPIFBlockDevice(
PinName mosi, PinName miso, PinName sclk, PinName csel, int freq) PinName mosi, PinName miso, PinName sclk, PinName csel, int freq)
: _spi(mosi, miso, sclk), _cs(csel), _device_size_bytes(0), _is_initialized(false) : _spi(mosi, miso, sclk), _cs(csel), _device_size_bytes(0), _is_initialized(false), _init_ref_count(0)
{ {
_address_size = SPIF_ADDR_SIZE_3_BYTES; _address_size = SPIF_ADDR_SIZE_3_BYTES;
// Initial SFDP read tables are read with 8 dummy cycles // Initial SFDP read tables are read with 8 dummy cycles
@ -132,7 +132,14 @@ int SPIFBlockDevice::init()
spif_bd_error spi_status = SPIF_BD_ERROR_OK; spif_bd_error spi_status = SPIF_BD_ERROR_OK;
_mutex->lock(); _mutex->lock();
if (_is_initialized == true) {
if (!_is_initialized) {
_init_ref_count = 0;
}
_init_ref_count++;
if (_init_ref_count != 1) {
goto exit_point; goto exit_point;
} }
@ -214,18 +221,29 @@ exit_point:
int SPIFBlockDevice::deinit() int SPIFBlockDevice::deinit()
{ {
spif_bd_error status = SPIF_BD_ERROR_OK;
_mutex->lock(); _mutex->lock();
if (_is_initialized == false) {
_mutex->unlock(); if (!_is_initialized) {
return SPIF_BD_ERROR_OK; _init_ref_count = 0;
goto exit_point;
}
_init_ref_count--;
if (_init_ref_count) {
goto exit_point;
} }
// Disable Device for Writing // Disable Device for Writing
spif_bd_error status = _spi_send_general_command(SPIF_WRDI, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0); status = _spi_send_general_command(SPIF_WRDI, SPI_NO_ADDRESS_COMMAND, NULL, 0, NULL, 0);
if (status != SPIF_BD_ERROR_OK) { if (status != SPIF_BD_ERROR_OK) {
tr_error("ERROR: Write Disable failed"); tr_error("ERROR: Write Disable failed");
} }
_is_initialized = false; _is_initialized = false;
exit_point:
_mutex->unlock(); _mutex->unlock();
return status; return status;
@ -251,7 +269,6 @@ int SPIFBlockDevice::read(void *buffer, bd_addr_t addr, bd_size_t size)
_mutex->unlock(); _mutex->unlock();
return status; return status;
} }
int SPIFBlockDevice::program(const void *buffer, bd_addr_t addr, bd_size_t size) int SPIFBlockDevice::program(const void *buffer, bd_addr_t addr, bd_size_t size)
@ -461,7 +478,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_read_command(int read_inst, uint8_t *bu
_spi.write(read_inst); _spi.write(read_inst);
// Write Address (can be either 3 or 4 bytes long) // Write Address (can be either 3 or 4 bytes long)
for (int address_shift = ((_address_size-1) * 8); address_shift >= 0; address_shift -= 8) { for (int address_shift = ((_address_size - 1) * 8); address_shift >= 0; address_shift -= 8) {
_spi.write((addr >> address_shift) & 0xFF); _spi.write((addr >> address_shift) & 0xFF);
} }
@ -480,7 +497,8 @@ spif_bd_error SPIFBlockDevice::_spi_send_read_command(int read_inst, uint8_t *bu
return SPIF_BD_ERROR_OK; return SPIF_BD_ERROR_OK;
} }
spif_bd_error SPIFBlockDevice::_spi_send_program_command(int prog_inst, const void *buffer, bd_addr_t addr, bd_size_t size) spif_bd_error SPIFBlockDevice::_spi_send_program_command(int prog_inst, const void *buffer, bd_addr_t addr,
bd_size_t size)
{ {
// Send Program (write) command to device driver // Send Program (write) command to device driver
uint32_t dummy_bytes = _dummy_and_mode_cycles / 8; uint32_t dummy_bytes = _dummy_and_mode_cycles / 8;
@ -494,7 +512,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_program_command(int prog_inst, const vo
_spi.write(prog_inst); _spi.write(prog_inst);
// Write Address (can be either 3 or 4 bytes long) // Write Address (can be either 3 or 4 bytes long)
for (int address_shift = ((_address_size-1) * 8); address_shift >= 0; address_shift -= 8) { for (int address_shift = ((_address_size - 1) * 8); address_shift >= 0; address_shift -= 8) {
_spi.write((addr >> address_shift) & 0xFF); _spi.write((addr >> address_shift) & 0xFF);
} }
@ -538,7 +556,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_general_command(int instruction, bd_add
// Reading SPI Bus registers does not require Flash Address // Reading SPI Bus registers does not require Flash Address
if (addr != SPI_NO_ADDRESS_COMMAND) { if (addr != SPI_NO_ADDRESS_COMMAND) {
// Write Address (can be either 3 or 4 bytes long) // Write Address (can be either 3 or 4 bytes long)
for (int address_shift = ((_address_size-1) * 8); address_shift >= 0; address_shift -= 8) { for (int address_shift = ((_address_size - 1) * 8); address_shift >= 0; address_shift -= 8) {
_spi.write((addr >> address_shift) & 0xFF); _spi.write((addr >> address_shift) & 0xFF);
} }
@ -654,7 +672,8 @@ int SPIFBlockDevice::_sfdp_parse_basic_param_table(uint32_t basic_table_addr, si
_page_size_bytes = _sfdp_detect_page_size(param_table, basic_table_size); _page_size_bytes = _sfdp_detect_page_size(param_table, basic_table_size);
// Detect and Set Erase Types // Detect and Set Erase Types
_sfdp_detect_erase_types_inst_and_size(param_table, basic_table_size, _erase4k_inst, _erase_type_inst_arr, _erase_type_size_arr); _sfdp_detect_erase_types_inst_and_size(param_table, basic_table_size, _erase4k_inst, _erase_type_inst_arr,
_erase_type_size_arr);
_erase_instruction = _erase4k_inst; _erase_instruction = _erase4k_inst;
// Detect and Set fastest Bus mode (default 1-1-1) // Detect and Set fastest Bus mode (default 1-1-1)
@ -744,14 +763,14 @@ unsigned int SPIFBlockDevice::_sfdp_detect_page_size(uint8_t *basic_param_table_
int page_to_power_size = ( (int)basic_param_table_ptr[SPIF_BASIC_PARAM_TABLE_PAGE_SIZE_BYTE]) >> 4; int page_to_power_size = ( (int)basic_param_table_ptr[SPIF_BASIC_PARAM_TABLE_PAGE_SIZE_BYTE]) >> 4;
page_size = local_math_power(2, page_to_power_size); page_size = local_math_power(2, page_to_power_size);
tr_debug("DEBUG: Detected Page Size: %d", page_size); tr_debug("DEBUG: Detected Page Size: %d", page_size);
} } else {
else {
tr_debug("DEBUG: Using Default Page Size: %d", page_size); tr_debug("DEBUG: Using Default Page Size: %d", page_size);
} }
return page_size; return page_size;
} }
int SPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size, int& erase4k_inst, int SPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size,
int& erase4k_inst,
int *erase_type_inst_arr, unsigned int *erase_type_size_arr) int *erase_type_inst_arr, unsigned int *erase_type_size_arr)
{ {
erase4k_inst = 0xff; erase4k_inst = 0xff;
@ -803,7 +822,8 @@ int SPIFBlockDevice::_sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param
return 0; return 0;
} }
int SPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size, int& read_inst) int SPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_ptr, int basic_param_table_size,
int& read_inst)
{ {
do { do {

7
SPIFBlockDevice.h
View File

@ -83,7 +83,7 @@ public:
* @param csel SPI chip select pin * @param csel SPI chip select pin
* @param freq Clock speed of the SPI bus (defaults to 40MHz) * @param freq Clock speed of the SPI bus (defaults to 40MHz)
*/ */
SPIFBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName csel, int freq=40000000); SPIFBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName csel, int freq = 40000000);
/** Initialize a block device /** Initialize a block device
* *
@ -210,7 +210,8 @@ private:
unsigned int _sfdp_detect_page_size(uint8_t *basic_param_table_ptr, int basic_param_table_size); unsigned int _sfdp_detect_page_size(uint8_t *basic_param_table_ptr, int basic_param_table_size);
// Detect all supported erase types // Detect all supported erase types
int _sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size, int& erase4k_inst, int _sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size,
int& erase4k_inst,
int *erase_type_inst_arr, unsigned int *erase_type_size_arr); int *erase_type_inst_arr, unsigned int *erase_type_size_arr);
/***********************/ /***********************/
@ -289,7 +290,7 @@ private:
unsigned int _read_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Read Bus Mode unsigned int _read_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Read Bus Mode
unsigned int _write_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Write Bus Mode unsigned int _write_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Write Bus Mode
unsigned int _dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Current Bus Mode unsigned int _dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Current Bus Mode
uint32_t _init_ref_count;
bool _is_initialized; bool _is_initialized;
}; };