From 1ca4b1a34f2ca393beba24a7e2a542d165d5f33f Mon Sep 17 00:00:00 2001 From: Hugues Kamba Date: Fri, 8 Jan 2021 18:29:03 +0000 Subject: [PATCH] NXP: Fix heap size formula in scatter files The heap size was incorrectly calculated. This fixes it by subtracting the Stack size, any memory chunks allocated before the start of the application (for vectors and/or crash report), and finally the size of the application from the total RAM size. --- .../TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct | 6 ++++-- .../device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct | 6 ++++-- .../TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct | 6 ++++-- 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct index bfda2e6466..7ff0133599 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct @@ -16,6 +16,8 @@ #define MBED_RAM_SIZE 0x4000 #endif +#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE) + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) @@ -38,11 +40,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct index 7ddb1f4854..6a2d42eb9f 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct @@ -32,6 +32,8 @@ #define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) +#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -40,11 +42,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct index d2700d7f08..29ed724193 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct @@ -32,6 +32,8 @@ #define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE+0x20) +#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM0 MBED_APP_START 0x2FC { ; load address = execution address @@ -49,11 +51,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18 - RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE-0x20) { ; RW data + RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE-0x20) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 0x2007C000 0x4000 { ; RW data, USB RAM