diff --git a/drivers/QSPI.cpp b/drivers/QSPI.cpp index 99a06ed2f1..451180f8cf 100644 --- a/drivers/QSPI.cpp +++ b/drivers/QSPI.cpp @@ -19,9 +19,9 @@ #if DEVICE_QSPI -#define IS_BUS_WIDTH_VALID(width) ((width == QSPI_BUS_SINGLE) || (width == QSPI_BUS_DUAL) || (width == QSPI_BUS_QUAD)) -#define IS_SIZE_VALID(size) ((size == QSPI_ADDR_SIZE_NONE) || (size == QSPI_ADDR_SIZE_8) || (size == QSPI_ADDR_SIZE_16) || (size == QSPI_ADDR_SIZE_24) || (size == QSPI_ADDR_SIZE_32)) -#define IS_ALT_SIZE_VALID(alt_size) ((alt_size == QSPI_ALT_SIZE_NONE) || (alt_size == QSPI_ALT_SIZE_8) || (alt_size == QSPI_ALT_SIZE_16) || (alt_size == QSPI_ALT_SIZE_24) || (alt_size == QSPI_ALT_SIZE_32)) +#define IS_BUS_WIDTH_VALID(width) ((width == QSPI_CFG_BUS_SINGLE) || (width == QSPI_CFG_BUS_DUAL) || (width == QSPI_CFG_BUS_QUAD)) +#define IS_SIZE_VALID(size) ((size == QSPI_CFG_ADDR_SIZE_NONE) || (size == QSPI_CFG_ADDR_SIZE_8) || (size == QSPI_CFG_ADDR_SIZE_16) || (size == QSPI_CFG_ADDR_SIZE_24) || (size == QSPI_CFG_ADDR_SIZE_32)) +#define IS_ALT_SIZE_VALID(alt_size) ((alt_size == QSPI_CFG_ALT_SIZE_NONE) || (alt_size == QSPI_CFG_ALT_SIZE_8) || (alt_size == QSPI_CFG_ALT_SIZE_16) || (alt_size == QSPI_CFG_ALT_SIZE_24) || (alt_size == QSPI_CFG_ALT_SIZE_32)) namespace mbed { @@ -30,7 +30,6 @@ SingletonPtr QSPI::_mutex; QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel) : _qspi() { - // No lock needed in the constructor _qspi_io0 = io0; _qspi_io1 = io1; _qspi_io2 = io2; @@ -48,127 +47,40 @@ QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, Pin _hz = ONE_MHZ; } -qspi_return_status_t QSPI::configure_format(qspi_config_bus_width_t inst_width, qspi_config_bus_width_t address_width, qspi_config_address_size_t address_size, qspi_config_bus_width_t alt_width, qspi_config_alt_size_t alt_size, qspi_config_bus_width_t data_width, int dummy_cycles, int mode ) { +qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width_t address_width, qspi_address_size_t address_size, qspi_bus_width_t alt_width, qspi_alt_size_t alt_size, qspi_bus_width_t data_width, int dummy_cycles, int mode ) { if(!IS_BUS_WIDTH_VALID(inst_width)) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(!IS_BUS_WIDTH_VALID(address_width)) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(!IS_SIZE_VALID(address_size)) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(!IS_BUS_WIDTH_VALID(alt_width)) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(!IS_ALT_SIZE_VALID(alt_size)) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(!IS_BUS_WIDTH_VALID(data_width)) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(dummy_cycles < 0) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; if(mode != 0 && mode != 1) - return QSPI_INVALID_PARAMETER; + return QSPI_STATUS_INVALID_PARAMETER; lock(); - switch(inst_width) { - case QSPI_BUS_SINGLE: - _inst_width = QSPI_CFG_BUS_SINGLE; - break; - case QSPI_BUS_DUAL: - _inst_width = QSPI_CFG_BUS_DUAL; - break; - case QSPI_BUS_QUAD: - _inst_width = QSPI_CFG_BUS_QUAD; - break; - default: - _inst_width = QSPI_CFG_BUS_SINGLE; - } - - switch(address_width) { - case QSPI_BUS_SINGLE: - _address_width = QSPI_CFG_BUS_SINGLE; - break; - case QSPI_BUS_DUAL: - _address_width = QSPI_CFG_BUS_DUAL; - break; - case QSPI_BUS_QUAD: - _address_width = QSPI_CFG_BUS_QUAD; - break; - default: - _address_width = QSPI_CFG_BUS_SINGLE; - } - - switch(address_size) { - case QSPI_ADDR_SIZE_8: - _address_size = QSPI_CFG_ADDR_SIZE_8; - break; - case QSPI_ADDR_SIZE_16: - _address_size = QSPI_CFG_ADDR_SIZE_16; - break; - case QSPI_ADDR_SIZE_24: - _address_size = QSPI_CFG_ADDR_SIZE_24; - break; - case QSPI_ADDR_SIZE_32: - _address_size = QSPI_CFG_ADDR_SIZE_32; - break; - default: - _address_size = QSPI_CFG_ADDR_SIZE_8; - } - - switch(alt_width) { - case QSPI_BUS_SINGLE: - _alt_width = QSPI_CFG_BUS_SINGLE; - break; - case QSPI_BUS_DUAL: - _alt_width = QSPI_CFG_BUS_DUAL; - break; - case QSPI_BUS_QUAD: - _alt_width = QSPI_CFG_BUS_QUAD; - break; - default: - _alt_width = QSPI_CFG_BUS_SINGLE; - } - - switch(alt_size) { - case QSPI_ALT_SIZE_NONE: - _alt_size = QSPI_CFG_ALT_SIZE_NONE; - break; - case QSPI_ALT_SIZE_8: - _alt_size = QSPI_CFG_ALT_SIZE_8; - break; - case QSPI_ALT_SIZE_16: - _alt_size = QSPI_CFG_ALT_SIZE_16; - break; - case QSPI_ALT_SIZE_24: - _alt_size = QSPI_CFG_ALT_SIZE_24; - break; - case QSPI_ALT_SIZE_32: - _alt_size = QSPI_CFG_ALT_SIZE_32; - break; - default: - _alt_size = QSPI_CFG_ALT_SIZE_NONE; - } - - switch(data_width) { - case QSPI_BUS_SINGLE: - _data_width = QSPI_CFG_BUS_SINGLE; - break; - case QSPI_BUS_DUAL: - _data_width = QSPI_CFG_BUS_DUAL; - break; - case QSPI_BUS_QUAD: - _data_width = QSPI_CFG_BUS_QUAD; - break; - default: - _data_width = QSPI_CFG_BUS_SINGLE; - } - + _inst_width = inst_width; + _address_width = address_width; + _address_size = address_size; + _alt_width = alt_width; + _alt_size = alt_size; + _data_width = data_width; _num_dummy_cycles = dummy_cycles; _mode = mode; unlock(); - return QSPI_SUCCESS; + return QSPI_STATUS_OK; } -qspi_return_status_t QSPI::set_frequency(int hz) { - qspi_return_status_t ret_status = QSPI_SUCCESS; +qspi_status_t QSPI::set_frequency(int hz) { + qspi_status_t ret_status = QSPI_STATUS_OK; lock(); _hz = hz; @@ -176,7 +88,7 @@ qspi_return_status_t QSPI::set_frequency(int hz) { //Otherwise we may have to change mode as well, so call _acquire if (_owner == this) { if(QSPI_STATUS_OK != qspi_frequency(&_qspi, _hz)) { - ret_status = QSPI_ERROR; + ret_status = QSPI_STATUS_ERROR; } } else { _acquire(); @@ -186,16 +98,16 @@ qspi_return_status_t QSPI::set_frequency(int hz) { return ret_status; } -qspi_return_status_t QSPI::initialize() { +qspi_status_t QSPI::initialize() { lock(); qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode ); unlock(); - return ( ret == QSPI_STATUS_OK )? QSPI_SUCCESS : QSPI_ERROR; + return ( ret == QSPI_STATUS_OK )? QSPI_STATUS_OK : QSPI_STATUS_ERROR; } -qspi_return_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length) { - qspi_return_status_t ret_status = QSPI_ERROR; +qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length) { + qspi_status_t ret_status = QSPI_STATUS_ERROR; if( (rx_length != NULL) && (rx_buffer != NULL) ) { if(*rx_length != 0) { @@ -203,20 +115,20 @@ qspi_return_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *r if( true == _acquire()) { qspi_command_t *qspi_cmd = _build_qspi_command(-1, address, -1); if(QSPI_STATUS_OK == qspi_read(&_qspi, qspi_cmd, rx_buffer, rx_length)) { - ret_status = QSPI_SUCCESS; + ret_status = QSPI_STATUS_OK; } } unlock(); } } else { - ret_status = QSPI_INVALID_PARAMETER; + ret_status = QSPI_STATUS_INVALID_PARAMETER; } return ret_status; } -qspi_return_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *tx_length) { - qspi_return_status_t ret_status = QSPI_ERROR; +qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *tx_length) { + qspi_status_t ret_status = QSPI_STATUS_ERROR; if( (tx_length != NULL) && (tx_buffer != NULL) ) { if(*tx_length != 0) { @@ -224,20 +136,20 @@ qspi_return_status_t QSPI::write(unsigned int address, const char *tx_buffer, si if(true == _acquire()) { qspi_command_t *qspi_cmd = _build_qspi_command(-1, address, -1); if(QSPI_STATUS_OK == qspi_write(&_qspi, qspi_cmd, tx_buffer, tx_length)) { - ret_status = QSPI_SUCCESS; + ret_status = QSPI_STATUS_OK; } } unlock(); } } else { - ret_status = QSPI_INVALID_PARAMETER; + ret_status = QSPI_STATUS_INVALID_PARAMETER; } return ret_status; } -qspi_return_status_t QSPI::read(unsigned int instruction, unsigned int address, unsigned int alt, char *rx_buffer, size_t *rx_length) { - qspi_return_status_t ret_status = QSPI_ERROR; +qspi_status_t QSPI::read(unsigned int instruction, unsigned int address, unsigned int alt, char *rx_buffer, size_t *rx_length) { + qspi_status_t ret_status = QSPI_STATUS_ERROR; if( (rx_length != NULL) && (rx_buffer != NULL) ) { if(*rx_length != 0) { @@ -245,20 +157,20 @@ qspi_return_status_t QSPI::read(unsigned int instruction, unsigned int address, if( true == _acquire()) { qspi_command_t *qspi_cmd = _build_qspi_command(instruction, address, alt); if(QSPI_STATUS_OK == qspi_read(&_qspi, qspi_cmd, rx_buffer, rx_length)) { - ret_status = QSPI_SUCCESS; + ret_status = QSPI_STATUS_OK; } } unlock(); } } else { - ret_status = QSPI_INVALID_PARAMETER; + ret_status = QSPI_STATUS_INVALID_PARAMETER; } return ret_status; } -qspi_return_status_t QSPI::write(unsigned int instruction, unsigned int address, unsigned int alt, const char *tx_buffer, size_t *tx_length) { - qspi_return_status_t ret_status = QSPI_ERROR; +qspi_status_t QSPI::write(unsigned int instruction, unsigned int address, unsigned int alt, const char *tx_buffer, size_t *tx_length) { + qspi_status_t ret_status = QSPI_STATUS_ERROR; if( (tx_length != NULL) && (tx_buffer != NULL) ) { if(*tx_length != 0) { @@ -266,27 +178,27 @@ qspi_return_status_t QSPI::write(unsigned int instruction, unsigned int address, if(true == _acquire()) { qspi_command_t *qspi_cmd = _build_qspi_command(instruction, address, alt); if(QSPI_STATUS_OK == qspi_write(&_qspi, qspi_cmd, tx_buffer, tx_length)) { - ret_status = QSPI_SUCCESS; + ret_status = QSPI_STATUS_OK; } } unlock(); } } else { - ret_status = QSPI_INVALID_PARAMETER; + ret_status = QSPI_STATUS_INVALID_PARAMETER; } return ret_status; } -qspi_return_status_t QSPI::command_transfer(unsigned int instruction, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length) { - qspi_return_status_t ret_status = QSPI_ERROR; +qspi_status_t QSPI::command_transfer(unsigned int instruction, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length) { + qspi_status_t ret_status = QSPI_STATUS_ERROR; lock(); if(true == _acquire()) { qspi_command_t *qspi_cmd = _build_qspi_command(instruction, -1, -1); //We just need the command if(QSPI_STATUS_OK == qspi_command_transfer(&_qspi, qspi_cmd, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) { //We got error status, return 0 - ret_status = QSPI_SUCCESS; + ret_status = QSPI_STATUS_OK; } } unlock(); diff --git a/drivers/QSPI.h b/drivers/QSPI.h index f71bd106ad..7bc8f5744c 100644 --- a/drivers/QSPI.h +++ b/drivers/QSPI.h @@ -29,43 +29,6 @@ namespace mbed { -// Config/Mode Defines -/** QSPI Bus width Enum - */ -typedef enum qspi_config_bus_width { - QSPI_BUS_SINGLE, - QSPI_BUS_DUAL, - QSPI_BUS_QUAD, -} qspi_config_bus_width_t; - -/** Address size Enum - */ -typedef enum qspi_config_address_size { - QSPI_ADDR_SIZE_NONE, - QSPI_ADDR_SIZE_8, - QSPI_ADDR_SIZE_16, - QSPI_ADDR_SIZE_24, - QSPI_ADDR_SIZE_32, -} qspi_config_address_size_t; - -/** Alternative size Enum - */ -typedef enum qspi_config_alt_size { - QSPI_ALT_SIZE_NONE, - QSPI_ALT_SIZE_8, - QSPI_ALT_SIZE_16, - QSPI_ALT_SIZE_24, - QSPI_ALT_SIZE_32, -} qspi_config_alt_size_t; - -/** QSPI Driver Return Status Enum - */ -typedef enum qspi_return_status { - QSPI_ERROR = -1, /**< Generic error >*/ - QSPI_INVALID_PARAMETER = -2, /**< The parameter is invalid >*/ - QSPI_SUCCESS = 0, /**< Function executed sucessfully >*/ -} qspi_return_status_t; - /** \addtogroup drivers */ /** A QSPI Driver, used for communicating with QSPI slave devices @@ -128,12 +91,12 @@ public: * @param mode Mode specifies the SPI mode(Mode=0 uses CPOL=0, CPHA=0, Mode=1 uses CPOL=1, CPHA=1) * */ - qspi_return_status_t configure_format(qspi_config_bus_width_t inst_width, - qspi_config_bus_width_t address_width, - qspi_config_address_size_t address_size, - qspi_config_bus_width_t alt_width, - qspi_config_alt_size_t alt_size, - qspi_config_bus_width_t data_width, + qspi_status_t configure_format(qspi_bus_width_t inst_width, + qspi_bus_width_t address_width, + qspi_address_size_t address_size, + qspi_bus_width_t alt_width, + qspi_alt_size_t alt_size, + qspi_bus_width_t data_width, int dummy_cycles, int mode); @@ -141,16 +104,16 @@ public: * * This function must be called before doing any operation on the QSPI bus to initialize the interface */ - qspi_return_status_t initialize(); + qspi_status_t initialize(); /** Set the qspi bus clock frequency * * @param hz SCLK frequency in hz (default = 1MHz) * @returns - * Returns QSPI_SUCCESS on successful, fails if the interface is already init-ed + * Returns QSPI_STATUS_SUCCESS on successful, fails if the interface is already init-ed */ - qspi_return_status_t set_frequency(int hz = ONE_MHZ); + qspi_status_t set_frequency(int hz = ONE_MHZ); /** Read from QSPI peripheral with the preset read_instruction and alt_value * @@ -159,9 +122,9 @@ public: * @param rx_length Pointer to a variable containing the length of rx_buffer, and on return this variable will be updated with the actual number of bytes read * * @returns - * Returns QSPI_SUCCESS on successful reads and QSPI_ERROR on failed reads. + * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. */ - qspi_return_status_t read(unsigned int address, char *rx_buffer, size_t *rx_length); + qspi_status_t read(unsigned int address, char *rx_buffer, size_t *rx_length); /** Write to QSPI peripheral with the preset write_instruction and alt_value * @@ -170,9 +133,9 @@ public: * @param tx_length Pointer to a variable containing the length of data to be transmitted, and on return this variable will be updated with the actual number of bytes written * * @returns - * Returns QSPI_SUCCESS on successful reads and QSPI_ERROR on failed reads. + * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. */ - qspi_return_status_t write(unsigned int address, const char *tx_buffer, size_t *tx_length); + qspi_status_t write(unsigned int address, const char *tx_buffer, size_t *tx_length); /** Read from QSPI peripheral using custom read instruction, alt values * @@ -183,9 +146,9 @@ public: * @param rx_length Pointer to a variable containing the length of rx_buffer, and on return this variable will be updated with the actual number of bytes read * * @returns - * Returns QSPI_SUCCESS on successful reads and QSPI_ERROR on failed reads. + * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. */ - qspi_return_status_t read(unsigned int instruction, unsigned int address, unsigned int alt, char *rx_buffer, size_t *rx_length); + qspi_status_t read(unsigned int instruction, unsigned int address, unsigned int alt, char *rx_buffer, size_t *rx_length); /** Write to QSPI peripheral using custom write instruction, alt values * @@ -196,9 +159,9 @@ public: * @param tx_length Pointer to a variable containing the length of data to be transmitted, and on return this variable will be updated with the actual number of bytes written * * @returns - * Returns QSPI_SUCCESS on successful reads and QSPI_ERROR on failed reads. + * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. */ - qspi_return_status_t write(unsigned int instruction, unsigned int address, unsigned int alt, const char *tx_buffer, size_t *tx_length); + qspi_status_t write(unsigned int instruction, unsigned int address, unsigned int alt, const char *tx_buffer, size_t *tx_length); /** Perform a transaction to write to an address(a control register) and get the status results * @@ -209,9 +172,9 @@ public: * @param rx_length Pointer to a variable containing the length of rx_buffer, and on return this variable will be updated with the actual number of bytes read * * @returns - * Returns QSPI_SUCCESS on successful reads and QSPI_ERROR on failed reads. + * Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads. */ - qspi_return_status_t command_transfer(unsigned int instruction, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length); + qspi_status_t command_transfer(unsigned int instruction, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length); /** Acquire exclusive access to this SPI bus */