diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_01_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_01_cm0plus.s deleted file mode 100644 index 9e78deadef..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_01_cm0plus.s +++ /dev/null @@ -1,271 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_01_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CM0+ NVIC Mux input 0 - DCD NvicMux1_IRQHandler ; CM0+ NVIC Mux input 1 - DCD NvicMux2_IRQHandler ; CM0+ NVIC Mux input 2 - DCD NvicMux3_IRQHandler ; CM0+ NVIC Mux input 3 - DCD NvicMux4_IRQHandler ; CM0+ NVIC Mux input 4 - DCD NvicMux5_IRQHandler ; CM0+ NVIC Mux input 5 - DCD NvicMux6_IRQHandler ; CM0+ NVIC Mux input 6 - DCD NvicMux7_IRQHandler ; CM0+ NVIC Mux input 7 - DCD NvicMux8_IRQHandler ; CM0+ NVIC Mux input 8 - DCD NvicMux9_IRQHandler ; CM0+ NVIC Mux input 9 - DCD NvicMux10_IRQHandler ; CM0+ NVIC Mux input 10 - DCD NvicMux11_IRQHandler ; CM0+ NVIC Mux input 11 - DCD NvicMux12_IRQHandler ; CM0+ NVIC Mux input 12 - DCD NvicMux13_IRQHandler ; CM0+ NVIC Mux input 13 - DCD NvicMux14_IRQHandler ; CM0+ NVIC Mux input 14 - DCD NvicMux15_IRQHandler ; CM0+ NVIC Mux input 15 - DCD NvicMux16_IRQHandler ; CM0+ NVIC Mux input 16 - DCD NvicMux17_IRQHandler ; CM0+ NVIC Mux input 17 - DCD NvicMux18_IRQHandler ; CM0+ NVIC Mux input 18 - DCD NvicMux19_IRQHandler ; CM0+ NVIC Mux input 19 - DCD NvicMux20_IRQHandler ; CM0+ NVIC Mux input 20 - DCD NvicMux21_IRQHandler ; CM0+ NVIC Mux input 21 - DCD NvicMux22_IRQHandler ; CM0+ NVIC Mux input 22 - DCD NvicMux23_IRQHandler ; CM0+ NVIC Mux input 23 - DCD NvicMux24_IRQHandler ; CM0+ NVIC Mux input 24 - DCD NvicMux25_IRQHandler ; CM0+ NVIC Mux input 25 - DCD NvicMux26_IRQHandler ; CM0+ NVIC Mux input 26 - DCD NvicMux27_IRQHandler ; CM0+ NVIC Mux input 27 - DCD NvicMux28_IRQHandler ; CM0+ NVIC Mux input 28 - DCD NvicMux29_IRQHandler ; CM0+ NVIC Mux input 29 - DCD NvicMux30_IRQHandler ; CM0+ NVIC Mux input 30 - DCD NvicMux31_IRQHandler ; CM0+ NVIC Mux input 31 - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP - -HardFault_Handler PROC - EXPORT HardFault_Handler [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP - -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT NvicMux0_IRQHandler [WEAK] - EXPORT NvicMux1_IRQHandler [WEAK] - EXPORT NvicMux2_IRQHandler [WEAK] - EXPORT NvicMux3_IRQHandler [WEAK] - EXPORT NvicMux4_IRQHandler [WEAK] - EXPORT NvicMux5_IRQHandler [WEAK] - EXPORT NvicMux6_IRQHandler [WEAK] - EXPORT NvicMux7_IRQHandler [WEAK] - EXPORT NvicMux8_IRQHandler [WEAK] - EXPORT NvicMux9_IRQHandler [WEAK] - EXPORT NvicMux10_IRQHandler [WEAK] - EXPORT NvicMux11_IRQHandler [WEAK] - EXPORT NvicMux12_IRQHandler [WEAK] - EXPORT NvicMux13_IRQHandler [WEAK] - EXPORT NvicMux14_IRQHandler [WEAK] - EXPORT NvicMux15_IRQHandler [WEAK] - EXPORT NvicMux16_IRQHandler [WEAK] - EXPORT NvicMux17_IRQHandler [WEAK] - EXPORT NvicMux18_IRQHandler [WEAK] - EXPORT NvicMux19_IRQHandler [WEAK] - EXPORT NvicMux20_IRQHandler [WEAK] - EXPORT NvicMux21_IRQHandler [WEAK] - EXPORT NvicMux22_IRQHandler [WEAK] - EXPORT NvicMux23_IRQHandler [WEAK] - EXPORT NvicMux24_IRQHandler [WEAK] - EXPORT NvicMux25_IRQHandler [WEAK] - EXPORT NvicMux26_IRQHandler [WEAK] - EXPORT NvicMux27_IRQHandler [WEAK] - EXPORT NvicMux28_IRQHandler [WEAK] - EXPORT NvicMux29_IRQHandler [WEAK] - EXPORT NvicMux30_IRQHandler [WEAK] - EXPORT NvicMux31_IRQHandler [WEAK] - -NvicMux0_IRQHandler -NvicMux1_IRQHandler -NvicMux2_IRQHandler -NvicMux3_IRQHandler -NvicMux4_IRQHandler -NvicMux5_IRQHandler -NvicMux6_IRQHandler -NvicMux7_IRQHandler -NvicMux8_IRQHandler -NvicMux9_IRQHandler -NvicMux10_IRQHandler -NvicMux11_IRQHandler -NvicMux12_IRQHandler -NvicMux13_IRQHandler -NvicMux14_IRQHandler -NvicMux15_IRQHandler -NvicMux16_IRQHandler -NvicMux17_IRQHandler -NvicMux18_IRQHandler -NvicMux19_IRQHandler -NvicMux20_IRQHandler -NvicMux21_IRQHandler -NvicMux22_IRQHandler -NvicMux23_IRQHandler -NvicMux24_IRQHandler -NvicMux25_IRQHandler -NvicMux26_IRQHandler -NvicMux27_IRQHandler -NvicMux28_IRQHandler -NvicMux29_IRQHandler -NvicMux30_IRQHandler -NvicMux31_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_02_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_02_cm0plus.s deleted file mode 100644 index 332737ec48..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_02_cm0plus.s +++ /dev/null @@ -1,223 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_02_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 - DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 - DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 - DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 - DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 - DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 - DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 - DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 - DCD Internal0_IRQHandler ; Internal SW Interrupt #0 - DCD Internal1_IRQHandler ; Internal SW Interrupt #1 - DCD Internal2_IRQHandler ; Internal SW Interrupt #2 - DCD Internal3_IRQHandler ; Internal SW Interrupt #3 - DCD Internal4_IRQHandler ; Internal SW Interrupt #4 - DCD Internal5_IRQHandler ; Internal SW Interrupt #5 - DCD Internal6_IRQHandler ; Internal SW Interrupt #6 - DCD Internal7_IRQHandler ; Internal SW Interrupt #7 - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP - -HardFault_Handler PROC - EXPORT HardFault_Handler [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP - -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT NvicMux0_IRQHandler [WEAK] - EXPORT NvicMux1_IRQHandler [WEAK] - EXPORT NvicMux2_IRQHandler [WEAK] - EXPORT NvicMux3_IRQHandler [WEAK] - EXPORT NvicMux4_IRQHandler [WEAK] - EXPORT NvicMux5_IRQHandler [WEAK] - EXPORT NvicMux6_IRQHandler [WEAK] - EXPORT NvicMux7_IRQHandler [WEAK] - EXPORT Internal0_IRQHandler [WEAK] - EXPORT Internal1_IRQHandler [WEAK] - EXPORT Internal2_IRQHandler [WEAK] - EXPORT Internal3_IRQHandler [WEAK] - EXPORT Internal4_IRQHandler [WEAK] - EXPORT Internal5_IRQHandler [WEAK] - EXPORT Internal6_IRQHandler [WEAK] - EXPORT Internal7_IRQHandler [WEAK] - -NvicMux0_IRQHandler -NvicMux1_IRQHandler -NvicMux2_IRQHandler -NvicMux3_IRQHandler -NvicMux4_IRQHandler -NvicMux5_IRQHandler -NvicMux6_IRQHandler -NvicMux7_IRQHandler -Internal0_IRQHandler -Internal1_IRQHandler -Internal2_IRQHandler -Internal3_IRQHandler -Internal4_IRQHandler -Internal5_IRQHandler -Internal6_IRQHandler -Internal7_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_03_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_03_cm0plus.s deleted file mode 100644 index ea55834527..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_03_cm0plus.s +++ /dev/null @@ -1,223 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_03_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 - DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 - DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 - DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 - DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 - DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 - DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 - DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 - DCD Internal0_IRQHandler ; Internal SW Interrupt #0 - DCD Internal1_IRQHandler ; Internal SW Interrupt #1 - DCD Internal2_IRQHandler ; Internal SW Interrupt #2 - DCD Internal3_IRQHandler ; Internal SW Interrupt #3 - DCD Internal4_IRQHandler ; Internal SW Interrupt #4 - DCD Internal5_IRQHandler ; Internal SW Interrupt #5 - DCD Internal6_IRQHandler ; Internal SW Interrupt #6 - DCD Internal7_IRQHandler ; Internal SW Interrupt #7 - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP - -HardFault_Handler PROC - EXPORT HardFault_Handler [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP - -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT NvicMux0_IRQHandler [WEAK] - EXPORT NvicMux1_IRQHandler [WEAK] - EXPORT NvicMux2_IRQHandler [WEAK] - EXPORT NvicMux3_IRQHandler [WEAK] - EXPORT NvicMux4_IRQHandler [WEAK] - EXPORT NvicMux5_IRQHandler [WEAK] - EXPORT NvicMux6_IRQHandler [WEAK] - EXPORT NvicMux7_IRQHandler [WEAK] - EXPORT Internal0_IRQHandler [WEAK] - EXPORT Internal1_IRQHandler [WEAK] - EXPORT Internal2_IRQHandler [WEAK] - EXPORT Internal3_IRQHandler [WEAK] - EXPORT Internal4_IRQHandler [WEAK] - EXPORT Internal5_IRQHandler [WEAK] - EXPORT Internal6_IRQHandler [WEAK] - EXPORT Internal7_IRQHandler [WEAK] - -NvicMux0_IRQHandler -NvicMux1_IRQHandler -NvicMux2_IRQHandler -NvicMux3_IRQHandler -NvicMux4_IRQHandler -NvicMux5_IRQHandler -NvicMux6_IRQHandler -NvicMux7_IRQHandler -Internal0_IRQHandler -Internal1_IRQHandler -Internal2_IRQHandler -Internal3_IRQHandler -Internal4_IRQHandler -Internal5_IRQHandler -Internal6_IRQHandler -Internal7_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_04_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_04_cm0plus.s deleted file mode 100644 index 0305d1e220..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/startup_psoc6_04_cm0plus.s +++ /dev/null @@ -1,223 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_04_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 - DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 - DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 - DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 - DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 - DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 - DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 - DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 - DCD Internal0_IRQHandler ; Internal SW Interrupt #0 - DCD Internal1_IRQHandler ; Internal SW Interrupt #1 - DCD Internal2_IRQHandler ; Internal SW Interrupt #2 - DCD Internal3_IRQHandler ; Internal SW Interrupt #3 - DCD Internal4_IRQHandler ; Internal SW Interrupt #4 - DCD Internal5_IRQHandler ; Internal SW Interrupt #5 - DCD Internal6_IRQHandler ; Internal SW Interrupt #6 - DCD Internal7_IRQHandler ; Internal SW Interrupt #7 - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP - -HardFault_Handler PROC - EXPORT HardFault_Handler [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP - -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT NvicMux0_IRQHandler [WEAK] - EXPORT NvicMux1_IRQHandler [WEAK] - EXPORT NvicMux2_IRQHandler [WEAK] - EXPORT NvicMux3_IRQHandler [WEAK] - EXPORT NvicMux4_IRQHandler [WEAK] - EXPORT NvicMux5_IRQHandler [WEAK] - EXPORT NvicMux6_IRQHandler [WEAK] - EXPORT NvicMux7_IRQHandler [WEAK] - EXPORT Internal0_IRQHandler [WEAK] - EXPORT Internal1_IRQHandler [WEAK] - EXPORT Internal2_IRQHandler [WEAK] - EXPORT Internal3_IRQHandler [WEAK] - EXPORT Internal4_IRQHandler [WEAK] - EXPORT Internal5_IRQHandler [WEAK] - EXPORT Internal6_IRQHandler [WEAK] - EXPORT Internal7_IRQHandler [WEAK] - -NvicMux0_IRQHandler -NvicMux1_IRQHandler -NvicMux2_IRQHandler -NvicMux3_IRQHandler -NvicMux4_IRQHandler -NvicMux5_IRQHandler -NvicMux6_IRQHandler -NvicMux7_IRQHandler -Internal0_IRQHandler -Internal1_IRQHandler -Internal2_IRQHandler -Internal3_IRQHandler -Internal4_IRQHandler -Internal5_IRQHandler -Internal6_IRQHandler -Internal7_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_01_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_01_cm0plus.s deleted file mode 100644 index dbba869be4..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_01_cm0plus.s +++ /dev/null @@ -1,427 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_01_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD 0 - DCD 0 - DCD 0 -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD 0 - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CM0+ NVIC Mux input 0 - DCD NvicMux1_IRQHandler ; CM0+ NVIC Mux input 1 - DCD NvicMux2_IRQHandler ; CM0+ NVIC Mux input 2 - DCD NvicMux3_IRQHandler ; CM0+ NVIC Mux input 3 - DCD NvicMux4_IRQHandler ; CM0+ NVIC Mux input 4 - DCD NvicMux5_IRQHandler ; CM0+ NVIC Mux input 5 - DCD NvicMux6_IRQHandler ; CM0+ NVIC Mux input 6 - DCD NvicMux7_IRQHandler ; CM0+ NVIC Mux input 7 - DCD NvicMux8_IRQHandler ; CM0+ NVIC Mux input 8 - DCD NvicMux9_IRQHandler ; CM0+ NVIC Mux input 9 - DCD NvicMux10_IRQHandler ; CM0+ NVIC Mux input 10 - DCD NvicMux11_IRQHandler ; CM0+ NVIC Mux input 11 - DCD NvicMux12_IRQHandler ; CM0+ NVIC Mux input 12 - DCD NvicMux13_IRQHandler ; CM0+ NVIC Mux input 13 - DCD NvicMux14_IRQHandler ; CM0+ NVIC Mux input 14 - DCD NvicMux15_IRQHandler ; CM0+ NVIC Mux input 15 - DCD NvicMux16_IRQHandler ; CM0+ NVIC Mux input 16 - DCD NvicMux17_IRQHandler ; CM0+ NVIC Mux input 17 - DCD NvicMux18_IRQHandler ; CM0+ NVIC Mux input 18 - DCD NvicMux19_IRQHandler ; CM0+ NVIC Mux input 19 - DCD NvicMux20_IRQHandler ; CM0+ NVIC Mux input 20 - DCD NvicMux21_IRQHandler ; CM0+ NVIC Mux input 21 - DCD NvicMux22_IRQHandler ; CM0+ NVIC Mux input 22 - DCD NvicMux23_IRQHandler ; CM0+ NVIC Mux input 23 - DCD NvicMux24_IRQHandler ; CM0+ NVIC Mux input 24 - DCD NvicMux25_IRQHandler ; CM0+ NVIC Mux input 25 - DCD NvicMux26_IRQHandler ; CM0+ NVIC Mux input 26 - DCD NvicMux27_IRQHandler ; CM0+ NVIC Mux input 27 - DCD NvicMux28_IRQHandler ; CM0+ NVIC Mux input 28 - DCD NvicMux29_IRQHandler ; CM0+ NVIC Mux input 29 - DCD NvicMux30_IRQHandler ; CM0+ NVIC Mux input 30 - DCD NvicMux31_IRQHandler ; CM0+ NVIC Mux input 31 - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK NvicMux0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux0_IRQHandler - B NvicMux0_IRQHandler - - PUBWEAK NvicMux1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux1_IRQHandler - B NvicMux1_IRQHandler - - PUBWEAK NvicMux2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux2_IRQHandler - B NvicMux2_IRQHandler - - PUBWEAK NvicMux3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux3_IRQHandler - B NvicMux3_IRQHandler - - PUBWEAK NvicMux4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux4_IRQHandler - B NvicMux4_IRQHandler - - PUBWEAK NvicMux5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux5_IRQHandler - B NvicMux5_IRQHandler - - PUBWEAK NvicMux6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux6_IRQHandler - B NvicMux6_IRQHandler - - PUBWEAK NvicMux7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux7_IRQHandler - B NvicMux7_IRQHandler - - PUBWEAK NvicMux8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux8_IRQHandler - B NvicMux8_IRQHandler - - PUBWEAK NvicMux9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux9_IRQHandler - B NvicMux9_IRQHandler - - PUBWEAK NvicMux10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux10_IRQHandler - B NvicMux10_IRQHandler - - PUBWEAK NvicMux11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux11_IRQHandler - B NvicMux11_IRQHandler - - PUBWEAK NvicMux12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux12_IRQHandler - B NvicMux12_IRQHandler - - PUBWEAK NvicMux13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux13_IRQHandler - B NvicMux13_IRQHandler - - PUBWEAK NvicMux14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux14_IRQHandler - B NvicMux14_IRQHandler - - PUBWEAK NvicMux15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux15_IRQHandler - B NvicMux15_IRQHandler - - PUBWEAK NvicMux16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux16_IRQHandler - B NvicMux16_IRQHandler - - PUBWEAK NvicMux17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux17_IRQHandler - B NvicMux17_IRQHandler - - PUBWEAK NvicMux18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux18_IRQHandler - B NvicMux18_IRQHandler - - PUBWEAK NvicMux19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux19_IRQHandler - B NvicMux19_IRQHandler - - PUBWEAK NvicMux20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux20_IRQHandler - B NvicMux20_IRQHandler - - PUBWEAK NvicMux21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux21_IRQHandler - B NvicMux21_IRQHandler - - PUBWEAK NvicMux22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux22_IRQHandler - B NvicMux22_IRQHandler - - PUBWEAK NvicMux23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux23_IRQHandler - B NvicMux23_IRQHandler - - PUBWEAK NvicMux24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux24_IRQHandler - B NvicMux24_IRQHandler - - PUBWEAK NvicMux25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux25_IRQHandler - B NvicMux25_IRQHandler - - PUBWEAK NvicMux26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux26_IRQHandler - B NvicMux26_IRQHandler - - PUBWEAK NvicMux27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux27_IRQHandler - B NvicMux27_IRQHandler - - PUBWEAK NvicMux28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux28_IRQHandler - B NvicMux28_IRQHandler - - PUBWEAK NvicMux29_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux29_IRQHandler - B NvicMux29_IRQHandler - - PUBWEAK NvicMux30_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux30_IRQHandler - B NvicMux30_IRQHandler - - PUBWEAK NvicMux31_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux31_IRQHandler - B NvicMux31_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_02_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_02_cm0plus.s deleted file mode 100644 index 3fa2e866e7..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_02_cm0plus.s +++ /dev/null @@ -1,331 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_02_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD 0 - DCD 0 - DCD 0 -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD 0 - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 - DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 - DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 - DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 - DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 - DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 - DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 - DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 - DCD Internal0_IRQHandler ; Internal SW Interrupt #0 - DCD Internal1_IRQHandler ; Internal SW Interrupt #1 - DCD Internal2_IRQHandler ; Internal SW Interrupt #2 - DCD Internal3_IRQHandler ; Internal SW Interrupt #3 - DCD Internal4_IRQHandler ; Internal SW Interrupt #4 - DCD Internal5_IRQHandler ; Internal SW Interrupt #5 - DCD Internal6_IRQHandler ; Internal SW Interrupt #6 - DCD Internal7_IRQHandler ; Internal SW Interrupt #7 - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK NvicMux0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux0_IRQHandler - B NvicMux0_IRQHandler - - PUBWEAK NvicMux1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux1_IRQHandler - B NvicMux1_IRQHandler - - PUBWEAK NvicMux2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux2_IRQHandler - B NvicMux2_IRQHandler - - PUBWEAK NvicMux3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux3_IRQHandler - B NvicMux3_IRQHandler - - PUBWEAK NvicMux4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux4_IRQHandler - B NvicMux4_IRQHandler - - PUBWEAK NvicMux5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux5_IRQHandler - B NvicMux5_IRQHandler - - PUBWEAK NvicMux6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux6_IRQHandler - B NvicMux6_IRQHandler - - PUBWEAK NvicMux7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux7_IRQHandler - B NvicMux7_IRQHandler - - PUBWEAK Internal0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal0_IRQHandler - B Internal0_IRQHandler - - PUBWEAK Internal1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal1_IRQHandler - B Internal1_IRQHandler - - PUBWEAK Internal2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal2_IRQHandler - B Internal2_IRQHandler - - PUBWEAK Internal3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal3_IRQHandler - B Internal3_IRQHandler - - PUBWEAK Internal4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal4_IRQHandler - B Internal4_IRQHandler - - PUBWEAK Internal5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal5_IRQHandler - B Internal5_IRQHandler - - PUBWEAK Internal6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal6_IRQHandler - B Internal6_IRQHandler - - PUBWEAK Internal7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal7_IRQHandler - B Internal7_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_03_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_03_cm0plus.s deleted file mode 100644 index 56c38a97ed..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_03_cm0plus.s +++ /dev/null @@ -1,331 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_03_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD 0 - DCD 0 - DCD 0 -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD 0 - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 - DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 - DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 - DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 - DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 - DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 - DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 - DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 - DCD Internal0_IRQHandler ; Internal SW Interrupt #0 - DCD Internal1_IRQHandler ; Internal SW Interrupt #1 - DCD Internal2_IRQHandler ; Internal SW Interrupt #2 - DCD Internal3_IRQHandler ; Internal SW Interrupt #3 - DCD Internal4_IRQHandler ; Internal SW Interrupt #4 - DCD Internal5_IRQHandler ; Internal SW Interrupt #5 - DCD Internal6_IRQHandler ; Internal SW Interrupt #6 - DCD Internal7_IRQHandler ; Internal SW Interrupt #7 - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK NvicMux0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux0_IRQHandler - B NvicMux0_IRQHandler - - PUBWEAK NvicMux1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux1_IRQHandler - B NvicMux1_IRQHandler - - PUBWEAK NvicMux2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux2_IRQHandler - B NvicMux2_IRQHandler - - PUBWEAK NvicMux3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux3_IRQHandler - B NvicMux3_IRQHandler - - PUBWEAK NvicMux4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux4_IRQHandler - B NvicMux4_IRQHandler - - PUBWEAK NvicMux5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux5_IRQHandler - B NvicMux5_IRQHandler - - PUBWEAK NvicMux6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux6_IRQHandler - B NvicMux6_IRQHandler - - PUBWEAK NvicMux7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux7_IRQHandler - B NvicMux7_IRQHandler - - PUBWEAK Internal0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal0_IRQHandler - B Internal0_IRQHandler - - PUBWEAK Internal1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal1_IRQHandler - B Internal1_IRQHandler - - PUBWEAK Internal2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal2_IRQHandler - B Internal2_IRQHandler - - PUBWEAK Internal3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal3_IRQHandler - B Internal3_IRQHandler - - PUBWEAK Internal4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal4_IRQHandler - B Internal4_IRQHandler - - PUBWEAK Internal5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal5_IRQHandler - B Internal5_IRQHandler - - PUBWEAK Internal6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal6_IRQHandler - B Internal6_IRQHandler - - PUBWEAK Internal7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal7_IRQHandler - B Internal7_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_04_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_04_cm0plus.s deleted file mode 100644 index a520420369..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/startup_psoc6_04_cm0plus.s +++ /dev/null @@ -1,331 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_04_cm0plus.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM0plus Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD 0 - DCD 0 - DCD 0 -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD 0 - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD NvicMux0_IRQHandler ; CPU User Interrupt #0 - DCD NvicMux1_IRQHandler ; CPU User Interrupt #1 - DCD NvicMux2_IRQHandler ; CPU User Interrupt #2 - DCD NvicMux3_IRQHandler ; CPU User Interrupt #3 - DCD NvicMux4_IRQHandler ; CPU User Interrupt #4 - DCD NvicMux5_IRQHandler ; CPU User Interrupt #5 - DCD NvicMux6_IRQHandler ; CPU User Interrupt #6 - DCD NvicMux7_IRQHandler ; CPU User Interrupt #7 - DCD Internal0_IRQHandler ; Internal SW Interrupt #0 - DCD Internal1_IRQHandler ; Internal SW Interrupt #1 - DCD Internal2_IRQHandler ; Internal SW Interrupt #2 - DCD Internal3_IRQHandler ; Internal SW Interrupt #3 - DCD Internal4_IRQHandler ; Internal SW Interrupt #4 - DCD Internal5_IRQHandler ; Internal SW Interrupt #5 - DCD Internal6_IRQHandler ; Internal SW Interrupt #6 - DCD Internal7_IRQHandler ; Internal SW Interrupt #7 - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - THUMB - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK NvicMux0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux0_IRQHandler - B NvicMux0_IRQHandler - - PUBWEAK NvicMux1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux1_IRQHandler - B NvicMux1_IRQHandler - - PUBWEAK NvicMux2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux2_IRQHandler - B NvicMux2_IRQHandler - - PUBWEAK NvicMux3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux3_IRQHandler - B NvicMux3_IRQHandler - - PUBWEAK NvicMux4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux4_IRQHandler - B NvicMux4_IRQHandler - - PUBWEAK NvicMux5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux5_IRQHandler - B NvicMux5_IRQHandler - - PUBWEAK NvicMux6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux6_IRQHandler - B NvicMux6_IRQHandler - - PUBWEAK NvicMux7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -NvicMux7_IRQHandler - B NvicMux7_IRQHandler - - PUBWEAK Internal0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal0_IRQHandler - B Internal0_IRQHandler - - PUBWEAK Internal1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal1_IRQHandler - B Internal1_IRQHandler - - PUBWEAK Internal2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal2_IRQHandler - B Internal2_IRQHandler - - PUBWEAK Internal3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal3_IRQHandler - B Internal3_IRQHandler - - PUBWEAK Internal4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal4_IRQHandler - B Internal4_IRQHandler - - PUBWEAK Internal5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal5_IRQHandler - B Internal5_IRQHandler - - PUBWEAK Internal6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal6_IRQHandler - B Internal6_IRQHandler - - PUBWEAK Internal7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Internal7_IRQHandler - B Internal7_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_01_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_01_cm4.s deleted file mode 100644 index dd04a07d30..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_01_cm4.s +++ /dev/null @@ -1,645 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_01_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD ioss_interrupts_gpio_1_IRQHandler ; GPIO Port Interrupt #1 - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD ioss_interrupts_gpio_4_IRQHandler ; GPIO Port Interrupt #4 - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD ioss_interrupts_gpio_13_IRQHandler ; GPIO Port Interrupt #13 - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_8_interrupt_IRQHandler ; Serial Communication Block #8 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD pass_interrupt_ctbs_IRQHandler ; CTBm Interrupt (all CTBms) - DCD bless_interrupt_IRQHandler ; Bluetooth Radio interrupt - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD scb_3_interrupt_IRQHandler ; Serial Communication Block #3 - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 - DCD scb_7_interrupt_IRQHandler ; Serial Communication Block #7 - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD tcpwm_0_interrupts_4_IRQHandler ; TCPWM #0, Counter #4 - DCD tcpwm_0_interrupts_5_IRQHandler ; TCPWM #0, Counter #5 - DCD tcpwm_0_interrupts_6_IRQHandler ; TCPWM #0, Counter #6 - DCD tcpwm_0_interrupts_7_IRQHandler ; TCPWM #0, Counter #7 - DCD tcpwm_1_interrupts_0_IRQHandler ; TCPWM #1, Counter #0 - DCD tcpwm_1_interrupts_1_IRQHandler ; TCPWM #1, Counter #1 - DCD tcpwm_1_interrupts_2_IRQHandler ; TCPWM #1, Counter #2 - DCD tcpwm_1_interrupts_3_IRQHandler ; TCPWM #1, Counter #3 - DCD tcpwm_1_interrupts_4_IRQHandler ; TCPWM #1, Counter #4 - DCD tcpwm_1_interrupts_5_IRQHandler ; TCPWM #1, Counter #5 - DCD tcpwm_1_interrupts_6_IRQHandler ; TCPWM #1, Counter #6 - DCD tcpwm_1_interrupts_7_IRQHandler ; TCPWM #1, Counter #7 - DCD tcpwm_1_interrupts_8_IRQHandler ; TCPWM #1, Counter #8 - DCD tcpwm_1_interrupts_9_IRQHandler ; TCPWM #1, Counter #9 - DCD tcpwm_1_interrupts_10_IRQHandler ; TCPWM #1, Counter #10 - DCD tcpwm_1_interrupts_11_IRQHandler ; TCPWM #1, Counter #11 - DCD tcpwm_1_interrupts_12_IRQHandler ; TCPWM #1, Counter #12 - DCD tcpwm_1_interrupts_13_IRQHandler ; TCPWM #1, Counter #13 - DCD tcpwm_1_interrupts_14_IRQHandler ; TCPWM #1, Counter #14 - DCD tcpwm_1_interrupts_15_IRQHandler ; TCPWM #1, Counter #15 - DCD tcpwm_1_interrupts_16_IRQHandler ; TCPWM #1, Counter #16 - DCD tcpwm_1_interrupts_17_IRQHandler ; TCPWM #1, Counter #17 - DCD tcpwm_1_interrupts_18_IRQHandler ; TCPWM #1, Counter #18 - DCD tcpwm_1_interrupts_19_IRQHandler ; TCPWM #1, Counter #19 - DCD tcpwm_1_interrupts_20_IRQHandler ; TCPWM #1, Counter #20 - DCD tcpwm_1_interrupts_21_IRQHandler ; TCPWM #1, Counter #21 - DCD tcpwm_1_interrupts_22_IRQHandler ; TCPWM #1, Counter #22 - DCD tcpwm_1_interrupts_23_IRQHandler ; TCPWM #1, Counter #23 - DCD udb_interrupts_0_IRQHandler ; UDB Interrupt #0 - DCD udb_interrupts_1_IRQHandler ; UDB Interrupt #1 - DCD udb_interrupts_2_IRQHandler ; UDB Interrupt #2 - DCD udb_interrupts_3_IRQHandler ; UDB Interrupt #3 - DCD udb_interrupts_4_IRQHandler ; UDB Interrupt #4 - DCD udb_interrupts_5_IRQHandler ; UDB Interrupt #5 - DCD udb_interrupts_6_IRQHandler ; UDB Interrupt #6 - DCD udb_interrupts_7_IRQHandler ; UDB Interrupt #7 - DCD udb_interrupts_8_IRQHandler ; UDB Interrupt #8 - DCD udb_interrupts_9_IRQHandler ; UDB Interrupt #9 - DCD udb_interrupts_10_IRQHandler ; UDB Interrupt #10 - DCD udb_interrupts_11_IRQHandler ; UDB Interrupt #11 - DCD udb_interrupts_12_IRQHandler ; UDB Interrupt #12 - DCD udb_interrupts_13_IRQHandler ; UDB Interrupt #13 - DCD udb_interrupts_14_IRQHandler ; UDB Interrupt #14 - DCD udb_interrupts_15_IRQHandler ; UDB Interrupt #15 - DCD pass_interrupt_sar_IRQHandler ; SAR ADC interrupt - DCD audioss_interrupt_i2s_IRQHandler ; I2S Audio interrupt - DCD audioss_interrupt_pdm_IRQHandler ; PDM/PCM Audio interrupt - DCD profile_interrupt_IRQHandler ; Energy Profiler interrupt - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD pass_interrupt_dacs_IRQHandler ; Consolidated interrrupt for all DACs - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT Cy_SystemInitFpuEnable - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - ; Enable the FPU if used - LDR R0, =Cy_SystemInitFpuEnable - BLX R0 - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP -HardFault_Wrapper\ - PROC - EXPORT HardFault_Wrapper [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B HardFault_Wrapper - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT ioss_interrupts_gpio_0_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_1_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_2_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_3_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_4_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_5_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_6_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_7_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_8_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_9_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_10_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_11_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_12_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_13_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_14_IRQHandler [WEAK] - EXPORT ioss_interrupt_gpio_IRQHandler [WEAK] - EXPORT ioss_interrupt_vdd_IRQHandler [WEAK] - EXPORT lpcomp_interrupt_IRQHandler [WEAK] - EXPORT scb_8_interrupt_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_0_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_1_IRQHandler [WEAK] - EXPORT srss_interrupt_backup_IRQHandler [WEAK] - EXPORT srss_interrupt_IRQHandler [WEAK] - EXPORT pass_interrupt_ctbs_IRQHandler [WEAK] - EXPORT bless_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_15_IRQHandler [WEAK] - EXPORT scb_0_interrupt_IRQHandler [WEAK] - EXPORT scb_1_interrupt_IRQHandler [WEAK] - EXPORT scb_2_interrupt_IRQHandler [WEAK] - EXPORT scb_3_interrupt_IRQHandler [WEAK] - EXPORT scb_4_interrupt_IRQHandler [WEAK] - EXPORT scb_5_interrupt_IRQHandler [WEAK] - EXPORT scb_6_interrupt_IRQHandler [WEAK] - EXPORT scb_7_interrupt_IRQHandler [WEAK] - EXPORT csd_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_1_IRQHandler [WEAK] - EXPORT cpuss_interrupt_crypto_IRQHandler [WEAK] - EXPORT cpuss_interrupt_fm_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_4_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_5_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_6_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_7_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_4_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_5_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_6_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_7_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_8_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_9_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_10_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_11_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_12_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_13_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_14_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_15_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_16_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_17_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_18_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_19_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_20_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_21_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_22_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_23_IRQHandler [WEAK] - EXPORT udb_interrupts_0_IRQHandler [WEAK] - EXPORT udb_interrupts_1_IRQHandler [WEAK] - EXPORT udb_interrupts_2_IRQHandler [WEAK] - EXPORT udb_interrupts_3_IRQHandler [WEAK] - EXPORT udb_interrupts_4_IRQHandler [WEAK] - EXPORT udb_interrupts_5_IRQHandler [WEAK] - EXPORT udb_interrupts_6_IRQHandler [WEAK] - EXPORT udb_interrupts_7_IRQHandler [WEAK] - EXPORT udb_interrupts_8_IRQHandler [WEAK] - EXPORT udb_interrupts_9_IRQHandler [WEAK] - EXPORT udb_interrupts_10_IRQHandler [WEAK] - EXPORT udb_interrupts_11_IRQHandler [WEAK] - EXPORT udb_interrupts_12_IRQHandler [WEAK] - EXPORT udb_interrupts_13_IRQHandler [WEAK] - EXPORT udb_interrupts_14_IRQHandler [WEAK] - EXPORT udb_interrupts_15_IRQHandler [WEAK] - EXPORT pass_interrupt_sar_IRQHandler [WEAK] - EXPORT audioss_interrupt_i2s_IRQHandler [WEAK] - EXPORT audioss_interrupt_pdm_IRQHandler [WEAK] - EXPORT profile_interrupt_IRQHandler [WEAK] - EXPORT smif_interrupt_IRQHandler [WEAK] - EXPORT usb_interrupt_hi_IRQHandler [WEAK] - EXPORT usb_interrupt_med_IRQHandler [WEAK] - EXPORT usb_interrupt_lo_IRQHandler [WEAK] - EXPORT pass_interrupt_dacs_IRQHandler [WEAK] - -ioss_interrupts_gpio_0_IRQHandler -ioss_interrupts_gpio_1_IRQHandler -ioss_interrupts_gpio_2_IRQHandler -ioss_interrupts_gpio_3_IRQHandler -ioss_interrupts_gpio_4_IRQHandler -ioss_interrupts_gpio_5_IRQHandler -ioss_interrupts_gpio_6_IRQHandler -ioss_interrupts_gpio_7_IRQHandler -ioss_interrupts_gpio_8_IRQHandler -ioss_interrupts_gpio_9_IRQHandler -ioss_interrupts_gpio_10_IRQHandler -ioss_interrupts_gpio_11_IRQHandler -ioss_interrupts_gpio_12_IRQHandler -ioss_interrupts_gpio_13_IRQHandler -ioss_interrupts_gpio_14_IRQHandler -ioss_interrupt_gpio_IRQHandler -ioss_interrupt_vdd_IRQHandler -lpcomp_interrupt_IRQHandler -scb_8_interrupt_IRQHandler -srss_interrupt_mcwdt_0_IRQHandler -srss_interrupt_mcwdt_1_IRQHandler -srss_interrupt_backup_IRQHandler -srss_interrupt_IRQHandler -pass_interrupt_ctbs_IRQHandler -bless_interrupt_IRQHandler -cpuss_interrupts_ipc_0_IRQHandler -cpuss_interrupts_ipc_1_IRQHandler -cpuss_interrupts_ipc_2_IRQHandler -cpuss_interrupts_ipc_3_IRQHandler -cpuss_interrupts_ipc_4_IRQHandler -cpuss_interrupts_ipc_5_IRQHandler -cpuss_interrupts_ipc_6_IRQHandler -cpuss_interrupts_ipc_7_IRQHandler -cpuss_interrupts_ipc_8_IRQHandler -cpuss_interrupts_ipc_9_IRQHandler -cpuss_interrupts_ipc_10_IRQHandler -cpuss_interrupts_ipc_11_IRQHandler -cpuss_interrupts_ipc_12_IRQHandler -cpuss_interrupts_ipc_13_IRQHandler -cpuss_interrupts_ipc_14_IRQHandler -cpuss_interrupts_ipc_15_IRQHandler -scb_0_interrupt_IRQHandler -scb_1_interrupt_IRQHandler -scb_2_interrupt_IRQHandler -scb_3_interrupt_IRQHandler -scb_4_interrupt_IRQHandler -scb_5_interrupt_IRQHandler -scb_6_interrupt_IRQHandler -scb_7_interrupt_IRQHandler -csd_interrupt_IRQHandler -cpuss_interrupts_dw0_0_IRQHandler -cpuss_interrupts_dw0_1_IRQHandler -cpuss_interrupts_dw0_2_IRQHandler -cpuss_interrupts_dw0_3_IRQHandler -cpuss_interrupts_dw0_4_IRQHandler -cpuss_interrupts_dw0_5_IRQHandler -cpuss_interrupts_dw0_6_IRQHandler -cpuss_interrupts_dw0_7_IRQHandler -cpuss_interrupts_dw0_8_IRQHandler -cpuss_interrupts_dw0_9_IRQHandler -cpuss_interrupts_dw0_10_IRQHandler -cpuss_interrupts_dw0_11_IRQHandler -cpuss_interrupts_dw0_12_IRQHandler -cpuss_interrupts_dw0_13_IRQHandler -cpuss_interrupts_dw0_14_IRQHandler -cpuss_interrupts_dw0_15_IRQHandler -cpuss_interrupts_dw1_0_IRQHandler -cpuss_interrupts_dw1_1_IRQHandler -cpuss_interrupts_dw1_2_IRQHandler -cpuss_interrupts_dw1_3_IRQHandler -cpuss_interrupts_dw1_4_IRQHandler -cpuss_interrupts_dw1_5_IRQHandler -cpuss_interrupts_dw1_6_IRQHandler -cpuss_interrupts_dw1_7_IRQHandler -cpuss_interrupts_dw1_8_IRQHandler -cpuss_interrupts_dw1_9_IRQHandler -cpuss_interrupts_dw1_10_IRQHandler -cpuss_interrupts_dw1_11_IRQHandler -cpuss_interrupts_dw1_12_IRQHandler -cpuss_interrupts_dw1_13_IRQHandler -cpuss_interrupts_dw1_14_IRQHandler -cpuss_interrupts_dw1_15_IRQHandler -cpuss_interrupts_fault_0_IRQHandler -cpuss_interrupts_fault_1_IRQHandler -cpuss_interrupt_crypto_IRQHandler -cpuss_interrupt_fm_IRQHandler -cpuss_interrupts_cm0_cti_0_IRQHandler -cpuss_interrupts_cm0_cti_1_IRQHandler -cpuss_interrupts_cm4_cti_0_IRQHandler -cpuss_interrupts_cm4_cti_1_IRQHandler -tcpwm_0_interrupts_0_IRQHandler -tcpwm_0_interrupts_1_IRQHandler -tcpwm_0_interrupts_2_IRQHandler -tcpwm_0_interrupts_3_IRQHandler -tcpwm_0_interrupts_4_IRQHandler -tcpwm_0_interrupts_5_IRQHandler -tcpwm_0_interrupts_6_IRQHandler -tcpwm_0_interrupts_7_IRQHandler -tcpwm_1_interrupts_0_IRQHandler -tcpwm_1_interrupts_1_IRQHandler -tcpwm_1_interrupts_2_IRQHandler -tcpwm_1_interrupts_3_IRQHandler -tcpwm_1_interrupts_4_IRQHandler -tcpwm_1_interrupts_5_IRQHandler -tcpwm_1_interrupts_6_IRQHandler -tcpwm_1_interrupts_7_IRQHandler -tcpwm_1_interrupts_8_IRQHandler -tcpwm_1_interrupts_9_IRQHandler -tcpwm_1_interrupts_10_IRQHandler -tcpwm_1_interrupts_11_IRQHandler -tcpwm_1_interrupts_12_IRQHandler -tcpwm_1_interrupts_13_IRQHandler -tcpwm_1_interrupts_14_IRQHandler -tcpwm_1_interrupts_15_IRQHandler -tcpwm_1_interrupts_16_IRQHandler -tcpwm_1_interrupts_17_IRQHandler -tcpwm_1_interrupts_18_IRQHandler -tcpwm_1_interrupts_19_IRQHandler -tcpwm_1_interrupts_20_IRQHandler -tcpwm_1_interrupts_21_IRQHandler -tcpwm_1_interrupts_22_IRQHandler -tcpwm_1_interrupts_23_IRQHandler -udb_interrupts_0_IRQHandler -udb_interrupts_1_IRQHandler -udb_interrupts_2_IRQHandler -udb_interrupts_3_IRQHandler -udb_interrupts_4_IRQHandler -udb_interrupts_5_IRQHandler -udb_interrupts_6_IRQHandler -udb_interrupts_7_IRQHandler -udb_interrupts_8_IRQHandler -udb_interrupts_9_IRQHandler -udb_interrupts_10_IRQHandler -udb_interrupts_11_IRQHandler -udb_interrupts_12_IRQHandler -udb_interrupts_13_IRQHandler -udb_interrupts_14_IRQHandler -udb_interrupts_15_IRQHandler -pass_interrupt_sar_IRQHandler -audioss_interrupt_i2s_IRQHandler -audioss_interrupt_pdm_IRQHandler -profile_interrupt_IRQHandler -smif_interrupt_IRQHandler -usb_interrupt_hi_IRQHandler -usb_interrupt_med_IRQHandler -usb_interrupt_lo_IRQHandler -pass_interrupt_dacs_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.s deleted file mode 100644 index 4d54e8bed1..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.s +++ /dev/null @@ -1,708 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_02_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD ioss_interrupts_gpio_1_IRQHandler ; GPIO Port Interrupt #1 - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD ioss_interrupts_gpio_4_IRQHandler ; GPIO Port Interrupt #4 - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD ioss_interrupts_gpio_13_IRQHandler ; GPIO Port Interrupt #13 - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_8_interrupt_IRQHandler ; Serial Communication Block #8 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD scb_3_interrupt_IRQHandler ; Serial Communication Block #3 - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 - DCD scb_7_interrupt_IRQHandler ; Serial Communication Block #7 - DCD scb_9_interrupt_IRQHandler ; Serial Communication Block #9 - DCD scb_10_interrupt_IRQHandler ; Serial Communication Block #10 - DCD scb_11_interrupt_IRQHandler ; Serial Communication Block #11 - DCD scb_12_interrupt_IRQHandler ; Serial Communication Block #12 - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0 - DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1 - DCD cpuss_interrupts_dmac_2_IRQHandler ; CPUSS DMAC, Channel #2 - DCD cpuss_interrupts_dmac_3_IRQHandler ; CPUSS DMAC, Channel #3 - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw0_16_IRQHandler ; CPUSS DataWire #0, Channel #16 - DCD cpuss_interrupts_dw0_17_IRQHandler ; CPUSS DataWire #0, Channel #17 - DCD cpuss_interrupts_dw0_18_IRQHandler ; CPUSS DataWire #0, Channel #18 - DCD cpuss_interrupts_dw0_19_IRQHandler ; CPUSS DataWire #0, Channel #19 - DCD cpuss_interrupts_dw0_20_IRQHandler ; CPUSS DataWire #0, Channel #20 - DCD cpuss_interrupts_dw0_21_IRQHandler ; CPUSS DataWire #0, Channel #21 - DCD cpuss_interrupts_dw0_22_IRQHandler ; CPUSS DataWire #0, Channel #22 - DCD cpuss_interrupts_dw0_23_IRQHandler ; CPUSS DataWire #0, Channel #23 - DCD cpuss_interrupts_dw0_24_IRQHandler ; CPUSS DataWire #0, Channel #24 - DCD cpuss_interrupts_dw0_25_IRQHandler ; CPUSS DataWire #0, Channel #25 - DCD cpuss_interrupts_dw0_26_IRQHandler ; CPUSS DataWire #0, Channel #26 - DCD cpuss_interrupts_dw0_27_IRQHandler ; CPUSS DataWire #0, Channel #27 - DCD cpuss_interrupts_dw0_28_IRQHandler ; CPUSS DataWire #0, Channel #28 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_dw1_16_IRQHandler ; CPUSS DataWire #1, Channel #16 - DCD cpuss_interrupts_dw1_17_IRQHandler ; CPUSS DataWire #1, Channel #17 - DCD cpuss_interrupts_dw1_18_IRQHandler ; CPUSS DataWire #1, Channel #18 - DCD cpuss_interrupts_dw1_19_IRQHandler ; CPUSS DataWire #1, Channel #19 - DCD cpuss_interrupts_dw1_20_IRQHandler ; CPUSS DataWire #1, Channel #20 - DCD cpuss_interrupts_dw1_21_IRQHandler ; CPUSS DataWire #1, Channel #21 - DCD cpuss_interrupts_dw1_22_IRQHandler ; CPUSS DataWire #1, Channel #22 - DCD cpuss_interrupts_dw1_23_IRQHandler ; CPUSS DataWire #1, Channel #23 - DCD cpuss_interrupts_dw1_24_IRQHandler ; CPUSS DataWire #1, Channel #24 - DCD cpuss_interrupts_dw1_25_IRQHandler ; CPUSS DataWire #1, Channel #25 - DCD cpuss_interrupts_dw1_26_IRQHandler ; CPUSS DataWire #1, Channel #26 - DCD cpuss_interrupts_dw1_27_IRQHandler ; CPUSS DataWire #1, Channel #27 - DCD cpuss_interrupts_dw1_28_IRQHandler ; CPUSS DataWire #1, Channel #28 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm4_fp_IRQHandler ; Floating Point operation fault - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD tcpwm_0_interrupts_4_IRQHandler ; TCPWM #0, Counter #4 - DCD tcpwm_0_interrupts_5_IRQHandler ; TCPWM #0, Counter #5 - DCD tcpwm_0_interrupts_6_IRQHandler ; TCPWM #0, Counter #6 - DCD tcpwm_0_interrupts_7_IRQHandler ; TCPWM #0, Counter #7 - DCD tcpwm_1_interrupts_0_IRQHandler ; TCPWM #1, Counter #0 - DCD tcpwm_1_interrupts_1_IRQHandler ; TCPWM #1, Counter #1 - DCD tcpwm_1_interrupts_2_IRQHandler ; TCPWM #1, Counter #2 - DCD tcpwm_1_interrupts_3_IRQHandler ; TCPWM #1, Counter #3 - DCD tcpwm_1_interrupts_4_IRQHandler ; TCPWM #1, Counter #4 - DCD tcpwm_1_interrupts_5_IRQHandler ; TCPWM #1, Counter #5 - DCD tcpwm_1_interrupts_6_IRQHandler ; TCPWM #1, Counter #6 - DCD tcpwm_1_interrupts_7_IRQHandler ; TCPWM #1, Counter #7 - DCD tcpwm_1_interrupts_8_IRQHandler ; TCPWM #1, Counter #8 - DCD tcpwm_1_interrupts_9_IRQHandler ; TCPWM #1, Counter #9 - DCD tcpwm_1_interrupts_10_IRQHandler ; TCPWM #1, Counter #10 - DCD tcpwm_1_interrupts_11_IRQHandler ; TCPWM #1, Counter #11 - DCD tcpwm_1_interrupts_12_IRQHandler ; TCPWM #1, Counter #12 - DCD tcpwm_1_interrupts_13_IRQHandler ; TCPWM #1, Counter #13 - DCD tcpwm_1_interrupts_14_IRQHandler ; TCPWM #1, Counter #14 - DCD tcpwm_1_interrupts_15_IRQHandler ; TCPWM #1, Counter #15 - DCD tcpwm_1_interrupts_16_IRQHandler ; TCPWM #1, Counter #16 - DCD tcpwm_1_interrupts_17_IRQHandler ; TCPWM #1, Counter #17 - DCD tcpwm_1_interrupts_18_IRQHandler ; TCPWM #1, Counter #18 - DCD tcpwm_1_interrupts_19_IRQHandler ; TCPWM #1, Counter #19 - DCD tcpwm_1_interrupts_20_IRQHandler ; TCPWM #1, Counter #20 - DCD tcpwm_1_interrupts_21_IRQHandler ; TCPWM #1, Counter #21 - DCD tcpwm_1_interrupts_22_IRQHandler ; TCPWM #1, Counter #22 - DCD tcpwm_1_interrupts_23_IRQHandler ; TCPWM #1, Counter #23 - DCD pass_interrupt_sar_IRQHandler ; SAR ADC interrupt - DCD audioss_0_interrupt_i2s_IRQHandler ; I2S0 Audio interrupt - DCD audioss_0_interrupt_pdm_IRQHandler ; PDM0/PCM0 Audio interrupt - DCD audioss_1_interrupt_i2s_IRQHandler ; I2S1 Audio interrupt - DCD profile_interrupt_IRQHandler ; Energy Profiler interrupt - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD sdhc_0_interrupt_wakeup_IRQHandler ; SDIO wakeup interrupt for mxsdhc - DCD sdhc_0_interrupt_general_IRQHandler ; Consolidated interrupt for mxsdhc for everything else - DCD sdhc_1_interrupt_wakeup_IRQHandler ; EEMC wakeup interrupt for mxsdhc, not used - DCD sdhc_1_interrupt_general_IRQHandler ; Consolidated interrupt for mxsdhc for everything else - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT Cy_SystemInitFpuEnable - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - ; Enable the FPU if used - LDR R0, =Cy_SystemInitFpuEnable - BLX R0 - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP -HardFault_Wrapper\ - PROC - EXPORT HardFault_Wrapper [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B HardFault_Wrapper - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT ioss_interrupts_gpio_0_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_1_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_2_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_3_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_4_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_5_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_6_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_7_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_8_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_9_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_10_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_11_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_12_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_13_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_14_IRQHandler [WEAK] - EXPORT ioss_interrupt_gpio_IRQHandler [WEAK] - EXPORT ioss_interrupt_vdd_IRQHandler [WEAK] - EXPORT lpcomp_interrupt_IRQHandler [WEAK] - EXPORT scb_8_interrupt_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_0_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_1_IRQHandler [WEAK] - EXPORT srss_interrupt_backup_IRQHandler [WEAK] - EXPORT srss_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_15_IRQHandler [WEAK] - EXPORT scb_0_interrupt_IRQHandler [WEAK] - EXPORT scb_1_interrupt_IRQHandler [WEAK] - EXPORT scb_2_interrupt_IRQHandler [WEAK] - EXPORT scb_3_interrupt_IRQHandler [WEAK] - EXPORT scb_4_interrupt_IRQHandler [WEAK] - EXPORT scb_5_interrupt_IRQHandler [WEAK] - EXPORT scb_6_interrupt_IRQHandler [WEAK] - EXPORT scb_7_interrupt_IRQHandler [WEAK] - EXPORT scb_9_interrupt_IRQHandler [WEAK] - EXPORT scb_10_interrupt_IRQHandler [WEAK] - EXPORT scb_11_interrupt_IRQHandler [WEAK] - EXPORT scb_12_interrupt_IRQHandler [WEAK] - EXPORT csd_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_16_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_17_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_18_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_19_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_20_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_21_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_22_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_23_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_24_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_25_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_26_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_27_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_28_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_16_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_17_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_18_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_19_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_20_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_21_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_22_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_23_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_24_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_25_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_26_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_27_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_28_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_1_IRQHandler [WEAK] - EXPORT cpuss_interrupt_crypto_IRQHandler [WEAK] - EXPORT cpuss_interrupt_fm_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_fp_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_4_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_5_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_6_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_7_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_4_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_5_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_6_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_7_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_8_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_9_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_10_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_11_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_12_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_13_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_14_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_15_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_16_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_17_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_18_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_19_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_20_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_21_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_22_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_23_IRQHandler [WEAK] - EXPORT pass_interrupt_sar_IRQHandler [WEAK] - EXPORT audioss_0_interrupt_i2s_IRQHandler [WEAK] - EXPORT audioss_0_interrupt_pdm_IRQHandler [WEAK] - EXPORT audioss_1_interrupt_i2s_IRQHandler [WEAK] - EXPORT profile_interrupt_IRQHandler [WEAK] - EXPORT smif_interrupt_IRQHandler [WEAK] - EXPORT usb_interrupt_hi_IRQHandler [WEAK] - EXPORT usb_interrupt_med_IRQHandler [WEAK] - EXPORT usb_interrupt_lo_IRQHandler [WEAK] - EXPORT sdhc_0_interrupt_wakeup_IRQHandler [WEAK] - EXPORT sdhc_0_interrupt_general_IRQHandler [WEAK] - EXPORT sdhc_1_interrupt_wakeup_IRQHandler [WEAK] - EXPORT sdhc_1_interrupt_general_IRQHandler [WEAK] - -ioss_interrupts_gpio_0_IRQHandler -ioss_interrupts_gpio_1_IRQHandler -ioss_interrupts_gpio_2_IRQHandler -ioss_interrupts_gpio_3_IRQHandler -ioss_interrupts_gpio_4_IRQHandler -ioss_interrupts_gpio_5_IRQHandler -ioss_interrupts_gpio_6_IRQHandler -ioss_interrupts_gpio_7_IRQHandler -ioss_interrupts_gpio_8_IRQHandler -ioss_interrupts_gpio_9_IRQHandler -ioss_interrupts_gpio_10_IRQHandler -ioss_interrupts_gpio_11_IRQHandler -ioss_interrupts_gpio_12_IRQHandler -ioss_interrupts_gpio_13_IRQHandler -ioss_interrupts_gpio_14_IRQHandler -ioss_interrupt_gpio_IRQHandler -ioss_interrupt_vdd_IRQHandler -lpcomp_interrupt_IRQHandler -scb_8_interrupt_IRQHandler -srss_interrupt_mcwdt_0_IRQHandler -srss_interrupt_mcwdt_1_IRQHandler -srss_interrupt_backup_IRQHandler -srss_interrupt_IRQHandler -cpuss_interrupts_ipc_0_IRQHandler -cpuss_interrupts_ipc_1_IRQHandler -cpuss_interrupts_ipc_2_IRQHandler -cpuss_interrupts_ipc_3_IRQHandler -cpuss_interrupts_ipc_4_IRQHandler -cpuss_interrupts_ipc_5_IRQHandler -cpuss_interrupts_ipc_6_IRQHandler -cpuss_interrupts_ipc_7_IRQHandler -cpuss_interrupts_ipc_8_IRQHandler -cpuss_interrupts_ipc_9_IRQHandler -cpuss_interrupts_ipc_10_IRQHandler -cpuss_interrupts_ipc_11_IRQHandler -cpuss_interrupts_ipc_12_IRQHandler -cpuss_interrupts_ipc_13_IRQHandler -cpuss_interrupts_ipc_14_IRQHandler -cpuss_interrupts_ipc_15_IRQHandler -scb_0_interrupt_IRQHandler -scb_1_interrupt_IRQHandler -scb_2_interrupt_IRQHandler -scb_3_interrupt_IRQHandler -scb_4_interrupt_IRQHandler -scb_5_interrupt_IRQHandler -scb_6_interrupt_IRQHandler -scb_7_interrupt_IRQHandler -scb_9_interrupt_IRQHandler -scb_10_interrupt_IRQHandler -scb_11_interrupt_IRQHandler -scb_12_interrupt_IRQHandler -csd_interrupt_IRQHandler -cpuss_interrupts_dmac_0_IRQHandler -cpuss_interrupts_dmac_1_IRQHandler -cpuss_interrupts_dmac_2_IRQHandler -cpuss_interrupts_dmac_3_IRQHandler -cpuss_interrupts_dw0_0_IRQHandler -cpuss_interrupts_dw0_1_IRQHandler -cpuss_interrupts_dw0_2_IRQHandler -cpuss_interrupts_dw0_3_IRQHandler -cpuss_interrupts_dw0_4_IRQHandler -cpuss_interrupts_dw0_5_IRQHandler -cpuss_interrupts_dw0_6_IRQHandler -cpuss_interrupts_dw0_7_IRQHandler -cpuss_interrupts_dw0_8_IRQHandler -cpuss_interrupts_dw0_9_IRQHandler -cpuss_interrupts_dw0_10_IRQHandler -cpuss_interrupts_dw0_11_IRQHandler -cpuss_interrupts_dw0_12_IRQHandler -cpuss_interrupts_dw0_13_IRQHandler -cpuss_interrupts_dw0_14_IRQHandler -cpuss_interrupts_dw0_15_IRQHandler -cpuss_interrupts_dw0_16_IRQHandler -cpuss_interrupts_dw0_17_IRQHandler -cpuss_interrupts_dw0_18_IRQHandler -cpuss_interrupts_dw0_19_IRQHandler -cpuss_interrupts_dw0_20_IRQHandler -cpuss_interrupts_dw0_21_IRQHandler -cpuss_interrupts_dw0_22_IRQHandler -cpuss_interrupts_dw0_23_IRQHandler -cpuss_interrupts_dw0_24_IRQHandler -cpuss_interrupts_dw0_25_IRQHandler -cpuss_interrupts_dw0_26_IRQHandler -cpuss_interrupts_dw0_27_IRQHandler -cpuss_interrupts_dw0_28_IRQHandler -cpuss_interrupts_dw1_0_IRQHandler -cpuss_interrupts_dw1_1_IRQHandler -cpuss_interrupts_dw1_2_IRQHandler -cpuss_interrupts_dw1_3_IRQHandler -cpuss_interrupts_dw1_4_IRQHandler -cpuss_interrupts_dw1_5_IRQHandler -cpuss_interrupts_dw1_6_IRQHandler -cpuss_interrupts_dw1_7_IRQHandler -cpuss_interrupts_dw1_8_IRQHandler -cpuss_interrupts_dw1_9_IRQHandler -cpuss_interrupts_dw1_10_IRQHandler -cpuss_interrupts_dw1_11_IRQHandler -cpuss_interrupts_dw1_12_IRQHandler -cpuss_interrupts_dw1_13_IRQHandler -cpuss_interrupts_dw1_14_IRQHandler -cpuss_interrupts_dw1_15_IRQHandler -cpuss_interrupts_dw1_16_IRQHandler -cpuss_interrupts_dw1_17_IRQHandler -cpuss_interrupts_dw1_18_IRQHandler -cpuss_interrupts_dw1_19_IRQHandler -cpuss_interrupts_dw1_20_IRQHandler -cpuss_interrupts_dw1_21_IRQHandler -cpuss_interrupts_dw1_22_IRQHandler -cpuss_interrupts_dw1_23_IRQHandler -cpuss_interrupts_dw1_24_IRQHandler -cpuss_interrupts_dw1_25_IRQHandler -cpuss_interrupts_dw1_26_IRQHandler -cpuss_interrupts_dw1_27_IRQHandler -cpuss_interrupts_dw1_28_IRQHandler -cpuss_interrupts_fault_0_IRQHandler -cpuss_interrupts_fault_1_IRQHandler -cpuss_interrupt_crypto_IRQHandler -cpuss_interrupt_fm_IRQHandler -cpuss_interrupts_cm4_fp_IRQHandler -cpuss_interrupts_cm0_cti_0_IRQHandler -cpuss_interrupts_cm0_cti_1_IRQHandler -cpuss_interrupts_cm4_cti_0_IRQHandler -cpuss_interrupts_cm4_cti_1_IRQHandler -tcpwm_0_interrupts_0_IRQHandler -tcpwm_0_interrupts_1_IRQHandler -tcpwm_0_interrupts_2_IRQHandler -tcpwm_0_interrupts_3_IRQHandler -tcpwm_0_interrupts_4_IRQHandler -tcpwm_0_interrupts_5_IRQHandler -tcpwm_0_interrupts_6_IRQHandler -tcpwm_0_interrupts_7_IRQHandler -tcpwm_1_interrupts_0_IRQHandler -tcpwm_1_interrupts_1_IRQHandler -tcpwm_1_interrupts_2_IRQHandler -tcpwm_1_interrupts_3_IRQHandler -tcpwm_1_interrupts_4_IRQHandler -tcpwm_1_interrupts_5_IRQHandler -tcpwm_1_interrupts_6_IRQHandler -tcpwm_1_interrupts_7_IRQHandler -tcpwm_1_interrupts_8_IRQHandler -tcpwm_1_interrupts_9_IRQHandler -tcpwm_1_interrupts_10_IRQHandler -tcpwm_1_interrupts_11_IRQHandler -tcpwm_1_interrupts_12_IRQHandler -tcpwm_1_interrupts_13_IRQHandler -tcpwm_1_interrupts_14_IRQHandler -tcpwm_1_interrupts_15_IRQHandler -tcpwm_1_interrupts_16_IRQHandler -tcpwm_1_interrupts_17_IRQHandler -tcpwm_1_interrupts_18_IRQHandler -tcpwm_1_interrupts_19_IRQHandler -tcpwm_1_interrupts_20_IRQHandler -tcpwm_1_interrupts_21_IRQHandler -tcpwm_1_interrupts_22_IRQHandler -tcpwm_1_interrupts_23_IRQHandler -pass_interrupt_sar_IRQHandler -audioss_0_interrupt_i2s_IRQHandler -audioss_0_interrupt_pdm_IRQHandler -audioss_1_interrupt_i2s_IRQHandler -profile_interrupt_IRQHandler -smif_interrupt_IRQHandler -usb_interrupt_hi_IRQHandler -usb_interrupt_med_IRQHandler -usb_interrupt_lo_IRQHandler -sdhc_0_interrupt_wakeup_IRQHandler -sdhc_0_interrupt_general_IRQHandler -sdhc_1_interrupt_wakeup_IRQHandler -sdhc_1_interrupt_general_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_03_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_03_cm4.s deleted file mode 100644 index ddc59d4e74..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_03_cm4.s +++ /dev/null @@ -1,652 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_03_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD scb_3_interrupt_IRQHandler ; Serial Communication Block #3 - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0 - DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw0_16_IRQHandler ; CPUSS DataWire #0, Channel #16 - DCD cpuss_interrupts_dw0_17_IRQHandler ; CPUSS DataWire #0, Channel #17 - DCD cpuss_interrupts_dw0_18_IRQHandler ; CPUSS DataWire #0, Channel #18 - DCD cpuss_interrupts_dw0_19_IRQHandler ; CPUSS DataWire #0, Channel #19 - DCD cpuss_interrupts_dw0_20_IRQHandler ; CPUSS DataWire #0, Channel #20 - DCD cpuss_interrupts_dw0_21_IRQHandler ; CPUSS DataWire #0, Channel #21 - DCD cpuss_interrupts_dw0_22_IRQHandler ; CPUSS DataWire #0, Channel #22 - DCD cpuss_interrupts_dw0_23_IRQHandler ; CPUSS DataWire #0, Channel #23 - DCD cpuss_interrupts_dw0_24_IRQHandler ; CPUSS DataWire #0, Channel #24 - DCD cpuss_interrupts_dw0_25_IRQHandler ; CPUSS DataWire #0, Channel #25 - DCD cpuss_interrupts_dw0_26_IRQHandler ; CPUSS DataWire #0, Channel #26 - DCD cpuss_interrupts_dw0_27_IRQHandler ; CPUSS DataWire #0, Channel #27 - DCD cpuss_interrupts_dw0_28_IRQHandler ; CPUSS DataWire #0, Channel #28 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_dw1_16_IRQHandler ; CPUSS DataWire #1, Channel #16 - DCD cpuss_interrupts_dw1_17_IRQHandler ; CPUSS DataWire #1, Channel #17 - DCD cpuss_interrupts_dw1_18_IRQHandler ; CPUSS DataWire #1, Channel #18 - DCD cpuss_interrupts_dw1_19_IRQHandler ; CPUSS DataWire #1, Channel #19 - DCD cpuss_interrupts_dw1_20_IRQHandler ; CPUSS DataWire #1, Channel #20 - DCD cpuss_interrupts_dw1_21_IRQHandler ; CPUSS DataWire #1, Channel #21 - DCD cpuss_interrupts_dw1_22_IRQHandler ; CPUSS DataWire #1, Channel #22 - DCD cpuss_interrupts_dw1_23_IRQHandler ; CPUSS DataWire #1, Channel #23 - DCD cpuss_interrupts_dw1_24_IRQHandler ; CPUSS DataWire #1, Channel #24 - DCD cpuss_interrupts_dw1_25_IRQHandler ; CPUSS DataWire #1, Channel #25 - DCD cpuss_interrupts_dw1_26_IRQHandler ; CPUSS DataWire #1, Channel #26 - DCD cpuss_interrupts_dw1_27_IRQHandler ; CPUSS DataWire #1, Channel #27 - DCD cpuss_interrupts_dw1_28_IRQHandler ; CPUSS DataWire #1, Channel #28 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm4_fp_IRQHandler ; Floating Point operation fault - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD tcpwm_1_interrupts_0_IRQHandler ; TCPWM #1, Counter #0 - DCD tcpwm_1_interrupts_1_IRQHandler ; TCPWM #1, Counter #1 - DCD tcpwm_1_interrupts_2_IRQHandler ; TCPWM #1, Counter #2 - DCD tcpwm_1_interrupts_3_IRQHandler ; TCPWM #1, Counter #3 - DCD tcpwm_1_interrupts_4_IRQHandler ; TCPWM #1, Counter #4 - DCD tcpwm_1_interrupts_5_IRQHandler ; TCPWM #1, Counter #5 - DCD tcpwm_1_interrupts_6_IRQHandler ; TCPWM #1, Counter #6 - DCD tcpwm_1_interrupts_7_IRQHandler ; TCPWM #1, Counter #7 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD pass_interrupt_sar_IRQHandler ; SAR ADC interrupt - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD sdhc_0_interrupt_wakeup_IRQHandler ; SDIO wakeup interrupt for mxsdhc - DCD sdhc_0_interrupt_general_IRQHandler ; Consolidated interrupt for mxsdhc for everything else - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD canfd_0_interrupt0_IRQHandler ; Can #0, Consolidated interrupt #0 - DCD canfd_0_interrupts0_0_IRQHandler ; CAN #0, Interrupt #0, Channel #0 - DCD canfd_0_interrupts1_0_IRQHandler ; CAN #0, Interrupt #1, Channel #0 - DCD cpuss_interrupts_dw1_29_IRQHandler ; CPUSS DataWire #1, Channel #29 - DCD cpuss_interrupts_dw1_30_IRQHandler ; CPUSS DataWire #1, Channel #30 - DCD cpuss_interrupts_dw1_31_IRQHandler ; CPUSS DataWire #1, Channel #31 - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT Cy_SystemInitFpuEnable - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - ; Enable the FPU if used - LDR R0, =Cy_SystemInitFpuEnable - BLX R0 - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP -HardFault_Wrapper\ - PROC - EXPORT HardFault_Wrapper [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B HardFault_Wrapper - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT ioss_interrupts_gpio_0_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_2_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_3_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_5_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_6_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_7_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_8_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_9_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_10_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_11_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_12_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_14_IRQHandler [WEAK] - EXPORT ioss_interrupt_gpio_IRQHandler [WEAK] - EXPORT ioss_interrupt_vdd_IRQHandler [WEAK] - EXPORT lpcomp_interrupt_IRQHandler [WEAK] - EXPORT scb_6_interrupt_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_0_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_1_IRQHandler [WEAK] - EXPORT srss_interrupt_backup_IRQHandler [WEAK] - EXPORT srss_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_15_IRQHandler [WEAK] - EXPORT scb_0_interrupt_IRQHandler [WEAK] - EXPORT scb_1_interrupt_IRQHandler [WEAK] - EXPORT scb_2_interrupt_IRQHandler [WEAK] - EXPORT scb_3_interrupt_IRQHandler [WEAK] - EXPORT scb_4_interrupt_IRQHandler [WEAK] - EXPORT scb_5_interrupt_IRQHandler [WEAK] - EXPORT csd_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_16_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_17_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_18_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_19_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_20_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_21_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_22_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_23_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_24_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_25_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_26_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_27_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_28_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_16_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_17_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_18_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_19_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_20_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_21_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_22_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_23_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_24_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_25_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_26_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_27_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_28_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_1_IRQHandler [WEAK] - EXPORT cpuss_interrupt_crypto_IRQHandler [WEAK] - EXPORT cpuss_interrupt_fm_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_fp_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_4_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_5_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_6_IRQHandler [WEAK] - EXPORT tcpwm_1_interrupts_7_IRQHandler [WEAK] - EXPORT pass_interrupt_sar_IRQHandler [WEAK] - EXPORT smif_interrupt_IRQHandler [WEAK] - EXPORT usb_interrupt_hi_IRQHandler [WEAK] - EXPORT usb_interrupt_med_IRQHandler [WEAK] - EXPORT usb_interrupt_lo_IRQHandler [WEAK] - EXPORT sdhc_0_interrupt_wakeup_IRQHandler [WEAK] - EXPORT sdhc_0_interrupt_general_IRQHandler [WEAK] - EXPORT canfd_0_interrupt0_IRQHandler [WEAK] - EXPORT canfd_0_interrupts0_0_IRQHandler [WEAK] - EXPORT canfd_0_interrupts1_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_29_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_30_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_31_IRQHandler [WEAK] - -ioss_interrupts_gpio_0_IRQHandler -ioss_interrupts_gpio_2_IRQHandler -ioss_interrupts_gpio_3_IRQHandler -ioss_interrupts_gpio_5_IRQHandler -ioss_interrupts_gpio_6_IRQHandler -ioss_interrupts_gpio_7_IRQHandler -ioss_interrupts_gpio_8_IRQHandler -ioss_interrupts_gpio_9_IRQHandler -ioss_interrupts_gpio_10_IRQHandler -ioss_interrupts_gpio_11_IRQHandler -ioss_interrupts_gpio_12_IRQHandler -ioss_interrupts_gpio_14_IRQHandler -ioss_interrupt_gpio_IRQHandler -ioss_interrupt_vdd_IRQHandler -lpcomp_interrupt_IRQHandler -scb_6_interrupt_IRQHandler -srss_interrupt_mcwdt_0_IRQHandler -srss_interrupt_mcwdt_1_IRQHandler -srss_interrupt_backup_IRQHandler -srss_interrupt_IRQHandler -cpuss_interrupts_ipc_0_IRQHandler -cpuss_interrupts_ipc_1_IRQHandler -cpuss_interrupts_ipc_2_IRQHandler -cpuss_interrupts_ipc_3_IRQHandler -cpuss_interrupts_ipc_4_IRQHandler -cpuss_interrupts_ipc_5_IRQHandler -cpuss_interrupts_ipc_6_IRQHandler -cpuss_interrupts_ipc_7_IRQHandler -cpuss_interrupts_ipc_8_IRQHandler -cpuss_interrupts_ipc_9_IRQHandler -cpuss_interrupts_ipc_10_IRQHandler -cpuss_interrupts_ipc_11_IRQHandler -cpuss_interrupts_ipc_12_IRQHandler -cpuss_interrupts_ipc_13_IRQHandler -cpuss_interrupts_ipc_14_IRQHandler -cpuss_interrupts_ipc_15_IRQHandler -scb_0_interrupt_IRQHandler -scb_1_interrupt_IRQHandler -scb_2_interrupt_IRQHandler -scb_3_interrupt_IRQHandler -scb_4_interrupt_IRQHandler -scb_5_interrupt_IRQHandler -csd_interrupt_IRQHandler -cpuss_interrupts_dmac_0_IRQHandler -cpuss_interrupts_dmac_1_IRQHandler -cpuss_interrupts_dw0_0_IRQHandler -cpuss_interrupts_dw0_1_IRQHandler -cpuss_interrupts_dw0_2_IRQHandler -cpuss_interrupts_dw0_3_IRQHandler -cpuss_interrupts_dw0_4_IRQHandler -cpuss_interrupts_dw0_5_IRQHandler -cpuss_interrupts_dw0_6_IRQHandler -cpuss_interrupts_dw0_7_IRQHandler -cpuss_interrupts_dw0_8_IRQHandler -cpuss_interrupts_dw0_9_IRQHandler -cpuss_interrupts_dw0_10_IRQHandler -cpuss_interrupts_dw0_11_IRQHandler -cpuss_interrupts_dw0_12_IRQHandler -cpuss_interrupts_dw0_13_IRQHandler -cpuss_interrupts_dw0_14_IRQHandler -cpuss_interrupts_dw0_15_IRQHandler -cpuss_interrupts_dw0_16_IRQHandler -cpuss_interrupts_dw0_17_IRQHandler -cpuss_interrupts_dw0_18_IRQHandler -cpuss_interrupts_dw0_19_IRQHandler -cpuss_interrupts_dw0_20_IRQHandler -cpuss_interrupts_dw0_21_IRQHandler -cpuss_interrupts_dw0_22_IRQHandler -cpuss_interrupts_dw0_23_IRQHandler -cpuss_interrupts_dw0_24_IRQHandler -cpuss_interrupts_dw0_25_IRQHandler -cpuss_interrupts_dw0_26_IRQHandler -cpuss_interrupts_dw0_27_IRQHandler -cpuss_interrupts_dw0_28_IRQHandler -cpuss_interrupts_dw1_0_IRQHandler -cpuss_interrupts_dw1_1_IRQHandler -cpuss_interrupts_dw1_2_IRQHandler -cpuss_interrupts_dw1_3_IRQHandler -cpuss_interrupts_dw1_4_IRQHandler -cpuss_interrupts_dw1_5_IRQHandler -cpuss_interrupts_dw1_6_IRQHandler -cpuss_interrupts_dw1_7_IRQHandler -cpuss_interrupts_dw1_8_IRQHandler -cpuss_interrupts_dw1_9_IRQHandler -cpuss_interrupts_dw1_10_IRQHandler -cpuss_interrupts_dw1_11_IRQHandler -cpuss_interrupts_dw1_12_IRQHandler -cpuss_interrupts_dw1_13_IRQHandler -cpuss_interrupts_dw1_14_IRQHandler -cpuss_interrupts_dw1_15_IRQHandler -cpuss_interrupts_dw1_16_IRQHandler -cpuss_interrupts_dw1_17_IRQHandler -cpuss_interrupts_dw1_18_IRQHandler -cpuss_interrupts_dw1_19_IRQHandler -cpuss_interrupts_dw1_20_IRQHandler -cpuss_interrupts_dw1_21_IRQHandler -cpuss_interrupts_dw1_22_IRQHandler -cpuss_interrupts_dw1_23_IRQHandler -cpuss_interrupts_dw1_24_IRQHandler -cpuss_interrupts_dw1_25_IRQHandler -cpuss_interrupts_dw1_26_IRQHandler -cpuss_interrupts_dw1_27_IRQHandler -cpuss_interrupts_dw1_28_IRQHandler -cpuss_interrupts_fault_0_IRQHandler -cpuss_interrupts_fault_1_IRQHandler -cpuss_interrupt_crypto_IRQHandler -cpuss_interrupt_fm_IRQHandler -cpuss_interrupts_cm4_fp_IRQHandler -cpuss_interrupts_cm0_cti_0_IRQHandler -cpuss_interrupts_cm0_cti_1_IRQHandler -cpuss_interrupts_cm4_cti_0_IRQHandler -cpuss_interrupts_cm4_cti_1_IRQHandler -tcpwm_0_interrupts_0_IRQHandler -tcpwm_0_interrupts_1_IRQHandler -tcpwm_0_interrupts_2_IRQHandler -tcpwm_0_interrupts_3_IRQHandler -tcpwm_1_interrupts_0_IRQHandler -tcpwm_1_interrupts_1_IRQHandler -tcpwm_1_interrupts_2_IRQHandler -tcpwm_1_interrupts_3_IRQHandler -tcpwm_1_interrupts_4_IRQHandler -tcpwm_1_interrupts_5_IRQHandler -tcpwm_1_interrupts_6_IRQHandler -tcpwm_1_interrupts_7_IRQHandler -pass_interrupt_sar_IRQHandler -smif_interrupt_IRQHandler -usb_interrupt_hi_IRQHandler -usb_interrupt_med_IRQHandler -usb_interrupt_lo_IRQHandler -sdhc_0_interrupt_wakeup_IRQHandler -sdhc_0_interrupt_general_IRQHandler -canfd_0_interrupt0_IRQHandler -canfd_0_interrupts0_0_IRQHandler -canfd_0_interrupts1_0_IRQHandler -cpuss_interrupts_dw1_29_IRQHandler -cpuss_interrupts_dw1_30_IRQHandler -cpuss_interrupts_dw1_31_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_04_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_04_cm4.s deleted file mode 100644 index edd9cbab16..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_04_cm4.s +++ /dev/null @@ -1,659 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_04_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 02. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - - PRESERVE8 - THUMB - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base| - IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length| - -__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack - - DCD Reset_Handler ; Reset Handler - - DCD 0x0000000D ; NMI Handler located at ROM code - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD pass_interrupt_sar_0_IRQHandler ; SAR ADC0 interrupt - DCD pass_interrupt_sar_1_IRQHandler ; SAR ADC1 interrupt - DCD pass_interrupt_ctbs_IRQHandler ; individual interrupt per CTB - DCD 0 ; Reserved - DCD pass_interrupt_fifo_0_IRQHandler ; PASS FIFO0 - DCD pass_interrupt_fifo_1_IRQHandler ; PASS FIFO1 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD 0 ; Reserved - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0 - DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw0_16_IRQHandler ; CPUSS DataWire #0, Channel #16 - DCD cpuss_interrupts_dw0_17_IRQHandler ; CPUSS DataWire #0, Channel #17 - DCD cpuss_interrupts_dw0_18_IRQHandler ; CPUSS DataWire #0, Channel #18 - DCD cpuss_interrupts_dw0_19_IRQHandler ; CPUSS DataWire #0, Channel #19 - DCD cpuss_interrupts_dw0_20_IRQHandler ; CPUSS DataWire #0, Channel #20 - DCD cpuss_interrupts_dw0_21_IRQHandler ; CPUSS DataWire #0, Channel #21 - DCD cpuss_interrupts_dw0_22_IRQHandler ; CPUSS DataWire #0, Channel #22 - DCD cpuss_interrupts_dw0_23_IRQHandler ; CPUSS DataWire #0, Channel #23 - DCD cpuss_interrupts_dw0_24_IRQHandler ; CPUSS DataWire #0, Channel #24 - DCD cpuss_interrupts_dw0_25_IRQHandler ; CPUSS DataWire #0, Channel #25 - DCD cpuss_interrupts_dw0_26_IRQHandler ; CPUSS DataWire #0, Channel #26 - DCD cpuss_interrupts_dw0_27_IRQHandler ; CPUSS DataWire #0, Channel #27 - DCD cpuss_interrupts_dw0_28_IRQHandler ; CPUSS DataWire #0, Channel #28 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_dw1_16_IRQHandler ; CPUSS DataWire #1, Channel #16 - DCD cpuss_interrupts_dw1_17_IRQHandler ; CPUSS DataWire #1, Channel #17 - DCD cpuss_interrupts_dw1_18_IRQHandler ; CPUSS DataWire #1, Channel #18 - DCD cpuss_interrupts_dw1_19_IRQHandler ; CPUSS DataWire #1, Channel #19 - DCD cpuss_interrupts_dw1_20_IRQHandler ; CPUSS DataWire #1, Channel #20 - DCD cpuss_interrupts_dw1_21_IRQHandler ; CPUSS DataWire #1, Channel #21 - DCD cpuss_interrupts_dw1_22_IRQHandler ; CPUSS DataWire #1, Channel #22 - DCD cpuss_interrupts_dw1_23_IRQHandler ; CPUSS DataWire #1, Channel #23 - DCD cpuss_interrupts_dw1_24_IRQHandler ; CPUSS DataWire #1, Channel #24 - DCD cpuss_interrupts_dw1_25_IRQHandler ; CPUSS DataWire #1, Channel #25 - DCD cpuss_interrupts_dw1_26_IRQHandler ; CPUSS DataWire #1, Channel #26 - DCD cpuss_interrupts_dw1_27_IRQHandler ; CPUSS DataWire #1, Channel #27 - DCD cpuss_interrupts_dw1_28_IRQHandler ; CPUSS DataWire #1, Channel #28 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm4_fp_IRQHandler ; Floating Point operation fault - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD tcpwm_0_interrupts_256_IRQHandler ; TCPWM #0, Counter #256 - DCD tcpwm_0_interrupts_257_IRQHandler ; TCPWM #0, Counter #257 - DCD tcpwm_0_interrupts_258_IRQHandler ; TCPWM #0, Counter #258 - DCD tcpwm_0_interrupts_259_IRQHandler ; TCPWM #0, Counter #259 - DCD tcpwm_0_interrupts_260_IRQHandler ; TCPWM #0, Counter #260 - DCD tcpwm_0_interrupts_261_IRQHandler ; TCPWM #0, Counter #261 - DCD tcpwm_0_interrupts_262_IRQHandler ; TCPWM #0, Counter #262 - DCD tcpwm_0_interrupts_263_IRQHandler ; TCPWM #0, Counter #263 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD pass_interrupt_dacs_IRQHandler ; Consolidated interrrupt for all DACs - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD canfd_0_interrupt0_IRQHandler ; Can #0, Consolidated interrupt #0 - DCD canfd_0_interrupts0_0_IRQHandler ; CAN #0, Interrupt #0, Channel #0 - DCD canfd_0_interrupts1_0_IRQHandler ; CAN #0, Interrupt #1, Channel #0 - DCD cpuss_interrupts_dw1_29_IRQHandler ; CPUSS DataWire #1, Channel #29 - DCD cpuss_interrupts_dw1_30_IRQHandler ; CPUSS DataWire #1, Channel #30 - DCD cpuss_interrupts_dw1_31_IRQHandler ; CPUSS DataWire #1, Channel #31 - DCD cpuss_interrupts_dw0_29_IRQHandler ; CPUSS DataWire #0, Channel #29 - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - EXPORT __ramVectors - AREA RESET_RAM, READWRITE, NOINIT -__ramVectors SPACE __Vectors_Size - - - AREA |.text|, CODE, READONLY - - -; Weak function for startup customization -; -; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -; because this function is executed as the first instruction in the ResetHandler. -; The PDL is also not initialized to use the proper register offsets. -; The user of this function is responsible for initializing the PDL and resources before using them. -; -Cy_OnResetUser PROC - EXPORT Cy_OnResetUser [WEAK] - BX LR - ENDP - -; Reset Handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT Cy_SystemInitFpuEnable - IMPORT __main - - ; Define strong function for startup customization - BL Cy_OnResetUser - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__Vectors - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -Vectors_Copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE Vectors_Copy - - ; Update Vector Table Offset Register. */ - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb 0xF - - ; Enable the FPU if used - LDR R0, =Cy_SystemInitFpuEnable - BLX R0 - - LDR R0, =__main - BLX R0 - - ; Should never get here - B . - - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP - -Cy_SysLib_FaultHandler PROC - EXPORT Cy_SysLib_FaultHandler [WEAK] - B . - ENDP -HardFault_Wrapper\ - PROC - EXPORT HardFault_Wrapper [WEAK] - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - bl L_API_call -L_MSP - mrs r0, MSP -L_API_call - bl Cy_SysLib_FaultHandler - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B HardFault_Wrapper - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B HardFault_Wrapper - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - EXPORT Default_Handler [WEAK] - EXPORT ioss_interrupts_gpio_0_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_2_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_3_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_5_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_6_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_7_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_8_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_9_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_10_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_11_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_12_IRQHandler [WEAK] - EXPORT ioss_interrupts_gpio_14_IRQHandler [WEAK] - EXPORT ioss_interrupt_gpio_IRQHandler [WEAK] - EXPORT ioss_interrupt_vdd_IRQHandler [WEAK] - EXPORT lpcomp_interrupt_IRQHandler [WEAK] - EXPORT scb_6_interrupt_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_0_IRQHandler [WEAK] - EXPORT srss_interrupt_mcwdt_1_IRQHandler [WEAK] - EXPORT srss_interrupt_backup_IRQHandler [WEAK] - EXPORT srss_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_ipc_15_IRQHandler [WEAK] - EXPORT pass_interrupt_sar_0_IRQHandler [WEAK] - EXPORT pass_interrupt_sar_1_IRQHandler [WEAK] - EXPORT pass_interrupt_ctbs_IRQHandler [WEAK] - EXPORT pass_interrupt_fifo_0_IRQHandler [WEAK] - EXPORT pass_interrupt_fifo_1_IRQHandler [WEAK] - EXPORT scb_0_interrupt_IRQHandler [WEAK] - EXPORT scb_1_interrupt_IRQHandler [WEAK] - EXPORT scb_2_interrupt_IRQHandler [WEAK] - EXPORT scb_4_interrupt_IRQHandler [WEAK] - EXPORT scb_5_interrupt_IRQHandler [WEAK] - EXPORT csd_interrupt_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dmac_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_16_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_17_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_18_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_19_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_20_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_21_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_22_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_23_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_24_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_25_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_26_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_27_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_28_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_2_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_3_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_4_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_5_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_6_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_7_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_8_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_9_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_10_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_11_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_12_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_13_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_14_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_15_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_16_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_17_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_18_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_19_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_20_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_21_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_22_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_23_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_24_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_25_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_26_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_27_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_28_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_fault_1_IRQHandler [WEAK] - EXPORT cpuss_interrupt_crypto_IRQHandler [WEAK] - EXPORT cpuss_interrupt_fm_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_fp_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm0_cti_1_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_cm4_cti_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_0_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_1_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_2_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_3_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_256_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_257_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_258_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_259_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_260_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_261_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_262_IRQHandler [WEAK] - EXPORT tcpwm_0_interrupts_263_IRQHandler [WEAK] - EXPORT pass_interrupt_dacs_IRQHandler [WEAK] - EXPORT smif_interrupt_IRQHandler [WEAK] - EXPORT usb_interrupt_hi_IRQHandler [WEAK] - EXPORT usb_interrupt_med_IRQHandler [WEAK] - EXPORT usb_interrupt_lo_IRQHandler [WEAK] - EXPORT canfd_0_interrupt0_IRQHandler [WEAK] - EXPORT canfd_0_interrupts0_0_IRQHandler [WEAK] - EXPORT canfd_0_interrupts1_0_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_29_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_30_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw1_31_IRQHandler [WEAK] - EXPORT cpuss_interrupts_dw0_29_IRQHandler [WEAK] - -ioss_interrupts_gpio_0_IRQHandler -ioss_interrupts_gpio_2_IRQHandler -ioss_interrupts_gpio_3_IRQHandler -ioss_interrupts_gpio_5_IRQHandler -ioss_interrupts_gpio_6_IRQHandler -ioss_interrupts_gpio_7_IRQHandler -ioss_interrupts_gpio_8_IRQHandler -ioss_interrupts_gpio_9_IRQHandler -ioss_interrupts_gpio_10_IRQHandler -ioss_interrupts_gpio_11_IRQHandler -ioss_interrupts_gpio_12_IRQHandler -ioss_interrupts_gpio_14_IRQHandler -ioss_interrupt_gpio_IRQHandler -ioss_interrupt_vdd_IRQHandler -lpcomp_interrupt_IRQHandler -scb_6_interrupt_IRQHandler -srss_interrupt_mcwdt_0_IRQHandler -srss_interrupt_mcwdt_1_IRQHandler -srss_interrupt_backup_IRQHandler -srss_interrupt_IRQHandler -cpuss_interrupts_ipc_0_IRQHandler -cpuss_interrupts_ipc_1_IRQHandler -cpuss_interrupts_ipc_2_IRQHandler -cpuss_interrupts_ipc_3_IRQHandler -cpuss_interrupts_ipc_4_IRQHandler -cpuss_interrupts_ipc_5_IRQHandler -cpuss_interrupts_ipc_6_IRQHandler -cpuss_interrupts_ipc_7_IRQHandler -cpuss_interrupts_ipc_8_IRQHandler -cpuss_interrupts_ipc_9_IRQHandler -cpuss_interrupts_ipc_10_IRQHandler -cpuss_interrupts_ipc_11_IRQHandler -cpuss_interrupts_ipc_12_IRQHandler -cpuss_interrupts_ipc_13_IRQHandler -cpuss_interrupts_ipc_14_IRQHandler -cpuss_interrupts_ipc_15_IRQHandler -pass_interrupt_sar_0_IRQHandler -pass_interrupt_sar_1_IRQHandler -pass_interrupt_ctbs_IRQHandler -pass_interrupt_fifo_0_IRQHandler -pass_interrupt_fifo_1_IRQHandler -scb_0_interrupt_IRQHandler -scb_1_interrupt_IRQHandler -scb_2_interrupt_IRQHandler -scb_4_interrupt_IRQHandler -scb_5_interrupt_IRQHandler -csd_interrupt_IRQHandler -cpuss_interrupts_dmac_0_IRQHandler -cpuss_interrupts_dmac_1_IRQHandler -cpuss_interrupts_dw0_0_IRQHandler -cpuss_interrupts_dw0_1_IRQHandler -cpuss_interrupts_dw0_2_IRQHandler -cpuss_interrupts_dw0_3_IRQHandler -cpuss_interrupts_dw0_4_IRQHandler -cpuss_interrupts_dw0_5_IRQHandler -cpuss_interrupts_dw0_6_IRQHandler -cpuss_interrupts_dw0_7_IRQHandler -cpuss_interrupts_dw0_8_IRQHandler -cpuss_interrupts_dw0_9_IRQHandler -cpuss_interrupts_dw0_10_IRQHandler -cpuss_interrupts_dw0_11_IRQHandler -cpuss_interrupts_dw0_12_IRQHandler -cpuss_interrupts_dw0_13_IRQHandler -cpuss_interrupts_dw0_14_IRQHandler -cpuss_interrupts_dw0_15_IRQHandler -cpuss_interrupts_dw0_16_IRQHandler -cpuss_interrupts_dw0_17_IRQHandler -cpuss_interrupts_dw0_18_IRQHandler -cpuss_interrupts_dw0_19_IRQHandler -cpuss_interrupts_dw0_20_IRQHandler -cpuss_interrupts_dw0_21_IRQHandler -cpuss_interrupts_dw0_22_IRQHandler -cpuss_interrupts_dw0_23_IRQHandler -cpuss_interrupts_dw0_24_IRQHandler -cpuss_interrupts_dw0_25_IRQHandler -cpuss_interrupts_dw0_26_IRQHandler -cpuss_interrupts_dw0_27_IRQHandler -cpuss_interrupts_dw0_28_IRQHandler -cpuss_interrupts_dw1_0_IRQHandler -cpuss_interrupts_dw1_1_IRQHandler -cpuss_interrupts_dw1_2_IRQHandler -cpuss_interrupts_dw1_3_IRQHandler -cpuss_interrupts_dw1_4_IRQHandler -cpuss_interrupts_dw1_5_IRQHandler -cpuss_interrupts_dw1_6_IRQHandler -cpuss_interrupts_dw1_7_IRQHandler -cpuss_interrupts_dw1_8_IRQHandler -cpuss_interrupts_dw1_9_IRQHandler -cpuss_interrupts_dw1_10_IRQHandler -cpuss_interrupts_dw1_11_IRQHandler -cpuss_interrupts_dw1_12_IRQHandler -cpuss_interrupts_dw1_13_IRQHandler -cpuss_interrupts_dw1_14_IRQHandler -cpuss_interrupts_dw1_15_IRQHandler -cpuss_interrupts_dw1_16_IRQHandler -cpuss_interrupts_dw1_17_IRQHandler -cpuss_interrupts_dw1_18_IRQHandler -cpuss_interrupts_dw1_19_IRQHandler -cpuss_interrupts_dw1_20_IRQHandler -cpuss_interrupts_dw1_21_IRQHandler -cpuss_interrupts_dw1_22_IRQHandler -cpuss_interrupts_dw1_23_IRQHandler -cpuss_interrupts_dw1_24_IRQHandler -cpuss_interrupts_dw1_25_IRQHandler -cpuss_interrupts_dw1_26_IRQHandler -cpuss_interrupts_dw1_27_IRQHandler -cpuss_interrupts_dw1_28_IRQHandler -cpuss_interrupts_fault_0_IRQHandler -cpuss_interrupts_fault_1_IRQHandler -cpuss_interrupt_crypto_IRQHandler -cpuss_interrupt_fm_IRQHandler -cpuss_interrupts_cm4_fp_IRQHandler -cpuss_interrupts_cm0_cti_0_IRQHandler -cpuss_interrupts_cm0_cti_1_IRQHandler -cpuss_interrupts_cm4_cti_0_IRQHandler -cpuss_interrupts_cm4_cti_1_IRQHandler -tcpwm_0_interrupts_0_IRQHandler -tcpwm_0_interrupts_1_IRQHandler -tcpwm_0_interrupts_2_IRQHandler -tcpwm_0_interrupts_3_IRQHandler -tcpwm_0_interrupts_256_IRQHandler -tcpwm_0_interrupts_257_IRQHandler -tcpwm_0_interrupts_258_IRQHandler -tcpwm_0_interrupts_259_IRQHandler -tcpwm_0_interrupts_260_IRQHandler -tcpwm_0_interrupts_261_IRQHandler -tcpwm_0_interrupts_262_IRQHandler -tcpwm_0_interrupts_263_IRQHandler -pass_interrupt_dacs_IRQHandler -smif_interrupt_IRQHandler -usb_interrupt_hi_IRQHandler -usb_interrupt_med_IRQHandler -usb_interrupt_lo_IRQHandler -canfd_0_interrupt0_IRQHandler -canfd_0_interrupts0_0_IRQHandler -canfd_0_interrupts1_0_IRQHandler -cpuss_interrupts_dw1_29_IRQHandler -cpuss_interrupts_dw1_30_IRQHandler -cpuss_interrupts_dw1_31_IRQHandler -cpuss_interrupts_dw0_29_IRQHandler - - B . - ENDP - - ALIGN - - -; User Initial Stack & Heap - IMPORT __use_two_region_memory - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_01_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_01_cm4.s deleted file mode 100644 index 678f9c6aae..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_01_cm4.s +++ /dev/null @@ -1,1154 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_01_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN Cy_SystemInitFpuEnable - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD MemManage_Handler - DCD BusFault_Handler - DCD UsageFault_Handler -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD DebugMon_Handler - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD ioss_interrupts_gpio_1_IRQHandler ; GPIO Port Interrupt #1 - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD ioss_interrupts_gpio_4_IRQHandler ; GPIO Port Interrupt #4 - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD ioss_interrupts_gpio_13_IRQHandler ; GPIO Port Interrupt #13 - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_8_interrupt_IRQHandler ; Serial Communication Block #8 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD pass_interrupt_ctbs_IRQHandler ; CTBm Interrupt (all CTBms) - DCD bless_interrupt_IRQHandler ; Bluetooth Radio interrupt - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD scb_3_interrupt_IRQHandler ; Serial Communication Block #3 - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 - DCD scb_7_interrupt_IRQHandler ; Serial Communication Block #7 - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD tcpwm_0_interrupts_4_IRQHandler ; TCPWM #0, Counter #4 - DCD tcpwm_0_interrupts_5_IRQHandler ; TCPWM #0, Counter #5 - DCD tcpwm_0_interrupts_6_IRQHandler ; TCPWM #0, Counter #6 - DCD tcpwm_0_interrupts_7_IRQHandler ; TCPWM #0, Counter #7 - DCD tcpwm_1_interrupts_0_IRQHandler ; TCPWM #1, Counter #0 - DCD tcpwm_1_interrupts_1_IRQHandler ; TCPWM #1, Counter #1 - DCD tcpwm_1_interrupts_2_IRQHandler ; TCPWM #1, Counter #2 - DCD tcpwm_1_interrupts_3_IRQHandler ; TCPWM #1, Counter #3 - DCD tcpwm_1_interrupts_4_IRQHandler ; TCPWM #1, Counter #4 - DCD tcpwm_1_interrupts_5_IRQHandler ; TCPWM #1, Counter #5 - DCD tcpwm_1_interrupts_6_IRQHandler ; TCPWM #1, Counter #6 - DCD tcpwm_1_interrupts_7_IRQHandler ; TCPWM #1, Counter #7 - DCD tcpwm_1_interrupts_8_IRQHandler ; TCPWM #1, Counter #8 - DCD tcpwm_1_interrupts_9_IRQHandler ; TCPWM #1, Counter #9 - DCD tcpwm_1_interrupts_10_IRQHandler ; TCPWM #1, Counter #10 - DCD tcpwm_1_interrupts_11_IRQHandler ; TCPWM #1, Counter #11 - DCD tcpwm_1_interrupts_12_IRQHandler ; TCPWM #1, Counter #12 - DCD tcpwm_1_interrupts_13_IRQHandler ; TCPWM #1, Counter #13 - DCD tcpwm_1_interrupts_14_IRQHandler ; TCPWM #1, Counter #14 - DCD tcpwm_1_interrupts_15_IRQHandler ; TCPWM #1, Counter #15 - DCD tcpwm_1_interrupts_16_IRQHandler ; TCPWM #1, Counter #16 - DCD tcpwm_1_interrupts_17_IRQHandler ; TCPWM #1, Counter #17 - DCD tcpwm_1_interrupts_18_IRQHandler ; TCPWM #1, Counter #18 - DCD tcpwm_1_interrupts_19_IRQHandler ; TCPWM #1, Counter #19 - DCD tcpwm_1_interrupts_20_IRQHandler ; TCPWM #1, Counter #20 - DCD tcpwm_1_interrupts_21_IRQHandler ; TCPWM #1, Counter #21 - DCD tcpwm_1_interrupts_22_IRQHandler ; TCPWM #1, Counter #22 - DCD tcpwm_1_interrupts_23_IRQHandler ; TCPWM #1, Counter #23 - DCD udb_interrupts_0_IRQHandler ; UDB Interrupt #0 - DCD udb_interrupts_1_IRQHandler ; UDB Interrupt #1 - DCD udb_interrupts_2_IRQHandler ; UDB Interrupt #2 - DCD udb_interrupts_3_IRQHandler ; UDB Interrupt #3 - DCD udb_interrupts_4_IRQHandler ; UDB Interrupt #4 - DCD udb_interrupts_5_IRQHandler ; UDB Interrupt #5 - DCD udb_interrupts_6_IRQHandler ; UDB Interrupt #6 - DCD udb_interrupts_7_IRQHandler ; UDB Interrupt #7 - DCD udb_interrupts_8_IRQHandler ; UDB Interrupt #8 - DCD udb_interrupts_9_IRQHandler ; UDB Interrupt #9 - DCD udb_interrupts_10_IRQHandler ; UDB Interrupt #10 - DCD udb_interrupts_11_IRQHandler ; UDB Interrupt #11 - DCD udb_interrupts_12_IRQHandler ; UDB Interrupt #12 - DCD udb_interrupts_13_IRQHandler ; UDB Interrupt #13 - DCD udb_interrupts_14_IRQHandler ; UDB Interrupt #14 - DCD udb_interrupts_15_IRQHandler ; UDB Interrupt #15 - DCD pass_interrupt_sar_IRQHandler ; SAR ADC interrupt - DCD audioss_interrupt_i2s_IRQHandler ; I2S Audio interrupt - DCD audioss_interrupt_pdm_IRQHandler ; PDM/PCM Audio interrupt - DCD profile_interrupt_IRQHandler ; Energy Profiler interrupt - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD pass_interrupt_dacs_IRQHandler ; Consolidated interrrupt for all DACs - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for OS-specific customization -;; - PUBWEAK cy_toolchain_init - SECTION .text:CODE:REORDER:NOROOT(2) -cy_toolchain_init - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; OS-specific low-level initialization - LDR R0, =cy_toolchain_init - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Wrapper - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Wrapper - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - B HardFault_Wrapper - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -MemManage_Handler - B HardFault_Wrapper - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -BusFault_Handler - B HardFault_Wrapper - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -UsageFault_Handler - B HardFault_Wrapper - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK ioss_interrupts_gpio_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_0_IRQHandler - B ioss_interrupts_gpio_0_IRQHandler - - PUBWEAK ioss_interrupts_gpio_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_1_IRQHandler - B ioss_interrupts_gpio_1_IRQHandler - - PUBWEAK ioss_interrupts_gpio_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_2_IRQHandler - B ioss_interrupts_gpio_2_IRQHandler - - PUBWEAK ioss_interrupts_gpio_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_3_IRQHandler - B ioss_interrupts_gpio_3_IRQHandler - - PUBWEAK ioss_interrupts_gpio_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_4_IRQHandler - B ioss_interrupts_gpio_4_IRQHandler - - PUBWEAK ioss_interrupts_gpio_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_5_IRQHandler - B ioss_interrupts_gpio_5_IRQHandler - - PUBWEAK ioss_interrupts_gpio_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_6_IRQHandler - B ioss_interrupts_gpio_6_IRQHandler - - PUBWEAK ioss_interrupts_gpio_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_7_IRQHandler - B ioss_interrupts_gpio_7_IRQHandler - - PUBWEAK ioss_interrupts_gpio_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_8_IRQHandler - B ioss_interrupts_gpio_8_IRQHandler - - PUBWEAK ioss_interrupts_gpio_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_9_IRQHandler - B ioss_interrupts_gpio_9_IRQHandler - - PUBWEAK ioss_interrupts_gpio_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_10_IRQHandler - B ioss_interrupts_gpio_10_IRQHandler - - PUBWEAK ioss_interrupts_gpio_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_11_IRQHandler - B ioss_interrupts_gpio_11_IRQHandler - - PUBWEAK ioss_interrupts_gpio_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_12_IRQHandler - B ioss_interrupts_gpio_12_IRQHandler - - PUBWEAK ioss_interrupts_gpio_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_13_IRQHandler - B ioss_interrupts_gpio_13_IRQHandler - - PUBWEAK ioss_interrupts_gpio_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_14_IRQHandler - B ioss_interrupts_gpio_14_IRQHandler - - PUBWEAK ioss_interrupt_gpio_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_gpio_IRQHandler - B ioss_interrupt_gpio_IRQHandler - - PUBWEAK ioss_interrupt_vdd_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_vdd_IRQHandler - B ioss_interrupt_vdd_IRQHandler - - PUBWEAK lpcomp_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -lpcomp_interrupt_IRQHandler - B lpcomp_interrupt_IRQHandler - - PUBWEAK scb_8_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_8_interrupt_IRQHandler - B scb_8_interrupt_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_0_IRQHandler - B srss_interrupt_mcwdt_0_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_1_IRQHandler - B srss_interrupt_mcwdt_1_IRQHandler - - PUBWEAK srss_interrupt_backup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_backup_IRQHandler - B srss_interrupt_backup_IRQHandler - - PUBWEAK srss_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_IRQHandler - B srss_interrupt_IRQHandler - - PUBWEAK pass_interrupt_ctbs_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_ctbs_IRQHandler - B pass_interrupt_ctbs_IRQHandler - - PUBWEAK bless_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -bless_interrupt_IRQHandler - B bless_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_0_IRQHandler - B cpuss_interrupts_ipc_0_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_1_IRQHandler - B cpuss_interrupts_ipc_1_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_2_IRQHandler - B cpuss_interrupts_ipc_2_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_3_IRQHandler - B cpuss_interrupts_ipc_3_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_4_IRQHandler - B cpuss_interrupts_ipc_4_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_5_IRQHandler - B cpuss_interrupts_ipc_5_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_6_IRQHandler - B cpuss_interrupts_ipc_6_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_7_IRQHandler - B cpuss_interrupts_ipc_7_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_8_IRQHandler - B cpuss_interrupts_ipc_8_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_9_IRQHandler - B cpuss_interrupts_ipc_9_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_10_IRQHandler - B cpuss_interrupts_ipc_10_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_11_IRQHandler - B cpuss_interrupts_ipc_11_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_12_IRQHandler - B cpuss_interrupts_ipc_12_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_13_IRQHandler - B cpuss_interrupts_ipc_13_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_14_IRQHandler - B cpuss_interrupts_ipc_14_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_15_IRQHandler - B cpuss_interrupts_ipc_15_IRQHandler - - PUBWEAK scb_0_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_0_interrupt_IRQHandler - B scb_0_interrupt_IRQHandler - - PUBWEAK scb_1_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_1_interrupt_IRQHandler - B scb_1_interrupt_IRQHandler - - PUBWEAK scb_2_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_2_interrupt_IRQHandler - B scb_2_interrupt_IRQHandler - - PUBWEAK scb_3_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_3_interrupt_IRQHandler - B scb_3_interrupt_IRQHandler - - PUBWEAK scb_4_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_4_interrupt_IRQHandler - B scb_4_interrupt_IRQHandler - - PUBWEAK scb_5_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_5_interrupt_IRQHandler - B scb_5_interrupt_IRQHandler - - PUBWEAK scb_6_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_6_interrupt_IRQHandler - B scb_6_interrupt_IRQHandler - - PUBWEAK scb_7_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_7_interrupt_IRQHandler - B scb_7_interrupt_IRQHandler - - PUBWEAK csd_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -csd_interrupt_IRQHandler - B csd_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_0_IRQHandler - B cpuss_interrupts_dw0_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_1_IRQHandler - B cpuss_interrupts_dw0_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_2_IRQHandler - B cpuss_interrupts_dw0_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_3_IRQHandler - B cpuss_interrupts_dw0_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_4_IRQHandler - B cpuss_interrupts_dw0_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_5_IRQHandler - B cpuss_interrupts_dw0_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_6_IRQHandler - B cpuss_interrupts_dw0_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_7_IRQHandler - B cpuss_interrupts_dw0_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_8_IRQHandler - B cpuss_interrupts_dw0_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_9_IRQHandler - B cpuss_interrupts_dw0_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_10_IRQHandler - B cpuss_interrupts_dw0_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_11_IRQHandler - B cpuss_interrupts_dw0_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_12_IRQHandler - B cpuss_interrupts_dw0_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_13_IRQHandler - B cpuss_interrupts_dw0_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_14_IRQHandler - B cpuss_interrupts_dw0_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_15_IRQHandler - B cpuss_interrupts_dw0_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_0_IRQHandler - B cpuss_interrupts_dw1_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_1_IRQHandler - B cpuss_interrupts_dw1_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_2_IRQHandler - B cpuss_interrupts_dw1_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_3_IRQHandler - B cpuss_interrupts_dw1_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_4_IRQHandler - B cpuss_interrupts_dw1_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_5_IRQHandler - B cpuss_interrupts_dw1_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_6_IRQHandler - B cpuss_interrupts_dw1_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_7_IRQHandler - B cpuss_interrupts_dw1_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_8_IRQHandler - B cpuss_interrupts_dw1_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_9_IRQHandler - B cpuss_interrupts_dw1_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_10_IRQHandler - B cpuss_interrupts_dw1_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_11_IRQHandler - B cpuss_interrupts_dw1_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_12_IRQHandler - B cpuss_interrupts_dw1_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_13_IRQHandler - B cpuss_interrupts_dw1_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_14_IRQHandler - B cpuss_interrupts_dw1_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_15_IRQHandler - B cpuss_interrupts_dw1_15_IRQHandler - - PUBWEAK cpuss_interrupts_fault_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_0_IRQHandler - B cpuss_interrupts_fault_0_IRQHandler - - PUBWEAK cpuss_interrupts_fault_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_1_IRQHandler - B cpuss_interrupts_fault_1_IRQHandler - - PUBWEAK cpuss_interrupt_crypto_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_crypto_IRQHandler - B cpuss_interrupt_crypto_IRQHandler - - PUBWEAK cpuss_interrupt_fm_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_fm_IRQHandler - B cpuss_interrupt_fm_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_0_IRQHandler - B cpuss_interrupts_cm0_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_1_IRQHandler - B cpuss_interrupts_cm0_cti_1_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_0_IRQHandler - B cpuss_interrupts_cm4_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_1_IRQHandler - B cpuss_interrupts_cm4_cti_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_0_IRQHandler - B tcpwm_0_interrupts_0_IRQHandler - - PUBWEAK tcpwm_0_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_1_IRQHandler - B tcpwm_0_interrupts_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_2_IRQHandler - B tcpwm_0_interrupts_2_IRQHandler - - PUBWEAK tcpwm_0_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_3_IRQHandler - B tcpwm_0_interrupts_3_IRQHandler - - PUBWEAK tcpwm_0_interrupts_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_4_IRQHandler - B tcpwm_0_interrupts_4_IRQHandler - - PUBWEAK tcpwm_0_interrupts_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_5_IRQHandler - B tcpwm_0_interrupts_5_IRQHandler - - PUBWEAK tcpwm_0_interrupts_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_6_IRQHandler - B tcpwm_0_interrupts_6_IRQHandler - - PUBWEAK tcpwm_0_interrupts_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_7_IRQHandler - B tcpwm_0_interrupts_7_IRQHandler - - PUBWEAK tcpwm_1_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_0_IRQHandler - B tcpwm_1_interrupts_0_IRQHandler - - PUBWEAK tcpwm_1_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_1_IRQHandler - B tcpwm_1_interrupts_1_IRQHandler - - PUBWEAK tcpwm_1_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_2_IRQHandler - B tcpwm_1_interrupts_2_IRQHandler - - PUBWEAK tcpwm_1_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_3_IRQHandler - B tcpwm_1_interrupts_3_IRQHandler - - PUBWEAK tcpwm_1_interrupts_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_4_IRQHandler - B tcpwm_1_interrupts_4_IRQHandler - - PUBWEAK tcpwm_1_interrupts_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_5_IRQHandler - B tcpwm_1_interrupts_5_IRQHandler - - PUBWEAK tcpwm_1_interrupts_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_6_IRQHandler - B tcpwm_1_interrupts_6_IRQHandler - - PUBWEAK tcpwm_1_interrupts_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_7_IRQHandler - B tcpwm_1_interrupts_7_IRQHandler - - PUBWEAK tcpwm_1_interrupts_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_8_IRQHandler - B tcpwm_1_interrupts_8_IRQHandler - - PUBWEAK tcpwm_1_interrupts_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_9_IRQHandler - B tcpwm_1_interrupts_9_IRQHandler - - PUBWEAK tcpwm_1_interrupts_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_10_IRQHandler - B tcpwm_1_interrupts_10_IRQHandler - - PUBWEAK tcpwm_1_interrupts_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_11_IRQHandler - B tcpwm_1_interrupts_11_IRQHandler - - PUBWEAK tcpwm_1_interrupts_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_12_IRQHandler - B tcpwm_1_interrupts_12_IRQHandler - - PUBWEAK tcpwm_1_interrupts_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_13_IRQHandler - B tcpwm_1_interrupts_13_IRQHandler - - PUBWEAK tcpwm_1_interrupts_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_14_IRQHandler - B tcpwm_1_interrupts_14_IRQHandler - - PUBWEAK tcpwm_1_interrupts_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_15_IRQHandler - B tcpwm_1_interrupts_15_IRQHandler - - PUBWEAK tcpwm_1_interrupts_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_16_IRQHandler - B tcpwm_1_interrupts_16_IRQHandler - - PUBWEAK tcpwm_1_interrupts_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_17_IRQHandler - B tcpwm_1_interrupts_17_IRQHandler - - PUBWEAK tcpwm_1_interrupts_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_18_IRQHandler - B tcpwm_1_interrupts_18_IRQHandler - - PUBWEAK tcpwm_1_interrupts_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_19_IRQHandler - B tcpwm_1_interrupts_19_IRQHandler - - PUBWEAK tcpwm_1_interrupts_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_20_IRQHandler - B tcpwm_1_interrupts_20_IRQHandler - - PUBWEAK tcpwm_1_interrupts_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_21_IRQHandler - B tcpwm_1_interrupts_21_IRQHandler - - PUBWEAK tcpwm_1_interrupts_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_22_IRQHandler - B tcpwm_1_interrupts_22_IRQHandler - - PUBWEAK tcpwm_1_interrupts_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_23_IRQHandler - B tcpwm_1_interrupts_23_IRQHandler - - PUBWEAK udb_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_0_IRQHandler - B udb_interrupts_0_IRQHandler - - PUBWEAK udb_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_1_IRQHandler - B udb_interrupts_1_IRQHandler - - PUBWEAK udb_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_2_IRQHandler - B udb_interrupts_2_IRQHandler - - PUBWEAK udb_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_3_IRQHandler - B udb_interrupts_3_IRQHandler - - PUBWEAK udb_interrupts_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_4_IRQHandler - B udb_interrupts_4_IRQHandler - - PUBWEAK udb_interrupts_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_5_IRQHandler - B udb_interrupts_5_IRQHandler - - PUBWEAK udb_interrupts_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_6_IRQHandler - B udb_interrupts_6_IRQHandler - - PUBWEAK udb_interrupts_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_7_IRQHandler - B udb_interrupts_7_IRQHandler - - PUBWEAK udb_interrupts_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_8_IRQHandler - B udb_interrupts_8_IRQHandler - - PUBWEAK udb_interrupts_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_9_IRQHandler - B udb_interrupts_9_IRQHandler - - PUBWEAK udb_interrupts_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_10_IRQHandler - B udb_interrupts_10_IRQHandler - - PUBWEAK udb_interrupts_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_11_IRQHandler - B udb_interrupts_11_IRQHandler - - PUBWEAK udb_interrupts_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_12_IRQHandler - B udb_interrupts_12_IRQHandler - - PUBWEAK udb_interrupts_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_13_IRQHandler - B udb_interrupts_13_IRQHandler - - PUBWEAK udb_interrupts_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_14_IRQHandler - B udb_interrupts_14_IRQHandler - - PUBWEAK udb_interrupts_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -udb_interrupts_15_IRQHandler - B udb_interrupts_15_IRQHandler - - PUBWEAK pass_interrupt_sar_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_sar_IRQHandler - B pass_interrupt_sar_IRQHandler - - PUBWEAK audioss_interrupt_i2s_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -audioss_interrupt_i2s_IRQHandler - B audioss_interrupt_i2s_IRQHandler - - PUBWEAK audioss_interrupt_pdm_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -audioss_interrupt_pdm_IRQHandler - B audioss_interrupt_pdm_IRQHandler - - PUBWEAK profile_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -profile_interrupt_IRQHandler - B profile_interrupt_IRQHandler - - PUBWEAK smif_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -smif_interrupt_IRQHandler - B smif_interrupt_IRQHandler - - PUBWEAK usb_interrupt_hi_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_hi_IRQHandler - B usb_interrupt_hi_IRQHandler - - PUBWEAK usb_interrupt_med_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_med_IRQHandler - B usb_interrupt_med_IRQHandler - - PUBWEAK usb_interrupt_lo_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_lo_IRQHandler - B usb_interrupt_lo_IRQHandler - - PUBWEAK pass_interrupt_dacs_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_dacs_IRQHandler - B pass_interrupt_dacs_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_02_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_02_cm4.s deleted file mode 100644 index 8f1e4a57e5..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_02_cm4.s +++ /dev/null @@ -1,1280 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_02_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN Cy_SystemInitFpuEnable - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD MemManage_Handler - DCD BusFault_Handler - DCD UsageFault_Handler -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD DebugMon_Handler - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD ioss_interrupts_gpio_1_IRQHandler ; GPIO Port Interrupt #1 - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD ioss_interrupts_gpio_4_IRQHandler ; GPIO Port Interrupt #4 - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD ioss_interrupts_gpio_13_IRQHandler ; GPIO Port Interrupt #13 - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_8_interrupt_IRQHandler ; Serial Communication Block #8 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD scb_3_interrupt_IRQHandler ; Serial Communication Block #3 - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 - DCD scb_7_interrupt_IRQHandler ; Serial Communication Block #7 - DCD scb_9_interrupt_IRQHandler ; Serial Communication Block #9 - DCD scb_10_interrupt_IRQHandler ; Serial Communication Block #10 - DCD scb_11_interrupt_IRQHandler ; Serial Communication Block #11 - DCD scb_12_interrupt_IRQHandler ; Serial Communication Block #12 - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0 - DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1 - DCD cpuss_interrupts_dmac_2_IRQHandler ; CPUSS DMAC, Channel #2 - DCD cpuss_interrupts_dmac_3_IRQHandler ; CPUSS DMAC, Channel #3 - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw0_16_IRQHandler ; CPUSS DataWire #0, Channel #16 - DCD cpuss_interrupts_dw0_17_IRQHandler ; CPUSS DataWire #0, Channel #17 - DCD cpuss_interrupts_dw0_18_IRQHandler ; CPUSS DataWire #0, Channel #18 - DCD cpuss_interrupts_dw0_19_IRQHandler ; CPUSS DataWire #0, Channel #19 - DCD cpuss_interrupts_dw0_20_IRQHandler ; CPUSS DataWire #0, Channel #20 - DCD cpuss_interrupts_dw0_21_IRQHandler ; CPUSS DataWire #0, Channel #21 - DCD cpuss_interrupts_dw0_22_IRQHandler ; CPUSS DataWire #0, Channel #22 - DCD cpuss_interrupts_dw0_23_IRQHandler ; CPUSS DataWire #0, Channel #23 - DCD cpuss_interrupts_dw0_24_IRQHandler ; CPUSS DataWire #0, Channel #24 - DCD cpuss_interrupts_dw0_25_IRQHandler ; CPUSS DataWire #0, Channel #25 - DCD cpuss_interrupts_dw0_26_IRQHandler ; CPUSS DataWire #0, Channel #26 - DCD cpuss_interrupts_dw0_27_IRQHandler ; CPUSS DataWire #0, Channel #27 - DCD cpuss_interrupts_dw0_28_IRQHandler ; CPUSS DataWire #0, Channel #28 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_dw1_16_IRQHandler ; CPUSS DataWire #1, Channel #16 - DCD cpuss_interrupts_dw1_17_IRQHandler ; CPUSS DataWire #1, Channel #17 - DCD cpuss_interrupts_dw1_18_IRQHandler ; CPUSS DataWire #1, Channel #18 - DCD cpuss_interrupts_dw1_19_IRQHandler ; CPUSS DataWire #1, Channel #19 - DCD cpuss_interrupts_dw1_20_IRQHandler ; CPUSS DataWire #1, Channel #20 - DCD cpuss_interrupts_dw1_21_IRQHandler ; CPUSS DataWire #1, Channel #21 - DCD cpuss_interrupts_dw1_22_IRQHandler ; CPUSS DataWire #1, Channel #22 - DCD cpuss_interrupts_dw1_23_IRQHandler ; CPUSS DataWire #1, Channel #23 - DCD cpuss_interrupts_dw1_24_IRQHandler ; CPUSS DataWire #1, Channel #24 - DCD cpuss_interrupts_dw1_25_IRQHandler ; CPUSS DataWire #1, Channel #25 - DCD cpuss_interrupts_dw1_26_IRQHandler ; CPUSS DataWire #1, Channel #26 - DCD cpuss_interrupts_dw1_27_IRQHandler ; CPUSS DataWire #1, Channel #27 - DCD cpuss_interrupts_dw1_28_IRQHandler ; CPUSS DataWire #1, Channel #28 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm4_fp_IRQHandler ; Floating Point operation fault - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD tcpwm_0_interrupts_4_IRQHandler ; TCPWM #0, Counter #4 - DCD tcpwm_0_interrupts_5_IRQHandler ; TCPWM #0, Counter #5 - DCD tcpwm_0_interrupts_6_IRQHandler ; TCPWM #0, Counter #6 - DCD tcpwm_0_interrupts_7_IRQHandler ; TCPWM #0, Counter #7 - DCD tcpwm_1_interrupts_0_IRQHandler ; TCPWM #1, Counter #0 - DCD tcpwm_1_interrupts_1_IRQHandler ; TCPWM #1, Counter #1 - DCD tcpwm_1_interrupts_2_IRQHandler ; TCPWM #1, Counter #2 - DCD tcpwm_1_interrupts_3_IRQHandler ; TCPWM #1, Counter #3 - DCD tcpwm_1_interrupts_4_IRQHandler ; TCPWM #1, Counter #4 - DCD tcpwm_1_interrupts_5_IRQHandler ; TCPWM #1, Counter #5 - DCD tcpwm_1_interrupts_6_IRQHandler ; TCPWM #1, Counter #6 - DCD tcpwm_1_interrupts_7_IRQHandler ; TCPWM #1, Counter #7 - DCD tcpwm_1_interrupts_8_IRQHandler ; TCPWM #1, Counter #8 - DCD tcpwm_1_interrupts_9_IRQHandler ; TCPWM #1, Counter #9 - DCD tcpwm_1_interrupts_10_IRQHandler ; TCPWM #1, Counter #10 - DCD tcpwm_1_interrupts_11_IRQHandler ; TCPWM #1, Counter #11 - DCD tcpwm_1_interrupts_12_IRQHandler ; TCPWM #1, Counter #12 - DCD tcpwm_1_interrupts_13_IRQHandler ; TCPWM #1, Counter #13 - DCD tcpwm_1_interrupts_14_IRQHandler ; TCPWM #1, Counter #14 - DCD tcpwm_1_interrupts_15_IRQHandler ; TCPWM #1, Counter #15 - DCD tcpwm_1_interrupts_16_IRQHandler ; TCPWM #1, Counter #16 - DCD tcpwm_1_interrupts_17_IRQHandler ; TCPWM #1, Counter #17 - DCD tcpwm_1_interrupts_18_IRQHandler ; TCPWM #1, Counter #18 - DCD tcpwm_1_interrupts_19_IRQHandler ; TCPWM #1, Counter #19 - DCD tcpwm_1_interrupts_20_IRQHandler ; TCPWM #1, Counter #20 - DCD tcpwm_1_interrupts_21_IRQHandler ; TCPWM #1, Counter #21 - DCD tcpwm_1_interrupts_22_IRQHandler ; TCPWM #1, Counter #22 - DCD tcpwm_1_interrupts_23_IRQHandler ; TCPWM #1, Counter #23 - DCD pass_interrupt_sar_IRQHandler ; SAR ADC interrupt - DCD audioss_0_interrupt_i2s_IRQHandler ; I2S0 Audio interrupt - DCD audioss_0_interrupt_pdm_IRQHandler ; PDM0/PCM0 Audio interrupt - DCD audioss_1_interrupt_i2s_IRQHandler ; I2S1 Audio interrupt - DCD profile_interrupt_IRQHandler ; Energy Profiler interrupt - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD sdhc_0_interrupt_wakeup_IRQHandler ; SDIO wakeup interrupt for mxsdhc - DCD sdhc_0_interrupt_general_IRQHandler ; Consolidated interrupt for mxsdhc for everything else - DCD sdhc_1_interrupt_wakeup_IRQHandler ; EEMC wakeup interrupt for mxsdhc, not used - DCD sdhc_1_interrupt_general_IRQHandler ; Consolidated interrupt for mxsdhc for everything else - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for OS-specific customization -;; - PUBWEAK cy_toolchain_init - SECTION .text:CODE:REORDER:NOROOT(2) -cy_toolchain_init - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; OS-specific low-level initialization - LDR R0, =cy_toolchain_init - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Wrapper - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Wrapper - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - B HardFault_Wrapper - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -MemManage_Handler - B HardFault_Wrapper - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -BusFault_Handler - B HardFault_Wrapper - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -UsageFault_Handler - B HardFault_Wrapper - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK ioss_interrupts_gpio_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_0_IRQHandler - B ioss_interrupts_gpio_0_IRQHandler - - PUBWEAK ioss_interrupts_gpio_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_1_IRQHandler - B ioss_interrupts_gpio_1_IRQHandler - - PUBWEAK ioss_interrupts_gpio_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_2_IRQHandler - B ioss_interrupts_gpio_2_IRQHandler - - PUBWEAK ioss_interrupts_gpio_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_3_IRQHandler - B ioss_interrupts_gpio_3_IRQHandler - - PUBWEAK ioss_interrupts_gpio_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_4_IRQHandler - B ioss_interrupts_gpio_4_IRQHandler - - PUBWEAK ioss_interrupts_gpio_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_5_IRQHandler - B ioss_interrupts_gpio_5_IRQHandler - - PUBWEAK ioss_interrupts_gpio_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_6_IRQHandler - B ioss_interrupts_gpio_6_IRQHandler - - PUBWEAK ioss_interrupts_gpio_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_7_IRQHandler - B ioss_interrupts_gpio_7_IRQHandler - - PUBWEAK ioss_interrupts_gpio_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_8_IRQHandler - B ioss_interrupts_gpio_8_IRQHandler - - PUBWEAK ioss_interrupts_gpio_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_9_IRQHandler - B ioss_interrupts_gpio_9_IRQHandler - - PUBWEAK ioss_interrupts_gpio_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_10_IRQHandler - B ioss_interrupts_gpio_10_IRQHandler - - PUBWEAK ioss_interrupts_gpio_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_11_IRQHandler - B ioss_interrupts_gpio_11_IRQHandler - - PUBWEAK ioss_interrupts_gpio_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_12_IRQHandler - B ioss_interrupts_gpio_12_IRQHandler - - PUBWEAK ioss_interrupts_gpio_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_13_IRQHandler - B ioss_interrupts_gpio_13_IRQHandler - - PUBWEAK ioss_interrupts_gpio_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_14_IRQHandler - B ioss_interrupts_gpio_14_IRQHandler - - PUBWEAK ioss_interrupt_gpio_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_gpio_IRQHandler - B ioss_interrupt_gpio_IRQHandler - - PUBWEAK ioss_interrupt_vdd_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_vdd_IRQHandler - B ioss_interrupt_vdd_IRQHandler - - PUBWEAK lpcomp_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -lpcomp_interrupt_IRQHandler - B lpcomp_interrupt_IRQHandler - - PUBWEAK scb_8_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_8_interrupt_IRQHandler - B scb_8_interrupt_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_0_IRQHandler - B srss_interrupt_mcwdt_0_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_1_IRQHandler - B srss_interrupt_mcwdt_1_IRQHandler - - PUBWEAK srss_interrupt_backup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_backup_IRQHandler - B srss_interrupt_backup_IRQHandler - - PUBWEAK srss_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_IRQHandler - B srss_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_0_IRQHandler - B cpuss_interrupts_ipc_0_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_1_IRQHandler - B cpuss_interrupts_ipc_1_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_2_IRQHandler - B cpuss_interrupts_ipc_2_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_3_IRQHandler - B cpuss_interrupts_ipc_3_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_4_IRQHandler - B cpuss_interrupts_ipc_4_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_5_IRQHandler - B cpuss_interrupts_ipc_5_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_6_IRQHandler - B cpuss_interrupts_ipc_6_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_7_IRQHandler - B cpuss_interrupts_ipc_7_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_8_IRQHandler - B cpuss_interrupts_ipc_8_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_9_IRQHandler - B cpuss_interrupts_ipc_9_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_10_IRQHandler - B cpuss_interrupts_ipc_10_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_11_IRQHandler - B cpuss_interrupts_ipc_11_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_12_IRQHandler - B cpuss_interrupts_ipc_12_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_13_IRQHandler - B cpuss_interrupts_ipc_13_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_14_IRQHandler - B cpuss_interrupts_ipc_14_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_15_IRQHandler - B cpuss_interrupts_ipc_15_IRQHandler - - PUBWEAK scb_0_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_0_interrupt_IRQHandler - B scb_0_interrupt_IRQHandler - - PUBWEAK scb_1_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_1_interrupt_IRQHandler - B scb_1_interrupt_IRQHandler - - PUBWEAK scb_2_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_2_interrupt_IRQHandler - B scb_2_interrupt_IRQHandler - - PUBWEAK scb_3_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_3_interrupt_IRQHandler - B scb_3_interrupt_IRQHandler - - PUBWEAK scb_4_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_4_interrupt_IRQHandler - B scb_4_interrupt_IRQHandler - - PUBWEAK scb_5_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_5_interrupt_IRQHandler - B scb_5_interrupt_IRQHandler - - PUBWEAK scb_6_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_6_interrupt_IRQHandler - B scb_6_interrupt_IRQHandler - - PUBWEAK scb_7_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_7_interrupt_IRQHandler - B scb_7_interrupt_IRQHandler - - PUBWEAK scb_9_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_9_interrupt_IRQHandler - B scb_9_interrupt_IRQHandler - - PUBWEAK scb_10_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_10_interrupt_IRQHandler - B scb_10_interrupt_IRQHandler - - PUBWEAK scb_11_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_11_interrupt_IRQHandler - B scb_11_interrupt_IRQHandler - - PUBWEAK scb_12_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_12_interrupt_IRQHandler - B scb_12_interrupt_IRQHandler - - PUBWEAK csd_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -csd_interrupt_IRQHandler - B csd_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_0_IRQHandler - B cpuss_interrupts_dmac_0_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_1_IRQHandler - B cpuss_interrupts_dmac_1_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_2_IRQHandler - B cpuss_interrupts_dmac_2_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_3_IRQHandler - B cpuss_interrupts_dmac_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_0_IRQHandler - B cpuss_interrupts_dw0_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_1_IRQHandler - B cpuss_interrupts_dw0_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_2_IRQHandler - B cpuss_interrupts_dw0_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_3_IRQHandler - B cpuss_interrupts_dw0_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_4_IRQHandler - B cpuss_interrupts_dw0_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_5_IRQHandler - B cpuss_interrupts_dw0_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_6_IRQHandler - B cpuss_interrupts_dw0_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_7_IRQHandler - B cpuss_interrupts_dw0_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_8_IRQHandler - B cpuss_interrupts_dw0_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_9_IRQHandler - B cpuss_interrupts_dw0_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_10_IRQHandler - B cpuss_interrupts_dw0_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_11_IRQHandler - B cpuss_interrupts_dw0_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_12_IRQHandler - B cpuss_interrupts_dw0_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_13_IRQHandler - B cpuss_interrupts_dw0_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_14_IRQHandler - B cpuss_interrupts_dw0_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_15_IRQHandler - B cpuss_interrupts_dw0_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_16_IRQHandler - B cpuss_interrupts_dw0_16_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_17_IRQHandler - B cpuss_interrupts_dw0_17_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_18_IRQHandler - B cpuss_interrupts_dw0_18_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_19_IRQHandler - B cpuss_interrupts_dw0_19_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_20_IRQHandler - B cpuss_interrupts_dw0_20_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_21_IRQHandler - B cpuss_interrupts_dw0_21_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_22_IRQHandler - B cpuss_interrupts_dw0_22_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_23_IRQHandler - B cpuss_interrupts_dw0_23_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_24_IRQHandler - B cpuss_interrupts_dw0_24_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_25_IRQHandler - B cpuss_interrupts_dw0_25_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_26_IRQHandler - B cpuss_interrupts_dw0_26_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_27_IRQHandler - B cpuss_interrupts_dw0_27_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_28_IRQHandler - B cpuss_interrupts_dw0_28_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_0_IRQHandler - B cpuss_interrupts_dw1_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_1_IRQHandler - B cpuss_interrupts_dw1_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_2_IRQHandler - B cpuss_interrupts_dw1_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_3_IRQHandler - B cpuss_interrupts_dw1_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_4_IRQHandler - B cpuss_interrupts_dw1_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_5_IRQHandler - B cpuss_interrupts_dw1_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_6_IRQHandler - B cpuss_interrupts_dw1_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_7_IRQHandler - B cpuss_interrupts_dw1_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_8_IRQHandler - B cpuss_interrupts_dw1_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_9_IRQHandler - B cpuss_interrupts_dw1_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_10_IRQHandler - B cpuss_interrupts_dw1_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_11_IRQHandler - B cpuss_interrupts_dw1_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_12_IRQHandler - B cpuss_interrupts_dw1_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_13_IRQHandler - B cpuss_interrupts_dw1_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_14_IRQHandler - B cpuss_interrupts_dw1_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_15_IRQHandler - B cpuss_interrupts_dw1_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_16_IRQHandler - B cpuss_interrupts_dw1_16_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_17_IRQHandler - B cpuss_interrupts_dw1_17_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_18_IRQHandler - B cpuss_interrupts_dw1_18_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_19_IRQHandler - B cpuss_interrupts_dw1_19_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_20_IRQHandler - B cpuss_interrupts_dw1_20_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_21_IRQHandler - B cpuss_interrupts_dw1_21_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_22_IRQHandler - B cpuss_interrupts_dw1_22_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_23_IRQHandler - B cpuss_interrupts_dw1_23_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_24_IRQHandler - B cpuss_interrupts_dw1_24_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_25_IRQHandler - B cpuss_interrupts_dw1_25_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_26_IRQHandler - B cpuss_interrupts_dw1_26_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_27_IRQHandler - B cpuss_interrupts_dw1_27_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_28_IRQHandler - B cpuss_interrupts_dw1_28_IRQHandler - - PUBWEAK cpuss_interrupts_fault_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_0_IRQHandler - B cpuss_interrupts_fault_0_IRQHandler - - PUBWEAK cpuss_interrupts_fault_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_1_IRQHandler - B cpuss_interrupts_fault_1_IRQHandler - - PUBWEAK cpuss_interrupt_crypto_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_crypto_IRQHandler - B cpuss_interrupt_crypto_IRQHandler - - PUBWEAK cpuss_interrupt_fm_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_fm_IRQHandler - B cpuss_interrupt_fm_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_fp_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_fp_IRQHandler - B cpuss_interrupts_cm4_fp_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_0_IRQHandler - B cpuss_interrupts_cm0_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_1_IRQHandler - B cpuss_interrupts_cm0_cti_1_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_0_IRQHandler - B cpuss_interrupts_cm4_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_1_IRQHandler - B cpuss_interrupts_cm4_cti_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_0_IRQHandler - B tcpwm_0_interrupts_0_IRQHandler - - PUBWEAK tcpwm_0_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_1_IRQHandler - B tcpwm_0_interrupts_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_2_IRQHandler - B tcpwm_0_interrupts_2_IRQHandler - - PUBWEAK tcpwm_0_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_3_IRQHandler - B tcpwm_0_interrupts_3_IRQHandler - - PUBWEAK tcpwm_0_interrupts_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_4_IRQHandler - B tcpwm_0_interrupts_4_IRQHandler - - PUBWEAK tcpwm_0_interrupts_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_5_IRQHandler - B tcpwm_0_interrupts_5_IRQHandler - - PUBWEAK tcpwm_0_interrupts_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_6_IRQHandler - B tcpwm_0_interrupts_6_IRQHandler - - PUBWEAK tcpwm_0_interrupts_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_7_IRQHandler - B tcpwm_0_interrupts_7_IRQHandler - - PUBWEAK tcpwm_1_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_0_IRQHandler - B tcpwm_1_interrupts_0_IRQHandler - - PUBWEAK tcpwm_1_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_1_IRQHandler - B tcpwm_1_interrupts_1_IRQHandler - - PUBWEAK tcpwm_1_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_2_IRQHandler - B tcpwm_1_interrupts_2_IRQHandler - - PUBWEAK tcpwm_1_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_3_IRQHandler - B tcpwm_1_interrupts_3_IRQHandler - - PUBWEAK tcpwm_1_interrupts_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_4_IRQHandler - B tcpwm_1_interrupts_4_IRQHandler - - PUBWEAK tcpwm_1_interrupts_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_5_IRQHandler - B tcpwm_1_interrupts_5_IRQHandler - - PUBWEAK tcpwm_1_interrupts_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_6_IRQHandler - B tcpwm_1_interrupts_6_IRQHandler - - PUBWEAK tcpwm_1_interrupts_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_7_IRQHandler - B tcpwm_1_interrupts_7_IRQHandler - - PUBWEAK tcpwm_1_interrupts_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_8_IRQHandler - B tcpwm_1_interrupts_8_IRQHandler - - PUBWEAK tcpwm_1_interrupts_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_9_IRQHandler - B tcpwm_1_interrupts_9_IRQHandler - - PUBWEAK tcpwm_1_interrupts_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_10_IRQHandler - B tcpwm_1_interrupts_10_IRQHandler - - PUBWEAK tcpwm_1_interrupts_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_11_IRQHandler - B tcpwm_1_interrupts_11_IRQHandler - - PUBWEAK tcpwm_1_interrupts_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_12_IRQHandler - B tcpwm_1_interrupts_12_IRQHandler - - PUBWEAK tcpwm_1_interrupts_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_13_IRQHandler - B tcpwm_1_interrupts_13_IRQHandler - - PUBWEAK tcpwm_1_interrupts_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_14_IRQHandler - B tcpwm_1_interrupts_14_IRQHandler - - PUBWEAK tcpwm_1_interrupts_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_15_IRQHandler - B tcpwm_1_interrupts_15_IRQHandler - - PUBWEAK tcpwm_1_interrupts_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_16_IRQHandler - B tcpwm_1_interrupts_16_IRQHandler - - PUBWEAK tcpwm_1_interrupts_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_17_IRQHandler - B tcpwm_1_interrupts_17_IRQHandler - - PUBWEAK tcpwm_1_interrupts_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_18_IRQHandler - B tcpwm_1_interrupts_18_IRQHandler - - PUBWEAK tcpwm_1_interrupts_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_19_IRQHandler - B tcpwm_1_interrupts_19_IRQHandler - - PUBWEAK tcpwm_1_interrupts_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_20_IRQHandler - B tcpwm_1_interrupts_20_IRQHandler - - PUBWEAK tcpwm_1_interrupts_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_21_IRQHandler - B tcpwm_1_interrupts_21_IRQHandler - - PUBWEAK tcpwm_1_interrupts_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_22_IRQHandler - B tcpwm_1_interrupts_22_IRQHandler - - PUBWEAK tcpwm_1_interrupts_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_23_IRQHandler - B tcpwm_1_interrupts_23_IRQHandler - - PUBWEAK pass_interrupt_sar_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_sar_IRQHandler - B pass_interrupt_sar_IRQHandler - - PUBWEAK audioss_0_interrupt_i2s_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -audioss_0_interrupt_i2s_IRQHandler - B audioss_0_interrupt_i2s_IRQHandler - - PUBWEAK audioss_0_interrupt_pdm_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -audioss_0_interrupt_pdm_IRQHandler - B audioss_0_interrupt_pdm_IRQHandler - - PUBWEAK audioss_1_interrupt_i2s_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -audioss_1_interrupt_i2s_IRQHandler - B audioss_1_interrupt_i2s_IRQHandler - - PUBWEAK profile_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -profile_interrupt_IRQHandler - B profile_interrupt_IRQHandler - - PUBWEAK smif_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -smif_interrupt_IRQHandler - B smif_interrupt_IRQHandler - - PUBWEAK usb_interrupt_hi_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_hi_IRQHandler - B usb_interrupt_hi_IRQHandler - - PUBWEAK usb_interrupt_med_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_med_IRQHandler - B usb_interrupt_med_IRQHandler - - PUBWEAK usb_interrupt_lo_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_lo_IRQHandler - B usb_interrupt_lo_IRQHandler - - PUBWEAK sdhc_0_interrupt_wakeup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -sdhc_0_interrupt_wakeup_IRQHandler - B sdhc_0_interrupt_wakeup_IRQHandler - - PUBWEAK sdhc_0_interrupt_general_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -sdhc_0_interrupt_general_IRQHandler - B sdhc_0_interrupt_general_IRQHandler - - PUBWEAK sdhc_1_interrupt_wakeup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -sdhc_1_interrupt_wakeup_IRQHandler - B sdhc_1_interrupt_wakeup_IRQHandler - - PUBWEAK sdhc_1_interrupt_general_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -sdhc_1_interrupt_general_IRQHandler - B sdhc_1_interrupt_general_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_03_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_03_cm4.s deleted file mode 100644 index 1d212b8638..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_03_cm4.s +++ /dev/null @@ -1,1131 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_03_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN Cy_SystemInitFpuEnable - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD MemManage_Handler - DCD BusFault_Handler - DCD UsageFault_Handler -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD DebugMon_Handler - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD scb_3_interrupt_IRQHandler ; Serial Communication Block #3 - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0 - DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw0_16_IRQHandler ; CPUSS DataWire #0, Channel #16 - DCD cpuss_interrupts_dw0_17_IRQHandler ; CPUSS DataWire #0, Channel #17 - DCD cpuss_interrupts_dw0_18_IRQHandler ; CPUSS DataWire #0, Channel #18 - DCD cpuss_interrupts_dw0_19_IRQHandler ; CPUSS DataWire #0, Channel #19 - DCD cpuss_interrupts_dw0_20_IRQHandler ; CPUSS DataWire #0, Channel #20 - DCD cpuss_interrupts_dw0_21_IRQHandler ; CPUSS DataWire #0, Channel #21 - DCD cpuss_interrupts_dw0_22_IRQHandler ; CPUSS DataWire #0, Channel #22 - DCD cpuss_interrupts_dw0_23_IRQHandler ; CPUSS DataWire #0, Channel #23 - DCD cpuss_interrupts_dw0_24_IRQHandler ; CPUSS DataWire #0, Channel #24 - DCD cpuss_interrupts_dw0_25_IRQHandler ; CPUSS DataWire #0, Channel #25 - DCD cpuss_interrupts_dw0_26_IRQHandler ; CPUSS DataWire #0, Channel #26 - DCD cpuss_interrupts_dw0_27_IRQHandler ; CPUSS DataWire #0, Channel #27 - DCD cpuss_interrupts_dw0_28_IRQHandler ; CPUSS DataWire #0, Channel #28 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_dw1_16_IRQHandler ; CPUSS DataWire #1, Channel #16 - DCD cpuss_interrupts_dw1_17_IRQHandler ; CPUSS DataWire #1, Channel #17 - DCD cpuss_interrupts_dw1_18_IRQHandler ; CPUSS DataWire #1, Channel #18 - DCD cpuss_interrupts_dw1_19_IRQHandler ; CPUSS DataWire #1, Channel #19 - DCD cpuss_interrupts_dw1_20_IRQHandler ; CPUSS DataWire #1, Channel #20 - DCD cpuss_interrupts_dw1_21_IRQHandler ; CPUSS DataWire #1, Channel #21 - DCD cpuss_interrupts_dw1_22_IRQHandler ; CPUSS DataWire #1, Channel #22 - DCD cpuss_interrupts_dw1_23_IRQHandler ; CPUSS DataWire #1, Channel #23 - DCD cpuss_interrupts_dw1_24_IRQHandler ; CPUSS DataWire #1, Channel #24 - DCD cpuss_interrupts_dw1_25_IRQHandler ; CPUSS DataWire #1, Channel #25 - DCD cpuss_interrupts_dw1_26_IRQHandler ; CPUSS DataWire #1, Channel #26 - DCD cpuss_interrupts_dw1_27_IRQHandler ; CPUSS DataWire #1, Channel #27 - DCD cpuss_interrupts_dw1_28_IRQHandler ; CPUSS DataWire #1, Channel #28 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm4_fp_IRQHandler ; Floating Point operation fault - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD tcpwm_1_interrupts_0_IRQHandler ; TCPWM #1, Counter #0 - DCD tcpwm_1_interrupts_1_IRQHandler ; TCPWM #1, Counter #1 - DCD tcpwm_1_interrupts_2_IRQHandler ; TCPWM #1, Counter #2 - DCD tcpwm_1_interrupts_3_IRQHandler ; TCPWM #1, Counter #3 - DCD tcpwm_1_interrupts_4_IRQHandler ; TCPWM #1, Counter #4 - DCD tcpwm_1_interrupts_5_IRQHandler ; TCPWM #1, Counter #5 - DCD tcpwm_1_interrupts_6_IRQHandler ; TCPWM #1, Counter #6 - DCD tcpwm_1_interrupts_7_IRQHandler ; TCPWM #1, Counter #7 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD pass_interrupt_sar_IRQHandler ; SAR ADC interrupt - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD sdhc_0_interrupt_wakeup_IRQHandler ; SDIO wakeup interrupt for mxsdhc - DCD sdhc_0_interrupt_general_IRQHandler ; Consolidated interrupt for mxsdhc for everything else - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD canfd_0_interrupt0_IRQHandler ; Can #0, Consolidated interrupt #0 - DCD canfd_0_interrupts0_0_IRQHandler ; CAN #0, Interrupt #0, Channel #0 - DCD canfd_0_interrupts1_0_IRQHandler ; CAN #0, Interrupt #1, Channel #0 - DCD cpuss_interrupts_dw1_29_IRQHandler ; CPUSS DataWire #1, Channel #29 - DCD cpuss_interrupts_dw1_30_IRQHandler ; CPUSS DataWire #1, Channel #30 - DCD cpuss_interrupts_dw1_31_IRQHandler ; CPUSS DataWire #1, Channel #31 - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for OS-specific customization -;; - PUBWEAK cy_toolchain_init - SECTION .text:CODE:REORDER:NOROOT(2) -cy_toolchain_init - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; OS-specific low-level initialization - LDR R0, =cy_toolchain_init - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Wrapper - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Wrapper - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - B HardFault_Wrapper - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -MemManage_Handler - B HardFault_Wrapper - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -BusFault_Handler - B HardFault_Wrapper - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -UsageFault_Handler - B HardFault_Wrapper - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK ioss_interrupts_gpio_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_0_IRQHandler - B ioss_interrupts_gpio_0_IRQHandler - - PUBWEAK ioss_interrupts_gpio_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_2_IRQHandler - B ioss_interrupts_gpio_2_IRQHandler - - PUBWEAK ioss_interrupts_gpio_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_3_IRQHandler - B ioss_interrupts_gpio_3_IRQHandler - - PUBWEAK ioss_interrupts_gpio_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_5_IRQHandler - B ioss_interrupts_gpio_5_IRQHandler - - PUBWEAK ioss_interrupts_gpio_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_6_IRQHandler - B ioss_interrupts_gpio_6_IRQHandler - - PUBWEAK ioss_interrupts_gpio_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_7_IRQHandler - B ioss_interrupts_gpio_7_IRQHandler - - PUBWEAK ioss_interrupts_gpio_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_8_IRQHandler - B ioss_interrupts_gpio_8_IRQHandler - - PUBWEAK ioss_interrupts_gpio_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_9_IRQHandler - B ioss_interrupts_gpio_9_IRQHandler - - PUBWEAK ioss_interrupts_gpio_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_10_IRQHandler - B ioss_interrupts_gpio_10_IRQHandler - - PUBWEAK ioss_interrupts_gpio_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_11_IRQHandler - B ioss_interrupts_gpio_11_IRQHandler - - PUBWEAK ioss_interrupts_gpio_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_12_IRQHandler - B ioss_interrupts_gpio_12_IRQHandler - - PUBWEAK ioss_interrupts_gpio_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_14_IRQHandler - B ioss_interrupts_gpio_14_IRQHandler - - PUBWEAK ioss_interrupt_gpio_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_gpio_IRQHandler - B ioss_interrupt_gpio_IRQHandler - - PUBWEAK ioss_interrupt_vdd_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_vdd_IRQHandler - B ioss_interrupt_vdd_IRQHandler - - PUBWEAK lpcomp_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -lpcomp_interrupt_IRQHandler - B lpcomp_interrupt_IRQHandler - - PUBWEAK scb_6_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_6_interrupt_IRQHandler - B scb_6_interrupt_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_0_IRQHandler - B srss_interrupt_mcwdt_0_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_1_IRQHandler - B srss_interrupt_mcwdt_1_IRQHandler - - PUBWEAK srss_interrupt_backup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_backup_IRQHandler - B srss_interrupt_backup_IRQHandler - - PUBWEAK srss_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_IRQHandler - B srss_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_0_IRQHandler - B cpuss_interrupts_ipc_0_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_1_IRQHandler - B cpuss_interrupts_ipc_1_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_2_IRQHandler - B cpuss_interrupts_ipc_2_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_3_IRQHandler - B cpuss_interrupts_ipc_3_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_4_IRQHandler - B cpuss_interrupts_ipc_4_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_5_IRQHandler - B cpuss_interrupts_ipc_5_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_6_IRQHandler - B cpuss_interrupts_ipc_6_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_7_IRQHandler - B cpuss_interrupts_ipc_7_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_8_IRQHandler - B cpuss_interrupts_ipc_8_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_9_IRQHandler - B cpuss_interrupts_ipc_9_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_10_IRQHandler - B cpuss_interrupts_ipc_10_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_11_IRQHandler - B cpuss_interrupts_ipc_11_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_12_IRQHandler - B cpuss_interrupts_ipc_12_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_13_IRQHandler - B cpuss_interrupts_ipc_13_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_14_IRQHandler - B cpuss_interrupts_ipc_14_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_15_IRQHandler - B cpuss_interrupts_ipc_15_IRQHandler - - PUBWEAK scb_0_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_0_interrupt_IRQHandler - B scb_0_interrupt_IRQHandler - - PUBWEAK scb_1_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_1_interrupt_IRQHandler - B scb_1_interrupt_IRQHandler - - PUBWEAK scb_2_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_2_interrupt_IRQHandler - B scb_2_interrupt_IRQHandler - - PUBWEAK scb_3_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_3_interrupt_IRQHandler - B scb_3_interrupt_IRQHandler - - PUBWEAK scb_4_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_4_interrupt_IRQHandler - B scb_4_interrupt_IRQHandler - - PUBWEAK scb_5_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_5_interrupt_IRQHandler - B scb_5_interrupt_IRQHandler - - PUBWEAK csd_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -csd_interrupt_IRQHandler - B csd_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_0_IRQHandler - B cpuss_interrupts_dmac_0_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_1_IRQHandler - B cpuss_interrupts_dmac_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_0_IRQHandler - B cpuss_interrupts_dw0_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_1_IRQHandler - B cpuss_interrupts_dw0_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_2_IRQHandler - B cpuss_interrupts_dw0_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_3_IRQHandler - B cpuss_interrupts_dw0_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_4_IRQHandler - B cpuss_interrupts_dw0_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_5_IRQHandler - B cpuss_interrupts_dw0_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_6_IRQHandler - B cpuss_interrupts_dw0_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_7_IRQHandler - B cpuss_interrupts_dw0_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_8_IRQHandler - B cpuss_interrupts_dw0_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_9_IRQHandler - B cpuss_interrupts_dw0_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_10_IRQHandler - B cpuss_interrupts_dw0_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_11_IRQHandler - B cpuss_interrupts_dw0_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_12_IRQHandler - B cpuss_interrupts_dw0_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_13_IRQHandler - B cpuss_interrupts_dw0_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_14_IRQHandler - B cpuss_interrupts_dw0_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_15_IRQHandler - B cpuss_interrupts_dw0_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_16_IRQHandler - B cpuss_interrupts_dw0_16_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_17_IRQHandler - B cpuss_interrupts_dw0_17_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_18_IRQHandler - B cpuss_interrupts_dw0_18_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_19_IRQHandler - B cpuss_interrupts_dw0_19_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_20_IRQHandler - B cpuss_interrupts_dw0_20_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_21_IRQHandler - B cpuss_interrupts_dw0_21_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_22_IRQHandler - B cpuss_interrupts_dw0_22_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_23_IRQHandler - B cpuss_interrupts_dw0_23_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_24_IRQHandler - B cpuss_interrupts_dw0_24_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_25_IRQHandler - B cpuss_interrupts_dw0_25_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_26_IRQHandler - B cpuss_interrupts_dw0_26_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_27_IRQHandler - B cpuss_interrupts_dw0_27_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_28_IRQHandler - B cpuss_interrupts_dw0_28_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_0_IRQHandler - B cpuss_interrupts_dw1_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_1_IRQHandler - B cpuss_interrupts_dw1_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_2_IRQHandler - B cpuss_interrupts_dw1_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_3_IRQHandler - B cpuss_interrupts_dw1_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_4_IRQHandler - B cpuss_interrupts_dw1_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_5_IRQHandler - B cpuss_interrupts_dw1_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_6_IRQHandler - B cpuss_interrupts_dw1_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_7_IRQHandler - B cpuss_interrupts_dw1_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_8_IRQHandler - B cpuss_interrupts_dw1_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_9_IRQHandler - B cpuss_interrupts_dw1_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_10_IRQHandler - B cpuss_interrupts_dw1_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_11_IRQHandler - B cpuss_interrupts_dw1_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_12_IRQHandler - B cpuss_interrupts_dw1_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_13_IRQHandler - B cpuss_interrupts_dw1_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_14_IRQHandler - B cpuss_interrupts_dw1_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_15_IRQHandler - B cpuss_interrupts_dw1_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_16_IRQHandler - B cpuss_interrupts_dw1_16_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_17_IRQHandler - B cpuss_interrupts_dw1_17_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_18_IRQHandler - B cpuss_interrupts_dw1_18_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_19_IRQHandler - B cpuss_interrupts_dw1_19_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_20_IRQHandler - B cpuss_interrupts_dw1_20_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_21_IRQHandler - B cpuss_interrupts_dw1_21_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_22_IRQHandler - B cpuss_interrupts_dw1_22_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_23_IRQHandler - B cpuss_interrupts_dw1_23_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_24_IRQHandler - B cpuss_interrupts_dw1_24_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_25_IRQHandler - B cpuss_interrupts_dw1_25_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_26_IRQHandler - B cpuss_interrupts_dw1_26_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_27_IRQHandler - B cpuss_interrupts_dw1_27_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_28_IRQHandler - B cpuss_interrupts_dw1_28_IRQHandler - - PUBWEAK cpuss_interrupts_fault_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_0_IRQHandler - B cpuss_interrupts_fault_0_IRQHandler - - PUBWEAK cpuss_interrupts_fault_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_1_IRQHandler - B cpuss_interrupts_fault_1_IRQHandler - - PUBWEAK cpuss_interrupt_crypto_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_crypto_IRQHandler - B cpuss_interrupt_crypto_IRQHandler - - PUBWEAK cpuss_interrupt_fm_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_fm_IRQHandler - B cpuss_interrupt_fm_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_fp_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_fp_IRQHandler - B cpuss_interrupts_cm4_fp_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_0_IRQHandler - B cpuss_interrupts_cm0_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_1_IRQHandler - B cpuss_interrupts_cm0_cti_1_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_0_IRQHandler - B cpuss_interrupts_cm4_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_1_IRQHandler - B cpuss_interrupts_cm4_cti_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_0_IRQHandler - B tcpwm_0_interrupts_0_IRQHandler - - PUBWEAK tcpwm_0_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_1_IRQHandler - B tcpwm_0_interrupts_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_2_IRQHandler - B tcpwm_0_interrupts_2_IRQHandler - - PUBWEAK tcpwm_0_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_3_IRQHandler - B tcpwm_0_interrupts_3_IRQHandler - - PUBWEAK tcpwm_1_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_0_IRQHandler - B tcpwm_1_interrupts_0_IRQHandler - - PUBWEAK tcpwm_1_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_1_IRQHandler - B tcpwm_1_interrupts_1_IRQHandler - - PUBWEAK tcpwm_1_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_2_IRQHandler - B tcpwm_1_interrupts_2_IRQHandler - - PUBWEAK tcpwm_1_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_3_IRQHandler - B tcpwm_1_interrupts_3_IRQHandler - - PUBWEAK tcpwm_1_interrupts_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_4_IRQHandler - B tcpwm_1_interrupts_4_IRQHandler - - PUBWEAK tcpwm_1_interrupts_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_5_IRQHandler - B tcpwm_1_interrupts_5_IRQHandler - - PUBWEAK tcpwm_1_interrupts_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_6_IRQHandler - B tcpwm_1_interrupts_6_IRQHandler - - PUBWEAK tcpwm_1_interrupts_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_1_interrupts_7_IRQHandler - B tcpwm_1_interrupts_7_IRQHandler - - PUBWEAK pass_interrupt_sar_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_sar_IRQHandler - B pass_interrupt_sar_IRQHandler - - PUBWEAK smif_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -smif_interrupt_IRQHandler - B smif_interrupt_IRQHandler - - PUBWEAK usb_interrupt_hi_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_hi_IRQHandler - B usb_interrupt_hi_IRQHandler - - PUBWEAK usb_interrupt_med_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_med_IRQHandler - B usb_interrupt_med_IRQHandler - - PUBWEAK usb_interrupt_lo_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_lo_IRQHandler - B usb_interrupt_lo_IRQHandler - - PUBWEAK sdhc_0_interrupt_wakeup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -sdhc_0_interrupt_wakeup_IRQHandler - B sdhc_0_interrupt_wakeup_IRQHandler - - PUBWEAK sdhc_0_interrupt_general_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -sdhc_0_interrupt_general_IRQHandler - B sdhc_0_interrupt_general_IRQHandler - - PUBWEAK canfd_0_interrupt0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -canfd_0_interrupt0_IRQHandler - B canfd_0_interrupt0_IRQHandler - - PUBWEAK canfd_0_interrupts0_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -canfd_0_interrupts0_0_IRQHandler - B canfd_0_interrupts0_0_IRQHandler - - PUBWEAK canfd_0_interrupts1_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -canfd_0_interrupts1_0_IRQHandler - B canfd_0_interrupts1_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_29_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_29_IRQHandler - B cpuss_interrupts_dw1_29_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_30_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_30_IRQHandler - B cpuss_interrupts_dw1_30_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_31_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_31_IRQHandler - B cpuss_interrupts_dw1_31_IRQHandler - - - END - - -; [] END OF FILE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_04_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_04_cm4.s deleted file mode 100644 index 539a811e2e..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/mtb-pdl-cat1/devices/COMPONENT_CAT1A/templates/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_IAR/startup_psoc6_04_cm4.s +++ /dev/null @@ -1,1147 +0,0 @@ -;/**************************************************************************//** -; * @file startup_psoc6_04_cm4.s -; * @brief CMSIS Core Device Startup File for -; * ARMCM4 Device Series -; * @version V5.00 -; * @date 08. March 2016 -; ******************************************************************************/ -;/* -; * Copyright (c) 2009-2016 ARM Limited. All rights reserved. -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the License); you may -; * not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an AS IS BASIS, WITHOUT -; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ - -; -; The modules in this file are included in the libraries, and may be replaced -; by any user-defined modules that define the PUBLIC symbol _program_start or -; a user defined start symbol. -; To override the cstartup defined in the library, simply add your modified -; version to the workbench project. -; -; The vector table is normally located at address 0. -; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. -; The name "__vector_table" has special meaning for C-SPY: -; it is where the SP start value is found, and the NVIC vector -; table register (VTOR) is initialized to this address if != 0. -; -; Cortex-M version -; - - MODULE ?cstartup - - ;; Forward declaration of sections. - SECTION CSTACK:DATA:NOROOT(3) - SECTION .intvec_ram:DATA:NOROOT(2) - SECTION .intvec:CODE:NOROOT(2) - - EXTERN __iar_program_start - EXTERN SystemInit - EXTERN Cy_SystemInitFpuEnable - EXTERN __iar_data_init3 - EXTERN __iar_dynamic_initialization - PUBLIC __vector_table - PUBLIC __vector_table_0x1c - PUBLIC __Vectors - PUBLIC __Vectors_End - PUBLIC __Vectors_Size - PUBLIC __ramVectors - - DATA - -__vector_table - DCD sfe(CSTACK) - DCD Reset_Handler - - DCD 0x0000000D ; NMI_Handler is defined in ROM code - DCD HardFault_Handler - DCD MemManage_Handler - DCD BusFault_Handler - DCD UsageFault_Handler -__vector_table_0x1c - DCD 0 - DCD 0 - DCD 0 - DCD 0 - DCD SVC_Handler - DCD DebugMon_Handler - DCD 0 - DCD PendSV_Handler - DCD SysTick_Handler - - ; External interrupts Description - DCD ioss_interrupts_gpio_0_IRQHandler ; GPIO Port Interrupt #0 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_2_IRQHandler ; GPIO Port Interrupt #2 - DCD ioss_interrupts_gpio_3_IRQHandler ; GPIO Port Interrupt #3 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_5_IRQHandler ; GPIO Port Interrupt #5 - DCD ioss_interrupts_gpio_6_IRQHandler ; GPIO Port Interrupt #6 - DCD ioss_interrupts_gpio_7_IRQHandler ; GPIO Port Interrupt #7 - DCD ioss_interrupts_gpio_8_IRQHandler ; GPIO Port Interrupt #8 - DCD ioss_interrupts_gpio_9_IRQHandler ; GPIO Port Interrupt #9 - DCD ioss_interrupts_gpio_10_IRQHandler ; GPIO Port Interrupt #10 - DCD ioss_interrupts_gpio_11_IRQHandler ; GPIO Port Interrupt #11 - DCD ioss_interrupts_gpio_12_IRQHandler ; GPIO Port Interrupt #12 - DCD 0 ; Reserved - DCD ioss_interrupts_gpio_14_IRQHandler ; GPIO Port Interrupt #14 - DCD ioss_interrupt_gpio_IRQHandler ; GPIO All Ports - DCD ioss_interrupt_vdd_IRQHandler ; GPIO Supply Detect Interrupt - DCD lpcomp_interrupt_IRQHandler ; Low Power Comparator Interrupt - DCD scb_6_interrupt_IRQHandler ; Serial Communication Block #6 (DeepSleep capable) - DCD srss_interrupt_mcwdt_0_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_mcwdt_1_IRQHandler ; Multi Counter Watchdog Timer interrupt - DCD srss_interrupt_backup_IRQHandler ; Backup domain interrupt - DCD srss_interrupt_IRQHandler ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) - DCD cpuss_interrupts_ipc_0_IRQHandler ; CPUSS Inter Process Communication Interrupt #0 - DCD cpuss_interrupts_ipc_1_IRQHandler ; CPUSS Inter Process Communication Interrupt #1 - DCD cpuss_interrupts_ipc_2_IRQHandler ; CPUSS Inter Process Communication Interrupt #2 - DCD cpuss_interrupts_ipc_3_IRQHandler ; CPUSS Inter Process Communication Interrupt #3 - DCD cpuss_interrupts_ipc_4_IRQHandler ; CPUSS Inter Process Communication Interrupt #4 - DCD cpuss_interrupts_ipc_5_IRQHandler ; CPUSS Inter Process Communication Interrupt #5 - DCD cpuss_interrupts_ipc_6_IRQHandler ; CPUSS Inter Process Communication Interrupt #6 - DCD cpuss_interrupts_ipc_7_IRQHandler ; CPUSS Inter Process Communication Interrupt #7 - DCD cpuss_interrupts_ipc_8_IRQHandler ; CPUSS Inter Process Communication Interrupt #8 - DCD cpuss_interrupts_ipc_9_IRQHandler ; CPUSS Inter Process Communication Interrupt #9 - DCD cpuss_interrupts_ipc_10_IRQHandler ; CPUSS Inter Process Communication Interrupt #10 - DCD cpuss_interrupts_ipc_11_IRQHandler ; CPUSS Inter Process Communication Interrupt #11 - DCD cpuss_interrupts_ipc_12_IRQHandler ; CPUSS Inter Process Communication Interrupt #12 - DCD cpuss_interrupts_ipc_13_IRQHandler ; CPUSS Inter Process Communication Interrupt #13 - DCD cpuss_interrupts_ipc_14_IRQHandler ; CPUSS Inter Process Communication Interrupt #14 - DCD cpuss_interrupts_ipc_15_IRQHandler ; CPUSS Inter Process Communication Interrupt #15 - DCD pass_interrupt_sar_0_IRQHandler ; SAR ADC0 interrupt - DCD pass_interrupt_sar_1_IRQHandler ; SAR ADC1 interrupt - DCD pass_interrupt_ctbs_IRQHandler ; individual interrupt per CTB - DCD 0 ; Reserved - DCD pass_interrupt_fifo_0_IRQHandler ; PASS FIFO0 - DCD pass_interrupt_fifo_1_IRQHandler ; PASS FIFO1 - DCD scb_0_interrupt_IRQHandler ; Serial Communication Block #0 - DCD scb_1_interrupt_IRQHandler ; Serial Communication Block #1 - DCD scb_2_interrupt_IRQHandler ; Serial Communication Block #2 - DCD 0 ; Reserved - DCD scb_4_interrupt_IRQHandler ; Serial Communication Block #4 - DCD scb_5_interrupt_IRQHandler ; Serial Communication Block #5 - DCD csd_interrupt_IRQHandler ; CSD (Capsense) interrupt - DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0 - DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0 - DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1 - DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2 - DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3 - DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4 - DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5 - DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6 - DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7 - DCD cpuss_interrupts_dw0_8_IRQHandler ; CPUSS DataWire #0, Channel #8 - DCD cpuss_interrupts_dw0_9_IRQHandler ; CPUSS DataWire #0, Channel #9 - DCD cpuss_interrupts_dw0_10_IRQHandler ; CPUSS DataWire #0, Channel #10 - DCD cpuss_interrupts_dw0_11_IRQHandler ; CPUSS DataWire #0, Channel #11 - DCD cpuss_interrupts_dw0_12_IRQHandler ; CPUSS DataWire #0, Channel #12 - DCD cpuss_interrupts_dw0_13_IRQHandler ; CPUSS DataWire #0, Channel #13 - DCD cpuss_interrupts_dw0_14_IRQHandler ; CPUSS DataWire #0, Channel #14 - DCD cpuss_interrupts_dw0_15_IRQHandler ; CPUSS DataWire #0, Channel #15 - DCD cpuss_interrupts_dw0_16_IRQHandler ; CPUSS DataWire #0, Channel #16 - DCD cpuss_interrupts_dw0_17_IRQHandler ; CPUSS DataWire #0, Channel #17 - DCD cpuss_interrupts_dw0_18_IRQHandler ; CPUSS DataWire #0, Channel #18 - DCD cpuss_interrupts_dw0_19_IRQHandler ; CPUSS DataWire #0, Channel #19 - DCD cpuss_interrupts_dw0_20_IRQHandler ; CPUSS DataWire #0, Channel #20 - DCD cpuss_interrupts_dw0_21_IRQHandler ; CPUSS DataWire #0, Channel #21 - DCD cpuss_interrupts_dw0_22_IRQHandler ; CPUSS DataWire #0, Channel #22 - DCD cpuss_interrupts_dw0_23_IRQHandler ; CPUSS DataWire #0, Channel #23 - DCD cpuss_interrupts_dw0_24_IRQHandler ; CPUSS DataWire #0, Channel #24 - DCD cpuss_interrupts_dw0_25_IRQHandler ; CPUSS DataWire #0, Channel #25 - DCD cpuss_interrupts_dw0_26_IRQHandler ; CPUSS DataWire #0, Channel #26 - DCD cpuss_interrupts_dw0_27_IRQHandler ; CPUSS DataWire #0, Channel #27 - DCD cpuss_interrupts_dw0_28_IRQHandler ; CPUSS DataWire #0, Channel #28 - DCD cpuss_interrupts_dw1_0_IRQHandler ; CPUSS DataWire #1, Channel #0 - DCD cpuss_interrupts_dw1_1_IRQHandler ; CPUSS DataWire #1, Channel #1 - DCD cpuss_interrupts_dw1_2_IRQHandler ; CPUSS DataWire #1, Channel #2 - DCD cpuss_interrupts_dw1_3_IRQHandler ; CPUSS DataWire #1, Channel #3 - DCD cpuss_interrupts_dw1_4_IRQHandler ; CPUSS DataWire #1, Channel #4 - DCD cpuss_interrupts_dw1_5_IRQHandler ; CPUSS DataWire #1, Channel #5 - DCD cpuss_interrupts_dw1_6_IRQHandler ; CPUSS DataWire #1, Channel #6 - DCD cpuss_interrupts_dw1_7_IRQHandler ; CPUSS DataWire #1, Channel #7 - DCD cpuss_interrupts_dw1_8_IRQHandler ; CPUSS DataWire #1, Channel #8 - DCD cpuss_interrupts_dw1_9_IRQHandler ; CPUSS DataWire #1, Channel #9 - DCD cpuss_interrupts_dw1_10_IRQHandler ; CPUSS DataWire #1, Channel #10 - DCD cpuss_interrupts_dw1_11_IRQHandler ; CPUSS DataWire #1, Channel #11 - DCD cpuss_interrupts_dw1_12_IRQHandler ; CPUSS DataWire #1, Channel #12 - DCD cpuss_interrupts_dw1_13_IRQHandler ; CPUSS DataWire #1, Channel #13 - DCD cpuss_interrupts_dw1_14_IRQHandler ; CPUSS DataWire #1, Channel #14 - DCD cpuss_interrupts_dw1_15_IRQHandler ; CPUSS DataWire #1, Channel #15 - DCD cpuss_interrupts_dw1_16_IRQHandler ; CPUSS DataWire #1, Channel #16 - DCD cpuss_interrupts_dw1_17_IRQHandler ; CPUSS DataWire #1, Channel #17 - DCD cpuss_interrupts_dw1_18_IRQHandler ; CPUSS DataWire #1, Channel #18 - DCD cpuss_interrupts_dw1_19_IRQHandler ; CPUSS DataWire #1, Channel #19 - DCD cpuss_interrupts_dw1_20_IRQHandler ; CPUSS DataWire #1, Channel #20 - DCD cpuss_interrupts_dw1_21_IRQHandler ; CPUSS DataWire #1, Channel #21 - DCD cpuss_interrupts_dw1_22_IRQHandler ; CPUSS DataWire #1, Channel #22 - DCD cpuss_interrupts_dw1_23_IRQHandler ; CPUSS DataWire #1, Channel #23 - DCD cpuss_interrupts_dw1_24_IRQHandler ; CPUSS DataWire #1, Channel #24 - DCD cpuss_interrupts_dw1_25_IRQHandler ; CPUSS DataWire #1, Channel #25 - DCD cpuss_interrupts_dw1_26_IRQHandler ; CPUSS DataWire #1, Channel #26 - DCD cpuss_interrupts_dw1_27_IRQHandler ; CPUSS DataWire #1, Channel #27 - DCD cpuss_interrupts_dw1_28_IRQHandler ; CPUSS DataWire #1, Channel #28 - DCD cpuss_interrupts_fault_0_IRQHandler ; CPUSS Fault Structure Interrupt #0 - DCD cpuss_interrupts_fault_1_IRQHandler ; CPUSS Fault Structure Interrupt #1 - DCD cpuss_interrupt_crypto_IRQHandler ; CRYPTO Accelerator Interrupt - DCD cpuss_interrupt_fm_IRQHandler ; FLASH Macro Interrupt - DCD cpuss_interrupts_cm4_fp_IRQHandler ; Floating Point operation fault - DCD cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 - DCD cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 - DCD cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 - DCD cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 - DCD tcpwm_0_interrupts_0_IRQHandler ; TCPWM #0, Counter #0 - DCD tcpwm_0_interrupts_1_IRQHandler ; TCPWM #0, Counter #1 - DCD tcpwm_0_interrupts_2_IRQHandler ; TCPWM #0, Counter #2 - DCD tcpwm_0_interrupts_3_IRQHandler ; TCPWM #0, Counter #3 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD tcpwm_0_interrupts_256_IRQHandler ; TCPWM #0, Counter #256 - DCD tcpwm_0_interrupts_257_IRQHandler ; TCPWM #0, Counter #257 - DCD tcpwm_0_interrupts_258_IRQHandler ; TCPWM #0, Counter #258 - DCD tcpwm_0_interrupts_259_IRQHandler ; TCPWM #0, Counter #259 - DCD tcpwm_0_interrupts_260_IRQHandler ; TCPWM #0, Counter #260 - DCD tcpwm_0_interrupts_261_IRQHandler ; TCPWM #0, Counter #261 - DCD tcpwm_0_interrupts_262_IRQHandler ; TCPWM #0, Counter #262 - DCD tcpwm_0_interrupts_263_IRQHandler ; TCPWM #0, Counter #263 - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD pass_interrupt_dacs_IRQHandler ; Consolidated interrrupt for all DACs - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD smif_interrupt_IRQHandler ; Serial Memory Interface interrupt - DCD usb_interrupt_hi_IRQHandler ; USB Interrupt - DCD usb_interrupt_med_IRQHandler ; USB Interrupt - DCD usb_interrupt_lo_IRQHandler ; USB Interrupt - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD canfd_0_interrupt0_IRQHandler ; Can #0, Consolidated interrupt #0 - DCD canfd_0_interrupts0_0_IRQHandler ; CAN #0, Interrupt #0, Channel #0 - DCD canfd_0_interrupts1_0_IRQHandler ; CAN #0, Interrupt #1, Channel #0 - DCD cpuss_interrupts_dw1_29_IRQHandler ; CPUSS DataWire #1, Channel #29 - DCD cpuss_interrupts_dw1_30_IRQHandler ; CPUSS DataWire #1, Channel #30 - DCD cpuss_interrupts_dw1_31_IRQHandler ; CPUSS DataWire #1, Channel #31 - DCD cpuss_interrupts_dw0_29_IRQHandler ; CPUSS DataWire #0, Channel #29 - -__Vectors_End - -__Vectors EQU __vector_table -__Vectors_Size EQU __Vectors_End - __Vectors - - SECTION .intvec_ram:DATA:REORDER:NOROOT(2) -__ramVectors - DS32 __Vectors_Size - - - THUMB - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default handlers -;; - PUBWEAK Default_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Default_Handler - B Default_Handler - - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for startup customization -;; -;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) -;; because this function is executed as the first instruction in the ResetHandler. -;; The PDL is also not initialized to use the proper register offsets. -;; The user of this function is responsible for initializing the PDL and resources before using them. -;; - PUBWEAK Cy_OnResetUser - SECTION .text:CODE:REORDER:NOROOT(2) -Cy_OnResetUser - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Weak function for OS-specific customization -;; - PUBWEAK cy_toolchain_init - SECTION .text:CODE:REORDER:NOROOT(2) -cy_toolchain_init - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Define strong version to return zero for -;; __iar_program_start to skip data sections -;; initialization. -;; - PUBLIC __low_level_init - SECTION .text:CODE:REORDER:NOROOT(2) -__low_level_init - MOVS R0, #0 - BX LR - -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -;; -;; Default interrupt handlers. -;; - PUBWEAK Reset_Handler - SECTION .text:CODE:REORDER:NOROOT(2) -Reset_Handler - - ; Define strong function for startup customization - LDR R0, =Cy_OnResetUser - BLX R0 - - ; Disable global interrupts - CPSID I - - ; Copy vectors from ROM to RAM - LDR r1, =__vector_table - LDR r0, =__ramVectors - LDR r2, =__Vectors_Size -intvec_copy - LDR r3, [r1] - STR r3, [r0] - ADDS r0, r0, #4 - ADDS r1, r1, #4 - SUBS r2, r2, #1 - CMP r2, #0 - BNE intvec_copy - - ; Update Vector Table Offset Register - LDR r0, =__ramVectors - LDR r1, =0xE000ED08 - STR r0, [r1] - dsb - - ; Initialize data sections - LDR R0, =__iar_data_init3 - BLX R0 - - ; OS-specific low-level initialization - LDR R0, =cy_toolchain_init - BLX R0 - - ; --manual_dynamic_initialization - BL __iar_dynamic_initialization - - LDR R0, =SystemInit - BLX R0 - - LDR R0, =__iar_program_start - BLX R0 - -; Should never get here -Cy_Main_Exited - B Cy_Main_Exited - - - PUBWEAK NMI_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -NMI_Handler - B NMI_Handler - - - PUBWEAK Cy_SysLib_FaultHandler - SECTION .text:CODE:REORDER:NOROOT(1) -Cy_SysLib_FaultHandler - B Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Wrapper - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Wrapper - IMPORT Cy_SysLib_FaultHandler - movs r0, #4 - mov r1, LR - tst r0, r1 - beq L_MSP - mrs r0, PSP - b L_API_call -L_MSP - mrs r0, MSP -L_API_call - ; Storing LR content for Creator call stack trace - push {LR} - bl Cy_SysLib_FaultHandler - - PUBWEAK HardFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -HardFault_Handler - B HardFault_Wrapper - - PUBWEAK MemManage_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -MemManage_Handler - B HardFault_Wrapper - - PUBWEAK BusFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -BusFault_Handler - B HardFault_Wrapper - - PUBWEAK UsageFault_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -UsageFault_Handler - B HardFault_Wrapper - - PUBWEAK SVC_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SVC_Handler - B SVC_Handler - - PUBWEAK DebugMon_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -DebugMon_Handler - B DebugMon_Handler - - PUBWEAK PendSV_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -PendSV_Handler - B PendSV_Handler - - PUBWEAK SysTick_Handler - SECTION .text:CODE:REORDER:NOROOT(1) -SysTick_Handler - B SysTick_Handler - - - ; External interrupts - PUBWEAK ioss_interrupts_gpio_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_0_IRQHandler - B ioss_interrupts_gpio_0_IRQHandler - - PUBWEAK ioss_interrupts_gpio_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_2_IRQHandler - B ioss_interrupts_gpio_2_IRQHandler - - PUBWEAK ioss_interrupts_gpio_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_3_IRQHandler - B ioss_interrupts_gpio_3_IRQHandler - - PUBWEAK ioss_interrupts_gpio_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_5_IRQHandler - B ioss_interrupts_gpio_5_IRQHandler - - PUBWEAK ioss_interrupts_gpio_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_6_IRQHandler - B ioss_interrupts_gpio_6_IRQHandler - - PUBWEAK ioss_interrupts_gpio_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_7_IRQHandler - B ioss_interrupts_gpio_7_IRQHandler - - PUBWEAK ioss_interrupts_gpio_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_8_IRQHandler - B ioss_interrupts_gpio_8_IRQHandler - - PUBWEAK ioss_interrupts_gpio_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_9_IRQHandler - B ioss_interrupts_gpio_9_IRQHandler - - PUBWEAK ioss_interrupts_gpio_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_10_IRQHandler - B ioss_interrupts_gpio_10_IRQHandler - - PUBWEAK ioss_interrupts_gpio_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_11_IRQHandler - B ioss_interrupts_gpio_11_IRQHandler - - PUBWEAK ioss_interrupts_gpio_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_12_IRQHandler - B ioss_interrupts_gpio_12_IRQHandler - - PUBWEAK ioss_interrupts_gpio_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupts_gpio_14_IRQHandler - B ioss_interrupts_gpio_14_IRQHandler - - PUBWEAK ioss_interrupt_gpio_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_gpio_IRQHandler - B ioss_interrupt_gpio_IRQHandler - - PUBWEAK ioss_interrupt_vdd_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -ioss_interrupt_vdd_IRQHandler - B ioss_interrupt_vdd_IRQHandler - - PUBWEAK lpcomp_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -lpcomp_interrupt_IRQHandler - B lpcomp_interrupt_IRQHandler - - PUBWEAK scb_6_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_6_interrupt_IRQHandler - B scb_6_interrupt_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_0_IRQHandler - B srss_interrupt_mcwdt_0_IRQHandler - - PUBWEAK srss_interrupt_mcwdt_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_mcwdt_1_IRQHandler - B srss_interrupt_mcwdt_1_IRQHandler - - PUBWEAK srss_interrupt_backup_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_backup_IRQHandler - B srss_interrupt_backup_IRQHandler - - PUBWEAK srss_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -srss_interrupt_IRQHandler - B srss_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_0_IRQHandler - B cpuss_interrupts_ipc_0_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_1_IRQHandler - B cpuss_interrupts_ipc_1_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_2_IRQHandler - B cpuss_interrupts_ipc_2_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_3_IRQHandler - B cpuss_interrupts_ipc_3_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_4_IRQHandler - B cpuss_interrupts_ipc_4_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_5_IRQHandler - B cpuss_interrupts_ipc_5_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_6_IRQHandler - B cpuss_interrupts_ipc_6_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_7_IRQHandler - B cpuss_interrupts_ipc_7_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_8_IRQHandler - B cpuss_interrupts_ipc_8_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_9_IRQHandler - B cpuss_interrupts_ipc_9_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_10_IRQHandler - B cpuss_interrupts_ipc_10_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_11_IRQHandler - B cpuss_interrupts_ipc_11_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_12_IRQHandler - B cpuss_interrupts_ipc_12_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_13_IRQHandler - B cpuss_interrupts_ipc_13_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_14_IRQHandler - B cpuss_interrupts_ipc_14_IRQHandler - - PUBWEAK cpuss_interrupts_ipc_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_ipc_15_IRQHandler - B cpuss_interrupts_ipc_15_IRQHandler - - PUBWEAK pass_interrupt_sar_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_sar_0_IRQHandler - B pass_interrupt_sar_0_IRQHandler - - PUBWEAK pass_interrupt_sar_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_sar_1_IRQHandler - B pass_interrupt_sar_1_IRQHandler - - PUBWEAK pass_interrupt_ctbs_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_ctbs_IRQHandler - B pass_interrupt_ctbs_IRQHandler - - PUBWEAK pass_interrupt_fifo_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_fifo_0_IRQHandler - B pass_interrupt_fifo_0_IRQHandler - - PUBWEAK pass_interrupt_fifo_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_fifo_1_IRQHandler - B pass_interrupt_fifo_1_IRQHandler - - PUBWEAK scb_0_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_0_interrupt_IRQHandler - B scb_0_interrupt_IRQHandler - - PUBWEAK scb_1_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_1_interrupt_IRQHandler - B scb_1_interrupt_IRQHandler - - PUBWEAK scb_2_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_2_interrupt_IRQHandler - B scb_2_interrupt_IRQHandler - - PUBWEAK scb_4_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_4_interrupt_IRQHandler - B scb_4_interrupt_IRQHandler - - PUBWEAK scb_5_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -scb_5_interrupt_IRQHandler - B scb_5_interrupt_IRQHandler - - PUBWEAK csd_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -csd_interrupt_IRQHandler - B csd_interrupt_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_0_IRQHandler - B cpuss_interrupts_dmac_0_IRQHandler - - PUBWEAK cpuss_interrupts_dmac_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dmac_1_IRQHandler - B cpuss_interrupts_dmac_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_0_IRQHandler - B cpuss_interrupts_dw0_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_1_IRQHandler - B cpuss_interrupts_dw0_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_2_IRQHandler - B cpuss_interrupts_dw0_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_3_IRQHandler - B cpuss_interrupts_dw0_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_4_IRQHandler - B cpuss_interrupts_dw0_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_5_IRQHandler - B cpuss_interrupts_dw0_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_6_IRQHandler - B cpuss_interrupts_dw0_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_7_IRQHandler - B cpuss_interrupts_dw0_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_8_IRQHandler - B cpuss_interrupts_dw0_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_9_IRQHandler - B cpuss_interrupts_dw0_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_10_IRQHandler - B cpuss_interrupts_dw0_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_11_IRQHandler - B cpuss_interrupts_dw0_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_12_IRQHandler - B cpuss_interrupts_dw0_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_13_IRQHandler - B cpuss_interrupts_dw0_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_14_IRQHandler - B cpuss_interrupts_dw0_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_15_IRQHandler - B cpuss_interrupts_dw0_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_16_IRQHandler - B cpuss_interrupts_dw0_16_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_17_IRQHandler - B cpuss_interrupts_dw0_17_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_18_IRQHandler - B cpuss_interrupts_dw0_18_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_19_IRQHandler - B cpuss_interrupts_dw0_19_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_20_IRQHandler - B cpuss_interrupts_dw0_20_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_21_IRQHandler - B cpuss_interrupts_dw0_21_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_22_IRQHandler - B cpuss_interrupts_dw0_22_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_23_IRQHandler - B cpuss_interrupts_dw0_23_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_24_IRQHandler - B cpuss_interrupts_dw0_24_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_25_IRQHandler - B cpuss_interrupts_dw0_25_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_26_IRQHandler - B cpuss_interrupts_dw0_26_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_27_IRQHandler - B cpuss_interrupts_dw0_27_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_28_IRQHandler - B cpuss_interrupts_dw0_28_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_0_IRQHandler - B cpuss_interrupts_dw1_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_1_IRQHandler - B cpuss_interrupts_dw1_1_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_2_IRQHandler - B cpuss_interrupts_dw1_2_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_3_IRQHandler - B cpuss_interrupts_dw1_3_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_4_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_4_IRQHandler - B cpuss_interrupts_dw1_4_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_5_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_5_IRQHandler - B cpuss_interrupts_dw1_5_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_6_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_6_IRQHandler - B cpuss_interrupts_dw1_6_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_7_IRQHandler - B cpuss_interrupts_dw1_7_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_8_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_8_IRQHandler - B cpuss_interrupts_dw1_8_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_9_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_9_IRQHandler - B cpuss_interrupts_dw1_9_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_10_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_10_IRQHandler - B cpuss_interrupts_dw1_10_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_11_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_11_IRQHandler - B cpuss_interrupts_dw1_11_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_12_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_12_IRQHandler - B cpuss_interrupts_dw1_12_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_13_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_13_IRQHandler - B cpuss_interrupts_dw1_13_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_14_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_14_IRQHandler - B cpuss_interrupts_dw1_14_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_15_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_15_IRQHandler - B cpuss_interrupts_dw1_15_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_16_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_16_IRQHandler - B cpuss_interrupts_dw1_16_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_17_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_17_IRQHandler - B cpuss_interrupts_dw1_17_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_18_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_18_IRQHandler - B cpuss_interrupts_dw1_18_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_19_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_19_IRQHandler - B cpuss_interrupts_dw1_19_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_20_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_20_IRQHandler - B cpuss_interrupts_dw1_20_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_21_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_21_IRQHandler - B cpuss_interrupts_dw1_21_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_22_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_22_IRQHandler - B cpuss_interrupts_dw1_22_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_23_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_23_IRQHandler - B cpuss_interrupts_dw1_23_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_24_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_24_IRQHandler - B cpuss_interrupts_dw1_24_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_25_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_25_IRQHandler - B cpuss_interrupts_dw1_25_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_26_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_26_IRQHandler - B cpuss_interrupts_dw1_26_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_27_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_27_IRQHandler - B cpuss_interrupts_dw1_27_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_28_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_28_IRQHandler - B cpuss_interrupts_dw1_28_IRQHandler - - PUBWEAK cpuss_interrupts_fault_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_0_IRQHandler - B cpuss_interrupts_fault_0_IRQHandler - - PUBWEAK cpuss_interrupts_fault_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_fault_1_IRQHandler - B cpuss_interrupts_fault_1_IRQHandler - - PUBWEAK cpuss_interrupt_crypto_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_crypto_IRQHandler - B cpuss_interrupt_crypto_IRQHandler - - PUBWEAK cpuss_interrupt_fm_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupt_fm_IRQHandler - B cpuss_interrupt_fm_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_fp_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_fp_IRQHandler - B cpuss_interrupts_cm4_fp_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_0_IRQHandler - B cpuss_interrupts_cm0_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm0_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm0_cti_1_IRQHandler - B cpuss_interrupts_cm0_cti_1_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_0_IRQHandler - B cpuss_interrupts_cm4_cti_0_IRQHandler - - PUBWEAK cpuss_interrupts_cm4_cti_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_cm4_cti_1_IRQHandler - B cpuss_interrupts_cm4_cti_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_0_IRQHandler - B tcpwm_0_interrupts_0_IRQHandler - - PUBWEAK tcpwm_0_interrupts_1_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_1_IRQHandler - B tcpwm_0_interrupts_1_IRQHandler - - PUBWEAK tcpwm_0_interrupts_2_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_2_IRQHandler - B tcpwm_0_interrupts_2_IRQHandler - - PUBWEAK tcpwm_0_interrupts_3_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_3_IRQHandler - B tcpwm_0_interrupts_3_IRQHandler - - PUBWEAK tcpwm_0_interrupts_256_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_256_IRQHandler - B tcpwm_0_interrupts_256_IRQHandler - - PUBWEAK tcpwm_0_interrupts_257_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_257_IRQHandler - B tcpwm_0_interrupts_257_IRQHandler - - PUBWEAK tcpwm_0_interrupts_258_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_258_IRQHandler - B tcpwm_0_interrupts_258_IRQHandler - - PUBWEAK tcpwm_0_interrupts_259_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_259_IRQHandler - B tcpwm_0_interrupts_259_IRQHandler - - PUBWEAK tcpwm_0_interrupts_260_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_260_IRQHandler - B tcpwm_0_interrupts_260_IRQHandler - - PUBWEAK tcpwm_0_interrupts_261_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_261_IRQHandler - B tcpwm_0_interrupts_261_IRQHandler - - PUBWEAK tcpwm_0_interrupts_262_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_262_IRQHandler - B tcpwm_0_interrupts_262_IRQHandler - - PUBWEAK tcpwm_0_interrupts_263_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -tcpwm_0_interrupts_263_IRQHandler - B tcpwm_0_interrupts_263_IRQHandler - - PUBWEAK pass_interrupt_dacs_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -pass_interrupt_dacs_IRQHandler - B pass_interrupt_dacs_IRQHandler - - PUBWEAK smif_interrupt_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -smif_interrupt_IRQHandler - B smif_interrupt_IRQHandler - - PUBWEAK usb_interrupt_hi_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_hi_IRQHandler - B usb_interrupt_hi_IRQHandler - - PUBWEAK usb_interrupt_med_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_med_IRQHandler - B usb_interrupt_med_IRQHandler - - PUBWEAK usb_interrupt_lo_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -usb_interrupt_lo_IRQHandler - B usb_interrupt_lo_IRQHandler - - PUBWEAK canfd_0_interrupt0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -canfd_0_interrupt0_IRQHandler - B canfd_0_interrupt0_IRQHandler - - PUBWEAK canfd_0_interrupts0_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -canfd_0_interrupts0_0_IRQHandler - B canfd_0_interrupts0_0_IRQHandler - - PUBWEAK canfd_0_interrupts1_0_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -canfd_0_interrupts1_0_IRQHandler - B canfd_0_interrupts1_0_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_29_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_29_IRQHandler - B cpuss_interrupts_dw1_29_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_30_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_30_IRQHandler - B cpuss_interrupts_dw1_30_IRQHandler - - PUBWEAK cpuss_interrupts_dw1_31_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw1_31_IRQHandler - B cpuss_interrupts_dw1_31_IRQHandler - - PUBWEAK cpuss_interrupts_dw0_29_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) -cpuss_interrupts_dw0_29_IRQHandler - B cpuss_interrupts_dw0_29_IRQHandler - - - END - - -; [] END OF FILE