mirror of https://github.com/ARMmbed/mbed-os.git
Target_Freescale: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files, use linker scripts to add heap and stack - this is inconsistent with ARM std linker scriptspull/9766/head
parent
e731a1589f
commit
4b95b51e1b
|
@ -4,9 +4,49 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
|
||||||
; 0x1000 - 0xC0 = 0xF40
|
; 0x1000 - 0xC0 = 0xF40
|
||||||
RW_IRAM1 0x1FFFFCC0 0xF40 {
|
RW_IRAM1 0x1FFFFCC0 0xF40 {
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
#! armcc -E
|
||||||
|
|
||||||
|
#if !defined(MBED_APP_START)
|
||||||
|
#define MBED_APP_START 0x00000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_APP_SIZE)
|
||||||
|
#define MBED_APP_SIZE 0x8000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define MBED_RAM_START 0x1FFFF000
|
||||||
|
#define MBED_RAM_SIZE 0x1000
|
||||||
|
|
||||||
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||||
|
#define VECTOR_SIZE 0xC0
|
||||||
|
|
||||||
|
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||||
|
|
||||||
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||||
|
|
||||||
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
|
||||||
|
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -11,25 +11,9 @@
|
||||||
; *
|
; *
|
||||||
; *****************************************************************************/
|
; *****************************************************************************/
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
EXPORT __initial_sp
|
|
||||||
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp EQU 0x20000C00 ; Top of RAM
|
__initial_sp EQU 0x20000C00 ; Top of RAM
|
||||||
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000000
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
PRESERVE8
|
||||||
THUMB
|
THUMB
|
||||||
|
|
||||||
|
|
|
@ -1,14 +1,40 @@
|
||||||
|
#! armcc -E
|
||||||
|
|
||||||
LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
|
#if !defined(MBED_APP_START)
|
||||||
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
|
#define MBED_APP_START 0x00000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_APP_SIZE)
|
||||||
|
#define MBED_APP_SIZE 0x20000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define MBED_RAM_START 1FFFF000
|
||||||
|
#define MBED_RAM_SIZE 0x4000
|
||||||
|
|
||||||
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||||
|
#define VECTOR_SIZE 0xC0
|
||||||
|
|
||||||
|
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||||
|
|
||||||
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||||
|
|
||||||
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
|
||||||
; 0x4000 - 0xC0 = 0x3F40
|
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||||
RW_IRAM1 0x1FFFF0C0 0x3F40 {
|
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -12,29 +12,9 @@
|
||||||
; *****************************************************************************/
|
; *****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x00000400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
EXPORT __initial_sp
|
|
||||||
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||||
|
|
||||||
|
|
||||||
Heap_Size EQU 0x00000000
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
PRESERVE8
|
||||||
THUMB
|
THUMB
|
||||||
|
|
||||||
|
|
|
@ -1,14 +1,40 @@
|
||||||
|
#! armcc -E
|
||||||
|
|
||||||
LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
|
#if !defined(MBED_APP_START)
|
||||||
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
|
#define MBED_APP_START 0x00000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_APP_SIZE)
|
||||||
|
#define MBED_APP_SIZE 0x20000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define MBED_RAM_START 1FFFF000
|
||||||
|
#define MBED_RAM_SIZE 0x4000
|
||||||
|
|
||||||
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||||
|
#define VECTOR_SIZE 0xC0
|
||||||
|
|
||||||
|
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||||
|
|
||||||
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||||
|
|
||||||
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
|
||||||
; 0x4000 - 0xC0 = 0x3F40
|
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||||
RW_IRAM1 0x1FFFF0C0 0x3F40 {
|
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -35,11 +35,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
|
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
|
||||||
.ANY (IOHANDLER_RAM)
|
.ANY (AHBSRAM0)
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
||||||
.ANY (USBRAM)
|
.ANY (AHBSRAM1)
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
|
|
Loading…
Reference in New Issue