mirror of https://github.com/ARMmbed/mbed-os.git
Added linker and startup file
GustavWi
0xc0170
parent
00ca439e66
commit
4880f5375f
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x0000FFFF;
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define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x800;
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define symbol __ICFEDIT_size_heap__ = 0x800;
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/**** End of ICF editor section. ###ICF###*/
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define symbol __CRP_start__ = 0x000002FC;
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define symbol __CRP_end__ = 0x000002FF;
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define symbol __region_USB_PKG_RAM_start__ = 0x20004000;
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define symbol __region_USB_PKG_RAM_end__ = 0x200047FF;
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define symbol __RAM1_start__ = 0x20000000;
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define symbol __RAM1_end__ = 0x200007FF;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] - mem:[from __CRP_start__ to __CRP_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
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define region USB_PKG_RAM_region = mem:[from __region_USB_PKG_RAM_start__ to __region_USB_PKG_RAM_end__];
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define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK, block HEAP };
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place in CRP_region { section .crp };
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place in USB_PKG_RAM_region
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{ readwrite data section USB_PACKET_MEMORY };
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place in RAM1_region { section .sram };
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@ -0,0 +1,168 @@
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/**************************************************
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*
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* Part one of the system initialization code, contains low-level
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* initialization, plain thumb variant.
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*
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* Copyright 2012 IAR Systems. All rights reserved.
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*
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* $Revision: 1106 $
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*
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**************************************************/
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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PUBLIC __vector_table
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PUBLIC __vector_table_0x1c
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DATA
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__vector_table
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DCD sfe(CSTACK) ; Top of Stack
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DCD __iar_program_start ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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__vector_table_0x1c
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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DCD FLEX_INT0_IRQHandler ; GPIO pin interrupt 0
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DCD FLEX_INT1_IRQHandler ; GPIO pin interrupt 1
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DCD FLEX_INT2_IRQHandler ; GPIO pin interrupt 2
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DCD FLEX_INT3_IRQHandler ; GPIO pin interrupt 3
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DCD FLEX_INT4_IRQHandler ; GPIO pin interrupt 4
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DCD FLEX_INT5_IRQHandler ; GPIO pin interrupt 5
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DCD FLEX_INT6_IRQHandler ; GPIO pin interrupt 6
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DCD FLEX_INT7_IRQHandler ; GPIO pin interrupt 7
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DCD GINT0_IRQHandler ; GPIO GROUP0 interrupt
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DCD GINT1_IRQHandler ; GPIO GROUP1 interrupt
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SSP1_IRQHandler ; SSP1 interrupt
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DCD I2C_IRQHandler ; I2C interrupt
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DCD CT16B0_IRQHandler ; CT16B0 Match 0-3, Capture 0
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DCD CT16B1_IRQHandler ; CT16B1 Match 0-3, Capture 0
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DCD CT32B0_IRQHandler ; CT32B0 Match 0-3, Capture 0
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DCD CT32B1_IRQHandler ; CT32B1 Match 0-3, Capture 0
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DCD SSP0_IRQHandler ; SSP0 interrupt
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DCD USART_IRQHandler ; USART interrupt
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DCD USB_IRQHandler ; USB_IRQ interrupt
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DCD USB_FIQHandler ; USB_FIQ interrupt
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DCD ADC_IRQHandler ; ADC interrupt
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DCD WWDT_IRQHandler ; WWDT interrupt
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DCD BOD_IRQHandler ; BOD interrupt
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD USBWakeup_IRQHandler ; USB_WAKEUP interrupt
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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PUBWEAK NMI_Handler
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PUBWEAK HardFault_Handler
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PUBWEAK MemManage_Handler
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PUBWEAK BusFault_Handler
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PUBWEAK UsageFault_Handler
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PUBWEAK SVC_Handler
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PUBWEAK DebugMon_Handler
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PUBWEAK PendSV_Handler
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PUBWEAK SysTick_Handler
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PUBWEAK FLEX_INT0_IRQHandler
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PUBWEAK FLEX_INT1_IRQHandler
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PUBWEAK FLEX_INT2_IRQHandler
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PUBWEAK FLEX_INT3_IRQHandler
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PUBWEAK FLEX_INT4_IRQHandler
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PUBWEAK FLEX_INT5_IRQHandler
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PUBWEAK FLEX_INT6_IRQHandler
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PUBWEAK FLEX_INT7_IRQHandler
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PUBWEAK GINT0_IRQHandler
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PUBWEAK GINT1_IRQHandler
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PUBWEAK SSP1_IRQHandler
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PUBWEAK I2C_IRQHandler
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PUBWEAK CT16B0_IRQHandler
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PUBWEAK CT16B1_IRQHandler
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PUBWEAK CT32B0_IRQHandler
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PUBWEAK CT32B1_IRQHandler
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PUBWEAK SSP0_IRQHandler
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PUBWEAK USART_IRQHandler
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PUBWEAK USB_IRQHandler
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PUBWEAK USB_FIQHandler
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PUBWEAK ADC_IRQHandler
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PUBWEAK WWDT_IRQHandler
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PUBWEAK BOD_IRQHandler
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PUBWEAK USBWakeup_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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THUMB
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NMI_Handler
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HardFault_Handler
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MemManage_Handler
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BusFault_Handler
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UsageFault_Handler
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SVC_Handler
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DebugMon_Handler
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PendSV_Handler
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SysTick_Handler
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FLEX_INT0_IRQHandler
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FLEX_INT1_IRQHandler
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FLEX_INT2_IRQHandler
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FLEX_INT3_IRQHandler
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FLEX_INT4_IRQHandler
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FLEX_INT5_IRQHandler
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FLEX_INT6_IRQHandler
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FLEX_INT7_IRQHandler
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GINT0_IRQHandler
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GINT1_IRQHandler
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SSP1_IRQHandler
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I2C_IRQHandler
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CT16B0_IRQHandler
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CT16B1_IRQHandler
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CT32B0_IRQHandler
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CT32B1_IRQHandler
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SSP0_IRQHandler
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USART_IRQHandler
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USB_IRQHandler
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USB_FIQHandler
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ADC_IRQHandler
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WWDT_IRQHandler
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BOD_IRQHandler
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USBWakeup_IRQHandler
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Default_Handler
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B Default_Handler
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END
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