From 46fb822d0204e988ea23ff8192936b407925f5a8 Mon Sep 17 00:00:00 2001 From: Harrison Mutai Date: Wed, 3 Mar 2021 11:02:10 +0000 Subject: [PATCH] Remove uARM dependencies from Nuvoton targets --- .../device/TOOLCHAIN_ARM_MICRO/M487.sct | 63 ---------------- .../TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 72 ------------------- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 62 ---------------- 3 files changed, 197 deletions(-) delete mode 100644 targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct delete mode 100644 targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct delete mode 100644 targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct deleted file mode 100644 index f83d94d684..0000000000 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct +++ /dev/null @@ -1,63 +0,0 @@ -#! armcc -E - -/* - * Copyright (c) 2015-2016, Nuvoton Technology Corporation - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "../M480_mem.h" - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif -#endif - -#define VECTOR_SIZE (4*(16 + 96)) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address - *(RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { - } - - /* VTOR[TBLOFF] alignment requires: - * - * 1. Minumum 32-word - * 2. Rounding up to the next power of two of table size - */ - ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors - } - - RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage - } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned - .ANY (+RW +ZI) - } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { - } -} - -ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE)) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct deleted file mode 100644 index 611b0f426f..0000000000 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ /dev/null @@ -1,72 +0,0 @@ -#! armcc -E - -; 512 KB APROM -#if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00080000 -#endif - -; 64 KB SRAM (internal) -#if !defined(MBED_RAM_START) - #define MBED_RAM_START 0x20000000 -#endif - -#if !defined(MBED_RAM_SIZE) - #define MBED_RAM_SIZE 0x00010000 -#endif - - -; 1 MB SRAM (external) -#define MBED_RAM1_START 0x60000000 -#define MBED_RAM1_SIZE 0x00100000 - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif -#endif - -#define VECTOR_SIZE (4*(16 + 142)) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address - *(RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - ARM_LIB_STACK MBED_RAM_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { - } - - /* VTOR[TBLOFF] alignment requires: - * - * 1. Minumum 32-word - * 2. Rounding up to the next power of two of table size - */ - ER_IRAMVEC AlignExpr(+0, 1024) EMPTY VECTOR_SIZE { ; Reserve for vectors - } - - RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage - } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned - .ANY (+RW +ZI) - } - - ; Too large to place into internal SRAM. So place into external SRAM instead. - ER_XRAM1 MBED_RAM1_START { - *sal-stack-lwip* (+ZI) - } - - ; Extern SRAM for HEAP - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM1_START + MBED_RAM1_SIZE - AlignExpr(ImageLimit(ER_XRAM1), 16)) { - } -} -ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM -ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 64 KB SRAM (internal) -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM1_START + MBED_RAM1_SIZE)) ; 1 MB SRAM (external) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct deleted file mode 100644 index c94f18a48d..0000000000 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ /dev/null @@ -1,62 +0,0 @@ -#! armcc -E - -; 512 KB APROM -#if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00080000 -#endif - -; 64 KB SRAM (internal) -#if !defined(MBED_RAM_START) - #define MBED_RAM_START 0x20000000 -#endif - -#if !defined(MBED_RAM_SIZE) - #define MBED_RAM_SIZE 0x00010000 -#endif - - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif -#endif - -#define VECTOR_SIZE (4*(16 + 142)) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address - *(RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - ARM_LIB_STACK MBED_RAM_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { - } - - /* VTOR[TBLOFF] alignment requires: - * - * 1. Minumum 32-word - * 2. Rounding up to the next power of two of table size - */ - ER_IRAMVEC AlignExpr(+0, 1024) EMPTY VECTOR_SIZE { ; Reserve for vectors - } - - RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage - } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned - .ANY (+RW +ZI) - } - - ; Extern SRAM for HEAP - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { - } -} -ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM -ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 64 KB SRAM (internal)