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STM32H7: define RCC_LSE_BYPASS to allow using PC_15 as gpio

pull/13817/head
pennam 2020-10-12 14:14:30 +02:00 committed by Martino Facchin
parent 73b7e450e7
commit 45ac79aa3b
2 changed files with 8 additions and 0 deletions
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4
targets/TARGET_STM/lp_ticker.c
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@ -170,7 +170,11 @@ void lp_ticker_init(void)
/* Enable LSE clock */ /* Enable LSE clock */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
#if MBED_CONF_TARGET_LSE_BYPASS
RCC_OscInitStruct.LSEState = RCC_LSE_BYPASS;
#else
RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON;
#endif
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
/* Select the LSE clock as LPTIM peripheral clock */ /* Select the LSE clock as LPTIM peripheral clock */

4
targets/TARGET_STM/rtc_api.c
View File

@ -65,7 +65,11 @@ void rtc_init(void)
#if MBED_CONF_TARGET_LSE_AVAILABLE #if MBED_CONF_TARGET_LSE_AVAILABLE
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
#if MBED_CONF_TARGET_LSE_BYPASS
RCC_OscInitStruct.LSEState = RCC_LSE_BYPASS;
#else
RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON;
#endif
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
error("Cannot initialize RTC with LSE\n"); error("Cannot initialize RTC with LSE\n");