ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Replaced older version of assembly file with 2016-2017 version from RTX

pull/5140/head
Deepika 2017-09-14 23:15:12 -05:00 committed by adbridge
parent 76a0660ec6
commit 457f7c762c
1 changed files with 18 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
rtos/TARGET_CORTEX/rtx5/TARGET_M23/TOOLCHAIN_ARM/irq_armv8mbl.S
View File

@ -1,5 +1,5 @@
;/* ;/*
; * Copyright (c) 2016 ARM Limited. All rights reserved. ; * Copyright (c) 2016-2017 ARM Limited. All rights reserved.
; * ; *
; * SPDX-License-Identifier: Apache-2.0 ; * SPDX-License-Identifier: Apache-2.0
; * ; *
@ -27,7 +27,7 @@ I_T_RUN_OFS EQU 28 ; osInfo.thread.run offset
TCB_SM_OFS EQU 48 ; TCB.stack_mem offset TCB_SM_OFS EQU 48 ; TCB.stack_mem offset
TCB_SP_OFS EQU 56 ; TCB.SP offset TCB_SP_OFS EQU 56 ; TCB.SP offset
TCB_SF_OFS EQU 34 ; TCB.stack_frame offset TCB_SF_OFS EQU 34 ; TCB.stack_frame offset
TCB_TZM_OFS EQU 60 ; TCB.tz_memory offset TCB_TZM_OFS EQU 64 ; TCB.tz_memory offset
PRESERVE8 PRESERVE8
@ -35,8 +35,8 @@ TCB_TZM_OFS EQU 60 ; TCB.tz_memory offset
AREA |.constdata|, DATA, READONLY AREA |.constdata|, DATA, READONLY
EXPORT os_irq_cm EXPORT irqRtxLib
os_irq_cm DCB 0 ; Non weak library reference irqRtxLib DCB 0 ; Non weak library reference
AREA |.text|, CODE, READONLY AREA |.text|, CODE, READONLY
@ -44,8 +44,8 @@ os_irq_cm DCB 0 ; Non weak library reference
SVC_Handler PROC SVC_Handler PROC
EXPORT SVC_Handler EXPORT SVC_Handler
IMPORT os_UserSVC_Table IMPORT osRtxUserSVC
IMPORT os_Info IMPORT osRtxInfo
#ifdef __DOMAIN_NS #ifdef __DOMAIN_NS
IMPORT TZ_LoadContext_S IMPORT TZ_LoadContext_S
IMPORT TZ_StoreContext_S IMPORT TZ_StoreContext_S
@ -66,8 +66,8 @@ SVC_Handler PROC
MOV LR,R3 ; Set EXC_RETURN MOV LR,R3 ; Set EXC_RETURN
SVC_Context SVC_Context
LDR R3,=os_Info+I_T_RUN_OFS; Load address of os_Info.run LDR R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run
LDMIA R3!,{R1,R2} ; Load os_Info.thread.run: curr & next LDMIA R3!,{R1,R2} ; Load osRtxInfo.thread.run: curr & next
CMP R1,R2 ; Check if thread switch is required CMP R1,R2 ; Check if thread switch is required
BEQ SVC_Exit ; Branch when threads are the same BEQ SVC_Exit ; Branch when threads are the same
@ -102,7 +102,7 @@ SVC_ContextSave2
SVC_ContextSwitch SVC_ContextSwitch
SUBS R3,R3,#8 ; Adjust address SUBS R3,R3,#8 ; Adjust address
STR R2,[R3] ; os_Info.thread.run: curr = next STR R2,[R3] ; osRtxInfo.thread.run: curr = next
SVC_ContextRestore SVC_ContextRestore
#ifdef __DOMAIN_NS #ifdef __DOMAIN_NS
@ -150,7 +150,7 @@ SVC_Exit
SVC_User SVC_User
PUSH {R4,LR} ; Save registers PUSH {R4,LR} ; Save registers
LDR R2,=os_UserSVC_Table ; Load address of SVC table LDR R2,=osRtxUserSVC ; Load address of SVC table
LDR R3,[R2] ; Load SVC maximum number LDR R3,[R2] ; Load SVC maximum number
CMP R1,R3 ; Check SVC number range CMP R1,R3 ; Check SVC number range
BHI SVC_Done ; Branch if out of range BHI SVC_Done ; Branch if out of range
@ -172,10 +172,10 @@ SVC_Done
PendSV_Handler PROC PendSV_Handler PROC
EXPORT PendSV_Handler EXPORT PendSV_Handler
IMPORT os_PendSV_Handler IMPORT osRtxPendSV_Handler
PUSH {R0,LR} ; Save EXC_RETURN PUSH {R0,LR} ; Save EXC_RETURN
BL os_PendSV_Handler ; Call os_PendSV_Handler BL osRtxPendSV_Handler ; Call osRtxPendSV_Handler
POP {R0,R1} ; Restore EXC_RETURN POP {R0,R1} ; Restore EXC_RETURN
MOV LR,R1 ; Set EXC_RETURN MOV LR,R1 ; Set EXC_RETURN
B Sys_Context B Sys_Context
@ -186,10 +186,10 @@ PendSV_Handler PROC
SysTick_Handler PROC SysTick_Handler PROC
EXPORT SysTick_Handler EXPORT SysTick_Handler
IMPORT os_Tick_Handler IMPORT osRtxTick_Handler
PUSH {R0,LR} ; Save EXC_RETURN PUSH {R0,LR} ; Save EXC_RETURN
BL os_Tick_Handler ; Call os_Tick_Handler BL osRtxTick_Handler ; Call osRtxTick_Handler
POP {R0,R1} ; Restore EXC_RETURN POP {R0,R1} ; Restore EXC_RETURN
MOV LR,R1 ; Set EXC_RETURN MOV LR,R1 ; Set EXC_RETURN
B Sys_Context B Sys_Context
@ -200,14 +200,14 @@ SysTick_Handler PROC
Sys_Context PROC Sys_Context PROC
EXPORT Sys_Context EXPORT Sys_Context
IMPORT os_Info IMPORT osRtxInfo
#ifdef __DOMAIN_NS #ifdef __DOMAIN_NS
IMPORT TZ_LoadContext_S IMPORT TZ_LoadContext_S
IMPORT TZ_StoreContext_S IMPORT TZ_StoreContext_S
#endif #endif
LDR R3,=os_Info+I_T_RUN_OFS; Load address of os_Info.run LDR R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run
LDM R3!,{R1,R2} ; Load os_Info.thread.run: curr & next LDM R3!,{R1,R2} ; Load osRtxInfo.thread.run: curr & next
CMP R1,R2 ; Check if thread switch is required CMP R1,R2 ; Check if thread switch is required
BEQ Sys_ContextExit ; Branch when threads are the same BEQ Sys_ContextExit ; Branch when threads are the same
@ -245,7 +245,7 @@ Sys_ContextSave2
Sys_ContextSwitch Sys_ContextSwitch
SUBS R3,R3,#8 ; Adjust address SUBS R3,R3,#8 ; Adjust address
STR R2,[R3] ; os_Info.run: curr = next STR R2,[R3] ; osRtxInfo.run: curr = next
Sys_ContextRestore Sys_ContextRestore
#ifdef __DOMAIN_NS #ifdef __DOMAIN_NS