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Merge pull request #8686 from cmonr/rollup 

Rollup PR:
pull/8697/head
Cruz Monrreal 2018-11-09 09:14:49 -06:00 committed by GitHub
parent 662b744c89 b353136da1
commit 44ee9a7af7
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
17 changed files with 882 additions and 657 deletions
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9
features/cellular/easy_cellular/CellularConnectionFSM.cpp
View File

@ -84,6 +84,11 @@ void CellularConnectionFSM::stop()
_queue_thread = NULL;
}
if (_at_queue) {
_at_queue->chain(NULL);
_at_queue = NULL;
}
if (_power) {
_cellularDevice->close_power();
_power = NULL;
@ -131,6 +136,10 @@ nsapi_error_t CellularConnectionFSM::init()
}
_at_queue = _cellularDevice->get_queue();
if (!_at_queue) {
stop();
return NSAPI_ERROR_NO_MEMORY;
}
_at_queue->chain(&_queue);
_retry_count = 0;

24
features/frameworks/mbed-client-cli/mbed-client-cli/ns_cmdline.h
View File

@ -129,7 +129,7 @@ uint8_t cmd_history_size(uint8_t max);
* \param fmt console print function (like printf)
*/
#if defined(__GNUC__) || defined(__CC_ARM)
void cmd_printf(const char *fmt, ...) __attribute__ ((__format__(__printf__, 1, 2)));
void cmd_printf(const char *fmt, ...) __attribute__((__format__(__printf__, 1, 2)));
#else
void cmd_printf(const char *fmt, ...);
#endif
@ -139,7 +139,7 @@ void cmd_printf(const char *fmt, ...);
* \param ap list of parameters needed by format string. This must correspond properly with the conversion specifier.
*/
#if defined(__GNUC__) || defined(__CC_ARM)
void cmd_vprintf(const char *fmt, va_list ap) __attribute__ ((__format__(__printf__, 1, 0)));
void cmd_vprintf(const char *fmt, va_list ap) __attribute__((__format__(__printf__, 1, 0)));
#else
void cmd_vprintf(const char *fmt, va_list ap);
#endif
@ -273,6 +273,26 @@ void cmd_alias_add(const char *alias, const char *value);
* \param value Value for variable. Values can contains white spaces and '"' or '"' characters.
*/
void cmd_variable_add(char *variable, char *value);
/**
* Add integer variable to interpreter.
* Variables are replaced with values before executing a command.
* \code
cmd_variable_add_int("world", 2);
cmd_exe("echo $world"); // this is now same as 'echo 2' .
* \endcode
* \param variable Variable name, which will be replaced in interpreter.
* \param value Value for variable
*/
void cmd_variable_add_int(char *variable, int value);
/**
* Request screen size from host
* Response are stored to variables:
* COLUMNS and LINES - as integer values.
* Note: Require terminal that handle request codes, like screen.
*/
void cmd_request_screen_size(void);
/** find command parameter index by key.
* e.g.

689
features/frameworks/mbed-client-cli/source/ns_cmdline.c
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File diff suppressed because it is too large Load Diff

1
features/netsocket/InternetSocket.cpp
View File

@ -62,6 +62,7 @@ nsapi_error_t InternetSocket::close()
nsapi_error_t ret = NSAPI_ERROR_OK;
if (!_socket) {
_lock.unlock();
return NSAPI_ERROR_NO_SOCKET;
}

178
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/startup_MPS2.S
View File

@ -46,63 +46,38 @@ __isr_vector:
.long SysTick_Handler /* SysTick Handler */
/* External Interrupts */
.long UART0_IRQHandler /* 0: UART 0 RX and TX Combined Interrupt */
.long Spare_IRQHandler /* 1: Undefined */
.long UART1_IRQHandler /* 2: UART 1 RX and TX Combined Interrupt */
.long APB_Slave0_IRQHandler /* 3: Reserved for APB Slave */
.long APB_Slave1_IRQHandler /* 4: Reserved for APB Slave */
.long RTC_IRQHandler /* 5: RTC Interrupt */
.long PORT0_IRQHandler /* 6: GPIO Port 0 combined Interrupt */
.long PORT1_ALL_IRQHandler /* 7: GPIO Port 1 combined Interrupt */
.long TIMER0_IRQHandler /* 8: TIMER 0 Interrupt */
.long TIMER1_IRQHandler /* 9: TIMER 1 Interrupt */
.long DUALTIMER_IRQHandler /* 10: Dual Timer Interrupt */
.long APB_Slave2_IRQHandler /* 11: Reserved for APB Slave */
.long UARTOVF_IRQHandler /* 12: UART 0,1,2 Overflow Interrupt */
.long APB_Slave3_IRQHandler /* 13: Reserved for APB Slave */
.long RESERVED0_IRQHandler /* 14: Reserved */
.long TSC_IRQHandler /* 15: Touch Screen Interrupt */
.long PORT0_0_IRQHandler /* 16: GPIO Port 0 pin 0 Handler */
.long PORT0_1_IRQHandler /* 17: GPIO Port 0 pin 1 Handler */
.long PORT0_2_IRQHandler /* 18: GPIO Port 0 pin 2 Handler */
.long PORT0_3_IRQHandler /* 19: GPIO Port 0 pin 3 Handler */
.long PORT0_4_IRQHandler /* 20: GPIO Port 0 pin 4 Handler */
.long PORT0_5_IRQHandler /* 21: GPIO Port 0 pin 5 Handler */
.long PORT0_6_IRQHandler /* 22: GPIO Port 0 pin 6 Handler */
.long PORT0_7_IRQHandler /* 23: GPIO Port 0 pin 7 Handler */
.long PORT0_8_IRQHandler /* 24: GPIO Port 0 pin 8 Handler */
.long PORT0_9_IRQHandler /* 25: GPIO Port 0 pin 9 Handler */
.long PORT0_10_IRQHandler /* 26: GPIO Port 0 pin 10 Handler */
.long PORT0_11_IRQHandler /* 27: GPIO Port 0 pin 11 Handler */
.long PORT0_12_IRQHandler /* 28: GPIO Port 0 pin 12 Handler */
.long PORT0_13_IRQHandler /* 29: GPIO Port 0 pin 13 Handler */
.long PORT0_14_IRQHandler /* 30: GPIO Port 0 pin 14 Handler */
.long PORT0_15_IRQHandler /* 31: GPIO Port 0 pin 15 Handler */
.long FLASH0_IRQHandler /* 32: Reserved for Flash */
.long FLASH1_IRQHandler /* 33: Reserved for Flash */
.long RESERVED1_IRQHandler /* 34: Reserved */
.long RESERVED2_IRQHandler /* 35: Reserved */
.long RESERVED3_IRQHandler /* 36: Reserved */
.long RESERVED4_IRQHandler /* 37: Reserved */
.long RESERVED5_IRQHandler /* 38: Reserved */
.long RESERVED6_IRQHandler /* 39: Reserved */
.long RESERVED7_IRQHandler /* 40: Reserved */
.long RESERVED8_IRQHandler /* 41: Reserved */
.long PORT2_ALL_IRQHandler /* 42: GPIO Port 2 combined Interrupt */
.long PORT3_ALL_IRQHandler /* 43: GPIO Port 3 combined Interrupt */
.long TRNG_IRQHandler /* 44: Random number generator Interrupt */
.long UART2_IRQHandler /* 45: UART 2 RX and TX Combined Interrupt */
.long UART3_IRQHandler /* 46: UART 3 RX and TX Combined Interrupt */
.long ETHERNET_IRQHandler /* 47: Ethernet interrupt t.b.a. */
.long I2S_IRQHandler /* 48: I2S Interrupt */
.long MPS2_SPI0_IRQHandler /* 49: SPI Interrupt (spi header) */
.long MPS2_SPI1_IRQHandler /* 50: SPI Interrupt (clcd) */
.long MPS2_SPI2_IRQHandler /* 51: SPI Interrupt (spi 1 ADC replacement) */
.long MPS2_SPI3_IRQHandler /* 52: SPI Interrupt (spi 0 shield 0 replacement) */
.long MPS2_SPI4_IRQHandler /* 53: SPI Interrupt (shield 1) */
.long PORT4_ALL_IRQHandler /* 54: GPIO Port 4 combined Interrupt */
.long PORT5_ALL_IRQHandler /* 55: GPIO Port 5 combined Interrupt */
.long UART4_IRQHandler /* 56: UART 4 RX and TX Combined Interrupt */
.long UARTRX0_Handler /* UART 0 RX Handler */
.long UARTTX0_Handler /* UART 0 TX Handler */
.long UARTRX1_Handler /* UART 1 RX Handler */
.long UARTTX1_Handler /* UART 1 TX Handler */
.long UARTRX2_Handler /* UART 2 RX Handler */
.long UARTTX2_Handler /* UART 2 TX Handler */
.long PORT0_COMB_Handler /* GPIO Port 0 Combined Handler */
.long PORT1_COMB_Handler /* GPIO Port 1 Combined Handler */
.long TIMER0_Handler /* TIMER 0 handler */
.long TIMER1_Handler /* TIMER 1 handler */
.long DUALTIMER_HANDLER /* Dual timer handler */
.long SPI_Handler /* SPI exceptions Handler */
.long UARTOVF_Handler /* UART 0,1,2 Overflow Handler */
.long ETHERNET_Handler /* Ethernet Overflow Handler */
.long I2S_Handler /* I2S Handler */
.long TSC_Handler /* Touch Screen handler */
.long PORT2_COMB_Handler /* GPIO Port 2 Combined Handler */
.long PORT3_COMB_Handler /* GPIO Port 3 Combined Handler */
.long UARTRX3_Handler /* UART 3 RX Handler */
.long UARTTX3_Handler /* UART 3 TX Handler */
.long UARTRX4_Handler /* UART 4 RX Handler */
.long UARTTX4_Handler /* UART 4 TX Handler */
.long ADCSPI_Handler /* SHIELD ADC SPI exceptions Handler */
.long SHIELDSPI_Handler /* SHIELD SPI exceptions Handler */
.long PORT0_0_Handler /* GPIO Port 0 pin 0 Handler */
.long PORT0_1_Handler /* GPIO Port 0 pin 1 Handler */
.long PORT0_2_Handler /* GPIO Port 0 pin 2 Handler */
.long PORT0_3_Handler /* GPIO Port 0 pin 3 Handler */
.long PORT0_4_Handler /* GPIO Port 0 pin 4 Handler */
.long PORT0_5_Handler /* GPIO Port 0 pin 5 Handler */
.long PORT0_6_Handler /* GPIO Port 0 pin 6 Handler */
.long PORT0_7_Handler /* GPIO Port 0 pin 7 Handler */
.size __isr_vector, . - __isr_vector
@ -196,62 +171,37 @@ system_startup:
.endm
/* External interrupts */
def_irq_default_handler UART0_IRQHandler /* 0: UART 0 RX and TX Combined Interrupt */
def_irq_default_handler Spare_IRQHandler /* 1: Undefined */
def_irq_default_handler UART1_IRQHandler /* 2: UART 1 RX and TX Combined Interrupt */
def_irq_default_handler APB_Slave0_IRQHandler /* 3: Reserved for APB Slave */
def_irq_default_handler APB_Slave1_IRQHandler /* 4: Reserved for APB Slave */
def_irq_default_handler RTC_IRQHandler /* 5: RTC Interrupt */
def_irq_default_handler PORT0_IRQHandler /* 6: GPIO Port 0 combined Interrupt */
def_irq_default_handler PORT1_ALL_IRQHandler /* 7: GPIO Port 1 combined Interrupt */
def_irq_default_handler TIMER0_IRQHandler /* 8: TIMER 0 Interrupt */
def_irq_default_handler TIMER1_IRQHandler /* 9: TIMER 1 Interrupt */
def_irq_default_handler DUALTIMER_IRQHandler /* 10: Dual Timer Interrupt */
def_irq_default_handler APB_Slave2_IRQHandler /* 11: Reserved for APB Slave */
def_irq_default_handler UARTOVF_IRQHandler /* 12: UART 0,1,2 Overflow Interrupt */
def_irq_default_handler APB_Slave3_IRQHandler /* 13: Reserved for APB Slave */
def_irq_default_handler RESERVED0_IRQHandler /* 14: Reserved */
def_irq_default_handler TSC_IRQHandler /* 15: Touch Screen Interrupt */
def_irq_default_handler PORT0_0_IRQHandler /* 16: GPIO Port 0 pin 0 Handler */
def_irq_default_handler PORT0_1_IRQHandler /* 17: GPIO Port 0 pin 1 Handler */
def_irq_default_handler PORT0_2_IRQHandler /* 18: GPIO Port 0 pin 2 Handler */
def_irq_default_handler PORT0_3_IRQHandler /* 19: GPIO Port 0 pin 3 Handler */
def_irq_default_handler PORT0_4_IRQHandler /* 20: GPIO Port 0 pin 4 Handler */
def_irq_default_handler PORT0_5_IRQHandler /* 21: GPIO Port 0 pin 5 Handler */
def_irq_default_handler PORT0_6_IRQHandler /* 22: GPIO Port 0 pin 6 Handler */
def_irq_default_handler PORT0_7_IRQHandler /* 23: GPIO Port 0 pin 7 Handler */
def_irq_default_handler PORT0_8_IRQHandler /* 24: GPIO Port 0 pin 8 Handler */
def_irq_default_handler PORT0_9_IRQHandler /* 25: GPIO Port 0 pin 9 Handler */
def_irq_default_handler PORT0_10_IRQHandler /* 26: GPIO Port 0 pin 10 Handler */
def_irq_default_handler PORT0_11_IRQHandler /* 27: GPIO Port 0 pin 11 Handler */
def_irq_default_handler PORT0_12_IRQHandler /* 28: GPIO Port 0 pin 12 Handler */
def_irq_default_handler PORT0_13_IRQHandler /* 29: GPIO Port 0 pin 13 Handler */
def_irq_default_handler PORT0_14_IRQHandler /* 30: GPIO Port 0 pin 14 Handler */
def_irq_default_handler PORT0_15_IRQHandler /* 31: GPIO Port 0 pin 15 Handler */
def_irq_default_handler FLASH0_IRQHandler /* 32: Reserved for Flash */
def_irq_default_handler FLASH1_IRQHandler /* 33: Reserved for Flash */
def_irq_default_handler RESERVED1_IRQHandler /* 34: Reserved */
def_irq_default_handler RESERVED2_IRQHandler /* 35: Reserved */
def_irq_default_handler RESERVED3_IRQHandler /* 36: Reserved */
def_irq_default_handler RESERVED4_IRQHandler /* 37: Reserved */
def_irq_default_handler RESERVED5_IRQHandler /* 38: Reserved */
def_irq_default_handler RESERVED6_IRQHandler /* 39: Reserved */
def_irq_default_handler RESERVED7_IRQHandler /* 40: Reserved */
def_irq_default_handler RESERVED8_IRQHandler /* 41: Reserved */
def_irq_default_handler PORT2_ALL_IRQHandler /* 42: GPIO Port 2 combined Interrupt */
def_irq_default_handler PORT3_ALL_IRQHandler /* 43: GPIO Port 3 combined Interrupt */
def_irq_default_handler TRNG_IRQHandler /* 44: Random number generator Interrupt */
def_irq_default_handler UART2_IRQHandler /* 45: UART 2 RX and TX Combined Interrupt */
def_irq_default_handler UART3_IRQHandler /* 46: UART 3 RX and TX Combined Interrupt */
def_irq_default_handler ETHERNET_IRQHandler /* 47: Ethernet interrupt t.b.a. */
def_irq_default_handler I2S_IRQHandler /* 48: I2S Interrupt */
def_irq_default_handler MPS2_SPI0_IRQHandler /* 49: SPI Interrupt (spi header) */
def_irq_default_handler MPS2_SPI1_IRQHandler /* 50: SPI Interrupt (clcd) */
def_irq_default_handler MPS2_SPI2_IRQHandler /* 51: SPI Interrupt (spi 1 ADC replacement) */
def_irq_default_handler MPS2_SPI3_IRQHandler /* 52: SPI Interrupt (spi 0 shield 0 replacement) */
def_irq_default_handler MPS2_SPI4_IRQHandler /* 53: SPI Interrupt (shield 1) */
def_irq_default_handler PORT4_ALL_IRQHandler /* 54: GPIO Port 4 combined Interrupt */
def_irq_default_handler PORT5_ALL_IRQHandler /* 55: GPIO Port 5 combined Interrupt */
def_irq_default_handler UART4_IRQHandler /* 56: UART 4 RX and TX Combined Interrupt */
def_irq_default_handler UARTRX0_Handler /* 0: UART 0 RX Handler */
def_irq_default_handler UARTTX0_Handler /* 1: UART 0 TX Handler */
def_irq_default_handler UARTRX1_Handler /* 2: UART 1 RX Handler */
def_irq_default_handler UARTTX1_Handler /* 3: UART 1 TX Handler */
def_irq_default_handler UARTRX2_Handler /* 4: UART 2 RX Handler */
def_irq_default_handler UARTTX2_Handler /* 5: UART 2 TX Handler */
def_irq_default_handler PORT0_COMB_Handler /* 6: GPIO Port 0 Combined Handler */
def_irq_default_handler PORT1_COMB_Handler /* 7: GPIO Port 1 Combined Handler */
def_irq_default_handler TIMER0_Handler /* 8: TIMER 0 handler */
def_irq_default_handler TIMER1_Handler /* 9: TIMER 1 handler */
def_irq_default_handler DUALTIMER_HANDLER /* 10: Dual timer handler */
def_irq_default_handler SPI_Handler /* 11: SPI exceptions Handler */
def_irq_default_handler UARTOVF_Handler /* 12: UART 0,1,2 Overflow Handler */
def_irq_default_handler ETHERNET_Handler /* 13: Ethernet Overflow Handler */
def_irq_default_handler I2S_Handler /* 14: I2S Handler */
def_irq_default_handler TSC_Handler /* 15: Touch Screen handler */
def_irq_default_handler PORT2_COMB_Handler /* 16: GPIO Port 2 Combined Handler */
def_irq_default_handler PORT3_COMB_Handler /* 17: GPIO Port 3 Combined Handler */
def_irq_default_handler UARTRX3_Handler /* 18: UART 3 RX Handler */
def_irq_default_handler UARTTX3_Handler /* 19: UART 3 TX Handler */
def_irq_default_handler UARTRX4_Handler /* 20: UART 4 RX Handler */
def_irq_default_handler UARTTX4_Handler /* 21: UART 4 TX Handler */
def_irq_default_handler ADCSPI_Handler /* 22: SHIELD ADC SPI exceptions Handler */
def_irq_default_handler SHIELDSPI_Handler /* 23: SHIELD SPI exceptions Handler */
def_irq_default_handler PORT0_0_Handler /* 24: GPIO Port 0 pin 0 Handler */
def_irq_default_handler PORT0_1_Handler /* 25: GPIO Port 0 pin 1 Handler */
def_irq_default_handler PORT0_2_Handler /* 26: GPIO Port 0 pin 2 Handler */
def_irq_default_handler PORT0_3_Handler /* 27: GPIO Port 0 pin 3 Handler */
def_irq_default_handler PORT0_4_Handler /* 28: GPIO Port 0 pin 4 Handler */
def_irq_default_handler PORT0_5_Handler /* 29: GPIO Port 0 pin 5 Handler */
def_irq_default_handler PORT0_6_Handler /* 30: GPIO Port 0 pin 6 Handler */
def_irq_default_handler PORT0_7_Handler /* 31: GPIO Port 0 pin 7 Handler */
.end

178
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/startup_MPS2.S
View File

@ -46,63 +46,38 @@ __isr_vector:
.long SysTick_Handler /* SysTick Handler */
/* External Interrupts */
.long UART0_IRQHandler /* 0: UART 0 RX and TX Combined Interrupt */
.long Spare_IRQHandler /* 1: Undefined */
.long UART1_IRQHandler /* 2: UART 1 RX and TX Combined Interrupt */
.long APB_Slave0_IRQHandler /* 3: Reserved for APB Slave */
.long APB_Slave1_IRQHandler /* 4: Reserved for APB Slave */
.long RTC_IRQHandler /* 5: RTC Interrupt */
.long PORT0_IRQHandler /* 6: GPIO Port 0 combined Interrupt */
.long PORT1_ALL_IRQHandler /* 7: GPIO Port 1 combined Interrupt */
.long TIMER0_IRQHandler /* 8: TIMER 0 Interrupt */
.long TIMER1_IRQHandler /* 9: TIMER 1 Interrupt */
.long DUALTIMER_IRQHandler /* 10: Dual Timer Interrupt */
.long APB_Slave2_IRQHandler /* 11: Reserved for APB Slave */
.long UARTOVF_IRQHandler /* 12: UART 0,1,2 Overflow Interrupt */
.long APB_Slave3_IRQHandler /* 13: Reserved for APB Slave */
.long RESERVED0_IRQHandler /* 14: Reserved */
.long TSC_IRQHandler /* 15: Touch Screen Interrupt */
.long PORT0_0_IRQHandler /* 16: GPIO Port 0 pin 0 Handler */
.long PORT0_1_IRQHandler /* 17: GPIO Port 0 pin 1 Handler */
.long PORT0_2_IRQHandler /* 18: GPIO Port 0 pin 2 Handler */
.long PORT0_3_IRQHandler /* 19: GPIO Port 0 pin 3 Handler */
.long PORT0_4_IRQHandler /* 20: GPIO Port 0 pin 4 Handler */
.long PORT0_5_IRQHandler /* 21: GPIO Port 0 pin 5 Handler */
.long PORT0_6_IRQHandler /* 22: GPIO Port 0 pin 6 Handler */
.long PORT0_7_IRQHandler /* 23: GPIO Port 0 pin 7 Handler */
.long PORT0_8_IRQHandler /* 24: GPIO Port 0 pin 8 Handler */
.long PORT0_9_IRQHandler /* 25: GPIO Port 0 pin 9 Handler */
.long PORT0_10_IRQHandler /* 26: GPIO Port 0 pin 10 Handler */
.long PORT0_11_IRQHandler /* 27: GPIO Port 0 pin 11 Handler */
.long PORT0_12_IRQHandler /* 28: GPIO Port 0 pin 12 Handler */
.long PORT0_13_IRQHandler /* 29: GPIO Port 0 pin 13 Handler */
.long PORT0_14_IRQHandler /* 30: GPIO Port 0 pin 14 Handler */
.long PORT0_15_IRQHandler /* 31: GPIO Port 0 pin 15 Handler */
.long FLASH0_IRQHandler /* 32: Reserved for Flash */
.long FLASH1_IRQHandler /* 33: Reserved for Flash */
.long RESERVED1_IRQHandler /* 34: Reserved */
.long RESERVED2_IRQHandler /* 35: Reserved */
.long RESERVED3_IRQHandler /* 36: Reserved */
.long RESERVED4_IRQHandler /* 37: Reserved */
.long RESERVED5_IRQHandler /* 38: Reserved */
.long RESERVED6_IRQHandler /* 39: Reserved */
.long RESERVED7_IRQHandler /* 40: Reserved */
.long RESERVED8_IRQHandler /* 41: Reserved */
.long PORT2_ALL_IRQHandler /* 42: GPIO Port 2 combined Interrupt */
.long PORT3_ALL_IRQHandler /* 43: GPIO Port 3 combined Interrupt */
.long TRNG_IRQHandler /* 44: Random number generator Interrupt */
.long UART2_IRQHandler /* 45: UART 2 RX and TX Combined Interrupt */
.long UART3_IRQHandler /* 46: UART 3 RX and TX Combined Interrupt */
.long ETHERNET_IRQHandler /* 47: Ethernet interrupt t.b.a. */
.long I2S_IRQHandler /* 48: I2S Interrupt */
.long MPS2_SPI0_IRQHandler /* 49: SPI Interrupt (spi header) */
.long MPS2_SPI1_IRQHandler /* 50: SPI Interrupt (clcd) */
.long MPS2_SPI2_IRQHandler /* 51: SPI Interrupt (spi 1 ADC replacement) */
.long MPS2_SPI3_IRQHandler /* 52: SPI Interrupt (spi 0 shield 0 replacement) */
.long MPS2_SPI4_IRQHandler /* 53: SPI Interrupt (shield 1) */
.long PORT4_ALL_IRQHandler /* 54: GPIO Port 4 combined Interrupt */
.long PORT5_ALL_IRQHandler /* 55: GPIO Port 5 combined Interrupt */
.long UART4_IRQHandler /* 56: UART 4 RX and TX Combined Interrupt */
.long UARTRX0_Handler /* UART 0 RX Handler */
.long UARTTX0_Handler /* UART 0 TX Handler */
.long UARTRX1_Handler /* UART 1 RX Handler */
.long UARTTX1_Handler /* UART 1 TX Handler */
.long UARTRX2_Handler /* UART 2 RX Handler */
.long UARTTX2_Handler /* UART 2 TX Handler */
.long PORT0_COMB_Handler /* GPIO Port 0 Combined Handler */
.long PORT1_COMB_Handler /* GPIO Port 1 Combined Handler */
.long TIMER0_Handler /* TIMER 0 handler */
.long TIMER1_Handler /* TIMER 1 handler */
.long DUALTIMER_HANDLER /* Dual timer handler */
.long SPI_Handler /* SPI exceptions Handler */
.long UARTOVF_Handler /* UART 0,1,2 Overflow Handler */
.long ETHERNET_Handler /* Ethernet Overflow Handler */
.long I2S_Handler /* I2S Handler */
.long TSC_Handler /* Touch Screen handler */
.long PORT2_COMB_Handler /* GPIO Port 2 Combined Handler */
.long PORT3_COMB_Handler /* GPIO Port 3 Combined Handler */
.long UARTRX3_Handler /* UART 3 RX Handler */
.long UARTTX3_Handler /* UART 3 TX Handler */
.long UARTRX4_Handler /* UART 4 RX Handler */
.long UARTTX4_Handler /* UART 4 TX Handler */
.long ADCSPI_Handler /* SHIELD ADC SPI exceptions Handler */
.long SHIELDSPI_Handler /* SHIELD SPI exceptions Handler */
.long PORT0_0_Handler /* GPIO Port 0 pin 0 Handler */
.long PORT0_1_Handler /* GPIO Port 0 pin 1 Handler */
.long PORT0_2_Handler /* GPIO Port 0 pin 2 Handler */
.long PORT0_3_Handler /* GPIO Port 0 pin 3 Handler */
.long PORT0_4_Handler /* GPIO Port 0 pin 4 Handler */
.long PORT0_5_Handler /* GPIO Port 0 pin 5 Handler */
.long PORT0_6_Handler /* GPIO Port 0 pin 6 Handler */
.long PORT0_7_Handler /* GPIO Port 0 pin 7 Handler */
.size __isr_vector, . - __isr_vector
@ -196,62 +171,37 @@ system_startup:
.endm
/* External interrupts */
def_irq_default_handler UART0_IRQHandler /* 0: UART 0 RX and TX Combined Interrupt */
def_irq_default_handler Spare_IRQHandler /* 1: Undefined */
def_irq_default_handler UART1_IRQHandler /* 2: UART 1 RX and TX Combined Interrupt */
def_irq_default_handler APB_Slave0_IRQHandler /* 3: Reserved for APB Slave */
def_irq_default_handler APB_Slave1_IRQHandler /* 4: Reserved for APB Slave */
def_irq_default_handler RTC_IRQHandler /* 5: RTC Interrupt */
def_irq_default_handler PORT0_IRQHandler /* 6: GPIO Port 0 combined Interrupt */
def_irq_default_handler PORT1_ALL_IRQHandler /* 7: GPIO Port 1 combined Interrupt */
def_irq_default_handler TIMER0_IRQHandler /* 8: TIMER 0 Interrupt */
def_irq_default_handler TIMER1_IRQHandler /* 9: TIMER 1 Interrupt */
def_irq_default_handler DUALTIMER_IRQHandler /* 10: Dual Timer Interrupt */
def_irq_default_handler APB_Slave2_IRQHandler /* 11: Reserved for APB Slave */
def_irq_default_handler UARTOVF_IRQHandler /* 12: UART 0,1,2 Overflow Interrupt */
def_irq_default_handler APB_Slave3_IRQHandler /* 13: Reserved for APB Slave */
def_irq_default_handler RESERVED0_IRQHandler /* 14: Reserved */
def_irq_default_handler TSC_IRQHandler /* 15: Touch Screen Interrupt */
def_irq_default_handler PORT0_0_IRQHandler /* 16: GPIO Port 0 pin 0 Handler */
def_irq_default_handler PORT0_1_IRQHandler /* 17: GPIO Port 0 pin 1 Handler */
def_irq_default_handler PORT0_2_IRQHandler /* 18: GPIO Port 0 pin 2 Handler */
def_irq_default_handler PORT0_3_IRQHandler /* 19: GPIO Port 0 pin 3 Handler */
def_irq_default_handler PORT0_4_IRQHandler /* 20: GPIO Port 0 pin 4 Handler */
def_irq_default_handler PORT0_5_IRQHandler /* 21: GPIO Port 0 pin 5 Handler */
def_irq_default_handler PORT0_6_IRQHandler /* 22: GPIO Port 0 pin 6 Handler */
def_irq_default_handler PORT0_7_IRQHandler /* 23: GPIO Port 0 pin 7 Handler */
def_irq_default_handler PORT0_8_IRQHandler /* 24: GPIO Port 0 pin 8 Handler */
def_irq_default_handler PORT0_9_IRQHandler /* 25: GPIO Port 0 pin 9 Handler */
def_irq_default_handler PORT0_10_IRQHandler /* 26: GPIO Port 0 pin 10 Handler */
def_irq_default_handler PORT0_11_IRQHandler /* 27: GPIO Port 0 pin 11 Handler */
def_irq_default_handler PORT0_12_IRQHandler /* 28: GPIO Port 0 pin 12 Handler */
def_irq_default_handler PORT0_13_IRQHandler /* 29: GPIO Port 0 pin 13 Handler */
def_irq_default_handler PORT0_14_IRQHandler /* 30: GPIO Port 0 pin 14 Handler */
def_irq_default_handler PORT0_15_IRQHandler /* 31: GPIO Port 0 pin 15 Handler */
def_irq_default_handler FLASH0_IRQHandler /* 32: Reserved for Flash */
def_irq_default_handler FLASH1_IRQHandler /* 33: Reserved for Flash */
def_irq_default_handler RESERVED1_IRQHandler /* 34: Reserved */
def_irq_default_handler RESERVED2_IRQHandler /* 35: Reserved */
def_irq_default_handler RESERVED3_IRQHandler /* 36: Reserved */
def_irq_default_handler RESERVED4_IRQHandler /* 37: Reserved */
def_irq_default_handler RESERVED5_IRQHandler /* 38: Reserved */
def_irq_default_handler RESERVED6_IRQHandler /* 39: Reserved */
def_irq_default_handler RESERVED7_IRQHandler /* 40: Reserved */
def_irq_default_handler RESERVED8_IRQHandler /* 41: Reserved */
def_irq_default_handler PORT2_ALL_IRQHandler /* 42: GPIO Port 2 combined Interrupt */
def_irq_default_handler PORT3_ALL_IRQHandler /* 43: GPIO Port 3 combined Interrupt */
def_irq_default_handler TRNG_IRQHandler /* 44: Random number generator Interrupt */
def_irq_default_handler UART2_IRQHandler /* 45: UART 2 RX and TX Combined Interrupt */
def_irq_default_handler UART3_IRQHandler /* 46: UART 3 RX and TX Combined Interrupt */
def_irq_default_handler ETHERNET_IRQHandler /* 47: Ethernet interrupt t.b.a. */
def_irq_default_handler I2S_IRQHandler /* 48: I2S Interrupt */
def_irq_default_handler MPS2_SPI0_IRQHandler /* 49: SPI Interrupt (spi header) */
def_irq_default_handler MPS2_SPI1_IRQHandler /* 50: SPI Interrupt (clcd) */
def_irq_default_handler MPS2_SPI2_IRQHandler /* 51: SPI Interrupt (spi 1 ADC replacement) */
def_irq_default_handler MPS2_SPI3_IRQHandler /* 52: SPI Interrupt (spi 0 shield 0 replacement) */
def_irq_default_handler MPS2_SPI4_IRQHandler /* 53: SPI Interrupt (shield 1) */
def_irq_default_handler PORT4_ALL_IRQHandler /* 54: GPIO Port 4 combined Interrupt */
def_irq_default_handler PORT5_ALL_IRQHandler /* 55: GPIO Port 5 combined Interrupt */
def_irq_default_handler UART4_IRQHandler /* 56: UART 4 RX and TX Combined Interrupt */
def_irq_default_handler UARTRX0_Handler /* 0: UART 0 RX Handler */
def_irq_default_handler UARTTX0_Handler /* 1: UART 0 TX Handler */
def_irq_default_handler UARTRX1_Handler /* 2: UART 1 RX Handler */
def_irq_default_handler UARTTX1_Handler /* 3: UART 1 TX Handler */
def_irq_default_handler UARTRX2_Handler /* 4: UART 2 RX Handler */
def_irq_default_handler UARTTX2_Handler /* 5: UART 2 TX Handler */
def_irq_default_handler PORT0_COMB_Handler /* 6: GPIO Port 0 Combined Handler */
def_irq_default_handler PORT1_COMB_Handler /* 7: GPIO Port 1 Combined Handler */
def_irq_default_handler TIMER0_Handler /* 8: TIMER 0 handler */
def_irq_default_handler TIMER1_Handler /* 9: TIMER 1 handler */
def_irq_default_handler DUALTIMER_HANDLER /* 10: Dual timer handler */
def_irq_default_handler SPI_Handler /* 11: SPI exceptions Handler */
def_irq_default_handler UARTOVF_Handler /* 12: UART 0,1,2 Overflow Handler */
def_irq_default_handler ETHERNET_Handler /* 13: Ethernet Overflow Handler */
def_irq_default_handler I2S_Handler /* 14: I2S Handler */
def_irq_default_handler TSC_Handler /* 15: Touch Screen handler */
def_irq_default_handler PORT2_COMB_Handler /* 16: GPIO Port 2 Combined Handler */
def_irq_default_handler PORT3_COMB_Handler /* 17: GPIO Port 3 Combined Handler */
def_irq_default_handler UARTRX3_Handler /* 18: UART 3 RX Handler */
def_irq_default_handler UARTTX3_Handler /* 19: UART 3 TX Handler */
def_irq_default_handler UARTRX4_Handler /* 20: UART 4 RX Handler */
def_irq_default_handler UARTTX4_Handler /* 21: UART 4 TX Handler */
def_irq_default_handler ADCSPI_Handler /* 22: SHIELD ADC SPI exceptions Handler */
def_irq_default_handler SHIELDSPI_Handler /* 23: SHIELD SPI exceptions Handler */
def_irq_default_handler PORT0_0_Handler /* 24: GPIO Port 0 pin 0 Handler */
def_irq_default_handler PORT0_1_Handler /* 25: GPIO Port 0 pin 1 Handler */
def_irq_default_handler PORT0_2_Handler /* 26: GPIO Port 0 pin 2 Handler */
def_irq_default_handler PORT0_3_Handler /* 27: GPIO Port 0 pin 3 Handler */
def_irq_default_handler PORT0_4_Handler /* 28: GPIO Port 0 pin 4 Handler */
def_irq_default_handler PORT0_5_Handler /* 29: GPIO Port 0 pin 5 Handler */
def_irq_default_handler PORT0_6_Handler /* 30: GPIO Port 0 pin 6 Handler */
def_irq_default_handler PORT0_7_Handler /* 31: GPIO Port 0 pin 7 Handler */
.end

178
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/startup_MPS2.S
View File

@ -46,63 +46,38 @@ __isr_vector:
.long SysTick_Handler /* SysTick Handler */
/* External Interrupts */
.long UART0_IRQHandler /* 0: UART 0 RX and TX Combined Interrupt */
.long Spare_IRQHandler /* 1: Undefined */
.long UART1_IRQHandler /* 2: UART 1 RX and TX Combined Interrupt */
.long APB_Slave0_IRQHandler /* 3: Reserved for APB Slave */
.long APB_Slave1_IRQHandler /* 4: Reserved for APB Slave */
.long RTC_IRQHandler /* 5: RTC Interrupt */
.long PORT0_IRQHandler /* 6: GPIO Port 0 combined Interrupt */
.long PORT1_ALL_IRQHandler /* 7: GPIO Port 1 combined Interrupt */
.long TIMER0_IRQHandler /* 8: TIMER 0 Interrupt */
.long TIMER1_IRQHandler /* 9: TIMER 1 Interrupt */
.long DUALTIMER_IRQHandler /* 10: Dual Timer Interrupt */
.long APB_Slave2_IRQHandler /* 11: Reserved for APB Slave */
.long UARTOVF_IRQHandler /* 12: UART 0,1,2 Overflow Interrupt */
.long APB_Slave3_IRQHandler /* 13: Reserved for APB Slave */
.long RESERVED0_IRQHandler /* 14: Reserved */
.long TSC_IRQHandler /* 15: Touch Screen Interrupt */
.long PORT0_0_IRQHandler /* 16: GPIO Port 0 pin 0 Handler */
.long PORT0_1_IRQHandler /* 17: GPIO Port 0 pin 1 Handler */
.long PORT0_2_IRQHandler /* 18: GPIO Port 0 pin 2 Handler */
.long PORT0_3_IRQHandler /* 19: GPIO Port 0 pin 3 Handler */
.long PORT0_4_IRQHandler /* 20: GPIO Port 0 pin 4 Handler */
.long PORT0_5_IRQHandler /* 21: GPIO Port 0 pin 5 Handler */
.long PORT0_6_IRQHandler /* 22: GPIO Port 0 pin 6 Handler */
.long PORT0_7_IRQHandler /* 23: GPIO Port 0 pin 7 Handler */
.long PORT0_8_IRQHandler /* 24: GPIO Port 0 pin 8 Handler */
.long PORT0_9_IRQHandler /* 25: GPIO Port 0 pin 9 Handler */
.long PORT0_10_IRQHandler /* 26: GPIO Port 0 pin 10 Handler */
.long PORT0_11_IRQHandler /* 27: GPIO Port 0 pin 11 Handler */
.long PORT0_12_IRQHandler /* 28: GPIO Port 0 pin 12 Handler */
.long PORT0_13_IRQHandler /* 29: GPIO Port 0 pin 13 Handler */
.long PORT0_14_IRQHandler /* 30: GPIO Port 0 pin 14 Handler */
.long PORT0_15_IRQHandler /* 31: GPIO Port 0 pin 15 Handler */
.long FLASH0_IRQHandler /* 32: Reserved for Flash */
.long FLASH1_IRQHandler /* 33: Reserved for Flash */
.long RESERVED1_IRQHandler /* 34: Reserved */
.long RESERVED2_IRQHandler /* 35: Reserved */
.long RESERVED3_IRQHandler /* 36: Reserved */
.long RESERVED4_IRQHandler /* 37: Reserved */
.long RESERVED5_IRQHandler /* 38: Reserved */
.long RESERVED6_IRQHandler /* 39: Reserved */
.long RESERVED7_IRQHandler /* 40: Reserved */
.long RESERVED8_IRQHandler /* 41: Reserved */
.long PORT2_ALL_IRQHandler /* 42: GPIO Port 2 combined Interrupt */
.long PORT3_ALL_IRQHandler /* 43: GPIO Port 3 combined Interrupt */
.long TRNG_IRQHandler /* 44: Random number generator Interrupt */
.long UART2_IRQHandler /* 45: UART 2 RX and TX Combined Interrupt */
.long UART3_IRQHandler /* 46: UART 3 RX and TX Combined Interrupt */
.long ETHERNET_IRQHandler /* 47: Ethernet interrupt t.b.a. */
.long I2S_IRQHandler /* 48: I2S Interrupt */
.long MPS2_SPI0_IRQHandler /* 49: SPI Interrupt (spi header) */
.long MPS2_SPI1_IRQHandler /* 50: SPI Interrupt (clcd) */
.long MPS2_SPI2_IRQHandler /* 51: SPI Interrupt (spi 1 ADC replacement) */
.long MPS2_SPI3_IRQHandler /* 52: SPI Interrupt (spi 0 shield 0 replacement) */
.long MPS2_SPI4_IRQHandler /* 53: SPI Interrupt (shield 1) */
.long PORT4_ALL_IRQHandler /* 54: GPIO Port 4 combined Interrupt */
.long PORT5_ALL_IRQHandler /* 55: GPIO Port 5 combined Interrupt */
.long UART4_IRQHandler /* 56: UART 4 RX and TX Combined Interrupt */
.long UARTRX0_Handler /* UART 0 RX Handler */
.long UARTTX0_Handler /* UART 0 TX Handler */
.long UARTRX1_Handler /* UART 1 RX Handler */
.long UARTTX1_Handler /* UART 1 TX Handler */
.long UARTRX2_Handler /* UART 2 RX Handler */
.long UARTTX2_Handler /* UART 2 TX Handler */
.long PORT0_COMB_Handler /* GPIO Port 0 Combined Handler */
.long PORT1_COMB_Handler /* GPIO Port 1 Combined Handler */
.long TIMER0_Handler /* TIMER 0 handler */
.long TIMER1_Handler /* TIMER 1 handler */
.long DUALTIMER_HANDLER /* Dual timer handler */
.long SPI_Handler /* SPI exceptions Handler */
.long UARTOVF_Handler /* UART 0,1,2 Overflow Handler */
.long ETHERNET_Handler /* Ethernet Overflow Handler */
.long I2S_Handler /* I2S Handler */
.long TSC_Handler /* Touch Screen handler */
.long PORT2_COMB_Handler /* GPIO Port 2 Combined Handler */
.long PORT3_COMB_Handler /* GPIO Port 3 Combined Handler */
.long UARTRX3_Handler /* UART 3 RX Handler */
.long UARTTX3_Handler /* UART 3 TX Handler */
.long UARTRX4_Handler /* UART 4 RX Handler */
.long UARTTX4_Handler /* UART 4 TX Handler */
.long ADCSPI_Handler /* SHIELD ADC SPI exceptions Handler */
.long SHIELDSPI_Handler /* SHIELD SPI exceptions Handler */
.long PORT0_0_Handler /* GPIO Port 0 pin 0 Handler */
.long PORT0_1_Handler /* GPIO Port 0 pin 1 Handler */
.long PORT0_2_Handler /* GPIO Port 0 pin 2 Handler */
.long PORT0_3_Handler /* GPIO Port 0 pin 3 Handler */
.long PORT0_4_Handler /* GPIO Port 0 pin 4 Handler */
.long PORT0_5_Handler /* GPIO Port 0 pin 5 Handler */
.long PORT0_6_Handler /* GPIO Port 0 pin 6 Handler */
.long PORT0_7_Handler /* GPIO Port 0 pin 7 Handler */
.size __isr_vector, . - __isr_vector
@ -196,62 +171,37 @@ system_startup:
.endm
/* External interrupts */
def_irq_default_handler UART0_IRQHandler /* 0: UART 0 RX and TX Combined Interrupt */
def_irq_default_handler Spare_IRQHandler /* 1: Undefined */
def_irq_default_handler UART1_IRQHandler /* 2: UART 1 RX and TX Combined Interrupt */
def_irq_default_handler APB_Slave0_IRQHandler /* 3: Reserved for APB Slave */
def_irq_default_handler APB_Slave1_IRQHandler /* 4: Reserved for APB Slave */
def_irq_default_handler RTC_IRQHandler /* 5: RTC Interrupt */
def_irq_default_handler PORT0_IRQHandler /* 6: GPIO Port 0 combined Interrupt */
def_irq_default_handler PORT1_ALL_IRQHandler /* 7: GPIO Port 1 combined Interrupt */
def_irq_default_handler TIMER0_IRQHandler /* 8: TIMER 0 Interrupt */
def_irq_default_handler TIMER1_IRQHandler /* 9: TIMER 1 Interrupt */
def_irq_default_handler DUALTIMER_IRQHandler /* 10: Dual Timer Interrupt */
def_irq_default_handler APB_Slave2_IRQHandler /* 11: Reserved for APB Slave */
def_irq_default_handler UARTOVF_IRQHandler /* 12: UART 0,1,2 Overflow Interrupt */
def_irq_default_handler APB_Slave3_IRQHandler /* 13: Reserved for APB Slave */
def_irq_default_handler RESERVED0_IRQHandler /* 14: Reserved */
def_irq_default_handler TSC_IRQHandler /* 15: Touch Screen Interrupt */
def_irq_default_handler PORT0_0_IRQHandler /* 16: GPIO Port 0 pin 0 Handler */
def_irq_default_handler PORT0_1_IRQHandler /* 17: GPIO Port 0 pin 1 Handler */
def_irq_default_handler PORT0_2_IRQHandler /* 18: GPIO Port 0 pin 2 Handler */
def_irq_default_handler PORT0_3_IRQHandler /* 19: GPIO Port 0 pin 3 Handler */
def_irq_default_handler PORT0_4_IRQHandler /* 20: GPIO Port 0 pin 4 Handler */
def_irq_default_handler PORT0_5_IRQHandler /* 21: GPIO Port 0 pin 5 Handler */
def_irq_default_handler PORT0_6_IRQHandler /* 22: GPIO Port 0 pin 6 Handler */
def_irq_default_handler PORT0_7_IRQHandler /* 23: GPIO Port 0 pin 7 Handler */
def_irq_default_handler PORT0_8_IRQHandler /* 24: GPIO Port 0 pin 8 Handler */
def_irq_default_handler PORT0_9_IRQHandler /* 25: GPIO Port 0 pin 9 Handler */
def_irq_default_handler PORT0_10_IRQHandler /* 26: GPIO Port 0 pin 10 Handler */
def_irq_default_handler PORT0_11_IRQHandler /* 27: GPIO Port 0 pin 11 Handler */
def_irq_default_handler PORT0_12_IRQHandler /* 28: GPIO Port 0 pin 12 Handler */
def_irq_default_handler PORT0_13_IRQHandler /* 29: GPIO Port 0 pin 13 Handler */
def_irq_default_handler PORT0_14_IRQHandler /* 30: GPIO Port 0 pin 14 Handler */
def_irq_default_handler PORT0_15_IRQHandler /* 31: GPIO Port 0 pin 15 Handler */
def_irq_default_handler FLASH0_IRQHandler /* 32: Reserved for Flash */
def_irq_default_handler FLASH1_IRQHandler /* 33: Reserved for Flash */
def_irq_default_handler RESERVED1_IRQHandler /* 34: Reserved */
def_irq_default_handler RESERVED2_IRQHandler /* 35: Reserved */
def_irq_default_handler RESERVED3_IRQHandler /* 36: Reserved */
def_irq_default_handler RESERVED4_IRQHandler /* 37: Reserved */
def_irq_default_handler RESERVED5_IRQHandler /* 38: Reserved */
def_irq_default_handler RESERVED6_IRQHandler /* 39: Reserved */
def_irq_default_handler RESERVED7_IRQHandler /* 40: Reserved */
def_irq_default_handler RESERVED8_IRQHandler /* 41: Reserved */
def_irq_default_handler PORT2_ALL_IRQHandler /* 42: GPIO Port 2 combined Interrupt */
def_irq_default_handler PORT3_ALL_IRQHandler /* 43: GPIO Port 3 combined Interrupt */
def_irq_default_handler TRNG_IRQHandler /* 44: Random number generator Interrupt */
def_irq_default_handler UART2_IRQHandler /* 45: UART 2 RX and TX Combined Interrupt */
def_irq_default_handler UART3_IRQHandler /* 46: UART 3 RX and TX Combined Interrupt */
def_irq_default_handler ETHERNET_IRQHandler /* 47: Ethernet interrupt t.b.a. */
def_irq_default_handler I2S_IRQHandler /* 48: I2S Interrupt */
def_irq_default_handler MPS2_SPI0_IRQHandler /* 49: SPI Interrupt (spi header) */
def_irq_default_handler MPS2_SPI1_IRQHandler /* 50: SPI Interrupt (clcd) */
def_irq_default_handler MPS2_SPI2_IRQHandler /* 51: SPI Interrupt (spi 1 ADC replacement) */
def_irq_default_handler MPS2_SPI3_IRQHandler /* 52: SPI Interrupt (spi 0 shield 0 replacement) */
def_irq_default_handler MPS2_SPI4_IRQHandler /* 53: SPI Interrupt (shield 1) */
def_irq_default_handler PORT4_ALL_IRQHandler /* 54: GPIO Port 4 combined Interrupt */
def_irq_default_handler PORT5_ALL_IRQHandler /* 55: GPIO Port 5 combined Interrupt */
def_irq_default_handler UART4_IRQHandler /* 56: UART 4 RX and TX Combined Interrupt */
def_irq_default_handler UARTRX0_Handler /* 0: UART 0 RX Handler */
def_irq_default_handler UARTTX0_Handler /* 1: UART 0 TX Handler */
def_irq_default_handler UARTRX1_Handler /* 2: UART 1 RX Handler */
def_irq_default_handler UARTTX1_Handler /* 3: UART 1 TX Handler */
def_irq_default_handler UARTRX2_Handler /* 4: UART 2 RX Handler */
def_irq_default_handler UARTTX2_Handler /* 5: UART 2 TX Handler */
def_irq_default_handler PORT0_COMB_Handler /* 6: GPIO Port 0 Combined Handler */
def_irq_default_handler PORT1_COMB_Handler /* 7: GPIO Port 1 Combined Handler */
def_irq_default_handler TIMER0_Handler /* 8: TIMER 0 handler */
def_irq_default_handler TIMER1_Handler /* 9: TIMER 1 handler */
def_irq_default_handler DUALTIMER_HANDLER /* 10: Dual timer handler */
def_irq_default_handler SPI_Handler /* 11: SPI exceptions Handler */
def_irq_default_handler UARTOVF_Handler /* 12: UART 0,1,2 Overflow Handler */
def_irq_default_handler ETHERNET_Handler /* 13: Ethernet Overflow Handler */
def_irq_default_handler I2S_Handler /* 14: I2S Handler */
def_irq_default_handler TSC_Handler /* 15: Touch Screen handler */
def_irq_default_handler PORT2_COMB_Handler /* 16: GPIO Port 2 Combined Handler */
def_irq_default_handler PORT3_COMB_Handler /* 17: GPIO Port 3 Combined Handler */
def_irq_default_handler UARTRX3_Handler /* 18: UART 3 RX Handler */
def_irq_default_handler UARTTX3_Handler /* 19: UART 3 TX Handler */
def_irq_default_handler UARTRX4_Handler /* 20: UART 4 RX Handler */
def_irq_default_handler UARTTX4_Handler /* 21: UART 4 TX Handler */
def_irq_default_handler ADCSPI_Handler /* 22: SHIELD ADC SPI exceptions Handler */
def_irq_default_handler SHIELDSPI_Handler /* 23: SHIELD SPI exceptions Handler */
def_irq_default_handler PORT0_0_Handler /* 24: GPIO Port 0 pin 0 Handler */
def_irq_default_handler PORT0_1_Handler /* 25: GPIO Port 0 pin 1 Handler */
def_irq_default_handler PORT0_2_Handler /* 26: GPIO Port 0 pin 2 Handler */
def_irq_default_handler PORT0_3_Handler /* 27: GPIO Port 0 pin 3 Handler */
def_irq_default_handler PORT0_4_Handler /* 28: GPIO Port 0 pin 4 Handler */
def_irq_default_handler PORT0_5_Handler /* 29: GPIO Port 0 pin 5 Handler */
def_irq_default_handler PORT0_6_Handler /* 30: GPIO Port 0 pin 6 Handler */
def_irq_default_handler PORT0_7_Handler /* 31: GPIO Port 0 pin 7 Handler */
.end

22
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct
View File

@ -51,14 +51,26 @@
#define __ram_vector_table_size__ 0x00000000
#endif
#define m_interrupts_start 0x00000000
#if !defined(MBED_APP_START)
#define MBED_APP_START 0
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define m_interrupts_start MBED_APP_START
#define m_interrupts_size 0x00000200
#define m_flash_config_start 0x00000400
#define m_flash_config_start MBED_APP_START + 0x400
#define m_flash_config_size 0x00000010
#define m_text_start 0x00000410
#define m_text_size 0x0007FBF0
#define m_text_start MBED_APP_START + 0x410
#define m_text_size MBED_APP_SIZE - 0x410
#define m_interrupts_ram_start 0x1FFF8000
#define m_interrupts_ram_size __ram_vector_table_size__
@ -70,7 +82,7 @@
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))

20
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld
View File

@ -48,9 +48,21 @@ ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
#if !defined(MBED_APP_START)
#define MBED_APP_START 0
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x6000;
@ -61,9 +73,9 @@ M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000200
m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010
m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x0007FBF0
m_interrupts (RX) : ORIGIN = MBED_APP_START, LENGTH = 0x00000200
m_flash_config (RX) : ORIGIN = MBED_APP_START + 0x400, LENGTH = 0x00000010
m_text (RX) : ORIGIN = MBED_APP_START + 0x410, LENGTH = MBED_APP_SIZE - 0x410
m_data (RW) : ORIGIN = 0x1FFF8000, LENGTH = 0x00020000
}

27
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf
View File

@ -44,21 +44,32 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x4000;
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = 0;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x80000;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x8000;
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0;
define symbol __ram_vector_table_offset__ = isdefinedsymbol(__ram_vector_table__) ? 0x000001FF : 0;
define symbol m_interrupts_start = 0x00000000;
define symbol m_interrupts_end = 0x000001FF;
define symbol m_interrupts_start = MBED_APP_START;
define symbol m_interrupts_end = MBED_APP_START + 0x1FF;
define symbol m_flash_config_start = 0x00000400;
define symbol m_flash_config_end = 0x0000040F;
define symbol m_flash_config_start = MBED_APP_START + 0x400;
define symbol m_flash_config_end = MBED_APP_START + 0x40F;
define symbol m_text_start = 0x00000410;
define symbol m_text_end = 0x0007FFFF;
define symbol m_text_start = MBED_APP_START + 0x410;
define symbol m_text_end = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol m_interrupts_ram_start = 0x1FFF8000;
define symbol m_interrupts_ram_end = 0x1FFF8000 + __ram_vector_table_offset__;

35
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/flash_api.c
View File

@ -58,7 +58,7 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
{
uint32_t n;
uint32_t sector_number;
uint32_t num_of_bytes = size;
uint32_t status;
int32_t ret = -1;
@ -80,12 +80,41 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
status = FLASHIAP_PrepareSectorForWrite(sector_number, sector_number);
if (status == kStatus_FLASHIAP_Success) {
status = FLASHIAP_CopyRamToFlash(address, (uint32_t *)data,
FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES, SystemCoreClock);
/* Check if the number of bytes to write is aligned to page size */
if (size % FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES) {
uint8_t page_buffer[FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES] = { 0 };
uint32_t remaining_bytes = 0;
/* Find the number of pages and remaining bytes */
num_of_bytes = FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES * (size / FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES);
remaining_bytes = (size - num_of_bytes);
/* Copy the remaining bytes into a temp buffer whose size is page-aligned */
memcpy(page_buffer, data + num_of_bytes, remaining_bytes);
if (num_of_bytes) {
/* First write page size aligned bytes of data */
status = FLASHIAP_CopyRamToFlash(address, (uint32_t *)data, num_of_bytes, SystemCoreClock);
if (status == kStatus_FLASHIAP_Success) {
/* Prepare the next write for the remaining data */
status = FLASHIAP_PrepareSectorForWrite(sector_number, sector_number);
}
}
/* Write the remaining data */
if (status == kStatus_FLASHIAP_Success) {
status = FLASHIAP_CopyRamToFlash((address + num_of_bytes), (uint32_t *)page_buffer, FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES, SystemCoreClock);
if (status == kStatus_FLASHIAP_Success) {
ret = 0;
}
}
} else {
status = FLASHIAP_CopyRamToFlash(address, (uint32_t *)data, num_of_bytes, SystemCoreClock);
if (status == kStatus_FLASHIAP_Success) {
ret = 0;
}
}
}
core_util_critical_section_exit();

79
targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/PeripheralPins.c
View File

@ -40,22 +40,16 @@
//*** ADC ***
MBED_WEAK const PinMap PinMap_ADC[] = {
{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 5, 0)}, // IN5 - ARDUINO A0
{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 6, 0)}, // IN6 - ARDUINO A1
{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 5, 0)}, // IN5
{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 6, 0)}, // IN6 - ARDUINO D6
{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 7, 0)}, // IN7 // PA_2 is used as SERIAL_TX
{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 8, 0)}, // IN8 // PA_3 is used as SERIAL_RX
{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 9, 0)}, // IN9 - ARDUINO A2
{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 10, 0)}, // IN10
{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 11, 0)}, // IN11
{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 12, 0)}, // IN12
{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 15, 0)}, // IN15 - ARDUINO A3
{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 16, 0)}, // IN16
{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 1, 0)}, // IN1 - ARDUINO A5
{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 2, 0)}, // IN2 - ARDUINO A4
{PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 3, 0)}, // IN3
{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 15, 0)}, // IN15 - ARDUINO D8
{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 1, 0)}, // IN1
{PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 3, 0)}, // IN3 - ARDUINO A0
{PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 4, 0)}, // IN4
{PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 13, 0)}, // IN13
{PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG_ADC_CONTROL, GPIO_NOPULL, 0, 14, 0)}, // IN14
{NC, NC, 0}
};
@ -69,8 +63,6 @@ MBED_WEAK const PinMap PinMap_ADC_Internal[] = {
//*** DAC ***
MBED_WEAK const PinMap PinMap_DAC[] = {
{PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // OUT1
{PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // OUT2 (Warning: LED1 is also on this pin)
{NC, NC, 0}
};
@ -79,9 +71,7 @@ MBED_WEAK const PinMap PinMap_DAC[] = {
MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
{PB_14, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
{PC_1, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
{PG_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
{NC, NC, 0}
};
@ -89,8 +79,8 @@ MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
{PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
{PB_13, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
{PC_0, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
{PG_7, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
{NC, NC, 0}
};
@ -108,26 +98,12 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
{PA_2, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)},// TIM15_CH1
{PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // PA_3 is used as SERIAL_RX
{PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 (used by us_ticker)
// {PA_3, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)},// TIM15_CH2
{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
// {PA_5, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
// {PA_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)},// TIM16_CH1
{PA_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - ARDUINO D11
// {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
// {PA_7, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
// {PA_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)},// TIM17_CH1
{PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
{PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
{PB_0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
{PB_0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
{PB_1, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
{PB_1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - ARDUINO D3
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - ARDUINO D5
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
@ -140,23 +116,13 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
{PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
{PB_9, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)},// TIM17_CH1
{PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - ARDUINO D6
{PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
{PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
{PB_13, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)},// TIM15_CH1N
{PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
{PB_14, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)},// TIM15_CH1
{PB_14, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
{PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
{PB_15, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)},// TIM15_CH2
{PB_15, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
{PC_6, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
{PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
{PC_7, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 - ARDUINO D9
{PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
{PC_8, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
{PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
{PC_9, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
{PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
{NC, NC, 0}
};
@ -168,8 +134,6 @@ MBED_WEAK const PinMap PinMap_UART_TX[] = {
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
{PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{PB_11, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
{PC_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
{PC_4, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{PC_10, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
@ -181,37 +145,24 @@ MBED_WEAK const PinMap PinMap_UART_TX[] = {
MBED_WEAK const PinMap PinMap_UART_RX[] = {
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // SERIAL_RX
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
{PB_10, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{PC_0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)},
{PC_5, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
{PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_UART_RTS[] = {
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
// {PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
{PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // MEMs
// {PC_8, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)},
{PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
{PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // LED D4
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_UART_CTS[] = {
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
// {PB_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
{PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
// {PC_9, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)},
{PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
{PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // LED D4
{NC, NC, 0}
};
@ -219,8 +170,8 @@ MBED_WEAK const PinMap PinMap_UART_CTS[] = {
//*** SPI ***
MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // ARDUINO D11
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // ARDUINO D11
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@ -228,28 +179,23 @@ MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
};
MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // ARDUINO D12
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
{PG_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // ARDUINO D12
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // ARDUINO D13
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
{PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
{PG_2, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // ARDUINO D13
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
// {PA_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
// {PA_15, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
{NC, NC, 0}
@ -257,12 +203,11 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
MBED_WEAK const PinMap PinMap_CAN_RD[] = {
{PB_8 , CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
{PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_CAN_TD[] = {
{PB_9 , CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
{NC, NC, 0}
};

3
targets/targets.json
View File

@ -616,7 +616,8 @@
"detect_code": ["0201"],
"device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "TRNG", "STDIO_MESSAGES", "FLASH"],
"release_versions": ["2", "5"],
"device_name": "MKW41Z512xxx4"
"device_name": "MKW41Z512xxx4",
"bootloader_supported": true
},
"MCU_K24F1M": {
"core": "Cortex-M4F",

18
tools/resources/__init__.py
View File

@ -261,26 +261,26 @@ class Resources(object):
return list(self._file_refs[file_type])
def _all_parents(self, files):
for name in files:
for name, path in files:
components = name.split(self._sep)
start_at = 2 if components[0] in set(['', '.']) else 1
for index, directory in reversed(list(enumerate(components))[start_at:]):
start_at = 0
for index, directory in reversed(list(enumerate(components))):
if directory in self._prefixed_labels:
start_at = index + 1
break
prefix = path.replace(name, "")
for n in range(start_at, len(components)):
parent = self._sep.join(components[:n])
yield parent
parent_name = self._sep.join(components[:n])
parent_path = join(prefix, *components[:n])
yield FileRef(parent_name, parent_path)
def _get_from_refs(self, file_type, key):
if file_type is FileType.INC_DIR:
parents = set(self._all_parents(self._get_from_refs(
FileType.HEADER, key)))
parents.add(".")
parents = set(self._all_parents(self._file_refs[FileType.HEADER]))
else:
parents = set()
return sorted(
list(parents) + [key(f) for f in self.get_file_refs(file_type)]
[key(f) for f in list(parents) + self.get_file_refs(file_type)]
)

4
tools/toolchains/arm.py
View File

@ -188,7 +188,7 @@ class ARM(mbedToolchain):
if self.RESPONSE_FILES:
opts += ['--via', self.get_inc_file(includes)]
else:
opts += ["-I%s" % i for i in includes]
opts += ["-I%s" % i for i in includes if i]
return opts
@ -474,7 +474,7 @@ class ARMC6(ARM_STD):
def get_compile_options(self, defines, includes, for_asm=False):
opts = ['-D%s' % d for d in defines]
opts.extend(["-I%s" % i for i in includes])
opts.extend(["-I%s" % i for i in includes if i])
if for_asm:
return ["--cpreproc",
"--cpreproc_opts=%s" % ",".join(self.flags['common'] + opts)]