-
-Update History
-V1.8.2
-/ 22-December-2017
-Main
-Changes
-- Maintenance Release of HAL and Low Layer drivers
- HAL Drivers changes
-- HAL CAN driver
- Rework of HAL CAN driver (compatibility break)
- A
-new HAL CAN driver has been redesigned with new APIs, to bypass
-limitations on CAN Tx/Rx FIFO management present with previous HAL CAN
-driver version.
- The
-new HAL CAN driver is the recommended version. It is located as usual
-in Drivers/STM32L4xx_HAL_Driver/Src and
-Drivers/STM32L4xx_HAL_Driver/Inc folders. It can be enabled through
-switch HAL_CAN_MODULE_ENABLED in stm32l4xx_hal_conf.h
- The
-legacy HAL CAN
-driver is also present in the release in
-Drivers/STM32L4xx_HAL_Driver/Src/Legacy and
-Drivers/STM32L4xx_HAL_Driver/Inc/Legacy
-folders for software compatibility reasons. Its usage is not
-recommended as deprecated. It can however be enabled through
-switch HAL_CAN_LEGACY_MODULE_ENABLED in
-stm32l4xx_hal_conf.h
- Short migration guide:
- Fields of CAN_InitTypeDef structure are renamed :
- SJW
-to SyncJumpWidth, BS1 to TimeSeg1, BS2 to TimeSeg2, TTCM to
-TimeTriggeredMode, ABOM to AutoBusOff, AWUM to AutoWakeUp, NART to
-AutoRetransmission (inversed), RFLM to ReceiveFifoLocked and TXFP to
-TransmitFifoPriority
- HAL_CAN_Init() is split into both HAL_CAN_Init() and HAL_CAN_Start()
- HAL_CAN_Transmit()
-is replaced by HAL_CAN_AddTxMessage() to place Tx request, then
-HAL_CAN_GetTxMailboxesFreeLevel() for polling until completion
- HAL_CAN_Transmit_IT()
-is replaced by HAL_CAN_ActivateNotification() to enable transmission with interrupt mode, then HAL_CAN_AddTxMessage() to place Tx request
- HAL_CAN_Receive()
-is replaced by HAL_CAN_GetRxFifoFillLevel() for polling until reception, then HAL_CAN_GetRxMessage() to get Rx message
- HAL_CAN_Receive_IT()
-is replaced by HAL_CAN_ActivateNotification() to enable reception with interrupt mode, then HAL_CAN_GetRxMessage() in the receive callback to get Rx message
- HAL_CAN_Sleep() is renamed to HAL_CAN_RequestSleep()
- HAL_CAN_TxCpltCallback() is split into HAL_CAN_TxMailbox0CompleteCallback(), HAL_CAN_TxMailbox1CompleteCallback() and HAL_CAN_TxMailbox2CompleteCallback()
- HAL_CAN_RxCpltCallback() is split into HAL_CAN_RxFifo0MsgPendingCallback() and HAL_CAN_RxFifo1MsgPendingCallback()
- More complete "how to use the new driver" is detailed in the driver header section itself
- HAL CORTEX driver
- HAL_MPU_Enable() and HAL_MPU_Disable() functions moved to stm32l4xx_hal_cortex.c
- HAL CRC driver
- HAL FLASH driver
- HAL_FLASH_Unlock() updated to not return HAL_ERROR if flash is already unlocked
- HAL OSPI driver
- HAL RCC driver
- RCC_RTCCLKSOURCE_NO_CLK renamed to RCC_RTCCLKSOURCE_NONE
- HAL_RCC_DeInit() updates
- Clear of status flags
- Wait for PLLs disable flags to clear PLLs configuration registers
- Fix MISRA C-2004 rule 10.6 ('U' suffix)
- HAL TIM driver
- Fix MISRA C-2004 rule 10.6 ('U' suffix)
LL Drivers changes
-- LL CRC driver
- LL RCC driver
- Add LL_RCC_PLL_SetMainSource() and LL_RCC_HSI_IsEnabledInStopMode() APIs
- LL_RCC_DeInit() update
- Clear of status flags
- Wait for PLLs disable flags to clear PLLs configuration registers
- Fix IS_LL_RCC_I2C_CLKSOURCE() assert macro
V1.8.1
-/ 13-October-2017
-Main
-Changes
-- Maintenance Release of HAL and Low Layer drivers
- HAL Drivers changes
-- HAL generic driver
- Fix compilation issue with ARMCC --gnu option on __packed declaration in stm32l4xx_hal_def.h
- HAL ADC driver
- Reuse LL ADC definitions
- Fix MISRA C-2004 rule 19.10
- HAL DSI driver
- Fix
-timing issue at highest optimization level on IAR on DSI Host, DSI
-Wrapper, DSI PLL and DSI regulator enable/disable macros
- Add macro __HAL_DSI_RESET_HANDLE_STATE()
- HAL FLASH driver
- HAL_FLASH_Unlock() shall not return an error when Flash already unlocked
- HAL I2C driver
- Fix race condition in HAL_I2C_Master_Receive() and HAL_I2C_Slave_Receive()
- Fix RD_WRN bit management in case of I2C_NO_STARTSTOP request
- HAL OSPI driver
- Add note on limitation of HAL_OSPI_AutoPolling() and HAL_OSPI_AutoPolling_IT() usage in octal mode (cf. Errata Sheet)
- Fix compilation warning in C++
- HAL QSPI driver
- Fix MISRA C-2004 rules 10.3, 11.4 and 12.6
- HAL RCC driver
- Update
-SDMMC1 clock source selection on STM32L4Rx/STM32L4Sx devices to
-select PLL divider "P" output instead of internal multiplexor on
-MSI, HSI48, PLLSAI1 or PLL "Q" outputs as SDMMC1 kernel clock source
- Fix __HAL_RCC_GPIOB_IS_CLK_ENABLED() macro definition
- HAL SDMMC driver
- Fix management of peripheral flags depending on command or data transfers.
- HAL SMBUS driver
- Fix RD_WRN bit management in case of SMBUS_NO_STARTSTOP request
LL Drivers changes
-- LL DAC driver
- Add missing definition for external triggers from TIM and LPTIM instances
- LL DMA2D driver
- Fix CodeSonar warning in LL_DMA2D_StructInit()
- LL I2C driver
- Fix RD_WRN bit management in case of LL_I2C_GENERATE_NOSTARTSTOP request in LL_I2C_HandleTransfer()
- LL RCC driver
- Update SDMMC1 clock
-source selection on STM32L4Rx/STM32L4Sx devices to select PLL divider
-"P" output instead of internal multiplexor on MSI, HSI48, PLLSAI1 or
-PLL "Q" outputs as SDMMC1 kernel clock source
- Add LL_RCC_SetSDMMCKernelClockSource(), LL_RCC_GetSDMMCKernelClockSource() and LL_RCC_GetSDMMCKernelClockFreq() APIs
V1.8.0
-/ 25-August-2017
-Main
-Changes
-
-- Release of HAL and Low Layer drivers to add support of STM32L4R5xx/STM32L4R7xx/STM32L4R9xx/ STM32L4S5xx/STM32L4S7xx/STM32L4S9xx devices
-- New OctoSPI, DSI, LTDC, GFXMMU peripherals supported in new HAL OSPI, HAL DSI, HAL LTDC and HAL GFXMMU drivers
- Superset features device STM32L4S9xx API User Manual available (STM32L4S9xx_User_Manual.chm)
HAL Drivers changes
-- HAL DSI driver (NEW):stm32l4xx_hal_dsi.h/.c files
- HAL GFXMMU driver (NEW):stm32l4xx_hal_gfxmmu.h/.c files
- HAL LTDC driver (NEW):stm32l4xx_hal_ltdc.h/.c and extension stm32l4xx_hal_ltdc_ex.h/.c files
- HAL OSPI driver (NEW):stm32l4xx_hal_ospi.h/.c files
-- HAL generic driver
- Add HAL_GetUIDw0(), HAL_GetUIDw1() and HAL_GetUIDw2() APIs
- Default HAL_Delay() implementation updated to insure minimum requested delay
- Add
-__HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE() and
-__HAL_SYSCFG_SRAM2_WRP_32_63_ENABLE() macros to set respectively SRAM2
-page protection attribute for page 0 to 31 and page 32 to 63
- HAL CAN driver
- Add FIFOs overrun error management (new error codes HAL_CAN_ERROR_FOV0 and HAL_CAN_ERROR_FOV1)
- HAL CRYP driver
- Fix zero padding in case of Data type
- Fix phase setting related to payload suspension
- Fix to not be too restrictive on input parameters in HAL_CRYPEx_AES_Auth() and HAL_CRYPEx_AES_Auth_DMA()
- HAL DAC driver
- Fix Sample & Hold configuration in case of multi-channel
- Rename DAC_HIGH_FREQUENCY_INTERFACE_MODE_ENABLE to DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ
- HAL DMA driver
- Fix DMAMUX synchronization signal configuration in HAL_DMAEx_ConfigMuxSync()
- Support of DMAMUX1 peripheral via new DMA Extension APIs
- HAL_DMAEx_ConfigMuxRequestGenerator()
- HAL_DMAEx_EnableMuxRequestGenerator(), HAL_DMAEx_DisableMuxRequestGenerator()
- HAL_DMAEx_ConfigMuxSync()
- HAL_DMAEx_MUX_IRQHandler()
- HAL DFSDM driver extension (new stm32l4xx_hal_dfsdm_ex.h/.c)
- New APIs HAL_DFSDMEx_ChannelSetPulsesSkipping() and HAL_DFSDMEx_ChannelGetPulsesSkipping()
- HAL DFSDM driver
- Fix
-cast issue to return possible negative value in
-HAL_DFSDM_FilterGetRegularValue(), HAL_DFSDM_FilterGetInjectedValue(),
-HAL_DFSDM_FilterGetExdMaxValue() and HAL_DFSDM_FilterGetExdMinValue()
- HAL FLASH driver
- Add new LVE pin management in HAL_FLASHEx_ConfigLVEPin()
- Fix timeout issue in private FLASH_WaitForLastOperation() API
- Fix error status of HAL_FLASHEx_OBProgram(
- FMC driver
- New field NBLSetupTime added in FMC_NORSRAM_InitTypeDef structure
- New field DataHoldTime added in FMC_NORSRAM_TimingTypeDef structure
- HAL HASH driver
- Update of context swap mechanism implemented in HAL_HASH_DMAFeed_ProcessSuspend() when input data are fed to the IP by DMA
- HAL HCD/PCD driver
- Add support of STM32L4R5xx/STM32L4R7xx/STM32L4R9xx/ STM32L4S5xx/STM32L4S7xx/STM32L4S9xx devices
- HAL IRDA driver
- Add Clock Prescaler management for STM32L4Rx/STM32L4Sx devices only
- IRDA_InitTypeDef structure update to add ClockPrescaler parameter
- HAL PCD driver
- Fix USB PCD lock/unlock and flush TX fifo during device reset
- HAL PWR driver
- Add PWR_REGULATOR_VOLTAGE_SCALE1_BOOST new parameter value for HAL_PWREx_ControlVoltageScaling() to use higher supply voltage (1.28V) with main regulator voltage in range 1 above 80Mhz (maximum frequency equals to 120Mhz) for STM32L4Rx/STM32L4Sx devices
- Add
-SRAM3 retention management APIs: HAL_PWREx_EnableSRAM3ContentRetention() and HAL_PWREx_DisableSRAM3ContentRetention()
- Add DSI pins pull-down management
- new HAL_PWREx_EnableDSIPinsPDActivation() and HAL_PWREx_DisableDSIPinsPDActivation() APIs
- HAL RCC driver
- Add clock management of new peripherals: DSI, GFXMMU, LTDC, OSPI1, OSPI2, OSPIM
- Add OctoSPI peripherals clock source frequency computation in HAL_RCCEx_GetPeriphCLKFreq()
- Fix issue with main PLL divider M value to allow 1 to 16 value range on STM32L4Rx/STM32L4Sx devices
- Fix SDMMC1 clock source selection possibilities in HAL_RCCEx_PeriphCLKConfig(), __HAL_RCC_SDMMC1_CONFIG() and __HAL_RCC_GET_SDMMC1_SOURCE()
- Fix HAL_RCCEx_GetPeriphCLKFreq() to take into account PLLSAI1 and PLLSAI2 divider M values (1 to 16 range) on STM32L4Rx/STM32L4Sx devices
- Add undershoot/overshoot management in HAL_RCC_ClockConfig() when switching to/from system clock from main PLL above 80Mhz
- HAL RNG driver
- Add support of Clock Error detection and Bypass mode management in new RNG_InitTypeDef and HAL_RNG_Init() API
- parameters ClockErrorDetection and BypassMode added in new RNG_InitTypeDef
- HAL RTC driver
- Fix HAL_RTC_Init() to wait for synchronization and avoid RTC registers access timing issues
- HAL SAI driver
- Add FIFO flush in HAL_SAI_DMAStop()
- Fix HAL_SAI_Transmit_DMA() to follow the slave TX mode sequence described in the Reference Manual
- HAL SD driver
- Major rework of HAL SD driver aligned with STM32F7 series
- BlockSize parameter removed in Read&Write block APIs since 512 byte size is always read&write.
- HAL SMARTCARD driver
- Add Clock Prescaler management for STM32L4Rx/STM32L4Sx devices only
- SMARTCARD_InitTypeDef structure update to add ClockPrescaler parameter
- Add FIFO mode management for STM32L4Rx/STM32L4Sx devices only
- new
-HAL_SMARTCARDEx_EnableFifoMode(), HAL_SMARTCARDEx_DisableFifoMode(),
-HAL_SMARTCARDEx_SetTxFifoThreshold(), HAL_SMARTCARDEx_SetRxFifoThreshold(),
-HAL_SMARTCARDEx_RxFifoFullCallback() and HAL_SMARTCARDEx_TxFifoEmptyCallback()
-APIs
- HAL SMBUS driver
- Add Analog and digital filter configuration APIs: HAL_SMBUS_ConfigAnalogFilter() and HAL_SMBUS_ConfigDigitalFilter()
- Add error management if occuring during STOP process
- HAL SPI driver
- Add control of RXFIFO emty at end of transmissing in Master transmission 2 lines mode
- HAL SWPMI driver
- Fix missing clock initialization before register update in HAL_SWPMI_Init()
- HAL TIM driver
- Add TIM_TIM1_ETR_GPIO and TIM_TIM8_ETR_GPIO definitions
- Add TIM_TIM16_TI1_MSI, TIM_TIM16_TI1_HSE_32 and TIM_TIM16_TI1_MCO definitions for STM32L4Rx/STM32L4Sx
- Add new AutoReloadPreload parameter in TIM_Base_InitTypeDef (user code impacted)
- Fix wrong MOE disable conditions with new macro __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY()
- HAL UART driver
- Add Clock Prescaler management for STM32L4Rx/STM32L4Sx devices only
- UART_InitTypeDef structure update to add ClockPrescaler parameter
- Add FIFO mode management for STM32L4Rx/STM32L4Sx devices only
- new
-HAL_UARTEx_EnableFifoMode(), HAL_UARTEx_DisableFifoMode(),
-HAL_UARTEx_SetTxFifoThreshold(), HAL_UARTEx_SetRxFifoThreshold(),
-HAL_UARTEx_RxFifoFullCallback() and HAL_UARTEx_TxFifoEmptyCallback()
-APIs
- Add SPI Slave mode management for STM32L4Rx/STM32L4Sx devices only
- new HAL_UARTEx_EnableSlaveMode(), HAL_UARTEx_DisableSlaveMode() and HAL_UARTEx_ConfigNSS()
- HAL USART driver (new stm32l4xx_hal_usart_ex.c)
- Add Clock Prescaler management for STM32L4Rx/STM32L4Sx devices only
- USART_InitTypeDef structure update to add ClockPrescaler parameter
- Add FIFO mode management for STM32L4Rx/STM32L4Sx devices only
- new
-HAL_USARTEx_EnableFifoMode(), HAL_USARTEx_DisableFifoMode(),
-HAL_USARTEx_SetTxFifoThreshold(), HAL_USARTEx_SetRxFifoThreshold(),
-HAL_USARTEx_RxFifoFullCallback() and HAL_USARTEx_TxFifoEmptyCallback()
-APIs
- Add SPI Slave mode management for STM32L4Rx/STM32L4Sx devices only
- new HAL_USARTEx_EnableSlaveMode(), HAL_USARTEx_DisableSlaveMode() and HAL_USARTEx_ConfigNSS()
-LL Drivers changes
- LL DMAMUX driver (NEW):stm32l4xx_ll_dmamux.h
- All LL drivers update to remove usage of CMSIS POSITION_VAL() macro and resort to xx_Pos position bit definition
- LL ADC
- Fix legacy APIs LL_ADC_REG_SetTrigSource() and LL_ADC_INJ_SetTrigSource()
- LL BUS
- Add management of new peripherals: DSI, GFXMMU, LTDC, OSPI1, OSPI2, OSPIM
- LL DMA
- Fix simple write register access to clear DMA flags in LL_DMA_ClearFlag_XXX() APIs
- LL DMA2D
- Add management of output swapping mode (regular or bytes two by two) and line offset mode (pixel or byte)
- LL EXTI
- Add management of EXTI line 40 (I2C4)
- LL I2C
- Fix LL_I2C_Init() to not set OAEN1 bit when Own Address 1 value is 0
- LL LPUART / LL USART
- Add management of Rx FIFO and Tx FIFO
- LL PWR
- Add
-SRAM3 retention management APIs
- LL_PWR_EnableSRAM3Retention(),
-LL_PWR_DisableSRAM3Retention() and LL_PWR_IsEnabledSRAM3Retention()
- Add voltage range 1 boost mode APIs
- LL_PWR_EnableRange1BoostMode(), LL_PWR_DisableRange1BoostMode() and LL_PWR_IsEnabledRange1BoostMode()
- For compatibility purpose accross STM32 series, rename LL_PWR_IsActiveFlag_VOSF() to LL_PWR_IsActiveFlag_VOS()
- Add DSI pins pull-down management
- new LL_PWR_EnableDSIPinsPDActivation(), LL_PWR_DisableDSIPinsPDActivation() and LL_PWR_IsEnabledDSIPinsPDActivation() APIs
- LL RCC
- Add management of new peripheral clock sources for DSI, LTDC, OSPI1, OSPI2 and SDMMC
- Add
-new definitions for main PLL divider M values above LL_RCC_PLLM_DIV_8
-and up to LL_RCC_PLLM_DIV_16 for STM32L4Rx/STM32L4Sx devices
- Fix
-in __LL_RCC_CALC_PLLCLK_SAI_FREQ(), __LL_RCC_CALC_PLLSAI1_SAI_FREQ(),
-__LL_RCC_CALC_PLLSAI1_48M_FREQ(), __LL_RCC_CALC_PLLSAI1_ADC_FREQ(),
-__LL_RCC_CALC_PLLSAI2_SAI_FREQ()
- Fix
-in LL_RCC_PLLSAI1_ConfigDomain_48M(),
-LL_RCC_PLLSAI1_ConfigDomain_SAI(), LL_RCC_PLLSAI1_ConfigDomain_ADC(),
-LL_RCC_PLLSAI1_GetP(), LL_RCC_PLLSAI2_ConfigDomain_SAI() and
-LL_RCC_PLLSAI2_GetP()
- Fix LL_RCC_GetSDMMCClockFreq() to take into account all SDMMC1 possible clock sources
- Add HSI48 oscillator clock source value for RNG and USB:
- LL_RCC_RNG_CLKSOURCE_HSI48 and update LL_RCC_GetRNGClockFreq()
- LL_RCC_USB_CLKSOURCE_HSI48 and update LL_RCC_GetUSBClockFreq()
- General fixes
- Renaming of RCC_DFSDM1CLKSOURCE_PCLK to RCC_DFSDM1CLKSOURCE_PCLK2
- Renaming of RCC_SWPMI1CLKSOURCE_PCLK to RCC_SWPMI1CLKSOURCE_PCLK1
- Renaming of RCC_LPTIMxCLKSOURCE_PCLK to RCC_LPTIMxCLKSOURCE_PCLK1
- LL RNG
- Add Clock Error detection and Bypass mode management in new LL_RNG_InitTypeDef and new LL_RNG_Init() API
- new LL_RNG_EnableClkErrorDetect(), LL_RNG_DisableClkErrorDetect() and LL_RNG_IsEnableClkErrorDetect()
- new LL_RNG_EnableBypassMode(), LL_RNG_DisableBypassMode() and LL_RNG_IsEnabledBypassMode
- LL RTC
- LL_RTC_TIME_Get() and LL_RTC_DATE_Get() implementations optimization (single register read access)
- LL SYSTEM
- Add SRAM2 page write protection APIs: LL_SYSCFG_EnableSRAM2PageWRP_0_31() and LL_SYSCFG_EnableSRAM2PageWRP_32_63()
- LL TIM
- Fix definition of TIM break input polarity (inverse values LL_TIM_BKIN_POLARITY_LOW / LL_TIM_BKIN_POLARITY_HIGH)
- Fix LL_TIM_EnableUpdateEvent(), LL_TIM_DisableUpdateEvent() and LL_TIM_IsEnabledUpdateEvent()
- LL UTILS
- Add management of new flash latency ranges in UTILS_SetFlashLatency()
- Add undershoot management when switching to system clock from main PLL above 80Mhz in LL_PLL_ConfigSystemClock_MSI(), LL_PLL_ConfigSystemClock_HSI() and LL_PLL_ConfigSystemClock_HSE()
V1.7.2
-/ 16-June-2017
-Main
-Changes
-- Maintenance Release of HAL and Low Layer drivers
-HAL Drivers changes
-- HAL CAN driver
- Add overrun error management by the error callback
- HAL CRC driver
- Update of HAL_CRCEx_Polynomial_Set() to return an error when a non-supported polynomial length is passed as parameter
- HAL CRYP driver
- Update zero padding management with respect to data type
- Phase setting and comments correction in case of payload phase suspension
- Correct input parameters tests in HAL_CRYPEx_AES_Auth() and HAL_CRYPEx_AES_Auth_DMA() APIs
- Correct interruptions and IP enabling flags setting for key derivation in IT mode
- HAL DCMI driver
- Comments correction to describe image size management when larger than maximum authorized DMA transfer size
- HAL FLASH driver
- Add software work-around in HAL_FLASH_Unlock() to clear OPTVERR flag on STM32L45x/L46x parts when initially improperly raised
- Correct timeout issue in FLASH_WaitForLastOperation()
- HAL HASH driver
- Update of context swap mechanism implemented in HAL_HASH_DMAFeed_ProcessSuspend() when input data are fed to the IP by DMA
LL Drivers changes
-- LL RCC
- Correct duplication of aRCC_APBAHBPrescTable
- LL RTC
- Simplication of implementation of function LL_RTC_DATE_Get()
- LL TIM
- Fix LL_TIM_EnableUpdateEvent(), LL_TIM_DisableUpdateEvent() and LL_TIM_IsEnabledUpdateEvent()
V1.7.1
-/ 21-April-2017
-Main
-Changes
-- Maintenance Release of HAL and Low Layer drivers
- HAL Drivers changes
-- HAL generic driver
- Add HAL_GetUIDw0(), HAL_GetUIDw1() and HAL_GetUIDw2() APIs
- HAL DAC driver
- Fix Sample & Hold configuration in case of multi-channel
- HAL HASH driver
- Fix to ensure proper DMA-based HASH processing suspension/resumption
- HAL PCD driver
- Fix USB PCD lock/unlock and flush TX fifo during device reset
- HAL RTC driver
- Add wait for synchronization in HAL_RTC_Init() to insure RTC time initialization
LL Drivers changes
-- LL ADC
- Fix legacy APIs LL_ADC_REG_SetTrigSource() and LL_ADC_INJ_SetTrigSource()
- LL DMA
- Write only operation on IFCR register
V1.7.0
-/ 17-February-2017
-Main
-Changes
-- Release of HAL and Low Layer drivers to add support of STM32L496xx/STM32L4A6xx devices
-- New DCMI, DMA2D, HASH peripherals supported in new HAL DCMI, HAL & LL DMA2D and HAL HASH drivers
- New CAN2 instance supported in HAL CAN
- Superset features device STM32L4A6xx API User Manual available (STM32L4A6xx_User_Manual.chm)
HAL Drivers changes
-- HAL DCMI driver (NEW): stm32l4xx_hal_dcmi.h/.c files
- HAL DMA2D driver (NEW): stm32l4xx_hal_dma2d.h/.c files
- HAL HASH driver (NEW): stm32l4xx_hal_hash.h/.c and extension stm32l4xx_hal_hash_ex.h/.c files
- The following changes done on the HAL drivers require an update on the application code based on older HAL versions
- HAL SD update
- Overall rework of the driver for a more efficient implementation
- Modify initialization API and structures
- Modify Read / Write sequences: separate transfer process and SD Cards state management
- Adding interrupt mode for Read / Write operations
- Update the HAL_SD_IRQHandler function by optimizing the management of interrupt errors
- Refer
-to the following examples in STM32CubeL4 firmware package V1.7.0 to
-identify the changes: BSP example and USB_Device/MSC_Standalone
-application
- HAL generic update
- stm32l4xx_hal_conf_template.h updated for new HAL DCMI, HAL DMA2D and HAL HASH
- #define HAL_DCMI_MODULE_ENABLED
- #define HAL_DMA2D_MODULE_ENABLED
- HAL_HASH_MODULE_ENABLED
- HAL_Delay() updated to guarantee minimum delay
- HAL CAN driver
- Add support of CAN2 instance
- HAL GPIO driver
- Add support of GPIOI port and STM32L496xx/STM32L4A6xx alternate functions
- HAL PWR driver
- Add support of GPIOI port pull-up/pull-down state in Standby and Shutdown modes
- HAL QSPI driver
- Fix QSPI_HandleTypeDef structure to handle data size as uint32_t
- HAL RCC driver
- Add new macros for new peripherals clock and reset for CAN2, DCMI, DMA2D, GPIOI and HASH
- Fix HAL_RCCEx_GetPeriphCLKFreq() to compute peripheral frequencies from MSI frequency
- Fix HAL_RCCEx_GetPeriphCLKFreq() to compute DFSDM1 frequency from PCLK2 frequency
- Rename some peripheral clock sources to specify the corresponding APB clock:
- RCC_DFSDM1CLKSOURCE_PCLK to RCC_DFSDM1CLKSOURCE_PCLK2
- RCC_SWPMI1CLKSOURCE_PCLK to RCC_SWPMI1CLKSOURCE_PCLK1
- RCC_LPTIMxCLKSOURCE_PCLK to RCC_LPTIMxCLKSOURCE_PCLK1
- HAL RTC driver
- Fix wrong clear of time and date registers in HAL_RTCEx_TamperTimeStampIRQHandler()
- HAL SPI driver
- Add internal timeout to exit HAL_SPI_Abort() and HAL_SPI_Abort_IT()
- HAL TIM driver
- Fix wrong MOE disable conditions with new macro __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY()
- HAL SWPMI driver
- Fix peripheral clock management sequence in HAL_SWPMI_Init()
LL Drivers changes
-- LL DMA2D driver (NEW)
- LL BUS
- Add management of new peripherals: CAN2, DCMI, DMA2D, GPIOI and HASH
- LL PWR
- For compatibility purpose accross STM32 series, rename LL_PWR_IsActiveFlag_VOSF() to LL_PWR_IsActiveFlag_VOS()
- LL RCC
- Fix LL_RCC_GetDFSDMClockFreq() to compute frequency from PCLK2 frequency
- LL SDMMC
- Add new internal functions after HAL SD rework
- LL TIM
- Fix definition of TIM break input polarity (fix values LL_TIM_BKIN_POLARITY_LOW / LL_TIM_BKIN_POLARITY_HIGH)
V1.6.0
-/ 28-October-2016
-Main
-Changes
-- Release of HAL and Low Layer drivers to add support of STM32L451xx/STM32L452xx/STM32L462xx devices
-- Superset features device STM32L462xx API User Manual available (STM32L462xx_User_Manual.chm)
HAL Drivers changes
-- HAL CRYP driver
- HAL CRYP exported macros alignment with other STM32 series to use CRYP handle address as parameter in:
- __HAL_CRYP_ENABLE(), __HAL_CRYP_DISABLE(), __HAL_CRYP_SET_OPERATINGMODE(),
-__HAL_CRYP_SET_CHAININGMODE(), __HAL_CRYP_GET_FLAG(), __HAL_CRYP_CLEAR_FLAG(),
-__HAL_CRYP_GET_IT_SOURCE(), __HAL_CRYP_GET_IT(), __HAL_CRYP_CLEAR_IT(),
-__HAL_CRYP_ENABLE_IT() and __HAL_CRYP_DISABLE_IT()
- HAL FLASH driver
- Temporary data cache deactivation on
- Flash programming in HAL_FLASH_Program() and HAL_FLASH_Program_IT()
- Flash erase in HAL_FLASHEx_Erase() and HAL_FLASHEx_Erase_IT()
- To insure LSB/MSB address order in C compiler assembly output, split 64-bit programming in 2 double-word write operations
- HAL I2C driver
- Fix
-to reset HAL I2C handle LISTEN state option in transfer direction
-change with HAL_I2C_Slave_Sequential_Transmit_IT() and
-HAL_I2C_Slave_Sequential_Receive_IT()
- HAL SMBUS driver
- Add
-support of Zone read/write feature thanks to new XferOptions parameter
-values SMBUS_OTHER_FRAME_NO_PEC, SMBUS_OTHER_FRAME_WITH_PEC,
-SMBUS_OTHER_AND_LAST_FRAME_NO_PEC and
-SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC that may be used in
-HAL_SMBUS_Master_Transmit_IT(), HAL_SMBUS_Master_Receive_IT(),
-HAL_SMBUS_Slave_Transmit_IT() and HAL_SMBUS_Slave_Receive_IT()
- HAL RTC driver
- Fix
-race conditions on EXTI flags clearing in HAL_RTC_AlarmIRQHandler(),
-HAL_RTCEx_TamperTimeStampIRQHandler() and
-HAL_RTCEx_WakeUpTimerIRQHandler()
- Fix CodeSonar warnings in
- HAL ADC, HAL CRC, HAL CRYP, HAL I2C, HAL IRDA, HAL SMARTCARD, HAL SMBUS, HAL OPAMP, HAL RTC, HAL UART, HAL USART
-LL Drivers changes - LL I2C driver
- Add I2C4 management in LL_I2C_DeInit()
- LL SYSTEM driver
- Application
-shall be responsible to write the correct key sequence in SYSCFG_SKR
-register prior to call LL_SYSCFG_EnableSRAM2Erase()
- LL TIM driver
- New APIs to insure BDTR register initialization in a single write operation
- LL_TIM_BDTR_StructInit()
- LL_TIM_BDTR_Init()
- LL UTILS driver
- Fix LL_RCC_PLLSOURCE_HSE in LL_PLL_ConfigSystemClock_HSE()
V1.5.2
-/ 12-September-2016
-HAL Drivers changes
-- HAL ADC driver
- No need to configure number of discontinuous conversions if discontinuous mode is not enabled
- HAL_ADCEx_MultiModeConfigChannel() returns HAL_ERROR if no Slave instance defined
- HAL DAC driver
- Fix calibration with correct handling of DAC_SR_CAL_FLAGx bits in HAL_DACEx_SelfCalibrate()
- HAL FLASH driver
- Change in HAL_FLASHEx_OBGetConfig() to not return PCROP and/or WRP data if their respective areas are not defined
- Fix
-error management in HAL_FLASH_IRQHandler() to simply call
-HAL_FLASH_OperationErrorCallback() instead of calling both
-HAL_FLASH_EndOfOperationCallback() and HAL_FLASH_OperationErrorCallback()
- HAL I2C driver
- Fix wrong state check in HAL_I2C_Master_Sequential_Transmit_IT()
- Add
-new option I2C_FIRST_AND_NEXT_FRAME to manage a sequencewith start
-condition, address and data to transfer without a final stop condition
-allowing successive calls to HAL_I2C_Master_Sequential_Transmit_IT()
- HAL IRDA driver
- Add transfer abort functions and associated callbacks in interrupt mode
- HAL_IRDA_Abort(), HAL_IRDA_AbortTransmit(), HAL_IRDA_AbortReceive()
- HAL_IRDA_Abort_IT(), HAL_IRDA_AbortTransmit_IT(), HAL_IRDA_AbortReceive_IT()
- HAL_IRDA_AbortCpltCallback(), HAL_IRDA_AbortTransmitCpltCallback(), HAL_IRDA_AbortReceiveCpltCallback()
- IRQ Handler + DMA model optimizations
- HAL RTC driver
- Fix missing wakeup flag clear in HAL_RTCEx_SetWakeUpTimer_IT()
- HAL SMARTCARD driver
- Add transfer abort functions and associated callbacks in interrupt mode
- HAL_SMARTCARD_Abort(), HAL_SMARTCARD_AbortTransmit(), HAL_SMARTCARD_AbortReceive()
- HAL_SMARTCARD_Abort_IT(), HAL_SMARTCARD_AbortTransmit_IT(), HAL_SMARTCARD_AbortReceive_IT()
- HAL_SMARTCARD_AbortCpltCallback(), HAL_SMARTCARD_AbortTransmitCpltCallback(), HAL_SMARTCARD_AbortReceiveCpltCallback()
- IRQ Handler + DMA model optimizations
- HAL SMBUS driver
- Fix issue on last data reception in host or device modes
- HAL SPI driver
- USE_SPI_CRC
-compilation define added to provide the mean to optimize the HAL SPI
-driver when CRC feature is not used (when CRC is used, application must be changed to set USE_SPI_CRC in stm32l4xx_hal_conf.h (see Inc\stm32l4xx_hal_conf_template.h))
- Add transfer abort functions and associated callbacks in interrupt mode
- HAL_SPI_AbortCpltCallback()
- HAL SWPMI driver
- Fix SWPMI peripheral errors management in DMA (resort to HAL_DMA_Abort_IT() and DMA XferAbortCallback in HAL_SWPMI_IRQHandler())
- HAL UART driver
- New APIs to abort UART tranfer with associated callbacks added
- HAL_UART_Abort(),
-HAL_UART_AbortTransmit(), HAL_UART_AbortReceive(), HAL_UART_Abort_IT(),
-HAL_UART_AbortTransmit_IT(), HAL_UART_AbortReceive_IT(),
-HAL_UART_AbortCpltCallback(), HAL_UART_AbortTransmitCpltCallback() and
-HAL_UART_AbortReceiveCpltCallback()
- HAL USART driver
- New APIs to abort USART tranfer with associated callbacks added
- HAL_USART_Abort(), HAL_USART_Abort_IT() and HAL_USART_AbortCpltCallback()
LL Drivers
-changes
-- LL COMP driver
- Fix LL_COMP_INPUT_PLUS_IO3 definition
V1.5.1
-/ 31-May-2016
-HAL Drivers changes
-- HAL ADC driver
- Bypass multimode assert_param macro calls depending on configuration
- HAL CRC driver
-
- HAL_CRC_DeInit() resets CRC_IDR
-register to reset value
LL Drivers
-changes
-- LL BUS driver
-
- LL_APB1_GRP1_PERIPH_USBFS
-renamed to LL_APB1_GRP1_PERIPH_USB
- - LL SYSTEM driver
-
- Fix typo on
-LL_DBGMCU_APB1_xxx and LL_DBGMCU_APB2_xxx
-V1.5.0
-/ 29-April-2016
-Main
-Changes
-- Maintenance Release of HAL and Low Layer drivers
- HAL Drivers changes
-
-
-- Enhance HAL delay and timebase implementation
- Add
-new driver
-stm32l4xx_hal_timebase_tim_template.c which overrides the native HAL
-time base functions (defined as weak) to use the TIM peripheral as time
-base tick source. For more details about the usage of this driver, please refer to
-HAL\HAL_TimeBase example and FreeRTOS-based applications
- The following changes done on the HAL drivers require an update on the application code based on HAL V1.4.0
- To
-use PLLSAI1 and PLLSAI2 indidependently from main system PLL, PLLSAI1
-& PLLSAI2 initialization enriched to add PLL entry clock source and
-divider M
- RCC_PLLSAI1InitTypeDef includes PLLSAI1Source and PLLSAI1M new fields
- RCC_PLLSAI2InitTypeDef includes PLLSAI2Source and PLLSAI2M new fields
- Add missing RTC clock source definition RCC_RTCCLKSOURCE_NO_CLK
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)
- All macros __HAL_RCC_DFSDM_xxx() renamed to __HAL_RCC_DFSDM1_xxx()
- DfsdmClockSelection field of RCC_PeriphCLKInitTypeDef renamed to Dfsdm1ClockSelection
- RCC_PERIPHCLK_DFSDM renamed to RCC_PERIPHCLK_DFSDM1
- RCC_DFSDMCLKSOURCE_PCLK renamed to RCC_DFSDM1CLKSOURCE_PCLK
- RCC_DFSDMCLKSOURCE_SYSCLK renamed to RCC_DFSDM1CLKSOURCE_SYSCLK
- __HAL_RCC_DFSDM_CONFIG() renamed to __HAL_RCC_DFSDM1_CONFIG()
- __HAL_RCC_GET_DFSDM_SOURCE() renamed to __HAL_RCC_GET_DFSDM1_SOURCE()
- Add missing RTC clock source definition RCC_RTCCLKSOURCE_NO_CLK
- HAL I2C driver
- Update to avoid waiting on STOPF/BTF/AF flag under DMA ISR by using
-the PPP end of transfer interrupt in the DMA transfer process. This requires the following
-updates on user application:
- Configure and enable the I2Cx IRQ in HAL_I2C_MspInit() function
- In stm32l4xx_it.c file, I2Cx_IRQHandler() function: add a
-call to HAL_I2C_IRQHandler() function
- HAL UART/USART drivers
- IRQ Handler global optimization
- Add error management in case of DMA transfer through
- HAL_DMA_Abort_IT() and DMA XferAbortCallback()
- Polling management update:
- The user Timeout value must be estimated for the overall process
-duration
- HAL IRDA/SMARTCARD drivers
- Polling management update:
- The user Timeout value must be estimated for the overall process
-duration
- HAL SPI driver
- Add SPI error management during DMA process: this requires the following updates in the user
- application:
- Configure and enable the SPIx IRQ in
- HAL_SPI_MspInit() function
- In stm32l4xx_it.c file, SPIx_IRQHandler()
- function: add a call to HAL_SPI_IRQHandler() function
-
-
-Add and customize the
-Error Callback API: HAL_SPI_ErrorCallback()
- HAL QSPI driver
- Add QSPI error management during DMA process
- Improve the DMA transmit process by using QSPI TC interrupt instead of
-waiting on TC flag under DMA ISR.
- These two improvements require the following updates on user
-application:
- Configure and enable the QSPI IRQ in HAL_QSPI_MspInit() function
- In stm32l4xx_it.c file, QSPI_IRQHandler() function: add a
-call to HAL_QSPI_IRQHandler() function
- Add and customize the Error Callback API: HAL_QSPI_ErrorCallback()
- Add the management of non-blocking transfer abort
-service: HAL_QSPI_Abort_IT(). In this case the user must:
- Add new callback HAL_QSPI_AbortCpltCallback()
- to inform user at the end of abort process
- A new value of State in
-the HAL_QSPI_StateTypeDef provides the current state during the abort phase
-
-- Polling management update:
- The user Timeout value must be estimated for the overall process
-duration
- Fix wrong data size management in HAL_QSPI_Receive_DMA()
- New API HAL_QSPI_SetFifoThreshold() and HAL_QSPI_GetFifoThreshold()
- HAL IWDG driver
- New simplified HAL IWDG driver: remove HAL_IWDG_Start(), HAL_IWDG_MspInit()
-and HAL_IWDG_GetState() APIs
- API functions are:
- HAL_IWDG_Init(): this function insures the configuration and the start of the IWDG
-counter
- HAL_IWDG_Refresh(): this function insures the reload of the IWDG counter
- Refer to the following example to identify the changes: IWDG_Example
- HAL WWDG driver
- New simplified HAL WWDG driver: remove HAL_WWDG_Start(), HAL_WWDG_Start_IT(), HAL_WWDG_MspDeInit()
-and HAL_WWDG_GetState() APIs
- Update HAL_WWDG_Refresh() API to remove counter parameter
- New field EWIMode in WWDG_InitTypeDef to specify need for Early Wakeup Interrupt
- API
-functions are: HAL_WWDG_Init(), HAL_WWDG_MspInit(), HAL_WWDG_Refresh(),
-HAL_WWDG_IRQHandler() and HAL_WWDG_EarlyWakeupCallback()
- HAL DMA driver
- Global driver code optimization to reduce memory footprint
- New APIs HAL_DMA_RegisterCallback() and HAL_DMA_UnRegisterCallback() to register/unregister the different possible callbacks identified by enum typedef HAL_DMA_CallbackIDTypeDef
- New API HAL_DMA_Abort_IT() to abort DMA transfer in non-blocking mode for interrupt context
- The new registered Abort callback is called when DMA transfer abortion is completed
- Add new Error Codes: HAL_DMA_ERROR_NO_XFER and
-HAL_DMA_ERROR_NOT_SUPPORTED
- Add __HAL_DMA_GET_COUNTER() macro
- HAL COMP driver
- EXTI
-configuration done in HAL_COMP_Init() based on TriggerMode field of
-COMP_InitTypeDef structure; HAL_COMP_Start()/HAL_COMP_Stop() APIs are sufficient to start and stop comparators (HAL_COMP_Start_IT() and HAL_COMP_Stop_IT() are preserved for
-legacy compatibility)
- Add comparator startup time and scaler bridge stabilization time in HAL_COMP_Init()
- Fix to call HAL_COMP_TriggerCallback() only once when the 2 comparators are configured in window mode
- Inverting & Non-inverting inputs renaming (previous definitions preserved for legacy compatibility)
- COMP_INVERTING_xxx definitions renamed to COMP_INPUT_MINUS_xxx
- COMP_NONINVERTING_xxx definitions renamed to COMP_INPUT_PLUS_xxx
- Blanking sources renaming to highlight Comparator & Timer instances connections (previous definitions preserved for legacy compatibility)
- COMP_BLANKINGSRCE_TIM1OC5 renamed to COMP_BLANKINGSRC_TIM1_OC5_COMP1
- COMP_BLANKINGSRCE_TIM2OC3 renamed to COMP_BLANKINGSRC_TIM2_OC3_COMP1
- COMP_BLANKINGSRCE_TIM3OC3 renamed to COMP_BLANKINGSRC_TIM3_OC3_COMP1
- COMP_BLANKINGSRCE_TIM3OC4 renamed to COMP_BLANKINGSRC_TIM3_OC4_COMP2
- COMP_BLANKINGSRCE_TIM8OC5 renamed to COMP_BLANKINGSRC_TIM8_OC5_COMP2
- COMP_BLANKINGSRCE_TIM15OC1 renamed to COMP_BLANKINGSRC_TIM15_OC1_COMP2
- COMP_BLANKINGSRCE_NONE renamed to COMP_BLANKINGSRC_NONE
- HAL CRYP driver
- Software workaround for AES issue on GCM encryption with payload length not a multiple of 128 bits
- Add support of payload length not multiple of 32 bits
- HAL GPIO driver
- Add missing GPIO_AF6_COMP1 for STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)
- GPIO_AF6_DFSDM renamed to GPIO_AF6_DFSDM1
- HAL HCD driver
- Clear NACK flag before re-enabling the channel for new IN request
- HAL PCD driver
- Host mode
- Use HCLK frequency to set TRDT value
- Device mode
- Force suspend and low-power mode before going to L1 state
- Unmask Start Of Frame interrupt
- HAL TIM driver
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)
- TIM_BREAKINPUTSOURCE_DFSDM renamed to TIM_BREAKINPUTSOURCE_DFSDM1
- HAL SAI driver
- Update
- HAL_SAI_IRQHandler:
- Add error management in case of DMA transfer through
- HAL_DMA_Abort_IT() and DMA XferAbortCallback()
- HAL SWPMI driver
- Update initialization sequence in voltage class B
-LL Drivers changes - LL ADC driver
- Fix injected conversion configuration with SW start in LL_ADC_INJ_ConfigQueueContext()
- LL BUS driver
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)
- LL_APB2_GRP1_PERIPH_DFSDM renamed to LL_APB2_GRP1_PERIPH_DFSDM1
- LL COMP driver
- Window mode renaming to highlight Comparator instances connection (previous definitions preserved for legacy compatibility)
- LL_COMP_WINDOWMODE_ENABLE renamed to LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
- Blanking sources renaming to highlight Comparator & Timer instances connections (previous definitions preserved for legacy compatibility)
- LL_COMP_BLANKINGSRCE_TIM1OC5 renamed to LL_COMP_BLANKINGSRC_TIM1_OC5_COMP1
- LL_COMP_BLANKINGSRCE_TIM2OC3 renamed to LL_COMP_BLANKINGSRC_TIM2_OC3_COMP1
- LL_COMP_BLANKINGSRCE_TIM3OC3 renamed to LL_COMP_BLANKINGSRC_TIM3_OC3_COMP1
- LL_COMP_BLANKINGSRCE_TIM3OC4 renamed to LL_COMP_BLANKINGSRC_TIM3_OC4_COMP2
- LL_COMP_BLANKINGSRCE_TIM8OC5 renamed to LL_COMP_BLANKINGSRC_TIM8_OC5_COMP2
- LL_COMP_BLANKINGSRCE_TIM15OC1 renamed to LL_COMP_BLANKINGSRC_TIM15_OC1_COMP2
- LL I2C driver
- Add SMBus feature support
- LL_I2C_InitTypeDef structure enriched with new PeripheralMode field to indicate I2C or SMBus modes
- New
-APIs LL_I2C_EnableSMBusAlert(), LL_I2C_DisableSMBusAlert(),
-LL_I2C_IsEnabledSMBusAlert(), LL_I2C_EnableSMBusPEC(),
-LL_I2C_DisableSMBusPEC(), LL_I2C_IsEnabledSMBusPEC(),
-LL_I2C_ConfigSMBusTimeout(), LL_I2C_EnableSMBusTimeout(), LL_I2C_DisableSMBusTimeout(), LL_I2C_IsEnabledSMBusTimeout(), LL_I2C_SetSMBusTimeoutA(), LL_I2C_GetSMBusTimeoutA(), LL_I2C_SetSMBusTimeoutAMode(), LL_I2C_GetSMBusTimeoutAMode(), LL_I2C_SetSMBusTimeoutB(),
-LL_I2C_GetSMBusTimeoutB(), LL_I2C_SetSMBusTimeoutBMode(),
-LL_I2C_GetSMBusTimeoutBMode(), LL_I2C_IsActiveSMBusFlag_PECERR(), LL_I2C_IsActiveSMBusFlag_TIMEOUT(),
-LL_I2C_IsActiveSMBusFlag_ALERT(), LL_I2C_ClearSMBusFlag_PECERR(),
-LL_I2C_ClearSMBusFlag_TIMEOUT(), LL_I2C_ClearSMBusFlag_ALERT(),
-LL_I2C_EnableSMBusPECCompare(), LL_I2C_IsEnabledSMBusPECCompare() and
-LL_I2C_GetSMBusPEC()
- New APIs LL_I2C_SetMode() and LL_I2C_GetMode()
- New APIs LL_I2C_EnableAutoEndMode(), LL_I2C_DisableAutoEndMode() and LL_I2C_IsEnabledAutoEndMode()
- New APIs LL_I2C_EnableReloadMode(), LL_I2C_DisableReloadMode() and LL_I2C_IsEnabledReloadMode()
- New APIs LL_I2C_EnableSlaveByteControl(), LL_I2C_DisableSlaveByteControl() and LL_I2C_IsEnabledSlaveByteControl()
- New APIs LL_I2C_SetTransferRequest(), LL_I2C_GetTransferRequest(), LL_I2C_SetSlaveAddr() and LL_I2C_GetSlaveAdd()
- New APIs LL_I2C_SetTransferSize() and LL_I2C_GetTransferSize()
- New APIs LL_I2C_GenerateStopCondition(), LL_I2C_GenerateStartCondition()
- New APIs LL_I2C_EnableAuto10BitRead(), LL_I2C_DisableAuto10BitRead() and LL_I2C_IsEnabledAuto10BitRead()
- LL PWR driver
- New APIs LL_PWR_EnterLowPowerRunMode() and LL_PWR_ExitLowPowerRunMode()
- LL RCC driver
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)
- LL_RCC_DFSDM_CLKSOURCE renamed to LL_RCC_DFSDM1_CLKSOURCE
- LL_RCC_DFSDM_CLKSOURCE_PCLK renamed to LL_RCC_DFSDM1_CLKSOURCE_PCLK
- LL_RCC_DFSDM_CLKSOURCE_SYSCLK renamed to LL_RCC_DFSDM1_CLKSOURCE_SYSCLK
- LL SYSTEM driver
- New API LL_FLASH_IsPrefetchEnabled()
- LL TIM driver
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)
- LL_TIM_BKIN_SOURCE_DFBK renamed to LL_TIM_BKIN_SOURCE_DF1BK
- New OCRef clear input selection definitions LL_TIM_OCREF_CLR_INT_NC and LL_TIM_OCREF_CLR_INT_ETR
- New OCRef clear API LL_TIM_SetOCRefClearInputSource()
V1.4.0
-/ 26-February-2016
-Main
-Changes
-- Release of HAL and Low Layer drivers to add support of STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/ STM32L443xx devices
-- Low Layer driver initialization/de-initialization APIs applicable to all STM32L4xx devices
- CRS peripheral implemented as an extension of HAL RCC (HAL_RCCEx_CRS_xxxx() APIs)
- Superset features device STM32L443xx API User Manual available (STM32L443xx_User_Manual.chm)
HAL Drivers changes
-- HAL generic update
- Add default HSI48_VALUE in stm32l4xx_hal_conf_template
- HAL CRYP update
- New error code HAL_CRYP_BUSY_ERROR to reject new request while ongoing processing
- HAL IRDA/SMARTCARD/UART/USART update
- Improvement of baud rate computation at initialization
-LL Drivers changes - New C files requiring to use USE_FULL_LL_DRIVER compilation switch in user project to benefit from new APIs
- LL BUS update
- Add read-back register on clock enable functions to take into account any delay on bus
- LL ADC update
- Trigger sources renaming:
- LL_ADC_REG_TRIG_SW_START renamed to LL_ADC_REG_TRIG_SOFTWARE
- LL_ADC_REG_TRIG_EXT_TIMx_CCy renamed to LL_ADC_REG_TRIG_EXT_TIMx_CHy
- LL_ADC_INJ_TRIG_SW_START renamed to LL_ADC_INJ_TRIG_SOFTWARE
- LL_ADC_INJ_TRIG_EXT_TIMx_CCy renamed to LL_ADC_INJ_TRIG_EXT_TIMx_CHy
- Oversamping data shift renaming:
- LL_ADC_OVS_DATA_SHIFT_NONE renamed to LL_ADC_OVS_SHIFT_NONE
- LL_ADC_OVS_DATA_SHIFT_xxx renamed to LL_ADC_OVS_SHIFT_xxx
- LL DAC update
- Trigger sources renaming:
- LL_DAC_TRIGGER_SOFTWARE renamed to LL_DAC_TRIG_SOFTWARE
- LL_DAC_TRIGGER_TIMx_TRGO renamed to LL_DAC_TRIG_EXT_TIMx_TRGO
- LL_DAC_TRIGGER_EXT_IT9 renamed to LL_DAC_TRIG_EXT_EXTI_LINE9
- LL LPUART update
- Improvement of LPUARTDIV value in baud rate computation in __LL_LPUART_DIV() macro
- LL USART update
- Improvement of USARTDIV value in baud rate computation in __LL_USART_DIV_SAMPLING8() and __LL_USART_DIV_SAMPLING16() macros
V1.3.0
-/ 29-January-2016
-Main
-Changes
-- New Low Layer driver initialization/de-initialization APIs
- Naming rule is LL_PPP_Init(), LL_PPP_StructInit(), LL_PPP_DeInit()
-and more initialization APIs when applicable for peripheral PPP:
-ADC, COMP, CRC, DAC, DMA, EXTI, GPIO, I2C, LPTIM, LPUART, OPAMP, PWR,
-RCC, RNG, RTC, SPI, SWPMI, TIM and USART.
- New C files requiring to use USE_FULL_LL_DRIVER compilation switch in user project to benefit from new APIs
- stm32l4xx_ll_adc.c, stm32l4xx_ll_comp.c, stm32l4xx_ll_crc.c, stm32l4xx_ll_dac.c, stm32l4xx_ll_dma.c, stm32l4xx_ll_exti.c, stm32l4xx_ll_gpio.c, stm32l4xx_ll_i2c.c, stm32l4xx_ll_lptim.c, stm32l4xx_ll_lpuart.c, stm32l4xx_ll_opamp.c, stm32l4xx_ll_pwr.c, stm32l4xx_ll_rcc.c, stm32l4xx_ll_rng.c, stm32l4xx_ll_rtc.c, stm32l4xx_ll_spi.c, stm32l4xx_ll_swpmi.c, stm32l4xx_ll_tim.c and stm32l4xx_ll_usart.c
- stm32l4xx_ll_utils.c contains some Low Layer utilities for SysTick, Flash latency and clock configuration.
- Fix "parameter unused" GCC compilation warnings on __weak functions
HAL Drivers changes
-- HAL generic update
- Declare uwTick as global variable to allow weak HAL_IncTick() API updates in user application
- Add new API HAL_SYSCFG_EnableIOAnalogSwitchBooster() and HAL_SYSCFG_DisableIOAnalogSwitchBooster()
- HAL COMP update
- Allow comparator lock from the reset state with HAL_COMP_Lock()
- HAL CRYP update
- Fix state issue to resume AES calculations
- HAL DMA update
- Fix state issue after DMA transfer error
- HAL FLASH update
- Fix __HAL_FLASH_INSTRUCTION_CACHE_RESET() and __HAL_FLASH_DATA_CACHE_RESET() to allow multiple resets
- HAL I2C update
- Add support of repeated start feature with the following new APIs
- HAL_I2C_Master_Sequential_Transmit_IT(), HAL_I2C_Master_Sequential_Receive_IT() and HAL_I2C_Master_Abort_IT(),
- HAL_I2C_Slave_Sequential_Transmit_IT() and HAL_I2C_Slave_Sequential_Receive_IT()
- HAL_I2C_EnableListen_IT() and HAL_I2C_DisableListen_IT()
- New user callbacks HAL_I2C_ListenCpltCallback() and HAL_I2C_AddrCallback()
- Fix acknowledge failure error management (STOP being automatically generated)
- Review
-state machine and provide new API HAL_I2C_GetMode() to return
-HAL_I2C_MODE_MASTER, HAL_I2C_MODE_SLAVE or HAL_I2C_MODE_NONE
- HAL IRDA update
- Add missing IRDA_CLEAR_IDLEF definition for IDLE flag clear with __HAL_IRDA_CLEAR_FLAG()
- HAL SD update
- Fix SD card capacity calculation for cards with capacity over 4GB in HAL_SD_Get_CardInfo()
- HAL SMARTCARD update
- Add missing SMARTCARD_STOPBITS_0_5 definition for frame with 0.5 stop bit
- HAL SMARTCARD guardtime correction to not expect a minimum of 12 etu
- HAL UART update
- Add missing UART_STOPBITS_0_5 definition for frame with 0.5 stop bit
- RX Buffer flush request should not be called at each RXNE processing
- Fix wrong macro used in assert_param in HAL_LIN_SendBreak()
- HAL USART update
- Add missing USART_STOPBITS_0_5 definition for frame with 0.5 stop bit
LL Drivers changes
-- LL UTILS update (user code impacted !)
- Move the following functions declaration from stm32l4xx_ll_utils.h to stm32l4xx_ll_utils.c file
- LL_mDelay(), LL_Init1msTick() and LL_SetSystemCoreClock()
- LL ADC update
- FLAG & IT definition name change
- LL COMP update
- Rename InputInverting and InputNonInverting APIs
- LL_COMP_Set{/Get}InputNonInverting() renamed to LL_COMP_Set{/Get}InputMinus
- LL_COMP_Set{/Get}InputInverting() renamed to LL_COMP_Set{/Get}InputPlus
- Remove LL_COMP_SetWindowMode() and LL_COMP_GetWindowMode()
- LL DMA update
- Add helper macro __LL_DMA_GET_CHANNEL_INSTANCE()
- LL GPIO update
- Fix definition LL_GPIO_OUTPUT_OPENDRAIN
- Add
-the explicit possible values in the API description of
-LL_GPIO_GetPinMode(), LL_GPIO_GetPinOutputType(),
-LL_GPIO_GetPinSpeed(), LL_GPIO_GetPinPull(), LL_GPIO_GetAFPin_0_7() and
-LL_GPIO_GetAFPin_8_15()
- Add
-GPIO speed definitions LL_GPIO_SPEED_FREQ_LOW,
-LL_GPIO_SPEED_FREQ_MEDIUM, LL_GPIO_SPEED_FREQ_HIGH and
-LL_GPIO_SPEED_FREQ_VERY_HIGH to align with HAL GPIO
- LL I2C update
- Add missing function LL_I2C_ConfigFilters() to configure noise filters
- LL LPTIM update
- Add missing functions
- LL_LPTIM_IsEnabled()
- LL_LPTIM_SetWaveform()
- LL_LPTIM_SetPolarity()
- LL OPAMP update
- Rename power range APIs
- LL_OPAMP_Get{/Set}PowerRange() renamed to LL_OPAMP_Get{/Set}CommonPowerRange()
- LL SPI update
- Fix LL_SPI_IsEnabled(), LL_SPI_IsEnabledCRC() and LL_SPI_IsEnabledNSSPulse()
- Remove
-LL_SPI_Set{/Get}HalfDuplexDirection() functions: this is managed with
-TransferDirection parameter in LL_SPI_Set{/Get}TransferDirection()
- LL SWPMI update
- Add missing function LL_SWPMI_IsActivated()
- LL TIM update
- LL_TIM_CC_IsEnabledChannel()
- LL_TIM_OC_IsEnabledFast(), LL_TIM_OC_IsEnabledPreload() and LL_TIM_OC_IsEnabledClear()
- LL_TIM_IsEnabledMasterSlaveMode()
- LL_TIM_EnableExternalClock(), LL_TIM_DisableExternalClock() and LL_TIM_IsEnabledExternalClock()
- LL USART update
- Add LL_USART_STOPBITS_0_5 definition for usage in LL_USART_Set{/Get}StopBitsLength() and LL_USART_ConfigCharacter()
V1.2.0
-/ 25-November-2015
-Main
-Changes
-- HAL generic update
- Reduce default HSE startup timeout value to 100ms in Inc\stm32l4xx_hal_conf_template.h file
- HAL PWR update (User application code impacted)
- Stop 1 with main regulator renamed into Stop 0, to be aligned with latest version of Reference Manual
- Change HAL_PWREx_EnterSTOP1Mode(uint32_t Regulator, uint8_t STOPEntry) into HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry)
- Application code using HAL_PWREx_EnterSTOP1Mode(PWR_LOWPOWERREGULATOR_ON, STOPEntry) must be updated to use HAL_PWREx_EnterSTOP1Mode(STOPEntry)
- Add new API HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry)
- Application code using HAL_PWREx_EnterSTOP1Mode(PWR_MAINREGULATOR_ON, STOPEntry) must be updated to use HAL_PWREx_EnterSTOP0Mode(STOPEntry)
- HAL OPAMP update
- Provide capability to run calibration despite PGA mode by switching temporary to standalone mode
- HAL SAI update
- Update SAI block synchronization selection (User application code impacted)
- Replace uncomplete SAI_SYNCHRONOUS_EXT value for with SAI_SYNCHRONOUS_EXT_SAI1 and SAI_SYNCHRONOUS_EXT_SAI2
- Update external synchronization input selection (User application code impacted)
- Remove useless SAI_SYNCEXT_IN_ENABLE value for SynchroExt field in SAI_InitTypeDef structure
- Add support of 24bits configuration in PCM protocol
- Add codec not ready interrupt management
- Fix computation of data size, frame length, active frame length, slot size and first bit offset in I2S protocol
- Fix mute counter setting in HAL_SAI_EnableRxMuteMode()
- Fix
-ambiguous clock strobing values: fix HAL_SAI_Init() to set correct
-CKSTR bits in SAI_xCR1 according to ClockStrobing and AudioMode
-parameters
- Fill in the Fifo before enable interrupt in HAL_SAI_Transmit_IT()
- Fix assert on active slot selection in HAL_SAI_Init()
- Fix companding mode management in HAL_SAI_Init()
- HAL TSC update
- Improve IODefault state management
- HAL NOR/HAL SRAM/FMC update
- WriteFifo field of FMC_NORSRAM_InitTypeDef structure is not applicable on STM32L47x/STM32L48x devices
- LL PWR update (User application code impacted)
- LL PWR API change to add new Stop 0 mode and update Stop 1 mode definition
- Change LL_PWR_SetPowerMode(uint32_t LowPowerMode) possible LowPowerMode values update
- LL_PWR_MODE_STOP1_LP_REGU renamed into LL_PWR_MODE_STOP1
- Application code using LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1_LP_REGU) must be updated to use LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1)
- LL_PWR_MODE_STOP1_MAIN_REGU renamed into LL_PWR_MODE_STOP0
- Application code using LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1_MAIN_REGU) must be updated to use LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0)
V1.1.1
-/ 16-October-2015
-Main
-Changes
-- HAL generic update
- Fine
-tuning of Inc\stm32l4xx_hal_conf_template.h file to keep Flash prefetch
-off as default system configuration (PREFETCH_ENABLE set to 0)
- HAL TIM update
- Removed
-useless assert_param() macro check on input parameters in
-HAL_TIM_OC_ConfigChannel(), HAL_TIM_PWM_ConfigChannel() and
-HAL_TIM_ConfigClockSource(),
- LL ADC update
- Fix LL_ADC_GetAnalogWDMonitChannels() for AWD2 and AWD3
- LL RCC update
- Add new API LL_RCC_LSE_DisableCSS()
- LL UTILS update
V1.1.0
-/ 16-September-2015
-Main
-Changes
-- Add Low Layer drivers allowing performance and footprint optimization
- Low
-Layer drivers APIs provide register level programming: they require
-deep knowledge of peripherals described in STM32L4x6 Reference Manual
- Low
-Layer drivers are available for: ADC, COMP, Cortex, CRC, DAC, DMA,
-EXTI, GPIO, I2C, IWDG, LPYIM, LPUART, OPAMP, PWR, RCC, RNG, RTC, SPI,
-SWPMI, TIM, USART, WWDG peripherals and additionnal Low Level Bus,
-System and Utilities APIs.
- Low Layer drivers APIs are implemented as static inline function in new Inc/stm32l4xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32l4xx_ll_ppp.h file must be included in user code.
- HAL ADC update
- Channel 5 is not usable for ADC3
- HAL CAN update
- Update HAL_CAN_IRQHandler() to clear ERRI bit prior to call HAL_CAN_ErrorCallback()
- HAL COMP update
- Update HAL_COMP_Init() for low power optimization in case of COMP_INVERTINGINPUT_VREFINT
- HAL CRC update
- Add new API HAL_CRYPEx_ProcessSuspend()
- HAL DMA update
- Update HAL_DMA_IRQHandler() to set HAL_DMA_ERROR_TE error bit in handle ErrorCode field
- HAL FLASH update
- Add option byte OB_USER_nRST_SHDW to be used with HAL_FLASHEx_OBProgram()
- HAL GPIO update
- Rename
-GPIO speed definitions to GPIO_SPEED_FREQ_LOW,
-GPIO_SPEED_FREQ_MEDIUM, GPIO_SPEED_FREQ_HIGH and
-GPIO_SPEED_FREQ_VERY_HIGH
- Fix macro __HAL_GPIO_EXTI_GENERATE_SWIT()
- HAL PWR update
- Fix HAL_PWR_DisableWakeUpPin() to clear only appropriate bits in PWR CR3 register
- Combination
-of GPIO pins possible in HAL_PWREx_EnableGPIOPullUp(),
-HAL_PWREx_DisableGPIOPullUp(), HAL_PWREx_EnableGPIOPullDown() and
-HAL_PWREx_DisableGPIOPullDown()
- HAL RCC update
- Add
-LSE Clock Security System (CSS) management with new APIs:
-HAL_RCCEx_EnableLSECSS_IT(), HAL_RCCEx_LSECSS_IRQHandler() and
-HAL_RCCEx_LSECSS_Callback()
- Add RCC_MCO1SOURCE_NOCLOCK to provide capability to disable MCO output in HAL_RCC_MCOConfig()
- Update
-HAL_RCC_OscConfig() and HAL_RCCEx_PeriphCLKConfig() to keep backup
-domain enabled when configuring respectively LSE and RTC clock
-source
- Update HAL_RCCEx_DisablePLLSAI1() and HAL_RCCEx_DisablePLLSAI2() to disable respectively PLLSAI1 and PLLSAI2 clock outputs
- Update HAL_RCCEx_GetPeriphCLKFreq() to return the frequency in Hz applied to peripherals via HAL_RCCEx_PeriphCLKConfig()
- Update HAL_RCC_DeInit() to set default MSI range
- Remove old workaround on LSE drive medium configuration values
- HAL SPI update
- Fix issue to receive CRC in RX 2 lines mode 8-bit dataSize and even buffer size.
- HAL TIM update
- Fix macro __HAL_TIM_SET_COMPARE()
- HAL UART update
- Remove enable of Error interrupt in HAL_UART_Transmit_IT()
V1.0.0
-/ 26-June-2015
-Main
-Changes
-- First official release of STM32L4xx HAL Drivers for STM32L471xx/STM32L475xx/ STM32L476xx/ STM32L485xx and STM32L486xx devices.
-License
-
- Redistribution
-and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
-
-- Redistributions
-of source code must retain the above copyright notice, this list of
-conditions and the following disclaimer.
-- Redistributions
-in binary form must reproduce the above copyright notice, this list of
-conditions and the following disclaimer in the
-documentation and/or other materials provided with the distribution.
-- Neither the
-name of STMicroelectronics nor the names of its contributors may be
-used to endorse or promote products derived
-
-
-
-from this software without specific prior written permission.
-
-THIS
-SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES,
-INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
-CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-THE POSSIBILITY OF SUCH DAMAGE.
-
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-For
-complete documentation on STM32 Microcontrollers visit www.st.com/STM32
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