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targets:MIMXRT1050: Add LPSPI4 support 

Add LPSPI4 PIN configurations.

Signed-off-by: fred.li <fred.li@arm.com>
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
pull/14323/head
Gavin Liu 2020-04-08 18:05:11 +08:00 committed by Arto Kinnunen
parent dbbdd0f077
commit 436f5ca8e7
2 changed files with 5 additions and 0 deletions
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1
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/TARGET_EVK/PeripheralNames.h
View File

@ -132,6 +132,7 @@ typedef enum {
SPI_1 = 1,
SPI_2 = 2,
SPI_3 = 3,
SPI_4 = 4,
} SPIName;
#ifdef __cplusplus

4
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/TARGET_EVK/PeripheralPins.c
View File

@ -64,24 +64,28 @@ const PinMap PinMap_UART_RX[] = {
const PinMap PinMap_SPI_SCLK[] = {
{GPIO_SD_B0_00, SPI_1, ((1U << DAISY_REG_VALUE_SHIFT) | (0x4F0 << DAISY_REG_SHIFT) | 4)},
{GPIO_AD_B0_00, SPI_3, ((0U << DAISY_REG_VALUE_SHIFT) | (0x510 << DAISY_REG_SHIFT) | 7)},
{GPIO_B0_03, SPI_4, ((0U << DAISY_REG_VALUE_SHIFT) | (0x520 << DAISY_REG_SHIFT) | 3)},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MOSI[] = {
{GPIO_SD_B0_02, SPI_1, ((1U << DAISY_REG_VALUE_SHIFT) | (0x4F8 << DAISY_REG_SHIFT) | 4)},
{GPIO_AD_B0_01, SPI_3, ((0U << DAISY_REG_VALUE_SHIFT) | (0x518 << DAISY_REG_SHIFT) | 7)},
{GPIO_B0_02, SPI_4, ((0U << DAISY_REG_VALUE_SHIFT) | (0x528 << DAISY_REG_SHIFT) | 3)},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MISO[] = {
{GPIO_SD_B0_03, SPI_1, ((1U << DAISY_REG_VALUE_SHIFT) | (0x4F4 << DAISY_REG_SHIFT) | 4)},
{GPIO_AD_B0_02, SPI_3, ((0U << DAISY_REG_VALUE_SHIFT) | (0x514 << DAISY_REG_SHIFT) | 7)},
{GPIO_B0_01, SPI_4, ((0U << DAISY_REG_VALUE_SHIFT) | (0x524 << DAISY_REG_SHIFT) | 3)},
{NC , NC , 0}
};
const PinMap PinMap_SPI_SSEL[] = {
{GPIO_SD_B0_01, SPI_1, ((0U << DAISY_REG_VALUE_SHIFT) | (0x4EC << DAISY_REG_SHIFT) | 4)},
{GPIO_AD_B0_03, SPI_3, ((0U << DAISY_REG_VALUE_SHIFT) | (0x50C << DAISY_REG_SHIFT) | 7)},
{GPIO_B0_00, SPI_4, ((0U << DAISY_REG_VALUE_SHIFT) | (0x51C << DAISY_REG_SHIFT) | 3)},
{NC , NC , 0}
};