mirror of https://github.com/ARMmbed/mbed-os.git
[M487] Refine SPI PDMA code
parent
a76d55a555
commit
422871ab4d
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@ -328,8 +328,10 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit->modname == obj->spi.spi);
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MBED_ASSERT(modinit->modname == obj->spi.spi);
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PDMA_T *pdma_base = dma_modbase();
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// Configure tx DMA
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// Configure tx DMA
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PDMA->CHCTL |= 1 << obj->spi.dma_chn_id_tx; // Enable this DMA channel
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pdma_base->CHCTL |= 1 << obj->spi.dma_chn_id_tx; // Enable this DMA channel
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PDMA_SetTransferMode(obj->spi.dma_chn_id_tx,
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PDMA_SetTransferMode(obj->spi.dma_chn_id_tx,
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((struct nu_spi_var *) modinit->var)->pdma_perp_tx, // Peripheral connected to this PDMA
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((struct nu_spi_var *) modinit->var)->pdma_perp_tx, // Peripheral connected to this PDMA
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0, // Scatter-gather disabled
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0, // Scatter-gather disabled
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@ -353,7 +355,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
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dma_set_handler(obj->spi.dma_chn_id_tx, (uint32_t) spi_dma_handler_tx, (uint32_t) obj, DMA_EVENT_ALL);
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dma_set_handler(obj->spi.dma_chn_id_tx, (uint32_t) spi_dma_handler_tx, (uint32_t) obj, DMA_EVENT_ALL);
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// Configure rx DMA
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// Configure rx DMA
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PDMA->CHCTL |= 1 << obj->spi.dma_chn_id_rx; // Enable this DMA channel
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pdma_base->CHCTL |= 1 << obj->spi.dma_chn_id_rx; // Enable this DMA channel
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PDMA_SetTransferMode(obj->spi.dma_chn_id_rx,
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PDMA_SetTransferMode(obj->spi.dma_chn_id_rx,
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((struct nu_spi_var *) modinit->var)->pdma_perp_rx, // Peripheral connected to this PDMA
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((struct nu_spi_var *) modinit->var)->pdma_perp_rx, // Peripheral connected to this PDMA
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0, // Scatter-gather disabled
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0, // Scatter-gather disabled
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@ -394,6 +396,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
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void spi_abort_asynch(spi_t *obj)
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void spi_abort_asynch(spi_t *obj)
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{
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{
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SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
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SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
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PDMA_T *pdma_base = dma_modbase();
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if (obj->spi.dma_usage != DMA_USAGE_NEVER) {
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if (obj->spi.dma_usage != DMA_USAGE_NEVER) {
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// Receive FIFO Overrun in case of tx length > rx length on DMA way
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// Receive FIFO Overrun in case of tx length > rx length on DMA way
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@ -402,18 +405,18 @@ void spi_abort_asynch(spi_t *obj)
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}
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}
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if (obj->spi.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
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if (obj->spi.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
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PDMA_DisableInt(obj->spi.dma_chn_id_tx, 0);
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PDMA_DisableInt(obj->spi.dma_chn_id_tx, PDMA_INT_TRANS_DONE);
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// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
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// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
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//PDMA_STOP(obj->spi.dma_chn_id_tx);
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//PDMA_STOP(obj->spi.dma_chn_id_tx);
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PDMA->CHCTL &= ~(1 << obj->spi.dma_chn_id_tx);
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pdma_base->CHCTL &= ~(1 << obj->spi.dma_chn_id_tx);
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}
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}
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SPI_DISABLE_TX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
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SPI_DISABLE_TX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
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if (obj->spi.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
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if (obj->spi.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
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PDMA_DisableInt(obj->spi.dma_chn_id_rx, 0);
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PDMA_DisableInt(obj->spi.dma_chn_id_rx, PDMA_INT_TRANS_DONE);
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// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
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// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
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//PDMA_STOP(obj->spi.dma_chn_id_rx);
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//PDMA_STOP(obj->spi.dma_chn_id_rx);
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PDMA->CHCTL &= ~(1 << obj->spi.dma_chn_id_rx);
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pdma_base->CHCTL &= ~(1 << obj->spi.dma_chn_id_rx);
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}
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}
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SPI_DISABLE_RX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
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SPI_DISABLE_RX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
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}
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}
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@ -786,6 +789,7 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
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/** Return FIFO depth of the SPI peripheral
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/** Return FIFO depth of the SPI peripheral
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*
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*
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* @details
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* @details
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* M487
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* SPI0 8
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* SPI0 8
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* SPI1/2/3/4 8 if data width <=16; 4 otherwise
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* SPI1/2/3/4 8 if data width <=16; 4 otherwise
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*/
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*/
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