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LPUART CLOCK SOURCE SELECTION LEFT TO SERIAL DRIVER. 

The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.

For targets L496 and L5.

Taking into account device TRNG in L5 configuration
pull/13929/head
reme 2020-11-10 15:57:38 +01:00
parent 6068428209
commit 41ed9239be
2 changed files with 3 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/system_clock.c
View File

@ -154,13 +154,6 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
} }
#endif /* DEVICE_USBDEVICE */ #endif /* DEVICE_USBDEVICE */
/* Select HSI as clock source for LPUART1 */
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
// Output clock on MCO1 pin(PA8) for debugging purpose // Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2 #if DEBUG_MCO == 2
if (bypass == 0) { if (bypass == 0) {
@ -224,13 +217,6 @@ uint8_t SetSysClock_PLL_HSI(void)
} }
#endif /* DEVICE_USBDEVICE */ #endif /* DEVICE_USBDEVICE */
/* Select HSI as clock source for LPUART1 */
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
// Output clock on MCO1 pin(PA8) for debugging purpose // Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3 #if DEBUG_MCO == 3
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
@ -303,13 +289,6 @@ uint8_t SetSysClock_PLL_MSI(void)
return 0; // FAIL return 0; // FAIL
} }
/* Select LSE as clock source for LPUART1 */
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
return 0; // FAIL
}
// Output clock on MCO1 pin(PA8) for debugging purpose // Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 4 #if DEBUG_MCO == 4
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz

10
targets/TARGET_STM/TARGET_STM32L5/system_clock.c
View File

@ -177,16 +177,12 @@ uint8_t SetSysClock_PLL_MSI(void)
return 0; // FAIL return 0; // FAIL
} }
// Default STDIO is LPUART1
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
#if DEVICE_TRNG #if DEVICE_TRNG
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_RNG; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48; PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
#else
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
#endif
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
#endif
return 1; // OK return 1; // OK
} }