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TARGET_STM USB astyle

pull/7351/head
jeromecoutant 2018-06-27 15:01:23 +02:00
parent 6391b7f2fa
commit 408209989e
8 changed files with 365 additions and 320 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
features/unsupported/USBDevice/targets/TARGET_STM/USBHAL_IP_DEVICE.h
View File

@ -42,8 +42,7 @@
#error "FIFO dimensioning incorrect"
#endif
typedef struct
{
typedef struct {
USBHAL *inst;
void (USBHAL::*bus_reset)(void);
@ -71,10 +70,10 @@ uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo)
return 1024;
}
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
uint32_t sofnum = (hpcd->Instance->FNR) & USB_FNR_FN;
void (USBHAL::*func)(int frame) = priv->sof;
(obj->*func)(sofnum);
@ -92,8 +91,9 @@ void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
USBHAL *USBHAL::instance;
USBHAL::USBHAL(void) {
USBHAL_Private_t *HALPriv = new(USBHAL_Private_t);
USBHAL::USBHAL(void)
{
USBHAL_Private_t *HALPriv = new (USBHAL_Private_t);
hpcd.Instance = USB;
@ -151,7 +151,7 @@ USBHAL::USBHAL(void) {
__HAL_RCC_SYSCFG_CLK_ENABLE();
// Configure PCD and FIFOs
hpcd.pData = (void*)HALPriv;
hpcd.pData = (void *)HALPriv;
hpcd.State = HAL_PCD_STATE_RESET;
HAL_PCD_Init(&hpcd);

19
features/unsupported/USBDevice/targets/TARGET_STM/USBHAL_IP_OTGFSHS.h
View File

@ -44,8 +44,7 @@
#error "FIFO dimensioning incorrect"
#endif
typedef struct
{
typedef struct {
USBHAL *inst;
void (USBHAL::*bus_reset)(void);
@ -71,17 +70,16 @@ uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo)
uint32_t len;
if (fifo == 0) {
len = hpcd->Instance->DIEPTXF0_HNPTXFSIZ >> 16;
}
else {
} else {
len = hpcd->Instance->DIEPTXF[fifo - 1] >> 16;
}
return len * 4;
}
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
uint32_t sofnum = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF) >> 8;
void (USBHAL::*func)(int frame) = priv->sof;
@ -90,8 +88,9 @@ void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
USBHAL *USBHAL::instance;
USBHAL::USBHAL(void) {
USBHAL_Private_t *HALPriv = new(USBHAL_Private_t);
USBHAL::USBHAL(void)
{
USBHAL_Private_t *HALPriv = new (USBHAL_Private_t);
memset(&hpcd.Init, 0, sizeof(hpcd.Init));
@ -215,7 +214,7 @@ USBHAL::USBHAL(void) {
__HAL_RCC_SYSCFG_CLK_ENABLE();
// Configure PCD and FIFOs
hpcd.pData = (void*)HALPriv;
hpcd.pData = (void *)HALPriv;
hpcd.State = HAL_PCD_STATE_RESET;
HAL_PCD_Init(&hpcd);

255
features/unsupported/USBDevice/targets/TARGET_STM/USBHAL_STM32.cpp
View File

@ -42,13 +42,13 @@
/* this call at device reception completion on a Out Enpoint */
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
uint8_t endpoint = ADDR_EPOUT(epnum);
priv->epComplete[endpoint] = 1;
/* -2 endpoint 0 In out are not in call back list */
if (epnum) {
bool (USBHAL::*func)(void) = priv->epCallback[endpoint-2];
bool (USBHAL::*func)(void) = priv->epCallback[endpoint - 2];
(obj->*func)();
} else {
void (USBHAL::*func)(void) = priv->ep0_out;
@ -59,13 +59,13 @@ void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
/* this is call at device transmission completion on In endpoint */
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
uint8_t endpoint = ADDR_EPIN(epnum);
priv->epComplete[endpoint] = 1;
/* -2 endpoint 0 In out are not in call back list */
if (epnum) {
bool (USBHAL::*func)(void) = priv->epCallback[endpoint-2];
bool (USBHAL::*func)(void) = priv->epCallback[endpoint - 2];
(obj->*func)();
} else {
void (USBHAL::*func)(void) = priv->ep0_in;
@ -75,158 +75,172 @@ void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
/* This is call at device set up reception */
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
void (USBHAL::*func)(void)=priv->ep0_setup;
void (USBHAL::*func1)(void)=priv->ep0_read;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
void (USBHAL::*func)(void) = priv->ep0_setup;
void (USBHAL::*func1)(void) = priv->ep0_read;
(obj->*func)();
(obj->*func1)();
}
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
void (USBHAL::*func)(unsigned int suspended) = priv->suspend_change;
(obj->*func)(1);
}
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
void (USBHAL::*func)(unsigned int suspended) = priv->suspend_change;
(obj->*func)(0);
}
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
void (USBHAL::*func)(unsigned int suspended) = priv->connect_change;
(obj->*func)(1);
}
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
void (USBHAL::*func)(unsigned int suspended) = priv->connect_change;
(obj->*func)(0);
}
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
{
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj= priv->inst;
USBHAL_Private_t *priv = ((USBHAL_Private_t *)(hpcd->pData));
USBHAL *obj = priv->inst;
unsigned int i;
for(i=0;i<hpcd->Init.dev_endpoints;i++) {
priv->epComplete[2*i]=0;
HAL_PCD_EP_Close(hpcd,EP_ADDR(2*i));
HAL_PCD_EP_Flush(hpcd,EP_ADDR(2*i));
priv->epComplete[2*i+1]=0;
HAL_PCD_EP_Close(hpcd,EP_ADDR(2*i+1));
HAL_PCD_EP_Flush(hpcd,EP_ADDR(2*i+1));
for (i = 0; i < hpcd->Init.dev_endpoints; i++) {
priv->epComplete[2 * i] = 0;
HAL_PCD_EP_Close(hpcd, EP_ADDR(2 * i));
HAL_PCD_EP_Flush(hpcd, EP_ADDR(2 * i));
priv->epComplete[2 * i + 1] = 0;
HAL_PCD_EP_Close(hpcd, EP_ADDR(2 * i + 1));
HAL_PCD_EP_Flush(hpcd, EP_ADDR(2 * i + 1));
}
void (USBHAL::*func)(void)=priv->bus_reset;
void (USBHAL::*func)(void) = priv->bus_reset;
bool (USBHAL::*ep_realise)(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) = priv->ep_realise;
(obj->*func)();
(obj->*ep_realise)(EP0IN, MAX_PACKET_SIZE_EP0,0);
(obj->*ep_realise)(EP0OUT, MAX_PACKET_SIZE_EP0,0);
(obj->*ep_realise)(EP0IN, MAX_PACKET_SIZE_EP0, 0);
(obj->*ep_realise)(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
}
/* hal pcd handler , used for STM32 HAL PCD Layer */
uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer)
{
return 0;
}
USBHAL::~USBHAL(void) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
HAL_PCD_DeInit(&hpcd);
delete HALPriv;
USBHAL::~USBHAL(void)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
HAL_PCD_DeInit(&hpcd);
delete HALPriv;
}
void USBHAL::connect(void) {
void USBHAL::connect(void)
{
NVIC_EnableIRQ(USBHAL_IRQn);
}
void USBHAL::disconnect(void) {
void USBHAL::disconnect(void)
{
NVIC_DisableIRQ(USBHAL_IRQn);
}
void USBHAL::configureDevice(void) {
void USBHAL::configureDevice(void)
{
// Not needed
}
void USBHAL::unconfigureDevice(void) {
void USBHAL::unconfigureDevice(void)
{
// Not needed
}
void USBHAL::setAddress(uint8_t address) {
HAL_PCD_SetAddress(&hpcd, address);
void USBHAL::setAddress(uint8_t address)
{
HAL_PCD_SetAddress(&hpcd, address);
EP0write(0, 0);
}
bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags)
{
uint32_t epIndex = EP_ADDR(endpoint);
uint32_t type;
uint32_t len;
HAL_StatusTypeDef ret;
switch (endpoint) {
case EP0IN:
case EP0OUT:
type = 0;
break;
case EPISO_IN:
case EPISO_OUT:
type = 1;
break;
case EPBULK_IN:
case EPBULK_OUT:
type = 2;
break;
case EPINT_IN:
case EPINT_OUT:
type = 3;
break;
case EP0IN:
case EP0OUT:
type = 0;
break;
case EPISO_IN:
case EPISO_OUT:
type = 1;
break;
case EPBULK_IN:
case EPBULK_OUT:
type = 2;
break;
case EPINT_IN:
case EPINT_OUT:
type = 3;
break;
}
if (maxPacket > MAXTRANSFER_SIZE) {
return false;
}
if (maxPacket > MAXTRANSFER_SIZE) return false;
if (epIndex & 0x80) {
len = HAL_PCDEx_GetTxFiFo(&hpcd,epIndex & 0x7f);
len = HAL_PCDEx_GetTxFiFo(&hpcd, epIndex & 0x7f);
MBED_ASSERT(len >= maxPacket);
}
ret = HAL_PCD_EP_Open(&hpcd, epIndex, maxPacket, type);
MBED_ASSERT(ret!=HAL_BUSY);
return (ret == HAL_OK) ? true:false;
MBED_ASSERT(ret != HAL_BUSY);
return (ret == HAL_OK) ? true : false;
}
// read setup packet
void USBHAL::EP0setup(uint8_t *buffer) {
void USBHAL::EP0setup(uint8_t *buffer)
{
memcpy(buffer, hpcd.Setup, MAX_PACKET_SIZE_SETUP);
memset(hpcd.Setup,0,MAX_PACKET_SIZE_SETUP);
memset(hpcd.Setup, 0, MAX_PACKET_SIZE_SETUP);
}
void USBHAL::EP0readStage(void) {
void USBHAL::EP0readStage(void)
{
}
void USBHAL::EP0read(void) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)hpcd.pData;
uint32_t epIndex = EP_ADDR(EP0OUT);
uint8_t *pBuf = (uint8_t *)HALPriv->pBufRx0;
HAL_StatusTypeDef ret;
HALPriv->epComplete[EP0OUT] = 2;
ret = HAL_PCD_EP_Receive(&hpcd, epIndex, pBuf, MAX_PACKET_SIZE_EP0 );
MBED_ASSERT(ret!=HAL_BUSY);
void USBHAL::EP0read(void)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)hpcd.pData;
uint32_t epIndex = EP_ADDR(EP0OUT);
uint8_t *pBuf = (uint8_t *)HALPriv->pBufRx0;
HAL_StatusTypeDef ret;
HALPriv->epComplete[EP0OUT] = 2;
ret = HAL_PCD_EP_Receive(&hpcd, epIndex, pBuf, MAX_PACKET_SIZE_EP0);
MBED_ASSERT(ret != HAL_BUSY);
}
uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)hpcd.pData;
uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)hpcd.pData;
uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, 0);
HALPriv->epComplete[EP0OUT] = 0;
HALPriv->epComplete[EP0OUT] = 0;
if (length) {
uint8_t *buff = (uint8_t *)HALPriv->pBufRx0;
memcpy(buffer, buff, length);
@ -234,97 +248,114 @@ uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
return length;
}
void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
{
/* check that endpoint maximum size is not exceeding TX fifo */
MBED_ASSERT(hpcd.IN_ep[0].maxpacket >= size);
endpointWrite(EP0IN, buffer, size);
}
void USBHAL::EP0getWriteResult(void) {
void USBHAL::EP0getWriteResult(void)
{
}
void USBHAL::EP0stall(void) {
void USBHAL::EP0stall(void)
{
stallEndpoint(EP0IN);
}
EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
uint32_t epIndex = EP_ADDR(endpoint);
uint8_t* pBuf = (uint8_t *)HALPriv->pBufRx;
HAL_StatusTypeDef ret;
uint8_t *pBuf = (uint8_t *)HALPriv->pBufRx;
HAL_StatusTypeDef ret;
// clean reception end flag before requesting reception
HALPriv->epComplete[endpoint] = 2;
ret = HAL_PCD_EP_Receive(&hpcd, epIndex, pBuf, maximumSize);
MBED_ASSERT(ret!=HAL_BUSY);
MBED_ASSERT(ret != HAL_BUSY);
return EP_PENDING;
}
EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
if (HALPriv->epComplete[endpoint]==0) {
/* no reception possible !!! */
bytesRead = 0;
EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *buffer, uint32_t *bytesRead)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
if (HALPriv->epComplete[endpoint] == 0) {
/* no reception possible !!! */
bytesRead = 0;
return EP_COMPLETED;
}else if ((HALPriv->epComplete[endpoint]!=1))
return EP_PENDING;
} else if ((HALPriv->epComplete[endpoint] != 1)) {
return EP_PENDING;
}
uint32_t epIndex = EP_ADDR(endpoint);
uint8_t *buff = (uint8_t *)HALPriv->pBufRx;
uint32_t length = (uint32_t) HAL_PCD_EP_GetRxCount(&hpcd, epIndex);
memcpy(buffer, buff, length);
*bytesRead = length;
HALPriv->epComplete[endpoint]= 0;
HALPriv->epComplete[endpoint] = 0;
return EP_COMPLETED;
}
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
uint32_t epIndex = EP_ADDR(endpoint);
HAL_StatusTypeDef ret;
// clean transmission end flag before requesting transmission
HALPriv->epComplete[endpoint] = 2;
ret = HAL_PCD_EP_Transmit(&hpcd, epIndex, data, size);
MBED_ASSERT(ret!=HAL_BUSY);
MBED_ASSERT(ret != HAL_BUSY);
// update the status
if (ret != HAL_OK) return EP_INVALID;
if (ret != HAL_OK) {
return EP_INVALID;
}
// fix me return is too simple
return EP_PENDING;
}
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
if (HALPriv->epComplete[endpoint] == 1)
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
if (HALPriv->epComplete[endpoint] == 1) {
return EP_COMPLETED;
}
return EP_PENDING;
}
void USBHAL::stallEndpoint(uint8_t endpoint) {
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
HAL_StatusTypeDef ret;
HALPriv->epComplete[endpoint] = 0;
ret = HAL_PCD_EP_SetStall(&hpcd, EP_ADDR(endpoint));
MBED_ASSERT(ret!=HAL_BUSY);
void USBHAL::stallEndpoint(uint8_t endpoint)
{
USBHAL_Private_t *HALPriv = (USBHAL_Private_t *)(hpcd.pData);
HAL_StatusTypeDef ret;
HALPriv->epComplete[endpoint] = 0;
ret = HAL_PCD_EP_SetStall(&hpcd, EP_ADDR(endpoint));
MBED_ASSERT(ret != HAL_BUSY);
}
void USBHAL::unstallEndpoint(uint8_t endpoint) {
HAL_StatusTypeDef ret;
void USBHAL::unstallEndpoint(uint8_t endpoint)
{
HAL_StatusTypeDef ret;
ret = HAL_PCD_EP_ClrStall(&hpcd, EP_ADDR(endpoint));
MBED_ASSERT(ret!=HAL_BUSY);
MBED_ASSERT(ret != HAL_BUSY);
}
bool USBHAL::getEndpointStallState(uint8_t endpoint) {
bool USBHAL::getEndpointStallState(uint8_t endpoint)
{
return false;
}
void USBHAL::remoteWakeup(void) {
void USBHAL::remoteWakeup(void)
{
}
void USBHAL::_usbisr(void) {
void USBHAL::_usbisr(void)
{
instance->usbisr();
}
void USBHAL::usbisr(void) {
void USBHAL::usbisr(void)
{
HAL_PCD_IRQHandler(&instance->hpcd);
}

106
features/unsupported/USBDevice/targets/TARGET_STM/USBHAL_STM32F4.cpp
View File

@ -22,7 +22,7 @@
#include "USBRegs_STM32.h"
#include "pinmap.h"
USBHAL * USBHAL::instance;
USBHAL *USBHAL::instance;
static volatile int epComplete = 0;
@ -32,11 +32,13 @@ static uint32_t rxFifoCount = 0;
static uint32_t setupBuffer[MAX_PACKET_SIZE_EP0 >> 2];
uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer)
{
return 0;
}
USBHAL::USBHAL(void) {
USBHAL::USBHAL(void)
{
NVIC_DisableIRQ(OTG_FS_IRQn);
epCallback[0] = &USBHAL::EP1_OUT_callback;
epCallback[1] = &USBHAL::EP1_IN_callback;
@ -94,32 +96,39 @@ USBHAL::USBHAL(void) {
NVIC_SetPriority(OTG_FS_IRQn, 1);
}
USBHAL::~USBHAL(void) {
USBHAL::~USBHAL(void)
{
}
void USBHAL::connect(void) {
void USBHAL::connect(void)
{
NVIC_EnableIRQ(OTG_FS_IRQn);
}
void USBHAL::disconnect(void) {
void USBHAL::disconnect(void)
{
NVIC_DisableIRQ(OTG_FS_IRQn);
}
void USBHAL::configureDevice(void) {
void USBHAL::configureDevice(void)
{
// Not needed
}
void USBHAL::unconfigureDevice(void) {
void USBHAL::unconfigureDevice(void)
{
// Not needed
}
void USBHAL::setAddress(uint8_t address) {
void USBHAL::setAddress(uint8_t address)
{
OTG_FS->DREGS.DCFG |= (address << 4);
EP0write(0, 0);
}
bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket,
uint32_t flags) {
uint32_t flags)
{
uint32_t epIndex = endpoint >> 1;
uint32_t type;
@ -151,8 +160,7 @@ bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket,
if (endpoint == EP0IN) {
OTG_FS->GREGS.DIEPTXF0_HNPTXFSIZ = ((maxPacket >> 2) << 16) |
(bufferEnd << 0);
}
else {
} else {
OTG_FS->GREGS.DIEPTXF[epIndex - 1] = ((maxPacket >> 2) << 16) |
(bufferEnd << 0);
}
@ -169,8 +177,7 @@ bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket,
// Unmask the interrupt
OTG_FS->DREGS.DAINTMSK |= (1 << epIndex);
}
else { // Out endpoint
} else { // Out endpoint
// Set the out EP specific control settings
control |= (1 << 26); // CNAK
OTG_FS->OUTEP_REGS[epIndex].DOEPCTL = control;
@ -182,18 +189,22 @@ bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket,
}
// read setup packet
void USBHAL::EP0setup(uint8_t *buffer) {
void USBHAL::EP0setup(uint8_t *buffer)
{
memcpy(buffer, setupBuffer, MAX_PACKET_SIZE_EP0);
}
void USBHAL::EP0readStage(void) {
void USBHAL::EP0readStage(void)
{
}
void USBHAL::EP0read(void) {
void USBHAL::EP0read(void)
{
}
uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
uint32_t* buffer32 = (uint32_t *) buffer;
uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
{
uint32_t *buffer32 = (uint32_t *) buffer;
uint32_t length = rxFifoCount;
for (uint32_t i = 0; i < length; i += 4) {
buffer32[i >> 2] = OTG_FS->FIFO[0][0];
@ -203,14 +214,17 @@ uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
return length;
}
void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
{
endpointWrite(0, buffer, size);
}
void USBHAL::EP0getWriteResult(void) {
void USBHAL::EP0getWriteResult(void)
{
}
void USBHAL::EP0stall(void) {
void USBHAL::EP0stall(void)
{
// If we stall the out endpoint here then we have problems transferring
// and setup requests after the (stalled) get device qualifier requests.
// TODO: Find out if this is correct behavior, or whether we are doing
@ -219,12 +233,13 @@ void USBHAL::EP0stall(void) {
// stallEndpoint(EP0OUT);
}
EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
{
uint32_t epIndex = endpoint >> 1;
uint32_t size = (1 << 19) | // 1 packet
(maximumSize << 0); // Packet size
// if (endpoint == EP0OUT) {
size |= (1 << 29); // 1 setup packet
size |= (1 << 29); // 1 setup packet
// }
OTG_FS->OUTEP_REGS[epIndex].DOEPTSIZ = size;
OTG_FS->OUTEP_REGS[epIndex].DOEPCTL |= (1 << 31) | // Enable endpoint
@ -234,12 +249,13 @@ EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
return EP_PENDING;
}
EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *buffer, uint32_t *bytesRead)
{
if (!(epComplete & (1 << endpoint))) {
return EP_PENDING;
}
uint32_t* buffer32 = (uint32_t *) buffer;
uint32_t *buffer32 = (uint32_t *) buffer;
uint32_t length = rxFifoCount;
for (uint32_t i = 0; i < length; i += 4) {
buffer32[i >> 2] = OTG_FS->FIFO[endpoint >> 1][0];
@ -249,7 +265,8 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_
return EP_COMPLETED;
}
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
{
uint32_t epIndex = endpoint >> 1;
OTG_FS->INEP_REGS[epIndex].DIEPTSIZ = (1 << 19) | // 1 packet
(size << 0); // Size of packet
@ -259,7 +276,7 @@ EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
while ((OTG_FS->INEP_REGS[epIndex].DTXFSTS & 0XFFFF) < ((size + 3) >> 2));
for (uint32_t i=0; i<(size + 3) >> 2; i++, data+=4) {
for (uint32_t i = 0; i < (size + 3) >> 2; i++, data += 4) {
OTG_FS->FIFO[epIndex][0] = *(uint32_t *)data;
}
@ -268,7 +285,8 @@ EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
return EP_PENDING;
}
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
{
if (epComplete & (1 << endpoint)) {
epComplete &= ~(1 << endpoint);
return EP_COMPLETED;
@ -277,36 +295,41 @@ EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
return EP_PENDING;
}
void USBHAL::stallEndpoint(uint8_t endpoint) {
void USBHAL::stallEndpoint(uint8_t endpoint)
{
if (endpoint & 0x1) { // In EP
OTG_FS->INEP_REGS[endpoint >> 1].DIEPCTL |= (1 << 30) | // Disable
(1 << 21); // Stall
}
else { // Out EP
} else { // Out EP
OTG_FS->DREGS.DCTL |= (1 << 9); // Set global out NAK
OTG_FS->OUTEP_REGS[endpoint >> 1].DOEPCTL |= (1 << 30) | // Disable
(1 << 21); // Stall
}
}
void USBHAL::unstallEndpoint(uint8_t endpoint) {
void USBHAL::unstallEndpoint(uint8_t endpoint)
{
}
bool USBHAL::getEndpointStallState(uint8_t endpoint) {
bool USBHAL::getEndpointStallState(uint8_t endpoint)
{
return false;
}
void USBHAL::remoteWakeup(void) {
void USBHAL::remoteWakeup(void)
{
}
void USBHAL::_usbisr(void) {
void USBHAL::_usbisr(void)
{
instance->usbisr();
}
void USBHAL::usbisr(void) {
void USBHAL::usbisr(void)
{
if (OTG_FS->GREGS.GINTSTS & (1 << 11)) { // USB Suspend
suspendStateChanged(1);
};
@ -347,7 +370,7 @@ void USBHAL::usbisr(void) {
if (type == 0x6) {
// Setup packet
for (uint32_t i=0; i<length; i+=4) {
for (uint32_t i = 0; i < length; i += 4) {
setupBuffer[i >> 2] = OTG_FS->FIFO[0][i >> 2];
}
rxFifoCount = 0;
@ -363,8 +386,7 @@ void USBHAL::usbisr(void) {
// Out packet
if (endpoint == EP0OUT) {
EP0out();
}
else {
} else {
epComplete |= (1 << endpoint);
if ((instance->*(epCallback[endpoint - 2]))()) {
epComplete &= ~(1 << endpoint);
@ -372,7 +394,7 @@ void USBHAL::usbisr(void) {
}
}
for (uint32_t i=0; i<rxFifoCount; i+=4) {
for (uint32_t i = 0; i < rxFifoCount; i += 4) {
(void) OTG_FS->FIFO[0][0];
}
OTG_FS->GREGS.GINTSTS = (1 << 4);
@ -380,7 +402,7 @@ void USBHAL::usbisr(void) {
if (OTG_FS->GREGS.GINTSTS & (1 << 18)) { // In endpoint interrupt
// Loop through the in endpoints
for (uint32_t i=0; i<4; i++) {
for (uint32_t i = 0; i < 4; i++) {
if (OTG_FS->DREGS.DAINT & (1 << i)) { // Interrupt is on endpoint
if (OTG_FS->INEP_REGS[i].DIEPINT & (1 << 7)) {// Tx FIFO empty

139
features/unsupported/USBDevice/targets/TARGET_STM/USBRegs_STM32.h
View File

@ -28,97 +28,90 @@
#ifndef __USB_OTG_REGS_H__
#define __USB_OTG_REGS_H__
typedef struct //000h
{
__IO uint32_t GOTGCTL; /* USB_OTG Control and Status Register 000h*/
__IO uint32_t GOTGINT; /* USB_OTG Interrupt Register 004h*/
__IO uint32_t GAHBCFG; /* Core AHB Configuration Register 008h*/
__IO uint32_t GUSBCFG; /* Core USB Configuration Register 00Ch*/
__IO uint32_t GRSTCTL; /* Core Reset Register 010h*/
__IO uint32_t GINTSTS; /* Core Interrupt Register 014h*/
__IO uint32_t GINTMSK; /* Core Interrupt Mask Register 018h*/
__IO uint32_t GRXSTSR; /* Receive Sts Q Read Register 01Ch*/
__IO uint32_t GRXSTSP; /* Receive Sts Q Read & POP Register 020h*/
__IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/
__IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
__IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
uint32_t Reserved30[2]; /* Reserved 030h*/
__IO uint32_t GCCFG; /* General Purpose IO Register 038h*/
__IO uint32_t CID; /* User ID Register 03Ch*/
uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/
__IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/
__IO uint32_t DIEPTXF[3];/* dev Periodic Transmit FIFO */
typedef struct { //000h
__IO uint32_t GOTGCTL; /* USB_OTG Control and Status Register 000h*/
__IO uint32_t GOTGINT; /* USB_OTG Interrupt Register 004h*/
__IO uint32_t GAHBCFG; /* Core AHB Configuration Register 008h*/
__IO uint32_t GUSBCFG; /* Core USB Configuration Register 00Ch*/
__IO uint32_t GRSTCTL; /* Core Reset Register 010h*/
__IO uint32_t GINTSTS; /* Core Interrupt Register 014h*/
__IO uint32_t GINTMSK; /* Core Interrupt Mask Register 018h*/
__IO uint32_t GRXSTSR; /* Receive Sts Q Read Register 01Ch*/
__IO uint32_t GRXSTSP; /* Receive Sts Q Read & POP Register 020h*/
__IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/
__IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
__IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
uint32_t Reserved30[2]; /* Reserved 030h*/
__IO uint32_t GCCFG; /* General Purpose IO Register 038h*/
__IO uint32_t CID; /* User ID Register 03Ch*/
uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/
__IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/
__IO uint32_t DIEPTXF[3];/* dev Periodic Transmit FIFO */
}
USB_OTG_GREGS;
typedef struct // 800h
{
__IO uint32_t DCFG; /* dev Configuration Register 800h*/
__IO uint32_t DCTL; /* dev Control Register 804h*/
__IO uint32_t DSTS; /* dev Status Register (RO) 808h*/
uint32_t Reserved0C; /* Reserved 80Ch*/
__IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/
__IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/
__IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/
__IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/
uint32_t Reserved20; /* Reserved 820h*/
uint32_t Reserved9; /* Reserved 824h*/
__IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/
__IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/
__IO uint32_t DTHRCTL; /* dev thr 830h*/
__IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/
typedef struct { // 800h
__IO uint32_t DCFG; /* dev Configuration Register 800h*/
__IO uint32_t DCTL; /* dev Control Register 804h*/
__IO uint32_t DSTS; /* dev Status Register (RO) 808h*/
uint32_t Reserved0C; /* Reserved 80Ch*/
__IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/
__IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/
__IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/
__IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/
uint32_t Reserved20; /* Reserved 820h*/
uint32_t Reserved9; /* Reserved 824h*/
__IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/
__IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/
__IO uint32_t DTHRCTL; /* dev thr 830h*/
__IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/
}
USB_OTG_DREGS;
typedef struct
{
__IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/
__IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
__IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
uint32_t Reserved14;
__IO uint32_t DTXFSTS;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
uint32_t Reserved1C; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
typedef struct {
__IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/
__IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
__IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
uint32_t Reserved14;
__IO uint32_t DTXFSTS;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
uint32_t Reserved1C; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
}
USB_OTG_INEPREGS;
typedef struct
{
__IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/
__IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
__IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
uint32_t Reserved14[3];
typedef struct {
__IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/
__IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
__IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
uint32_t Reserved14[3];
}
USB_OTG_OUTEPREGS;
typedef struct
{
__IO uint32_t HCFG; /* Host Configuration Register 400h*/
__IO uint32_t HFIR; /* Host Frame Interval Register 404h*/
__IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/
uint32_t Reserved40C; /* Reserved 40Ch*/
__IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/
__IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/
__IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/
typedef struct {
__IO uint32_t HCFG; /* Host Configuration Register 400h*/
__IO uint32_t HFIR; /* Host Frame Interval Register 404h*/
__IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/
uint32_t Reserved40C; /* Reserved 40Ch*/
__IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/
__IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/
__IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/
}
USB_OTG_HREGS;
typedef struct
{
__IO uint32_t HCCHAR;
__IO uint32_t HCSPLT;
__IO uint32_t HCINT;
__IO uint32_t HCINTMSK;
__IO uint32_t HCTSIZ;
uint32_t Reserved[3];
typedef struct {
__IO uint32_t HCCHAR;
__IO uint32_t HCSPLT;
__IO uint32_t HCINT;
__IO uint32_t HCINTMSK;
__IO uint32_t HCTSIZ;
uint32_t Reserved[3];
}
USB_OTG_HC_REGS;
typedef struct
{
typedef struct {
USB_OTG_GREGS GREGS;
uint32_t RESERVED0[188];
USB_OTG_HREGS HREGS;

54
features/unsupported/USBHost/targets/TARGET_STM/USBEndpoint_STM.cpp
View File

@ -19,13 +19,13 @@
#include "USBEndpoint.h"
extern uint32_t HAL_HCD_HC_GetMaxPacket(HCD_HandleTypeDef *hhcd, uint8_t chn_num);
extern uint32_t HAL_HCD_HC_GetType(HCD_HandleTypeDef *hhcd, uint8_t chn_num);
extern void HAL_HCD_DisableInt(HCD_HandleTypeDef* hhcd, uint8_t chn_num);
extern void HAL_HCD_EnableInt(HCD_HandleTypeDef* hhcd, uint8_t chn_num);
extern void HAL_HCD_DisableInt(HCD_HandleTypeDef *hhcd, uint8_t chn_num);
extern void HAL_HCD_EnableInt(HCD_HandleTypeDef *hhcd, uint8_t chn_num);
void USBEndpoint::init(HCED * hced_, ENDPOINT_TYPE type_, ENDPOINT_DIRECTION dir_, uint32_t size, uint8_t ep_number, HCTD* td_list_[2])
void USBEndpoint::init(HCED *hced_, ENDPOINT_TYPE type_, ENDPOINT_DIRECTION dir_, uint32_t size, uint8_t ep_number, HCTD *td_list_[2])
{
HCD_HandleTypeDef *hhcd;
uint32_t *addr;
@ -36,7 +36,7 @@ void USBEndpoint::init(HCED * hced_, ENDPOINT_TYPE type_, ENDPOINT_DIRECTION dir
setup = (type == CONTROL_ENDPOINT) ? true : false;
//TDs have been allocated by the host
memcpy((HCTD**)td_list, td_list_, sizeof(HCTD*)*2); //TODO: Maybe should add a param for td_list size... at least a define
memcpy((HCTD **)td_list, td_list_, sizeof(HCTD *) * 2); //TODO: Maybe should add a param for td_list size... at least a define
memset(td_list_[0], 0, sizeof(HCTD));
memset(td_list_[1], 0, sizeof(HCTD));
@ -56,11 +56,11 @@ void USBEndpoint::init(HCED * hced_, ENDPOINT_TYPE type_, ENDPOINT_DIRECTION dir
/* remove potential post pending from previous endpoint */
ep_queue.get(0);
intf_nb = 0;
hhcd = (HCD_HandleTypeDef*)hced->hhcd;
hhcd = (HCD_HandleTypeDef *)hced->hhcd;
addr = &((uint32_t *)hhcd->pData)[hced->ch_num];
*addr = 0;
state = USB_TYPE_IDLE;
speed =false;
speed = false;
}
void USBEndpoint::setSize(uint32_t size)
{
@ -77,7 +77,7 @@ void USBEndpoint::setDeviceAddress(uint8_t addr)
if (this->speed) {
USB_WARN("small speed device on hub not supported");
}
MBED_ASSERT(HAL_HCD_HC_Init((HCD_HandleTypeDef*)hced->hhcd,hced->ch_num, address, addr, hcd_speed, type, size)!=HAL_BUSY);
MBED_ASSERT(HAL_HCD_HC_Init((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num, address, addr, hcd_speed, type, size) != HAL_BUSY);
this->device_address = addr;
}
@ -98,26 +98,26 @@ void USBEndpoint::setState(USB_TYPE st)
state = st;
if (st == USB_TYPE_FREE) {
HCD_HandleTypeDef *hhcd = (HCD_HandleTypeDef*)hced->hhcd;
HCD_HandleTypeDef *hhcd = (HCD_HandleTypeDef *)hced->hhcd;
uint32_t *addr = &((uint32_t *)hhcd->pData)[hced->ch_num];
if ((*addr) && (type != INTERRUPT_ENDPOINT)) {
this->ep_queue.put((uint8_t*)1);
this->ep_queue.put((uint8_t *)1);
}
MBED_ASSERT(HAL_HCD_HC_Halt((HCD_HandleTypeDef*)hced->hhcd, hced->ch_num)!=HAL_BUSY);
HAL_HCD_DisableInt((HCD_HandleTypeDef*)hced->hhcd, hced->ch_num);
MBED_ASSERT(HAL_HCD_HC_Halt((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num) != HAL_BUSY);
HAL_HCD_DisableInt((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num);
*addr = 0;
}
if (st == USB_TYPE_ERROR) {
MBED_ASSERT(HAL_HCD_HC_Halt((HCD_HandleTypeDef*)hced->hhcd, hced->ch_num)!=HAL_BUSY);
HAL_HCD_DisableInt((HCD_HandleTypeDef*)hced->hhcd, hced->ch_num);
MBED_ASSERT(HAL_HCD_HC_Halt((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num) != HAL_BUSY);
HAL_HCD_DisableInt((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num);
}
if (st == USB_TYPE_ERROR) {
uint8_t hcd_speed = HCD_SPEED_FULL;
/* small speed device with hub not supported
if (this->speed) hcd_speed = HCD_SPEED_LOW;*/
MBED_ASSERT(HAL_HCD_HC_Init((HCD_HandleTypeDef*)hced->hhcd,hced->ch_num, address, 0, hcd_speed, type, size)!=HAL_BUSY);
MBED_ASSERT(HAL_HCD_HC_Init((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num, address, 0, hcd_speed, type, size) != HAL_BUSY);
}
}
@ -128,7 +128,7 @@ extern uint32_t HAL_HCD_HC_GetType(HCD_HandleTypeDef *hhcd, uint8_t chn_num);
USB_TYPE USBEndpoint::queueTransfer()
{
HCD_HandleTypeDef *hhcd = (HCD_HandleTypeDef*)hced->hhcd;
HCD_HandleTypeDef *hhcd = (HCD_HandleTypeDef *)hced->hhcd;
uint32_t *addr = &((uint32_t *)hhcd->pData)[hced->ch_num];
uint32_t type = HAL_HCD_HC_GetType(hhcd, hced->ch_num);
uint32_t max_size = HAL_HCD_HC_GetMaxPacket(hhcd, hced->ch_num);
@ -138,14 +138,14 @@ USB_TYPE USBEndpoint::queueTransfer()
return USB_TYPE_FREE;
}
ep_queue.get(0);
MBED_ASSERT(*addr ==0);
MBED_ASSERT(*addr == 0);
transfer_len = td_current->size <= max_size ? td_current->size : max_size;
buf_start = (uint8_t *)td_current->currBufPtr;
//Now add this free TD at this end of the queue
state = USB_TYPE_PROCESSING;
/* one request */
td_current->nextTD = (hcTd*)0;
td_current->nextTD = (hcTd *)0;
#if defined(MAX_NYET_RETRY)
td_current->retry = 0;
#endif
@ -154,28 +154,28 @@ USB_TYPE USBEndpoint::queueTransfer()
/* dir /setup is inverted for ST */
/* token is useful only ctrl endpoint */
/* last parameter is ping ? */
MBED_ASSERT(HAL_HCD_HC_SubmitRequest((HCD_HandleTypeDef*)hced->hhcd, hced->ch_num, dir-1, type,!setup,(uint8_t*) td_current->currBufPtr, transfer_len, 0)==HAL_OK);
HAL_HCD_EnableInt((HCD_HandleTypeDef*)hced->hhcd, hced->ch_num);
MBED_ASSERT(HAL_HCD_HC_SubmitRequest((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num, dir - 1, type, !setup, (uint8_t *) td_current->currBufPtr, transfer_len, 0) == HAL_OK);
HAL_HCD_EnableInt((HCD_HandleTypeDef *)hced->hhcd, hced->ch_num);
return USB_TYPE_PROCESSING;
}
void USBEndpoint::unqueueTransfer(volatile HCTD * td)
void USBEndpoint::unqueueTransfer(volatile HCTD *td)
{
if (state==USB_TYPE_FREE) {
if (state == USB_TYPE_FREE) {
return;
}
uint32_t *addr = &((uint32_t *)((HCD_HandleTypeDef*)hced->hhcd)->pData)[hced->ch_num];
td->state=0;
td->currBufPtr=0;
td->size=0;
td->nextTD=0;
uint32_t *addr = &((uint32_t *)((HCD_HandleTypeDef *)hced->hhcd)->pData)[hced->ch_num];
td->state = 0;
td->currBufPtr = 0;
td->size = 0;
td->nextTD = 0;
*addr = 0;
td_current = td_next;
td_next = td;
}
void USBEndpoint::queueEndpoint(USBEndpoint * ed)
void USBEndpoint::queueEndpoint(USBEndpoint *ed)
{
nextEp = ed;
}

82
features/unsupported/USBHost/targets/TARGET_STM/USBHALHost_STM.cpp
View File

@ -24,63 +24,63 @@
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
{
USBHALHost_Private_t *priv=(USBHALHost_Private_t *)(hhcd->pData);
USBHALHost *obj= priv->inst;
void (USBHALHost::*func)(int hub, int port, bool lowSpeed, USBHostHub * hub_parent ) = priv->deviceConnected;
(obj->*func)(0,1,0,NULL);
USBHALHost_Private_t *priv = (USBHALHost_Private_t *)(hhcd->pData);
USBHALHost *obj = priv->inst;
void (USBHALHost::*func)(int hub, int port, bool lowSpeed, USBHostHub * hub_parent) = priv->deviceConnected;
(obj->*func)(0, 1, 0, NULL);
}
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
{
USBHALHost_Private_t *priv=(USBHALHost_Private_t *)(hhcd->pData);
USBHALHost *obj= priv->inst;
void (USBHALHost::*func1)(int hub, int port, USBHostHub * hub_parent, volatile uint32_t addr)= priv->deviceDisconnected;
(obj->*func1)(0,1,(USBHostHub *)NULL,0);
USBHALHost_Private_t *priv = (USBHALHost_Private_t *)(hhcd->pData);
USBHALHost *obj = priv->inst;
void (USBHALHost::*func1)(int hub, int port, USBHostHub * hub_parent, volatile uint32_t addr) = priv->deviceDisconnected;
(obj->*func1)(0, 1, (USBHostHub *)NULL, 0);
}
int HAL_HCD_HC_GetDirection(HCD_HandleTypeDef *hhcd,uint8_t chnum)
int HAL_HCD_HC_GetDirection(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
/* useful for transmission */
return hhcd->hc[chnum].ep_is_in;
}
uint32_t HAL_HCD_HC_GetMaxPacket(HCD_HandleTypeDef *hhcd,uint8_t chnum)
uint32_t HAL_HCD_HC_GetMaxPacket(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
/* useful for transmission */
return hhcd->hc[chnum].max_packet;
}
void HAL_HCD_EnableInt(HCD_HandleTypeDef *hhcd,uint8_t chnum)
void HAL_HCD_EnableInt(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
USBx_HOST->HAINTMSK |= (1 << chnum);
}
void HAL_HCD_DisableInt(HCD_HandleTypeDef *hhcd,uint8_t chnum)
void HAL_HCD_DisableInt(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
USBx_HOST->HAINTMSK &= ~(1 << chnum);
}
uint32_t HAL_HCD_HC_GetType(HCD_HandleTypeDef *hhcd,uint8_t chnum)
uint32_t HAL_HCD_HC_GetType(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
/* useful for transmission */
return hhcd->hc[chnum].ep_type;
}
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,uint8_t chnum, HCD_URBStateTypeDef urb_state)
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum, HCD_URBStateTypeDef urb_state)
{
USBHALHost_Private_t *priv=(USBHALHost_Private_t *)(hhcd->pData);
USBHALHost *obj= priv->inst;
void (USBHALHost::*func)(volatile uint32_t addr)= priv->transferCompleted;
USBHALHost_Private_t *priv = (USBHALHost_Private_t *)(hhcd->pData);
USBHALHost *obj = priv->inst;
void (USBHALHost::*func)(volatile uint32_t addr) = priv->transferCompleted;
uint32_t addr = priv->addr[chnum];
uint32_t max_size = HAL_HCD_HC_GetMaxPacket(hhcd, chnum);
uint32_t type = HAL_HCD_HC_GetType(hhcd, chnum);
uint32_t dir = HAL_HCD_HC_GetDirection(hhcd,chnum);
uint32_t dir = HAL_HCD_HC_GetDirection(hhcd, chnum);
uint32_t length;
if ( (addr!=0)) {
if ((addr != 0)) {
HCTD *td = (HCTD *)addr;
if ((type == EP_TYPE_BULK) || (type == EP_TYPE_CTRL )) {
if ((type == EP_TYPE_BULK) || (type == EP_TYPE_CTRL)) {
switch (urb_state) {
case URB_DONE:
#if defined(MAX_NYET_RETRY)
@ -91,7 +91,7 @@ void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,uint8_t chnum,
td->currBufPtr += max_size;
td->size -= max_size;
length = td->size <= max_size ? td->size : max_size;
MBED_ASSERT(HAL_HCD_HC_SubmitRequest(hhcd, chnum, dir ,type , !td->setup,(uint8_t*) td->currBufPtr, length, 0)==HAL_OK);
MBED_ASSERT(HAL_HCD_HC_SubmitRequest(hhcd, chnum, dir, type, !td->setup, (uint8_t *) td->currBufPtr, length, 0) == HAL_OK);
HAL_HCD_EnableInt(hhcd, chnum);
return;
}
@ -106,7 +106,7 @@ void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,uint8_t chnum,
td->retry++;
#endif
length = td->size <= max_size ? td->size : max_size;
MBED_ASSERT(HAL_HCD_HC_SubmitRequest(hhcd, chnum, dir ,type , !td->setup,(uint8_t*) td->currBufPtr, length, 0)==HAL_OK);
MBED_ASSERT(HAL_HCD_HC_SubmitRequest(hhcd, chnum, dir, type, !td->setup, (uint8_t *) td->currBufPtr, length, 0) == HAL_OK);
HAL_HCD_EnableInt(hhcd, chnum);
return;
#if defined(MAX_NYET_RETRY)
@ -117,25 +117,25 @@ void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,uint8_t chnum,
break;
}
}
if ((type == EP_TYPE_INTR) ) {
if ((type == EP_TYPE_INTR)) {
/* reply a packet of length NULL, this will be analyse in call back
* for mouse or hub */
td->state =USB_TYPE_IDLE ;
td->state = USB_TYPE_IDLE ;
HAL_HCD_DisableInt(hhcd, chnum);
} else {
td->state = (urb_state == URB_DONE) ? USB_TYPE_IDLE : USB_TYPE_ERROR;
}
td->currBufPtr +=HAL_HCD_HC_GetXferCount(hhcd, chnum);
td->currBufPtr += HAL_HCD_HC_GetXferCount(hhcd, chnum);
(obj->*func)(addr);
} else {
if (urb_state !=0) {
USB_DBG_EVENT("spurious %d %d",chnum, urb_state);
if (urb_state != 0) {
USB_DBG_EVENT("spurious %d %d", chnum, urb_state);
}
}
}
USBHALHost * USBHALHost::instHost;
USBHALHost *USBHALHost::instHost;
void USBHALHost::init()
@ -209,37 +209,37 @@ bool USBHALHost::disableList(ENDPOINT_TYPE type)
void USBHALHost::memInit()
{
usb_hcca = (volatile HCD_HandleTypeDef *)usb_buf;
usb_hcca = (volatile HCD_HandleTypeDef *)usb_buf;
usb_edBuf = usb_buf + HCCA_SIZE;
usb_tdBuf = usb_buf + HCCA_SIZE +(MAX_ENDPOINT*ED_SIZE);
usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT * ED_SIZE);
/* init channel */
memset((void*)usb_buf,0, TOTAL_SIZE);
for (int i=0; i < MAX_ENDPOINT; i++) {
HCED *hced = (HCED*)(usb_edBuf + i*ED_SIZE);
memset((void *)usb_buf, 0, TOTAL_SIZE);
for (int i = 0; i < MAX_ENDPOINT; i++) {
HCED *hced = (HCED *)(usb_edBuf + i * ED_SIZE);
hced->ch_num = i;
hced->hhcd = (HCCA *) usb_hcca;
}
}
volatile uint8_t * USBHALHost::getED()
volatile uint8_t *USBHALHost::getED()
{
for (int i = 0; i < MAX_ENDPOINT; i++) {
if ( !edBufAlloc[i] ) {
if (!edBufAlloc[i]) {
edBufAlloc[i] = true;
return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
return (volatile uint8_t *)(usb_edBuf + i * ED_SIZE);
}
}
perror("Could not allocate ED\r\n");
return NULL; //Could not alloc ED
}
volatile uint8_t * USBHALHost::getTD()
volatile uint8_t *USBHALHost::getTD()
{
int i;
for (i = 0; i < MAX_TD; i++) {
if ( !tdBufAlloc[i] ) {
if (!tdBufAlloc[i]) {
tdBufAlloc[i] = true;
return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
return (volatile uint8_t *)(usb_tdBuf + i * TD_SIZE);
}
}
perror("Could not allocate TD\r\n");
@ -247,14 +247,14 @@ volatile uint8_t * USBHALHost::getTD()
}
void USBHALHost::freeED(volatile uint8_t * ed)
void USBHALHost::freeED(volatile uint8_t *ed)
{
int i;
i = (ed - usb_edBuf) / ED_SIZE;
edBufAlloc[i] = false;
}
void USBHALHost::freeTD(volatile uint8_t * td)
void USBHALHost::freeTD(volatile uint8_t *td)
{
int i;
i = (td - usb_tdBuf) / TD_SIZE;

14
features/unsupported/USBHost/targets/TARGET_STM/USBHALHost_STM.h
View File

@ -47,8 +47,8 @@ typedef struct {
* endpoint */
volatile uint32_t addr[MAX_ENDPOINT];
USBHALHost *inst;
void (USBHALHost::*deviceConnected)(int hub, int port, bool lowSpeed, USBHostHub * hub_parent);
void (USBHALHost::*deviceDisconnected)(int hub, int port, USBHostHub * hub_parent, volatile uint32_t addr);
void (USBHALHost::*deviceConnected)(int hub, int port, bool lowSpeed, USBHostHub *hub_parent);
void (USBHALHost::*deviceDisconnected)(int hub, int port, USBHostHub *hub_parent, volatile uint32_t addr);
void (USBHALHost::*transferCompleted)(volatile uint32_t addr);
} USBHALHost_Private_t;
@ -120,7 +120,7 @@ static gpio_t gpio_powerpin;
#endif
void usb_vbus( uint8_t state)
void usb_vbus(uint8_t state)
{
if (state == 0) {
gpio_write(&gpio_powerpin, USB_POWER_OFF);
@ -135,14 +135,14 @@ USBHALHost::USBHALHost()
{
instHost = this;
HCD_HandleTypeDef *hhcd = {0};
USBHALHost_Private_t *HALPriv = new(USBHALHost_Private_t);
USBHALHost_Private_t *HALPriv = new (USBHALHost_Private_t);
memset(HALPriv, 0, sizeof(USBHALHost_Private_t));
memInit();
memset((void*)usb_hcca, 0, HCCA_SIZE);
memset((void *)usb_hcca, 0, HCCA_SIZE);
hhcd = (HCD_HandleTypeDef *)usb_hcca;
hhcd->pData = (void*)HALPriv;
hhcd->pData = (void *)HALPriv;
#if defined(TARGET_DISCO_F746NG_HS) || defined(TARGET_DISCO_F769NI)
hhcd->Instance = USB_OTG_HS;
@ -169,7 +169,7 @@ USBHALHost::USBHALHost()
for (int i = 0; i < MAX_ENDPOINT; i++) {
edBufAlloc[i] = false;
HALPriv->addr[i] = (uint32_t)-1;
HALPriv->addr[i] = (uint32_t) - 1;
}
for (int i = 0; i < MAX_TD; i++) {