mirror of https://github.com/ARMmbed/mbed-os.git
Update linker scripts with templates from psoc6pdl 1.6.0.4172 for IAR and ARM for 064B0S2, add cm4_dual versions
Roman Okhrimenko
parent
fc42c74e7b
commit
4043deee7e
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
;*******************************************************************************
|
||||
;* \file cyb06xxa_cm0plus.sct
|
||||
;* \version 2.70.1
|
||||
;* \version 2.80
|
||||
;*
|
||||
;* Linker file for the ARMCC.
|
||||
;*
|
||||
|
|
@ -42,6 +42,53 @@
|
|||
;* limitations under the License.
|
||||
;******************************************************************************/
|
||||
|
||||
#if !defined(MBED_ROM_START)
|
||||
#define MBED_ROM_START 0x10000000
|
||||
#endif
|
||||
|
||||
;* MBED_APP_START is being used by the bootloader build script and
|
||||
;* will be calculate by the system. Without bootloader the MBED_APP_START
|
||||
;* is equal to MBED_ROM_START
|
||||
;*
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START MBED_ROM_START
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_ROM_SIZE)
|
||||
#define MBED_ROM_SIZE 0x00010000
|
||||
#endif
|
||||
|
||||
;* MBED_APP_SIZE is being used by the bootloader build script and
|
||||
;* will be calculate by the system. Without bootloader the MBED_APP_SIZE
|
||||
;* is equal to MBED_ROM_SIZE
|
||||
;*
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x080E0000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x0000C000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_PUBLIC_RAM_SIZE)
|
||||
#define MBED_PUBLIC_RAM_SIZE 0x200
|
||||
#endif
|
||||
|
||||
; The size of the stack section at the end of CM0+ SRAM
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
#define STACK_SIZE MBED_BOOT_STACK_SIZE
|
||||
|
||||
#if !defined(MBED_PUBLIC_RAM_START)
|
||||
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)
|
||||
#endif
|
||||
|
||||
; The defines below describe the location and size of blocks of memory in the target.
|
||||
; Use these defines to specify the memory regions available for allocation.
|
||||
|
||||
|
|
@ -50,14 +97,14 @@
|
|||
; Your changes must be aligned with the corresponding defines for the CM4 core in 'xx_cm4_dual.scat',
|
||||
; where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.scat'.
|
||||
; RAM
|
||||
#define RAM_START 0x08000000
|
||||
#define RAM_SIZE 0x00040000
|
||||
#define RAM_START MBED_RAM_START
|
||||
#define RAM_SIZE MBED_RAM_SIZE
|
||||
; Public RAM
|
||||
#define PUBLIC_RAM_START MBED_PUBLIC_RAM_START
|
||||
#define PUBLIC_RAM_SIZE MBED_PUBLIC_RAM_SIZE
|
||||
; Flash
|
||||
#define FLASH_START 0x10000000
|
||||
#define FLASH_SIZE 0x00040000
|
||||
|
||||
; The size of the stack section at the end of CM0+ SRAM
|
||||
#define STACK_SIZE 0x00001000
|
||||
#define FLASH_START MBED_APP_START
|
||||
#define FLASH_SIZE MBED_APP_SIZE
|
||||
|
||||
; The size of the MCU boot header area at the start of FLASH
|
||||
#define BOOT_HEADER_SIZE 0x00000400
|
||||
|
|
@ -101,14 +148,9 @@
|
|||
|
||||
|
||||
; Cortex-M0+ application flash area
|
||||
LR_IROM1 FLASH_START FLASH_SIZE
|
||||
LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE - 0x8000)
|
||||
{
|
||||
.cy_app_header +0
|
||||
{
|
||||
* (.cy_app_header)
|
||||
}
|
||||
|
||||
ER_FLASH_VECTORS FLASH_START + BOOT_HEADER_SIZE
|
||||
ER_FLASH_VECTORS +0
|
||||
{
|
||||
* (RESET, +FIRST)
|
||||
}
|
||||
|
|
@ -137,13 +179,18 @@ LR_IROM1 FLASH_START FLASH_SIZE
|
|||
* (.noinit)
|
||||
}
|
||||
|
||||
RW_IRAM2 PUBLIC_RAM_START UNINIT
|
||||
{
|
||||
* (.cy_sharedmem)
|
||||
}
|
||||
|
||||
; Application heap area (HEAP)
|
||||
ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
|
||||
{
|
||||
ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-ImageLimit(RW_IRAM2)
|
||||
{
|
||||
}
|
||||
|
||||
; Stack region growing down
|
||||
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
|
||||
ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -STACK_SIZE
|
||||
{
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/***************************************************************************//**
|
||||
* \file cyb06xxa_cm0plus.ld
|
||||
* \version 2.70.1
|
||||
* \version 2.80
|
||||
*
|
||||
* Linker file for the GNU C compiler.
|
||||
*
|
||||
|
|
@ -40,8 +40,52 @@ SEARCH_DIR(.)
|
|||
GROUP(-lgcc -lc -lnosys)
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
#if !defined(MBED_ROM_START)
|
||||
#define MBED_ROM_START 0x10000000
|
||||
#endif
|
||||
|
||||
/* MBED_APP_START is being used by the bootloader build script and
|
||||
* will be calculate by the system. Without bootloader the MBED_APP_START
|
||||
* is equal to MBED_ROM_START
|
||||
*/
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START MBED_ROM_START
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_ROM_SIZE)
|
||||
#define MBED_ROM_SIZE 0x00010000
|
||||
#endif
|
||||
|
||||
/* MBED_APP_SIZE is being used by the bootloader build script and
|
||||
* will be calculate by the system. Without bootloader the MBED_APP_SIZE
|
||||
* is equal to MBED_ROM_SIZE
|
||||
*/
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x080E0000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x0000C000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_PUBLIC_RAM_SIZE)
|
||||
#define MBED_PUBLIC_RAM_SIZE 0x200
|
||||
#endif
|
||||
|
||||
/* The size of the stack section at the end of CM0+ SRAM */
|
||||
STACK_SIZE = 0x1000;
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
||||
|
||||
#if !defined(MBED_PUBLIC_RAM_START)
|
||||
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)
|
||||
#endif
|
||||
|
||||
/* The size of the MCU boot header area at the start of FLASH */
|
||||
BOOT_HEADER_SIZE = 0x400;
|
||||
|
|
@ -64,8 +108,9 @@ MEMORY
|
|||
* Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld',
|
||||
* where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.ld'.
|
||||
*/
|
||||
ram (rwx) : ORIGIN = 0x08000000, LENGTH = 0x40000
|
||||
flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x40000
|
||||
ram (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
|
||||
public_ram (rw) : ORIGIN = MBED_PUBLIC_RAM_START, LENGTH = MBED_PUBLIC_RAM_SIZE
|
||||
flash (rx) : ORIGIN = MBED_APP_START, LENGTH = (MBED_APP_SIZE - 0x8000)
|
||||
|
||||
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
|
||||
* You can assign sections to this memory region for only one of the cores.
|
||||
|
|
@ -315,10 +360,17 @@ SECTIONS
|
|||
} > ram
|
||||
|
||||
|
||||
/* Public RAM */
|
||||
.cy_sharedmem (NOLOAD):
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.cy_sharedmem))
|
||||
} > public_ram
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(ram) + LENGTH(ram);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
__StackLimit = __StackTop - STACK_SIZE;
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*******************************************************************************
|
||||
* \file cyb06xxa_cm0plus.icf
|
||||
* \version 2.70.1
|
||||
* \version 2.80
|
||||
*
|
||||
* Linker file for the IAR compiler.
|
||||
*
|
||||
|
|
@ -41,6 +41,66 @@
|
|||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
|
||||
if (!isdefinedsymbol(MBED_ROM_START)) {
|
||||
define symbol MBED_ROM_START = 0x10000000;
|
||||
}
|
||||
|
||||
/* MBED_APP_START is being used by the bootloader build script and
|
||||
* will be calculate by the system. Without bootloader the MBED_APP_START
|
||||
* is equal to MBED_ROM_START
|
||||
*/
|
||||
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||
define symbol MBED_APP_START = MBED_ROM_START;
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
|
||||
define symbol MBED_ROM_SIZE = 0x00010000;
|
||||
}
|
||||
|
||||
/* MBED_APP_SIZE is being used by the bootloader build script and
|
||||
* will be calculate by the system. Without bootloader the MBED_APP_SIZE
|
||||
* is equal to MBED_ROM_SIZE
|
||||
*/
|
||||
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_RAM_START)) {
|
||||
define symbol MBED_RAM_START = 0x080E0000;
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_RAM_SIZE)) {
|
||||
define symbol MBED_RAM_SIZE = 0x0000C000;
|
||||
}
|
||||
|
||||
/*-Sizes-*/
|
||||
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
|
||||
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
|
||||
}
|
||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||
|
||||
if (!isdefinedsymbol(__STACK_SIZE)) {
|
||||
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
|
||||
} else {
|
||||
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
|
||||
}
|
||||
}
|
||||
|
||||
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
|
||||
|
||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
|
||||
|
||||
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
|
||||
if (!isdefinedsymbol(__HEAP_SIZE)) {
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0400;
|
||||
} else {
|
||||
define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_PUBLIC_RAM_START)) {
|
||||
define symbol MBED_PUBLIC_RAM_START = (MBED_RAM_START + MBED_RAM_SIZE - __ICFEDIT_size_cstack__ - MBED_PUBLIC_RAM_SIZE);
|
||||
}
|
||||
|
||||
/* The symbols below define the location and size of blocks of memory in the target.
|
||||
* Use these symbols to specify the memory regions available for allocation.
|
||||
*/
|
||||
|
|
@ -51,12 +111,14 @@ define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
|||
* where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.icf'.
|
||||
*/
|
||||
/* RAM */
|
||||
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_IRAM1_end__ = 0x0803FFFF;
|
||||
|
||||
define symbol __ICFEDIT_region_IRAM1_start__ = MBED_RAM_START;
|
||||
define symbol __ICFEDIT_region_IRAM1_end__ = (MBED_RAM_START + MBED_RAM_SIZE - 1);
|
||||
/* Public RAM */
|
||||
define symbol __ICFEDIT_region_IRAM2_start__ = MBED_PUBLIC_RAM_START;
|
||||
define symbol __ICFEDIT_region_IRAM2_end__ = (MBED_PUBLIC_RAM_START + MBED_PUBLIC_RAM_SIZE - 1);
|
||||
/* Flash */
|
||||
define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_IROM1_end__ = 0x1003FFFF;
|
||||
define symbol __ICFEDIT_region_IROM1_start__ = MBED_APP_START;
|
||||
define symbol __ICFEDIT_region_IROM1_end__ = (MBED_APP_START + MBED_APP_SIZE - 0x8000 - 1);
|
||||
|
||||
/* The following symbols define a 32K flash region used for EEPROM emulation.
|
||||
* This region can also be used as the general purpose flash.
|
||||
|
|
@ -101,29 +163,12 @@ define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
|
|||
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
|
||||
|
||||
|
||||
define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_IRAM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
|
||||
/*-Sizes-*/
|
||||
if (!isdefinedsymbol(__STACK_SIZE)) {
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
} else {
|
||||
define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
|
||||
}
|
||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
|
||||
|
||||
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
|
||||
if (!isdefinedsymbol(__HEAP_SIZE)) {
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0400;
|
||||
} else {
|
||||
define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
|
||||
}
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
/* The size of the MCU boot header area at the start of FLASH */
|
||||
|
|
@ -141,7 +186,13 @@ define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFED
|
|||
define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
define region IRAM2_region = mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__];
|
||||
|
||||
define block RAM_DATA {readwrite section .data};
|
||||
define block RAM_OTHER {readwrite section * };
|
||||
define block RAM_NOINIT {readwrite section .noinit};
|
||||
define block RAM_BSS {readwrite section .bss};
|
||||
define block RAM with fixed order {block RAM_DATA, block RAM_OTHER, block RAM_NOINIT, block RAM_BSS};
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
|
||||
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
|
||||
|
|
@ -184,9 +235,13 @@ place at address (__ICFEDIT_region_IROM1_start__ + BOOT_HEADER_SIZE) { block RO
|
|||
|
||||
/* RAM */
|
||||
place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place in IRAM1_region { block RAM};
|
||||
place in IRAM1_region { readwrite section .cy_ramfunc };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM */
|
||||
place at start of IRAM2_region { section .cy_sharedmem };
|
||||
|
||||
/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
|
||||
".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
|
||||
|
||||
|
|
|
|||
|
|
@ -3,8 +3,8 @@
|
|||
; to pass a scatter file through a C preprocessor.
|
||||
|
||||
;*******************************************************************************
|
||||
;* \file cyb06xxa_cm4.sct
|
||||
;* \version 2.70.1
|
||||
;* \file cy8bc6xxa_cm4_dual.sct
|
||||
;* \version 2.80
|
||||
;*
|
||||
;* Linker file for the ARMCC.
|
||||
;*
|
||||
|
|
@ -42,22 +42,70 @@
|
|||
;* limitations under the License.
|
||||
;******************************************************************************/
|
||||
|
||||
; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
|
||||
; More about CM0+ prebuilt images, see here:
|
||||
; https://github.com/cypresssemiconductorco/psoc6cm0p
|
||||
; The size of the Cortex-M0+ application flash image
|
||||
#define FLASH_CM0P_SIZE 0x10000
|
||||
|
||||
#if !defined(MBED_ROM_START)
|
||||
#define MBED_ROM_START 0x10000000
|
||||
#endif
|
||||
|
||||
;* MBED_APP_START is being used by the bootloader build script and
|
||||
;* will be calculate by the system. In case if MBED_APP_START address is
|
||||
;* customized by the bootloader config, the application image should not
|
||||
;* include CM0p prebuilt image.
|
||||
;*
|
||||
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START (MBED_ROM_START + FLASH_CM0P_SIZE)
|
||||
#endif
|
||||
|
||||
; The size of the MCU boot header area at the start of FLASH
|
||||
#define BOOT_HEADER_SIZE 0x00000400
|
||||
|
||||
#if !defined(MBED_ROM_SIZE)
|
||||
#define MBED_ROM_SIZE 0x00E8000
|
||||
#endif
|
||||
|
||||
;* MBED_APP_SIZE is being used by the bootloader build script and
|
||||
;* will be calculate by the system.
|
||||
;*
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE (MBED_ROM_SIZE - FLASH_CM0P_SIZE)
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x08001800
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x000DE800
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; The size of the stack section at the end of CM4 SRAM
|
||||
#define STACK_SIZE MBED_BOOT_STACK_SIZE
|
||||
|
||||
; The defines below describe the location and size of blocks of memory in the target.
|
||||
; Use these defines to specify the memory regions available for allocation.
|
||||
|
||||
; The following defines control RAM and flash memory allocation for the CM4 core.
|
||||
; You can change the memory allocation by editing RAM and Flash defines.
|
||||
; Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
|
||||
; Using this memory region for other purposes will lead to unexpected behavior.
|
||||
; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat',
|
||||
; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'.
|
||||
; RAM
|
||||
#define RAM_START 0x08000000
|
||||
#define RAM_SIZE 0x000EA000
|
||||
#define RAM_START MBED_RAM_START
|
||||
#define RAM_SIZE MBED_RAM_SIZE
|
||||
; Flash
|
||||
#define FLASH_START 0x10000000
|
||||
#define FLASH_SIZE 0x001D0000
|
||||
|
||||
; The size of the stack section at the end of CM4 SRAM
|
||||
#define STACK_SIZE 0x00001000
|
||||
|
||||
; The size of the MCU boot header area at the start of FLASH
|
||||
#define BOOT_HEADER_SIZE 0x00000400
|
||||
#define FLASH_START MBED_APP_START
|
||||
#define FLASH_SIZE MBED_APP_SIZE
|
||||
|
||||
; The following defines describe a 32K flash region used for EEPROM emulation.
|
||||
; This region can also be used as the general purpose flash.
|
||||
|
|
@ -97,10 +145,19 @@
|
|||
#define EFUSE_SIZE 0x100000
|
||||
|
||||
|
||||
; Cortex-M0+ application flash image area
|
||||
LR_IROM (MBED_ROM_START + BOOT_HEADER_SIZE) (FLASH_CM0P_SIZE - BOOT_HEADER_SIZE)
|
||||
{
|
||||
.cy_m0p_image +0 FLASH_CM0P_SIZE
|
||||
{
|
||||
* (.cy_m0p_image)
|
||||
}
|
||||
}
|
||||
|
||||
; Cortex-M4 application flash area
|
||||
LR_IROM1 FLASH_START FLASH_SIZE
|
||||
{
|
||||
ER_FLASH_VECTORS +BOOT_HEADER_SIZE
|
||||
ER_FLASH_VECTORS +0
|
||||
{
|
||||
* (RESET, +FIRST)
|
||||
}
|
||||
|
|
@ -130,19 +187,19 @@ LR_IROM1 FLASH_START FLASH_SIZE
|
|||
}
|
||||
|
||||
; Application heap area (HEAP)
|
||||
ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
|
||||
ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-ImageLimit(RW_IRAM1)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
; Stack region growing down
|
||||
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
|
||||
ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -STACK_SIZE
|
||||
{
|
||||
}
|
||||
|
||||
; Used for the digital signature of the secure application and the
|
||||
; Bootloader SDK application. The size of the section depends on the required
|
||||
; data size.
|
||||
.cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
|
||||
.cy_app_signature (MBED_ROM_START + MBED_ROM_SIZE - 256) 256
|
||||
{
|
||||
* (.cy_app_signature)
|
||||
}
|
||||
|
|
@ -233,7 +290,7 @@ CYMETA 0x90500000
|
|||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
#define __cy_memory_0_start 0x10000000
|
||||
#define __cy_memory_0_length 0x001D0000
|
||||
#define __cy_memory_0_length 0x00200000
|
||||
#define __cy_memory_0_row_size 0x200
|
||||
|
||||
/* Emulated EEPROM Flash area */
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/*******************************************************************************
|
||||
* \file cyb06xxa_cm4.icf
|
||||
* \version 2.70.1
|
||||
* \file cyb8c6xxa_cm4_dual.icf
|
||||
* \version 2.80
|
||||
*
|
||||
* Linker file for the IAR compiler.
|
||||
*
|
||||
|
|
@ -41,16 +41,79 @@
|
|||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
|
||||
/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
|
||||
* More about CM0+ prebuilt images, see here:
|
||||
* https://github.com/cypresssemiconductorco/psoc6cm0p
|
||||
*/
|
||||
/* The size of the Cortex-M0+ application image */
|
||||
define symbol FLASH_CM0P_SIZE = 0x10000;
|
||||
|
||||
/* The size of the MCU boot header area at the start of FLASH */
|
||||
define symbol BOOT_HEADER_SIZE = 0x00000400;
|
||||
|
||||
if (!isdefinedsymbol(MBED_ROM_START)) {
|
||||
define symbol MBED_ROM_START = 0x10000000;
|
||||
}
|
||||
|
||||
/* MBED_APP_START is being used by the bootloader build script and
|
||||
* will be calculate by the system. In case if MBED_APP_START address is
|
||||
* customized by the bootloader config, the application image should not
|
||||
* include CM0p prebuilt image.
|
||||
*/
|
||||
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||
define symbol MBED_APP_START = (MBED_ROM_START + FLASH_CM0P_SIZE);
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
|
||||
define symbol MBED_ROM_SIZE = 0x00E8000;
|
||||
}
|
||||
|
||||
/* MBED_APP_SIZE is being used by the bootloader build script and
|
||||
* will be calculate by the system.
|
||||
*/
|
||||
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||
define symbol MBED_APP_SIZE = (MBED_ROM_SIZE - FLASH_CM0P_SIZE);
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_RAM_START)) {
|
||||
define symbol MBED_RAM_START = 0x08001800;
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_RAM_SIZE)) {
|
||||
define symbol MBED_RAM_SIZE = 0x000DE800;
|
||||
}
|
||||
|
||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||
|
||||
if (!isdefinedsymbol(__STACK_SIZE)) {
|
||||
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
|
||||
} else {
|
||||
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
|
||||
}
|
||||
}
|
||||
|
||||
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
|
||||
|
||||
/* The symbols below define the location and size of blocks of memory in the target.
|
||||
* Use these symbols to specify the memory regions available for allocation.
|
||||
*/
|
||||
/* RAM */
|
||||
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08001800;
|
||||
define symbol __ICFEDIT_region_IRAM1_end__ = 0x080E0000;
|
||||
|
||||
/* The following symbols control RAM and flash memory allocation for the CM4 core.
|
||||
* You can change the memory allocation by editing RAM and Flash symbols.
|
||||
* Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
|
||||
* Using this memory region for other purposes will lead to unexpected behavior.
|
||||
* Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf',
|
||||
* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'.
|
||||
*/
|
||||
/* RAM */
|
||||
define symbol __ICFEDIT_region_IRAM1_start__ = MBED_RAM_START;
|
||||
define symbol __ICFEDIT_region_IRAM1_end__ = (MBED_RAM_START + MBED_RAM_SIZE - 1);
|
||||
/* Flash */
|
||||
define symbol __ICFEDIT_region_IROM1_start__ = 0x100E0000;
|
||||
define symbol __ICFEDIT_region_IROM1_end__ = 0x10150000;
|
||||
define symbol __ICFEDIT_region_IROM0_start__ = MBED_ROM_START + BOOT_HEADER_SIZE;
|
||||
define symbol __ICFEDIT_region_IROM0_end__ = (MBED_ROM_START + FLASH_CM0P_SIZE - 1);
|
||||
|
||||
define symbol __ICFEDIT_region_IROM1_start__ = MBED_APP_START;
|
||||
define symbol __ICFEDIT_region_IROM1_end__ = (MBED_APP_START + MBED_APP_SIZE - 1);
|
||||
|
||||
/* The following symbols define a 32K flash region used for EEPROM emulation.
|
||||
* This region can also be used as the general purpose flash.
|
||||
|
|
@ -105,13 +168,6 @@ define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
|
|||
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
|
||||
/*-Sizes-*/
|
||||
if (!isdefinedsymbol(__STACK_SIZE)) {
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
} else {
|
||||
define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
|
||||
}
|
||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
|
||||
|
||||
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
|
||||
if (!isdefinedsymbol(__HEAP_SIZE)) {
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0400;
|
||||
|
|
@ -120,11 +176,8 @@ if (!isdefinedsymbol(__HEAP_SIZE)) {
|
|||
}
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
/* The size of the MCU boot header area at the start of FLASH */
|
||||
define symbol BOOT_HEADER_SIZE = 0x400;
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region IROM0_region = mem:[from __ICFEDIT_region_IROM0_start__ to __ICFEDIT_region_IROM0_end__];
|
||||
define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
|
||||
define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
|
||||
define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__];
|
||||
|
|
@ -136,10 +189,16 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
|||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
|
||||
define block RAM_DATA {readwrite section .data};
|
||||
define block RAM_OTHER {readwrite section * };
|
||||
define block RAM_NOINIT {readwrite section .noinit};
|
||||
define block RAM_BSS {readwrite section .bss};
|
||||
define block RAM with fixed order {block RAM_DATA, block RAM_OTHER, block RAM_NOINIT, block RAM_BSS};
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
|
||||
define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
|
||||
|
||||
define block CM0P_RO with size = (FLASH_CM0P_SIZE - BOOT_HEADER_SIZE) { readonly section .cy_m0p_image };
|
||||
define block RO {first section .intvec, readonly};
|
||||
|
||||
/*-Initializations-*/
|
||||
|
|
@ -148,8 +207,11 @@ do not initialize { section .noinit, section .intvec_ram };
|
|||
|
||||
/*-Placement-*/
|
||||
|
||||
/* Flash - Cortex-M0+ application image */
|
||||
place at start of IROM0_region { block CM0P_RO };
|
||||
|
||||
/* Flash - Cortex-M4 application */
|
||||
place at address (__ICFEDIT_region_IROM1_start__ + BOOT_HEADER_SIZE) { block RO };
|
||||
place at start of IROM1_region { block RO };
|
||||
|
||||
/* Used for the digital signature of the secure application and the Bootloader SDK application. */
|
||||
".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
|
||||
|
|
@ -180,14 +242,16 @@ place at address (__ICFEDIT_region_IROM1_start__ + BOOT_HEADER_SIZE) { block RO
|
|||
|
||||
/* RAM */
|
||||
place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
place in IRAM1_region { block RAM};
|
||||
place in IRAM1_region { block HEAP};
|
||||
place at end of IRAM1_region { block CSTACK };
|
||||
|
||||
/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
|
||||
".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
|
||||
|
||||
|
||||
keep { section .cy_app_signature,
|
||||
keep { section .cy_m0p_image,
|
||||
section .cy_app_signature,
|
||||
section .cy_em_eeprom,
|
||||
section .cy_sflash_user_data,
|
||||
section .cy_sflash_nar,
|
||||
|
|
@ -203,7 +267,7 @@ keep { section .cy_app_signature,
|
|||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
define exported symbol __cy_memory_0_start = 0x10000000;
|
||||
define exported symbol __cy_memory_0_length = 0x001D0000;
|
||||
define exported symbol __cy_memory_0_length = 0x00200000;
|
||||
define exported symbol __cy_memory_0_row_size = 0x200;
|
||||
|
||||
/* Emulated EEPROM Flash area */
|
||||
|
|
@ -226,4 +290,4 @@ define exported symbol __cy_memory_4_start = 0x90700000;
|
|||
define exported symbol __cy_memory_4_length = 0x100000;
|
||||
define exported symbol __cy_memory_4_row_size = 1;
|
||||
|
||||
/* EOF */
|
||||
/* EOF */
|
||||
Loading…
Reference in New Issue