From 3fd071404ec3e978a217213e703a4d8d85e03c9f Mon Sep 17 00:00:00 2001 From: Laurent Meunier Date: Tue, 11 Feb 2020 17:14:45 +0100 Subject: [PATCH] FIX: LPUART clock source selection should be left to serial driver The clock source selection of LPUART depends on System clocks but also on the serial baudrate. There is a specific computation done in serial driver targets/target_STM/serial_api.c At first start-up the LPUART1 clock selected in SetSysClock was anyway overridden by the serial driver, so this was of no effect. But in case of deep sleep SetSysClock is called again, while the driver isn't, so SetSyClock was corrupting the serial clock configuration. So let's remove these few lines of code which are causing trouble. --- .../TARGET_NUCLEO_L4R5ZI/system_clock.c | 21 ------------------- 1 file changed, 21 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c index 9066453856..94f6fd7578 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c @@ -177,13 +177,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update HAL_RCC_OscConfig(&RCC_OscInitStruct); - /* Select HSI as clock source for LPUART1 */ - RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; - RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI; - if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { - return 0; // FAIL - } - // Output clock on MCO1 pin(PA8) for debugging purpose #if DEBUG_MCO == 2 if (bypass == 0) { @@ -259,13 +252,6 @@ uint8_t SetSysClock_PLL_HSI(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update HAL_RCC_OscConfig(&RCC_OscInitStruct); - /* Select HSI as clock source for LPUART1 */ - RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; - RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI; - if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { - return 0; // FAIL - } - // Output clock on MCO1 pin(PA8) for debugging purpose #if DEBUG_MCO == 3 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz @@ -331,13 +317,6 @@ uint8_t SetSysClock_PLL_MSI(void) return 0; // FAIL } - /* Select LSE as clock source for LPUART1 */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; - PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - return 0; // FAIL - } - // Output clock on MCO1 pin(PA8) for debugging purpose #if DEBUG_MCO == 4 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz