[LPC11C24] Make code compatible with the interrupt chaining code

2013-08-07 15:24:30 +03:00 · 2013-08-07 15:24:30 +03:00 · 3f703f1bf0
parent 7b9081b59c
commit 3f703f1bf0
2 changed files with 3 additions and 1 deletions
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.c
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.c
@ -27,7 +27,6 @@
 * Option 2 is the one to go for, as RAM is the most valuable resource
 */

-#define NVIC_NUM_VECTORS (16 + 32)            // CORE + MCU Peripherals
 #define NVIC_RAM_VECTOR_ADDRESS (0x10000000)  // Vectors positioned at start of RAM

 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
--- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.h
+++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.h
@ -9,6 +9,9 @@

 #include "cmsis.h"

+#define NVIC_NUM_VECTORS      (16 + 32)   // CORE + MCU Peripherals
+#define NVIC_USER_IRQ_OFFSET  16
+
 #ifdef __cplusplus
 extern "C" {
 #endif