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Merge remote-tracking branch 'upstream/master' 

syncing my fork with master
pull/1023/head
U-owner-PC\owner 2015-02-17 19:04:04 -08:00
parent a59aefc6ed c9e93d21e3
commit 3e291c1cce
118 changed files with 4600 additions and 649 deletions
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5
.travis.yml
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@ -1,5 +1,8 @@
--- ---
install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh > /dev/null"
python: python:
- "2.7" - "2.7"
script: "python workspace_tools/build_travis.py" script: "python workspace_tools/build_travis.py"
install:
- "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh > /dev/null"
- sudo pip install colorama
- sudo pip install prettytable

2
libraries/mbed/api/mbed.h
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@ -16,7 +16,7 @@
#ifndef MBED_H #ifndef MBED_H
#define MBED_H #define MBED_H
#define MBED_LIBRARY_VERSION 93 #define MBED_LIBRARY_VERSION 94
#include "platform.h" #include "platform.h"

46
libraries/mbed/common/exit.c
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@ -1,46 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "semihost_api.h"
#include "mbed_interface.h"
#if DEVICE_STDIO_MESSAGES
#include <stdio.h>
#endif
#ifdef TOOLCHAIN_GCC_CW
// TODO: Ideally, we would like to define directly "_ExitProcess"
void mbed_exit(int return_code) {
#elif defined TOOLCHAIN_GCC_ARM
void _exit(int return_code) {
#else
void exit(int return_code) {
#endif
#if DEVICE_STDIO_MESSAGES
fflush(stdout);
fflush(stderr);
#endif
#if DEVICE_SEMIHOST
if (mbed_interface_connected()) {
semihost_exit();
}
#endif
if (return_code) {
mbed_die();
}
while (1);
}

47
libraries/mbed/common/retarget.cpp
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@ -1,5 +1,5 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited * Copyright (c) 2006-2015 ARM Limited
* *
* Licensed under the Apache License, Version 2.0 (the "License"); * Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License. * you may not use this file except in compliance with the License.
@ -19,6 +19,11 @@
#include "FilePath.h" #include "FilePath.h"
#include "serial_api.h" #include "serial_api.h"
#include "toolchain.h" #include "toolchain.h"
#include "semihost_api.h"
#include "mbed_interface.h"
#if DEVICE_STDIO_MESSAGES
#include <stdio.h>
#endif
#include <errno.h> #include <errno.h>
#if defined(__ARMCC_VERSION) #if defined(__ARMCC_VERSION)
@ -482,6 +487,38 @@ extern "C" caddr_t _sbrk(int incr) {
#endif #endif
#ifdef TOOLCHAIN_GCC_CW
// TODO: Ideally, we would like to define directly "_ExitProcess"
extern "C" void mbed_exit(int return_code) {
#elif defined TOOLCHAIN_GCC_ARM
extern "C" void _exit(int return_code) {
#else
namespace std {
extern "C" void exit(int return_code) {
#endif
#if DEVICE_STDIO_MESSAGES
fflush(stdout);
fflush(stderr);
#endif
#if DEVICE_SEMIHOST
if (mbed_interface_connected()) {
semihost_exit();
}
#endif
if (return_code) {
mbed_die();
}
while (1);
}
#if !defined(TOOLCHAIN_GCC_ARM) && !defined(TOOLCHAIN_GCC_CW)
} //namespace std
#endif
namespace mbed { namespace mbed {
void mbed_set_unbuffered_stream(FILE *_file) { void mbed_set_unbuffered_stream(FILE *_file) {
@ -524,11 +561,3 @@ char* mbed_gets(char*s, int size, FILE *_file){
} }
} // namespace mbed } // namespace mbed

5
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/system_nrf51822.c
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@ -21,12 +21,7 @@
#include "nrf51822.h" #include "nrf51822.h"
#include "system_nrf51822.h" #include "system_nrf51822.h"
#ifdef TARGET_DELTA_DFCM_NNN40
#define __SYSTEM_CLOCK (32000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 32MHz */
#else
#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */ #define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
#endif
static bool is_manual_peripheral_setup_needed(void); static bool is_manual_peripheral_setup_needed(void);
static bool is_disabled_in_debug_needed(void); static bool is_disabled_in_debug_needed(void);

13
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct Normal file
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@ -0,0 +1,13 @@
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100
; 32kB (0x8000) - 0x100 = 0x7F00
RW_IRAM1 (0x10000000+0x100) (0x8000-0x100) {
.ANY (+RW +ZI)
}
}

244
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/startup_LPC11U6x.s Normal file
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@ -0,0 +1,244 @@
;/**************************************************************************//**
; * @file startup_LPC11U6x.s
; * @brief CMSIS Cortex-M0+ Core Device Startup File for
; * NXP LPC11U6x Device Series
; * @version V1.00
; * @date 22. October 2013
; *
; * @note
; * Copyright (C) 2013 ARM Limited. All rights reserved.
; *
; * @par
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * @par
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; ******************************************************************************/
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
AREA STACK, NOINIT, READWRITE, ALIGN=3
EXPORT __initial_sp
__initial_sp EQU 0x10008000 ; Top of RAM from LPC1U68
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD PIN_INT0_IRQHandler ; 16+ 0 GPIO pin interrupt 0
DCD PIN_INT1_IRQHandler ; 16+ 1 GPIO pin interrupt 1
DCD PIN_INT2_IRQHandler ; 16+ 2 GPIO pin interrupt 2
DCD PIN_INT3_IRQHandler ; 16+ 3 GPIO pin interrupt 3
DCD PIN_INT4_IRQHandler ; 16+ 4 GPIO pin interrupt 4
DCD PIN_INT5_IRQHandler ; 16+ 5 GPIO pin interrupt 5
DCD PIN_INT6_IRQHandler ; 16+ 6 GPIO pin interrupt 6
DCD PIN_INT7_IRQHandler ; 16+ 7 GPIO pin interrupt 7
DCD GINT0_IRQHandler ; 16+ 8 GPIO GROUP0 interrupt
DCD GINT1_IRQHandler ; 16+ 9 GPIO GROUP1 interrupt
DCD I2C1_IRQHandler ; 16+10 I2C1 interrupt
DCD USART1_4_IRQHandler ; 16+11 Combined USART1 and USART4 interrupts
DCD USART2_3_IRQHandler ; 16+12 Combined USART2 and USART3 interrupts
DCD SCT0_1_IRQHandler ; 16+13 Combined SCT0 and SCT1 interrupts
DCD SSP1_IRQHandler ; 16+14 SSP1 interrupt
DCD I2C0_IRQHandler ; 16+15 I2C0 interrupt
DCD CT16B0_IRQHandler ; 16+16 CT16B0 interrupt
DCD CT16B1_IRQHandler ; 16+17 CT16B1 interrupt
DCD CT32B0_IRQHandler ; 16+18 CT32B0 interrupt
DCD CT32B1_IRQHandler ; 16+19 CT32B1 interrupt
DCD SSP0_IRQHandler ; 16+20 SSP0 interrupt
DCD USART0_IRQHandler ; 16+21 USART0 interrupt
DCD USB_IRQHandler ; 16+22 USB interrupt
DCD USB_FIQ_IRQHandler ; 16+23 USB_FIQ interrupt
DCD ADC_A_IRQHandler ; 16+24 Combined ADC_A end-of-sequence A and threshold crossing interrupts
DCD RTC_IRQHandler ; 16+25 RTC interrupt
DCD BOD_WDT_IRQHandler ; 16+26 Combined BOD and WWDT interrupt
DCD FLASH_IRQHandler ; 16+27 Combined flash and EEPROM controller interrupts
DCD DMA_IRQHandler ; 16+28 DMA interrupt
DCD ADC_B_IRQHandler ; 16+29 Combined ADC_A end-of-sequence A and threshold crossing interrupts
DCD USBWAKEUP_IRQHandler ; 16+30 USB_WAKEUP interrupt
DCD 0 ; 16+31 Reserved
; <h> Code Read Protection
; <o> Code Read Protection <0xFFFFFFFF=>CRP Disabled
; <0x12345678=>CRP Level 1
; <0x87654321=>CRP Level 2
; <0x43218765=>CRP Level 3 (ARE YOU SURE?)
; <0x4E697370=>NO ISP (ARE YOU SURE?)
; </h>
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT PIN_INT0_IRQHandler [WEAK]
EXPORT PIN_INT1_IRQHandler [WEAK]
EXPORT PIN_INT2_IRQHandler [WEAK]
EXPORT PIN_INT3_IRQHandler [WEAK]
EXPORT PIN_INT4_IRQHandler [WEAK]
EXPORT PIN_INT5_IRQHandler [WEAK]
EXPORT PIN_INT6_IRQHandler [WEAK]
EXPORT PIN_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT USART1_4_IRQHandler [WEAK]
EXPORT USART2_3_IRQHandler [WEAK]
EXPORT SCT0_1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C0_IRQHandler [WEAK]
EXPORT CT16B0_IRQHandler [WEAK]
EXPORT CT16B1_IRQHandler [WEAK]
EXPORT CT32B0_IRQHandler [WEAK]
EXPORT CT32B1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT USART0_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQ_IRQHandler [WEAK]
EXPORT ADC_A_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT BOD_WDT_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT DMA_IRQHandler [WEAK]
EXPORT ADC_B_IRQHandler [WEAK]
EXPORT USBWAKEUP_IRQHandler [WEAK]
PIN_INT0_IRQHandler
PIN_INT1_IRQHandler
PIN_INT2_IRQHandler
PIN_INT3_IRQHandler
PIN_INT4_IRQHandler
PIN_INT5_IRQHandler
PIN_INT6_IRQHandler
PIN_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
I2C1_IRQHandler
USART1_4_IRQHandler
USART2_3_IRQHandler
SCT0_1_IRQHandler
SSP1_IRQHandler
I2C0_IRQHandler
CT16B0_IRQHandler
CT16B1_IRQHandler
CT32B0_IRQHandler
CT32B1_IRQHandler
SSP0_IRQHandler
USART0_IRQHandler
USB_IRQHandler
USB_FIQ_IRQHandler
ADC_A_IRQHandler
RTC_IRQHandler
BOD_WDT_IRQHandler
FLASH_IRQHandler
DMA_IRQHandler
ADC_B_IRQHandler
USBWAKEUP_IRQHandler
B .
ENDP
ALIGN
; User Initial Stack & Heap
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
END

31
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_ARM_STD/sys.cpp Normal file
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@ -0,0 +1,31 @@
/* mbed Microcontroller Library - stackheap
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* Setup a fixed single stack/heap memory model,
* between the top of the RW/ZI region and the stackpointer
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <rt_misc.h>
#include <stdint.h>
extern char Image$$RW_IRAM1$$ZI$$Limit[];
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
uint32_t sp_limit = __current_sp();
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
struct __initial_stackheap r;
r.heap_base = zi_limit;
r.heap_limit = sp_limit;
return r;
}
#ifdef __cplusplus
}
#endif

17
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_APPNEARME_MICRONFCBOARD/LPC11U34.sct Normal file
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@ -0,0 +1,17 @@
LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k)
ER_IROM1 0x00000000 0xC000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 8KB - 0xC0 = 0x1F40
RW_IRAM1 0x100000C0 0x1F40 {
.ANY (+RW +ZI)
}
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
.ANY (USBRAM)
}
}

325
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_APPNEARME_MICRONFCBOARD/startup_LPC11xx.s Normal file
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@ -0,0 +1,325 @@
;/*****************************************************************************
; * @file: startup_LPC11xx.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File
; * for the NXP LPC11xx Device Series
; * @version: V1.0
; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
EXPORT __initial_sp
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
EXPORT __heap_base
EXPORT __heap_limit
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; for LPC11Uxx (With USB)
DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
DCD FLEX_INT1_IRQHandler
DCD FLEX_INT2_IRQHandler
DCD FLEX_INT3_IRQHandler
DCD FLEX_INT4_IRQHandler
DCD FLEX_INT5_IRQHandler
DCD FLEX_INT6_IRQHandler
DCD FLEX_INT7_IRQHandler
DCD GINT0_IRQHandler
DCD GINT1_IRQHandler ; PIO0 (0:7)
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD USB_IRQHandler ; USB IRQ
DCD USB_FIQHandler ; USB FIQ
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD USBWakeup_IRQHandler ; USB wake up
DCD Reserved_IRQHandler ; Reserved
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
; for particular peripheral.
;NMI_Handler PROC
; EXPORT NMI_Handler [WEAK]
; B .
; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
; for LPC11Uxx (With USB)
EXPORT NMI_Handler [WEAK]
EXPORT FLEX_INT0_IRQHandler [WEAK]
EXPORT FLEX_INT1_IRQHandler [WEAK]
EXPORT FLEX_INT2_IRQHandler [WEAK]
EXPORT FLEX_INT3_IRQHandler [WEAK]
EXPORT FLEX_INT4_IRQHandler [WEAK]
EXPORT FLEX_INT5_IRQHandler [WEAK]
EXPORT FLEX_INT6_IRQHandler [WEAK]
EXPORT FLEX_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
EXPORT TIMER16_1_IRQHandler [WEAK]
EXPORT TIMER32_0_IRQHandler [WEAK]
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT USBWakeup_IRQHandler [WEAK]
NMI_Handler
FLEX_INT0_IRQHandler
FLEX_INT1_IRQHandler
FLEX_INT2_IRQHandler
FLEX_INT3_IRQHandler
FLEX_INT4_IRQHandler
FLEX_INT5_IRQHandler
FLEX_INT6_IRQHandler
FLEX_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
USB_IRQHandler
USB_FIQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
USBWakeup_IRQHandler
B .
ENDP
ALIGN
END

17
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct Normal file
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@ -0,0 +1,17 @@
LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k)
ER_IROM1 0x00000000 0xC000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 8KB - 0xC0 = 0x1F40
RW_IRAM1 0x100000C0 0x1F40 {
.ANY (+RW +ZI)
}
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
.ANY (USBRAM)
}
}

325
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/startup_LPC11xx.s Normal file
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@ -0,0 +1,325 @@
;/*****************************************************************************
; * @file: startup_LPC11xx.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File
; * for the NXP LPC11xx Device Series
; * @version: V1.0
; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
EXPORT __initial_sp
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
EXPORT __heap_base
EXPORT __heap_limit
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; for LPC11Uxx (With USB)
DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
DCD FLEX_INT1_IRQHandler
DCD FLEX_INT2_IRQHandler
DCD FLEX_INT3_IRQHandler
DCD FLEX_INT4_IRQHandler
DCD FLEX_INT5_IRQHandler
DCD FLEX_INT6_IRQHandler
DCD FLEX_INT7_IRQHandler
DCD GINT0_IRQHandler
DCD GINT1_IRQHandler ; PIO0 (0:7)
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD USB_IRQHandler ; USB IRQ
DCD USB_FIQHandler ; USB FIQ
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD USBWakeup_IRQHandler ; USB wake up
DCD Reserved_IRQHandler ; Reserved
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
; for particular peripheral.
;NMI_Handler PROC
; EXPORT NMI_Handler [WEAK]
; B .
; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
; for LPC11Uxx (With USB)
EXPORT NMI_Handler [WEAK]
EXPORT FLEX_INT0_IRQHandler [WEAK]
EXPORT FLEX_INT1_IRQHandler [WEAK]
EXPORT FLEX_INT2_IRQHandler [WEAK]
EXPORT FLEX_INT3_IRQHandler [WEAK]
EXPORT FLEX_INT4_IRQHandler [WEAK]
EXPORT FLEX_INT5_IRQHandler [WEAK]
EXPORT FLEX_INT6_IRQHandler [WEAK]
EXPORT FLEX_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
EXPORT TIMER16_1_IRQHandler [WEAK]
EXPORT TIMER32_0_IRQHandler [WEAK]
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT USBWakeup_IRQHandler [WEAK]
NMI_Handler
FLEX_INT0_IRQHandler
FLEX_INT1_IRQHandler
FLEX_INT2_IRQHandler
FLEX_INT3_IRQHandler
FLEX_INT4_IRQHandler
FLEX_INT5_IRQHandler
FLEX_INT6_IRQHandler
FLEX_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
USB_IRQHandler
USB_FIQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
USBWakeup_IRQHandler
B .
ENDP
ALIGN
END

17
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_APPNEARME_MICRONFCBOARD/LPC11U34.sct Normal file
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LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k)
ER_IROM1 0x00000000 0xC000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 8KB - 0xC0 = 0x1F40
RW_IRAM1 0x100000C0 0x1F40 {
.ANY (+RW +ZI)
}
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
.ANY (USBRAM)
}
}

308
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_APPNEARME_MICRONFCBOARD/startup_LPC11xx.s Normal file
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@ -0,0 +1,308 @@
;/*****************************************************************************
; * @file: startup_LPC11xx.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File
; * for the NXP LPC11xx Device Series
; * @version: V1.0
; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; for LPC11Uxx (With USB)
DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
DCD FLEX_INT1_IRQHandler
DCD FLEX_INT2_IRQHandler
DCD FLEX_INT3_IRQHandler
DCD FLEX_INT4_IRQHandler
DCD FLEX_INT5_IRQHandler
DCD FLEX_INT6_IRQHandler
DCD FLEX_INT7_IRQHandler
DCD GINT0_IRQHandler
DCD GINT1_IRQHandler ; PIO0 (0:7)
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD USB_IRQHandler ; USB IRQ
DCD USB_FIQHandler ; USB FIQ
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD USBWakeup_IRQHandler ; USB wake up
DCD Reserved_IRQHandler ; Reserved
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
; for particular peripheral.
;NMI_Handler PROC
; EXPORT NMI_Handler [WEAK]
; B .
; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
; for LPC11Uxx (With USB)
EXPORT NMI_Handler [WEAK]
EXPORT FLEX_INT0_IRQHandler [WEAK]
EXPORT FLEX_INT1_IRQHandler [WEAK]
EXPORT FLEX_INT2_IRQHandler [WEAK]
EXPORT FLEX_INT3_IRQHandler [WEAK]
EXPORT FLEX_INT4_IRQHandler [WEAK]
EXPORT FLEX_INT5_IRQHandler [WEAK]
EXPORT FLEX_INT6_IRQHandler [WEAK]
EXPORT FLEX_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
EXPORT TIMER16_1_IRQHandler [WEAK]
EXPORT TIMER32_0_IRQHandler [WEAK]
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT USBWakeup_IRQHandler [WEAK]
NMI_Handler
FLEX_INT0_IRQHandler
FLEX_INT1_IRQHandler
FLEX_INT2_IRQHandler
FLEX_INT3_IRQHandler
FLEX_INT4_IRQHandler
FLEX_INT5_IRQHandler
FLEX_INT6_IRQHandler
FLEX_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
USB_IRQHandler
USB_FIQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
USBWakeup_IRQHandler
B .
ENDP
ALIGN
END

17
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U34_421/LPC11U34.sct Normal file
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@ -0,0 +1,17 @@
LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k)
ER_IROM1 0x00000000 0xC000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 8KB - 0xC0 = 0x1F40
RW_IRAM1 0x100000C0 0x1F40 {
.ANY (+RW +ZI)
}
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
.ANY (USBRAM)
}
}

308
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U34_421/startup_LPC11xx.s Normal file
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@ -0,0 +1,308 @@
;/*****************************************************************************
; * @file: startup_LPC11xx.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File
; * for the NXP LPC11xx Device Series
; * @version: V1.0
; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; for LPC11Uxx (With USB)
DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
DCD FLEX_INT1_IRQHandler
DCD FLEX_INT2_IRQHandler
DCD FLEX_INT3_IRQHandler
DCD FLEX_INT4_IRQHandler
DCD FLEX_INT5_IRQHandler
DCD FLEX_INT6_IRQHandler
DCD FLEX_INT7_IRQHandler
DCD GINT0_IRQHandler
DCD GINT1_IRQHandler ; PIO0 (0:7)
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD USB_IRQHandler ; USB IRQ
DCD USB_FIQHandler ; USB FIQ
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD USBWakeup_IRQHandler ; USB wake up
DCD Reserved_IRQHandler ; Reserved
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
; for particular peripheral.
;NMI_Handler PROC
; EXPORT NMI_Handler [WEAK]
; B .
; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
; for LPC11Uxx (With USB)
EXPORT NMI_Handler [WEAK]
EXPORT FLEX_INT0_IRQHandler [WEAK]
EXPORT FLEX_INT1_IRQHandler [WEAK]
EXPORT FLEX_INT2_IRQHandler [WEAK]
EXPORT FLEX_INT3_IRQHandler [WEAK]
EXPORT FLEX_INT4_IRQHandler [WEAK]
EXPORT FLEX_INT5_IRQHandler [WEAK]
EXPORT FLEX_INT6_IRQHandler [WEAK]
EXPORT FLEX_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
EXPORT TIMER16_1_IRQHandler [WEAK]
EXPORT TIMER32_0_IRQHandler [WEAK]
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT USBWakeup_IRQHandler [WEAK]
NMI_Handler
FLEX_INT0_IRQHandler
FLEX_INT1_IRQHandler
FLEX_INT2_IRQHandler
FLEX_INT3_IRQHandler
FLEX_INT4_IRQHandler
FLEX_INT5_IRQHandler
FLEX_INT6_IRQHandler
FLEX_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
USB_IRQHandler
USB_FIQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
USBWakeup_IRQHandler
B .
ENDP
ALIGN
END

151
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_APPNEARME_MICRONFCBOARD/LPC11U34.ld Normal file
View File

@ -0,0 +1,151 @@
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 48K
RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40
USB_RAM (rwx): ORIGIN = 0x20004000, LENGTH = 0x800
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text.Reset_Handler)
/* Only vectors and code running at reset are safe to be in first 512
bytes since RAM can be mapped into this area for RAM based interrupt
vectors. */
. = 0x00000200;
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

151
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld Normal file
View File

@ -0,0 +1,151 @@
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 48K
RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40
USB_RAM (rwx): ORIGIN = 0x20004000, LENGTH = 0x800
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text.Reset_Handler)
/* Only vectors and code running at reset are safe to be in first 512
bytes since RAM can be mapped into this area for RAM based interrupt
vectors. */
. = 0x00000200;
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

6
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s
View File

@ -118,8 +118,8 @@ __isr_vector:
.long TIMER32_1_IRQHandler /* 35 19 CT32B1 32 bit timer 1 */ .long TIMER32_1_IRQHandler /* 35 19 CT32B1 32 bit timer 1 */
.long SSP0_IRQHandler /* 36 20 SSP */ .long SSP0_IRQHandler /* 36 20 SSP */
.long UART_IRQHandler /* 37 21 UART */ .long UART_IRQHandler /* 37 21 UART */
.long Default_Handler /* 38 22 */ .long USB_IRQHandler /* 38 22 USB IRQ */
.long Default_Handler /* 39 23 */ .long USB_FIQHandler /* 39 23 USB FIQ */
.long ADC_IRQHandler /* 40 24 ADC end of conversion */ .long ADC_IRQHandler /* 40 24 ADC end of conversion */
.long WDT_IRQHandler /* 41 25 Watchdog interrupt (WDINT) */ .long WDT_IRQHandler /* 41 25 Watchdog interrupt (WDINT) */
.long BOD_IRQHandler /* 42 26 BOD Brown-out detect */ .long BOD_IRQHandler /* 42 26 BOD Brown-out detect */
@ -203,6 +203,8 @@ Reset_Handler:
def_irq_default_handler TIMER32_1_IRQHandler def_irq_default_handler TIMER32_1_IRQHandler
def_irq_default_handler SSP0_IRQHandler def_irq_default_handler SSP0_IRQHandler
def_irq_default_handler UART_IRQHandler def_irq_default_handler UART_IRQHandler
def_irq_default_handler USB_IRQHandler
def_irq_default_handler USB_FIQHandler
def_irq_default_handler ADC_IRQHandler def_irq_default_handler ADC_IRQHandler
def_irq_default_handler WDT_IRQHandler def_irq_default_handler WDT_IRQHandler
def_irq_default_handler BOD_IRQHandler def_irq_default_handler BOD_IRQHandler

2
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/system_LPC8xx.c
View File

@ -86,7 +86,7 @@
// <2=> Reserved // <2=> Reserved
// <3=> CLKIN. External clock input. // <3=> CLKIN. External clock input.
// </h> // </h>
#define SYSPLLCLKSEL_Val 0x00000000 // Reset: 0x000 #define SYSPLLCLKSEL_Val 0x00000001 // Reset: 0x000
// //
// <h> Main Clock Source Select Register (MAINCLKSEL) // <h> Main Clock Source Select Register (MAINCLKSEL)
// <o.0..1> SEL: Clock Source for Main Clock // <o.0..1> SEL: Clock Source for Main Clock

27
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/mbed_overrides.c
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@ -1,13 +1,24 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* Copyright (c) 2015, Cyntec * Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/ */
#include "cmsis.h" #include "cmsis.h"
// This function is called after RAM initialization and before main.
void mbed_sdk_init() void mbed_sdk_init()
{ {
// Default SWIO setting, pull SWIO(p19) to low for turning antenna switch to BLE radiated path. // Default SWIO setting, pull SWIO(p19) to low for turning antenna switch to BLE radiated path
#ifdef TARGET_DELTA_DFCM_NNN40
NRF_GPIO->PIN_CNF[19] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) NRF_GPIO->PIN_CNF[19] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
@ -16,5 +27,11 @@ void mbed_sdk_init()
NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN19_Clear << GPIO_OUTCLR_PIN19_Pos); NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN19_Clear << GPIO_OUTCLR_PIN19_Pos);
#endif // Config External Crystal to 32MHz
NRF_CLOCK->XTALFREQ = 0x00;
NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
NRF_CLOCK->TASKS_HFCLKSTART = 1;
while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0)
{// Do nothing.
}
} }

71
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_APPNEARME_MICRONFCBOARD/PeripheralNames.h Normal file
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@ -0,0 +1,71 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)LPC_USART_BASE
} UARTName;
typedef enum {
I2C_0 = (int)LPC_I2C_BASE
} I2CName;
typedef enum {
ADC0_0 = 0,
ADC0_1,
ADC0_2,
ADC0_3,
ADC0_4,
ADC0_5,
ADC0_6,
ADC0_7
} ADCName;
typedef enum {
SPI_0 = (int)LPC_SSP0_BASE,
SPI_1 = (int)LPC_SSP1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2,
PWM_3,
PWM_4,
PWM_5,
PWM_6,
PWM_7,
PWM_8,
PWM_9,
PWM_10,
PWM_11
} PWMName;
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART UART_0
#ifdef __cplusplus
}
#endif
#endif

117
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_APPNEARME_MICRONFCBOARD/PeripheralPins.c Normal file
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@ -0,0 +1,117 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "PeripheralPins.h"
/************ADC***************/
const PinMap PinMap_ADC[] = {
{P0_11, ADC0_0, 0x02},
{P0_12, ADC0_1, 0x02},
{P0_13, ADC0_2, 0x02},
{P0_14, ADC0_3, 0x02},
{P0_15, ADC0_4, 0x02},
{P0_16, ADC0_5, 0x01},
{P0_22, ADC0_6, 0x01},
{P0_23, ADC0_7, 0x01},
{NC , NC , 0 }
};
/************I2C***************/
const PinMap PinMap_I2C_SDA[] = {
{P0_5, I2C_0, 1},
{NC , NC , 0}
};
const PinMap PinMap_I2C_SCL[] = {
{P0_4, I2C_0, 1},
{NC , NC, 0}
};
/************UART***************/
const PinMap PinMap_UART_TX[] = {
{P0_19, UART_0, 1},
{P1_13, UART_0, 3},
{P1_27, UART_0, 2},
{ NC , NC , 0}
};
const PinMap PinMap_UART_RX[] = {
{P0_18, UART_0, 1},
{P1_14, UART_0, 3},
{P1_26, UART_0, 2},
{NC , NC , 0}
};
/************SPI***************/
const PinMap PinMap_SPI_SCLK[] = {
{P0_6 , SPI_0, 0x02},
{P0_10, SPI_0, 0x02},
{P1_29, SPI_0, 0x01},
{P1_15, SPI_1, 0x03},
{P1_20, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MOSI[] = {
{P0_9 , SPI_0, 0x01},
{P0_21, SPI_1, 0x02},
{P1_22, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MISO[] = {
{P0_8 , SPI_0, 0x01},
{P0_22, SPI_1, 0x03},
{P1_21, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_SSEL[] = {
{P0_2 , SPI_0, 0x01},
{P1_19, SPI_1, 0x02},
{P1_23, SPI_1, 0x02},
{NC , NC , 0}
};
/************PWM***************/
/* To have a PWM where we can change both the period and the duty cycle,
* we need an entire timer. With the following conventions:
* * MR3 is used for the PWM period
* * MR0, MR1, MR2 are used for the duty cycle
*/
const PinMap PinMap_PWM[] = {
/* CT16B0 */
{P0_8 , PWM_1, 2}, {P1_13, PWM_1, 2}, /* MR0 */
{P0_9 , PWM_2, 2}, {P1_14, PWM_2, 2}, /* MR1 */
{P0_10, PWM_3, 3}, {P1_15, PWM_3, 2}, /* MR2 */
/* CT16B1 */
{P0_21, PWM_4, 1}, /* MR0 */
{P0_22, PWM_5, 2}, {P1_23, PWM_5, 1}, /* MR1 */
/* CT32B0 */
{P0_18, PWM_6, 2}, {P1_24, PWM_6, 1}, /* MR0 */
{P0_19, PWM_7, 2}, {P1_25, PWM_7, 1}, /* MR1 */
{P0_1 , PWM_8, 2}, {P1_26, PWM_8, 1}, /* MR2 */
/* CT32B1 */
{P0_13, PWM_9 , 3}, {P1_0, PWM_9 , 1}, /* MR0 */
{P0_14, PWM_10, 3}, {P1_1, PWM_10, 1}, /* MR1 */
{P0_15, PWM_11, 3}, {P1_2, PWM_11, 1}, /* MR2 */
{NC, NC, 0}
};

178
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_APPNEARME_MICRONFCBOARD/PinNames.h Normal file
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@ -0,0 +1,178 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 5
typedef enum {
// LPC11U Pin Names
P0_0 = 0,
P0_1 = 1,
P0_2 = 2,
P0_3 = 3,
P0_4 = 4,
P0_5 = 5,
P0_6 = 6,
P0_7 = 7,
P0_8 = 8,
P0_9 = 9,
P0_10 = 10,
P0_11 = 11,
P0_12 = 12,
P0_13 = 13,
P0_14 = 14,
P0_15 = 15,
P0_16 = 16,
P0_17 = 17,
P0_18 = 18,
P0_19 = 19,
P0_20 = 20,
P0_21 = 21,
P0_22 = 22,
P0_23 = 23,
P0_24 = 24,
P0_25 = 25,
P0_26 = 26,
P0_27 = 27,
P1_0 = 32,
P1_1 = 33,
P1_2 = 34,
P1_3 = 35,
P1_4 = 36,
P1_5 = 37,
P1_6 = 38,
P1_7 = 39,
P1_8 = 40,
P1_9 = 41,
P1_10 = 42,
P1_11 = 43,
P1_12 = 44,
P1_13 = 45,
P1_14 = 46,
P1_15 = 47,
P1_16 = 48,
P1_17 = 49,
P1_18 = 50,
P1_19 = 51,
P1_20 = 52,
P1_21 = 53,
P1_22 = 54,
P1_23 = 55,
P1_24 = 56,
P1_25 = 57,
P1_26 = 58,
P1_27 = 59,
P1_28 = 60,
P1_29 = 61,
P1_31 = 63,
// MicroNFCBoard pin names
M_RST = P0_0,
M_BOOT = P0_1,
M_RXD = P0_18,
M_TXD = P0_19,
M_SCL = P0_4,
M_SDA = P0_5,
M_D0 = P0_20,
M_A0 = P0_16,
M_A1 = P0_15,
M_A2 = P0_14,
M_A3 = P0_13,
M_SCK = P0_10,
M_MOSI = P0_9,
M_MISO = P0_8,
M_NCS = P0_2,
M_IRQ = P0_7,
// MicroNFCBoard pin numbers
p4 = M_RST,
p5 = M_BOOT,
p6 = M_RXD,
p7 = M_TXD,
p8 = M_SCL,
p9 = M_SDA,
p10 = M_D0,
p11 = M_IRQ,
p12 = M_NCS,
p13 = M_MISO,
p14 = M_MOSI,
p15 = M_SCK,
p16 = M_A3,
p17 = M_A2,
p18 = M_A1,
p19 = M_A0,
// Other Pin Names
LED1 = P0_11,
LED2 = P0_12,
// Alias to have correct blue lights of death pattern
LED3 = LED2,
LED4 = LED1,
UART_TX = M_TXD,
UART_RX = M_RXD,
// Not connected
NC = (int)0xFFFFFFFF,
// Standard but not supported pins
USBTX = NC,
USBRX = NC,
} PinName;
typedef enum {
CHANNEL0 = FLEX_INT0_IRQn,
CHANNEL1 = FLEX_INT1_IRQn,
CHANNEL2 = FLEX_INT2_IRQn,
CHANNEL3 = FLEX_INT3_IRQn,
CHANNEL4 = FLEX_INT4_IRQn,
CHANNEL5 = FLEX_INT5_IRQn,
CHANNEL6 = FLEX_INT6_IRQn,
CHANNEL7 = FLEX_INT7_IRQn
} Channel;
typedef enum {
PullUp = 2,
PullDown = 1,
PullNone = 0,
Repeater = 3,
OpenDrain = 4,
PullDefault = PullDown
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

59
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_APPNEARME_MICRONFCBOARD/device.h Normal file
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@ -0,0 +1,59 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 0
#define DEVICE_SERIAL 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 1
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_CAN 0
#define DEVICE_RTC 0
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 32
#define DEVICE_MAC_OFFSET 20
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 0
#define DEVICE_ERROR_PATTERN 1
#include "objects.h"
#endif

71
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U34_421/PeripheralNames.h Normal file
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@ -0,0 +1,71 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)LPC_USART_BASE
} UARTName;
typedef enum {
I2C_0 = (int)LPC_I2C_BASE
} I2CName;
typedef enum {
ADC0_0 = 0,
ADC0_1,
ADC0_2,
ADC0_3,
ADC0_4,
ADC0_5,
ADC0_6,
ADC0_7
} ADCName;
typedef enum {
SPI_0 = (int)LPC_SSP0_BASE,
SPI_1 = (int)LPC_SSP1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2,
PWM_3,
PWM_4,
PWM_5,
PWM_6,
PWM_7,
PWM_8,
PWM_9,
PWM_10,
PWM_11
} PWMName;
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART UART_0
#ifdef __cplusplus
}
#endif
#endif

117
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U34_421/PeripheralPins.c Normal file
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@ -0,0 +1,117 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "PeripheralPins.h"
/************ADC***************/
const PinMap PinMap_ADC[] = {
{P0_11, ADC0_0, 0x02},
{P0_12, ADC0_1, 0x02},
{P0_13, ADC0_2, 0x02},
{P0_14, ADC0_3, 0x02},
{P0_15, ADC0_4, 0x02},
{P0_16, ADC0_5, 0x01},
{P0_22, ADC0_6, 0x01},
{P0_23, ADC0_7, 0x01},
{NC , NC , 0 }
};
/************I2C***************/
const PinMap PinMap_I2C_SDA[] = {
{P0_5, I2C_0, 1},
{NC , NC , 0}
};
const PinMap PinMap_I2C_SCL[] = {
{P0_4, I2C_0, 1},
{NC , NC, 0}
};
/************UART***************/
const PinMap PinMap_UART_TX[] = {
{P0_19, UART_0, 1},
{P1_13, UART_0, 3},
{P1_27, UART_0, 2},
{ NC , NC , 0}
};
const PinMap PinMap_UART_RX[] = {
{P0_18, UART_0, 1},
{P1_14, UART_0, 3},
{P1_26, UART_0, 2},
{NC , NC , 0}
};
/************SPI***************/
const PinMap PinMap_SPI_SCLK[] = {
{P0_6 , SPI_0, 0x02},
{P0_10, SPI_0, 0x02},
{P1_29, SPI_0, 0x01},
{P1_15, SPI_1, 0x03},
{P1_20, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MOSI[] = {
{P0_9 , SPI_0, 0x01},
{P0_21, SPI_1, 0x02},
{P1_22, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MISO[] = {
{P0_8 , SPI_0, 0x01},
{P0_22, SPI_1, 0x03},
{P1_21, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_SSEL[] = {
{P0_2 , SPI_0, 0x01},
{P1_19, SPI_1, 0x02},
{P1_23, SPI_1, 0x02},
{NC , NC , 0}
};
/************PWM***************/
/* To have a PWM where we can change both the period and the duty cycle,
* we need an entire timer. With the following conventions:
* * MR3 is used for the PWM period
* * MR0, MR1, MR2 are used for the duty cycle
*/
const PinMap PinMap_PWM[] = {
/* CT16B0 */
{P0_8 , PWM_1, 2}, {P1_13, PWM_1, 2}, /* MR0 */
{P0_9 , PWM_2, 2}, {P1_14, PWM_2, 2}, /* MR1 */
{P0_10, PWM_3, 3}, {P1_15, PWM_3, 2}, /* MR2 */
/* CT16B1 */
{P0_21, PWM_4, 1}, /* MR0 */
{P0_22, PWM_5, 2}, {P1_23, PWM_5, 1}, /* MR1 */
/* CT32B0 */
{P0_18, PWM_6, 2}, {P1_24, PWM_6, 1}, /* MR0 */
{P0_19, PWM_7, 2}, {P1_25, PWM_7, 1}, /* MR1 */
{P0_1 , PWM_8, 2}, {P1_26, PWM_8, 1}, /* MR2 */
/* CT32B1 */
{P0_13, PWM_9 , 3}, {P1_0, PWM_9 , 1}, /* MR0 */
{P0_14, PWM_10, 3}, {P1_1, PWM_10, 1}, /* MR1 */
{P0_15, PWM_11, 3}, {P1_2, PWM_11, 1}, /* MR2 */
{NC, NC, 0}
};

138
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U34_421/PinNames.h Normal file
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@ -0,0 +1,138 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 5
typedef enum {
// LPC11U Pin Names
P0_0 = 0,
P0_1 = 1,
P0_2 = 2,
P0_3 = 3,
P0_4 = 4,
P0_5 = 5,
P0_6 = 6,
P0_7 = 7,
P0_8 = 8,
P0_9 = 9,
P0_10 = 10,
P0_11 = 11,
P0_12 = 12,
P0_13 = 13,
P0_14 = 14,
P0_15 = 15,
P0_16 = 16,
P0_17 = 17,
P0_18 = 18,
P0_19 = 19,
P0_20 = 20,
P0_21 = 21,
P0_22 = 22,
P0_23 = 23,
P0_24 = 24,
P0_25 = 25,
P0_26 = 26,
P0_27 = 27,
P1_0 = 32,
P1_1 = 33,
P1_2 = 34,
P1_3 = 35,
P1_4 = 36,
P1_5 = 37,
P1_6 = 38,
P1_7 = 39,
P1_8 = 40,
P1_9 = 41,
P1_10 = 42,
P1_11 = 43,
P1_12 = 44,
P1_13 = 45,
P1_14 = 46,
P1_15 = 47,
P1_16 = 48,
P1_17 = 49,
P1_18 = 50,
P1_19 = 51,
P1_20 = 52,
P1_21 = 53,
P1_22 = 54,
P1_23 = 55,
P1_24 = 56,
P1_25 = 57,
P1_26 = 58,
P1_27 = 59,
P1_28 = 60,
P1_29 = 61,
P1_31 = 63,
// Other mbed Pin Names
LED1 = P0_7,
LED2 = P0_7,
LED3 = P0_7,
LED4 = P0_7,
UART_TX = P0_19,
UART_RX = P0_18,
// Not connected
NC = (int)0xFFFFFFFF,
// Standard but not supported pins
USBTX = NC,
USBRX = NC,
} PinName;
typedef enum {
CHANNEL0 = FLEX_INT0_IRQn,
CHANNEL1 = FLEX_INT1_IRQn,
CHANNEL2 = FLEX_INT2_IRQn,
CHANNEL3 = FLEX_INT3_IRQn,
CHANNEL4 = FLEX_INT4_IRQn,
CHANNEL5 = FLEX_INT5_IRQn,
CHANNEL6 = FLEX_INT6_IRQn,
CHANNEL7 = FLEX_INT7_IRQn
} Channel;
typedef enum {
PullUp = 2,
PullDown = 1,
PullNone = 0,
Repeater = 3,
OpenDrain = 4,
PullDefault = PullDown
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

59
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U34_421/device.h Normal file
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@ -0,0 +1,59 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 0
#define DEVICE_SERIAL 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 1
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_CAN 0
#define DEVICE_RTC 0
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 32
#define DEVICE_MAC_OFFSET 20
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 0
#define DEVICE_ERROR_PATTERN 1
#include "objects.h"
#endif

3
libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
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@ -265,9 +265,6 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL}
#elif defined(TARGET_LPC11U68) #elif defined(TARGET_LPC11U68)
#define INITIAL_SP (0x10004000UL) #define INITIAL_SP (0x10004000UL)
#elif defined(TARGET_NRF51822)
#define INITIAL_SP (0x20004000UL)
#elif defined(TARGET_STM32F411RE) #elif defined(TARGET_STM32F411RE)
#define INITIAL_SP (0x20020000UL) #define INITIAL_SP (0x20020000UL)

7
libraries/rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
View File

@ -51,7 +51,7 @@
#ifndef OS_TASKCNT #ifndef OS_TASKCNT
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\ # if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
|| defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \ || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
|| defined(TARGET_NRF51822) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC)
# define OS_TASKCNT 14 # define OS_TASKCNT 14
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \ # elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \ || defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \
@ -67,7 +67,7 @@
#ifndef OS_SCHEDULERSTKSIZE #ifndef OS_SCHEDULERSTKSIZE
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\ # if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4088_DM) || defined(TARGET_LPC4330) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
|| defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \ || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) \
|| defined(TARGET_NRF51822) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_STM32F429ZI) || defined(TARGET_STM32F401VC)
# define OS_SCHEDULERSTKSIZE 256 # define OS_SCHEDULERSTKSIZE 256
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \ # elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \ || defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \
@ -147,9 +147,6 @@
# elif defined(TARGET_STM32F407) || defined(TARGET_F407VG) # elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
# define OS_CLOCK 168000000 # define OS_CLOCK 168000000
# elif defined(TARGET_NRF51822)
# define OS_CLOCK 16000000
# elif defined(TARGET_STM32F401RE) # elif defined(TARGET_STM32F401RE)
# define OS_CLOCK 84000000 # define OS_CLOCK 84000000

7
libraries/tests/mbed/basic/main.cpp
View File

@ -1,4 +1,9 @@
#include "test_env.h" #include "test_env.h"
int main() { int main() {
notify_completion(true); MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Basic);
MBED_HOSTTEST_START("MBED_A1");
MBED_HOSTTEST_RESULT(true);
} }

8
libraries/tests/mbed/call_before_main/main.cpp
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@ -10,6 +10,12 @@ extern "C" void mbed_main() {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Call function mbed_main before main);
MBED_HOSTTEST_START("MBED_A21");
printf("MBED: main() starts now!\r\n"); printf("MBED: main() starts now!\r\n");
notify_completion(mbed_main_called);
MBED_HOSTTEST_RESULT(mbed_main_called);
} }

8
libraries/tests/mbed/cpp/main.cpp
View File

@ -54,6 +54,11 @@ Heap::hello
Heap::destroy Heap::destroy
*******************/ *******************/
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(C++);
MBED_HOSTTEST_START("MBED_12");
bool result = true; bool result = true;
for (;;) for (;;)
{ {
@ -77,6 +82,5 @@ int main (void) {
break; break;
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

7
libraries/tests/mbed/detect/main.cpp
View File

@ -2,9 +2,14 @@
#include "test_env.h" #include "test_env.h"
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT(detect_auto);
MBED_HOSTTEST_DESCRIPTION(Simple detect test);
MBED_HOSTTEST_START("DTCT_1");
notify_start(); notify_start();
printf("MBED: Target '%s'\r\n", TEST_SUITE_TARGET_NAME); printf("MBED: Target '%s'\r\n", TEST_SUITE_TARGET_NAME);
printf("MBED: Test ID '%s'\r\n", TEST_SUITE_TEST_ID); printf("MBED: Test ID '%s'\r\n", TEST_SUITE_TEST_ID);
printf("MBED: UUID '%s'\r\n", TEST_SUITE_UUID); printf("MBED: UUID '%s'\r\n", TEST_SUITE_UUID);
notify_completion(true); MBED_HOSTTEST_RESULT(true);
} }

14
libraries/tests/mbed/dev_null/main.cpp
View File

@ -1,8 +1,7 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h" #include "test_env.h"
class DevNull : public Stream class DevNull : public Stream {
{
public: public:
DevNull(const char *name = NULL) : Stream(name) {} DevNull(const char *name = NULL) : Stream(name) {}
@ -17,12 +16,15 @@ protected:
DevNull null("null"); DevNull null("null");
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(dev_null_auto);
MBED_HOSTTEST_DESCRIPTION(stdout redirected to dev null);
MBED_HOSTTEST_START("EXAMPLE_1");
printf("MBED: re-routing stdout to /null\r\n"); printf("MBED: re-routing stdout to /null\r\n");
freopen("/null", "w", stdout); freopen("/null", "w", stdout);
printf("MBED: printf redirected to /null\r\n"); // This shouldn't appear printf("MBED: printf redirected to /null\r\n"); // This shouldn't appear
// If failure message can be seen test should fail :) // If failure message can be seen test should fail :)
notify_completion(false); // This is 'false' on purpose MBED_HOSTTEST_RESULT(false); // This is 'false' on purpose
return 0;
} }

14
libraries/tests/mbed/digitalin_digitalout/main.cpp
View File

@ -41,20 +41,24 @@ DigitalIn in(p25);
#endif #endif
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(DigitalIn DigitalOut);
MBED_HOSTTEST_START("MBED_A5");
out = 0; out = 0;
wait(0.1); wait(0.1);
if (in != 0) { if (in != 0) {
printf("ERROR: in != 0\n"); printf("ERROR: in != 0\n");
notify_completion(false); MBED_HOSTTEST_RESULT(false);
} }
out = 1; out = 1;
wait(0.1); wait(0.1);
if (in != 1) { if (in != 1) {
printf("ERROR: in != 1\n"); printf("ERROR: in != 1\n");
notify_completion(false); MBED_HOSTTEST_RESULT(false);
} }
notify_completion(true); MBED_HOSTTEST_RESULT(true);
} }

7
libraries/tests/mbed/digitalinout/main.cpp
View File

@ -44,6 +44,11 @@ DigitalInOut d2(p25);
int main() int main()
{ {
MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(DigitalInOut);
MBED_HOSTTEST_START("MBED_A6");
bool check = true; bool check = true;
d1.output(); d1.output();
@ -76,5 +81,5 @@ int main()
check = false; check = false;
} }
notify_completion(check); MBED_HOSTTEST_RESULT(check);
} }

8
libraries/tests/mbed/div/main.cpp
View File

@ -17,6 +17,11 @@ const char *result_str(bool result) {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Integer constant division);
MBED_HOSTTEST_START("MBED_26");
bool result = true; bool result = true;
{ // 0xFFFFFFFF * 8 = 0x7fffffff8 { // 0xFFFFFFFF * 8 = 0x7fffffff8
@ -35,6 +40,5 @@ int main() {
printf("64bit: 0x17FFFFFFE8: expected 0x%lX got 0x%lX ... %s\r\n", values.first, test_ret, result_str(test_res)); printf("64bit: 0x17FFFFFFE8: expected 0x%lX got 0x%lX ... %s\r\n", values.first, test_ret, result_str(test_res));
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

10
libraries/tests/mbed/echo/main.cpp
View File

@ -7,18 +7,18 @@
namespace { namespace {
const int BUFFER_SIZE = 48; const int BUFFER_SIZE = 48;
char buffer[BUFFER_SIZE] = {0};
} }
int main() { int main() {
char buffer[BUFFER_SIZE] = {0}; MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(echo);
MBED_HOSTTEST_DESCRIPTION(Serial Echo at 115200);
MBED_HOSTTEST_START("MBED_A9");
Serial pc(TXPIN, RXPIN); Serial pc(TXPIN, RXPIN);
pc.baud(115200); pc.baud(115200);
pc.puts("{{");
pc.puts(TEST_ENV_START); // Host test is expecting preamble
pc.puts("}}");
while (1) { while (1) {
pc.gets(buffer, BUFFER_SIZE - 1); pc.gets(buffer, BUFFER_SIZE - 1);
pc.printf("%s", buffer); pc.printf("%s", buffer);

23
libraries/tests/mbed/env/test_env.cpp vendored
View File

@ -56,6 +56,29 @@ bool notify_completion_str(bool success, char* buffer)
return result; return result;
} }
// Host test auto-detection API
void notify_host_test_name(const char *host_test) {
if (host_test) {
printf("{{host_test_name;%s}}" NL, host_test);
}
}
void notify_timeout(int timeout) {
printf("{{timeout;%d}}" NL, timeout);
}
void notify_test_id(const char *test_id) {
if (test_id) {
printf("{{test_id;%s}}" NL, test_id);
}
}
void notify_test_description(const char *description) {
if (description) {
printf("{{description;%s}}" NL, description);
}
}
// -DMBED_BUILD_TIMESTAMP=1406208182.13 // -DMBED_BUILD_TIMESTAMP=1406208182.13
unsigned int testenv_randseed() unsigned int testenv_randseed()

30
libraries/tests/mbed/env/test_env.h vendored
View File

@ -22,6 +22,36 @@ void notify_performance_coefficient(const char* measurement_name, const int valu
void notify_performance_coefficient(const char* measurement_name, const unsigned int value); void notify_performance_coefficient(const char* measurement_name, const unsigned int value);
void notify_performance_coefficient(const char* measurement_name, const double value); void notify_performance_coefficient(const char* measurement_name, const double value);
// Host test auto-detection API
void notify_host_test_name(const char *host_test);
void notify_timeout(int timeout);
void notify_test_id(const char *test_id);
void notify_test_description(const char *description);
// Host test auto-detection API
#define MBED_HOSTTEST_START(TESTID) notify_test_id(TESTID); notify_start()
#define MBED_HOSTTEST_SELECT(NAME) notify_host_test_name(#NAME)
#define MBED_HOSTTEST_TIMEOUT(SECONDS) notify_timeout(SECONDS)
#define MBED_HOSTTEST_DESCRIPTION(DESC) notify_test_description(#DESC)
#define MBED_HOSTTEST_RESULT(RESULT) notify_completion(RESULT)
/**
Test auto-detection preamble example:
main() {
MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT( host_test );
MBED_HOSTTEST_DESCRIPTION(Hello World);
MBED_HOSTTEST_START("MBED_10");
// Proper 'host_test.py' should take over supervising of this test
// Test code
bool result = ...;
MBED_HOSTTEST_RESULT(result);
}
*/
// Test functionality useful during testing // Test functionality useful during testing
unsigned int testenv_randseed(); unsigned int testenv_randseed();

22
libraries/tests/mbed/file/main.cpp
View File

@ -6,8 +6,7 @@ Serial pc(USBTX, USBRX);
#define FILENAME "/local/out.txt" #define FILENAME "/local/out.txt"
#define TEST_STRING "Hello World!" #define TEST_STRING "Hello World!"
FILE *test_open(const char *mode) FILE *test_open(const char *mode) {
{
FILE *f = fopen(FILENAME, mode); FILE *f = fopen(FILENAME, mode);
if (f == NULL) { if (f == NULL) {
printf("Error opening file"NL); printf("Error opening file"NL);
@ -16,8 +15,7 @@ FILE *test_open(const char *mode)
return f; return f;
} }
void test_write(FILE *f, char *str, int str_len) void test_write(FILE *f, char *str, int str_len) {
{
int n = fprintf(f, str); int n = fprintf(f, str);
if (n != str_len) { if (n != str_len) {
@ -26,8 +24,7 @@ void test_write(FILE *f, char *str, int str_len)
} }
} }
void test_read(FILE *f, char *str, int str_len) void test_read(FILE *f, char *str, int str_len) {
{
int n = fread(str, sizeof(unsigned char), str_len, f); int n = fread(str, sizeof(unsigned char), str_len, f);
if (n != str_len) { if (n != str_len) {
@ -36,8 +33,7 @@ void test_read(FILE *f, char *str, int str_len)
} }
} }
void test_close(FILE *f) void test_close(FILE *f) {
{
int rc = fclose(f); int rc = fclose(f);
if (rc != 0) { if (rc != 0) {
@ -46,8 +42,12 @@ void test_close(FILE *f)
} }
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Semihost file system);
MBED_HOSTTEST_START("MBED_A2");
pc.printf("Test the Stream class\n"); pc.printf("Test the Stream class\n");
printf("connected: %s\n", (semihost_connected()) ? ("Yes") : ("No")); printf("connected: %s\n", (semihost_connected()) ? ("Yes") : ("No"));
@ -74,5 +74,5 @@ int main()
test_close(f); test_close(f);
// Check the two strings are equal // Check the two strings are equal
notify_completion((strncmp(buffer, str, str_len) == 0)); MBED_HOSTTEST_RESULT((strncmp(buffer, str, str_len) == 0));
} }

7
libraries/tests/mbed/hello/main.cpp
View File

@ -2,7 +2,12 @@
int main() int main()
{ {
notify_start(); MBED_HOSTTEST_TIMEOUT(5);
MBED_HOSTTEST_SELECT(hello_auto);
MBED_HOSTTEST_DESCRIPTION(Hello World);
MBED_HOSTTEST_START("MBED_10");
printf("Hello World\r\n"); printf("Hello World\r\n");
while(1); while(1);
} }

7
libraries/tests/mbed/i2c_MMA8451Q/main.cpp
View File

@ -29,6 +29,11 @@ float calc_3d_vector_len(float x, float y, float z) {
#define MEASURE_DEVIATION_TOLERANCE 0.025 // 2.5% #define MEASURE_DEVIATION_TOLERANCE 0.025 // 2.5%
int main(void) { int main(void) {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(MMA8451Q accelerometer);
MBED_HOSTTEST_START("KL25Z_5");
DigitalOut led(LED_GREEN); DigitalOut led(LED_GREEN);
MMA8451Q acc(SDA, SCL, MMA8451_I2C_ADDRESS); MMA8451Q acc(SDA, SCL, MMA8451_I2C_ADDRESS);
bool result = true; bool result = true;
@ -47,5 +52,5 @@ int main(void) {
wait(0.5); wait(0.5);
led = !led; led = !led;
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

10
libraries/tests/mbed/i2c_TMP102/main.cpp
View File

@ -32,13 +32,17 @@ TMP102 temperature(I2C_SDA, I2C_SCL, 0x90);
TMP102 temperature(p28, p27, 0x90); TMP102 temperature(p28, p27, 0x90);
#endif #endif
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(DigitalIn DigitalOut);
MBED_HOSTTEST_START("MBED_A4");
float t = temperature.read(); float t = temperature.read();
printf("TMP102: Temperature: %f\n\r", t); printf("TMP102: Temperature: %f\n\r", t);
// In our test environment (ARM office) we should get a temperature within // In our test environment (ARM office) we should get a temperature within
// the range ]15, 30[C // the range ]15, 30[C
bool result = (t > 15.0) && (t < 30.0); bool result = (t > 15.0) && (t < 30.0);
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

10
libraries/tests/mbed/i2c_eeprom/main.cpp
View File

@ -73,8 +73,12 @@ const int i2c_freq_hz = 400000;
const int i2c_delay_us = 0; const int i2c_delay_us = 0;
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(I2C EEPROM read write test);
MBED_HOSTTEST_START("MBED_A19");
const int EEPROM_MEM_ADDR = 0xA0; const int EEPROM_MEM_ADDR = 0xA0;
const char MARK = 0x66; const char MARK = 0x66;
int fw = 0; int fw = 0;
@ -146,5 +150,5 @@ int main()
printf("\tTotal failures: %d\r\n", fw + fr + fc); printf("\tTotal failures: %d\r\n", fw + fr + fc);
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

14
libraries/tests/mbed/i2c_eeprom_line/main.cpp
View File

@ -22,13 +22,13 @@
******************************************************************************/ ******************************************************************************/
// Test configuration block // Test configuration block
namespace namespace {
{
const int ntests = 1000; const int ntests = 1000;
const int i2c_freq_hz = 400000; const int i2c_freq_hz = 400000;
const int i2c_delay_us = 0; const int i2c_delay_us = 0;
// const int EEPROM_24LC256_SIZE = (256 * 1024 / 8); // 256 kbit memory // const int EEPROM_24LC256_SIZE = (256 * 1024 / 8); // 256 kbit memory
} }
// End of test configuration block // End of test configuration block
#if defined(TARGET_KL25Z) #if defined(TARGET_KL25Z)
@ -78,8 +78,12 @@ I2C i2c(p28, p27);
#define PATTERN_MASK 0x66, ~0x66, 0x00, 0xFF, 0xA5, 0x5A, 0xF0, 0x0F #define PATTERN_MASK 0x66, ~0x66, 0x00, 0xFF, 0xA5, 0x5A, 0xF0, 0x0F
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(I2C EEPROM line read write test);
MBED_HOSTTEST_START("MBED_A25");
const int EEPROM_MEM_ADDR = 0xA0; const int EEPROM_MEM_ADDR = 0xA0;
bool result = true; bool result = true;
@ -137,5 +141,5 @@ int main()
printf("EEPROM: Pattern match errors: %d/%d ... [%s]\r\n", pattern_errors, ntests, pattern_errors ? "FAIL" : "OK"); printf("EEPROM: Pattern match errors: %d/%d ... [%s]\r\n", pattern_errors, ntests, pattern_errors ? "FAIL" : "OK");
result = write_errors == 0 && read_errors == 0; result = write_errors == 0 && read_errors == 0;
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

16
libraries/tests/mbed/interruptin/main.cpp
View File

@ -87,6 +87,11 @@ void flipper() {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(InterruptIn);
MBED_HOSTTEST_START("MBED_A7");
IN_OUT_CLEAR; IN_OUT_CLEAR;
//Test falling edges first //Test falling edges first
in.rise(NULL); in.rise(NULL);
@ -95,7 +100,7 @@ int main() {
if(checks != 5) { if(checks != 5) {
printf("MBED: falling edges test failed: %d\r\n",checks); printf("MBED: falling edges test failed: %d\r\n",checks);
notify_completion(false); MBED_HOSTTEST_RESULT(false);
} }
//Now test rising edges //Now test rising edges
@ -105,7 +110,7 @@ int main() {
if (checks != 10) { if (checks != 10) {
printf("MBED: raising edges test failed: %d\r\n", checks); printf("MBED: raising edges test failed: %d\r\n", checks);
notify_completion(false); MBED_HOSTTEST_RESULT(false);
} }
//Now test switch off edge detection //Now test switch off edge detection
@ -115,7 +120,7 @@ int main() {
if (checks != 10) { if (checks != 10) {
printf("MBED: edge detection switch off test failed: %d\r\n", checks); printf("MBED: edge detection switch off test failed: %d\r\n", checks);
notify_completion(false); MBED_HOSTTEST_RESULT(false);
} }
//Finally test both //Finally test both
@ -125,9 +130,8 @@ int main() {
if (checks != 20) { if (checks != 20) {
printf("MBED: Simultaneous rising and falling edges failed: %d\r\n", checks); printf("MBED: Simultaneous rising and falling edges failed: %d\r\n", checks);
notify_completion(false); MBED_HOSTTEST_RESULT(false);
} }
notify_completion(true); MBED_HOSTTEST_RESULT(true);
return 0;
} }

7
libraries/tests/mbed/portinout/main.cpp
View File

@ -91,6 +91,11 @@ PortInOut port1(PORT_1, MASK_1);
PortInOut port2(PORT_2, MASK_2); PortInOut port2(PORT_2, MASK_2);
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(PortInOut);
MBED_HOSTTEST_START("MBED_A11");
bool check = true; bool check = true;
port1.output(); port1.output();
@ -111,5 +116,5 @@ int main() {
port2 = 0; wait(0.1); port2 = 0; wait(0.1);
if (port1 != 0) check = false; if (port1 != 0) check = false;
notify_completion(check); MBED_HOSTTEST_RESULT(check);
} }

5
libraries/tests/mbed/portout_portin/main.cpp
View File

@ -91,6 +91,11 @@ PortOut port_out(PORT_1, MASK_1);
PortIn port_in (PORT_2, MASK_2); PortIn port_in (PORT_2, MASK_2);
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(PortOut PortIn);
MBED_HOSTTEST_START("MBED_A10");
port_out = MASK_1; port_out = MASK_1;
wait(0.1); wait(0.1);
int value = port_in.read(); int value = port_in.read();

6
libraries/tests/mbed/rtc/main.cpp
View File

@ -1,8 +1,14 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
#define CUSTOM_TIME 1256729737 #define CUSTOM_TIME 1256729737
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(rtc_auto);
MBED_HOSTTEST_DESCRIPTION(RTC);
MBED_HOSTTEST_START("MBED_16");
char buffer[32] = {0}; char buffer[32] = {0};
set_time(CUSTOM_TIME); // Set RTC time to Wed, 28 Oct 2009 11:35:37 set_time(CUSTOM_TIME); // Set RTC time to Wed, 28 Oct 2009 11:35:37
while(1) { while(1) {

10
libraries/tests/mbed/sd/main.cpp
View File

@ -61,8 +61,12 @@ const char *sd_file_path = "/sd/out.txt";
const int DATA_SIZE = 256; const int DATA_SIZE = 256;
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(SD File System);
MBED_HOSTTEST_START("MBED_A12");
uint8_t data_written[DATA_SIZE] = { 0 }; uint8_t data_written[DATA_SIZE] = { 0 };
bool result = false; bool result = false;
@ -103,5 +107,5 @@ int main()
} }
result = write_result && read_result; result = write_result && read_result;
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

22
libraries/tests/mbed/sd_perf_fatfs/main.cpp
View File

@ -55,16 +55,14 @@ SDFileSystem sd(SDMOSI, SDMISO, SDSCLK, SDSSEL, "sd");
SDFileSystem sd(p11, p12, p13, p14, "sd"); SDFileSystem sd(p11, p12, p13, p14, "sd");
#endif #endif
namespace namespace {
{
char buffer[1024]; char buffer[1024];
const int KIB_RW = 128; const int KIB_RW = 128;
Timer timer; Timer timer;
const char *bin_filename = "0:testfile.bin"; const char *bin_filename = "0:testfile.bin";
} }
bool test_sf_file_write_fatfs(const char *filename, const int kib_rw) bool test_sf_file_write_fatfs(const char *filename, const int kib_rw) {
{
FIL file; FIL file;
bool result = true; bool result = true;
FRESULT res = f_open(&file, filename, FA_WRITE | FA_CREATE_ALWAYS); FRESULT res = f_open(&file, filename, FA_WRITE | FA_CREATE_ALWAYS);
@ -96,8 +94,7 @@ bool test_sf_file_write_fatfs(const char *filename, const int kib_rw)
return result; return result;
} }
bool test_sf_file_read_fatfs(const char *filename, const int kib_rw) bool test_sf_file_read_fatfs(const char *filename, const int kib_rw) {
{
FIL file; FIL file;
bool result = true; bool result = true;
FRESULT res = f_open(&file, filename, FA_READ | FA_OPEN_EXISTING); FRESULT res = f_open(&file, filename, FA_READ | FA_OPEN_EXISTING);
@ -123,13 +120,16 @@ bool test_sf_file_read_fatfs(const char *filename, const int kib_rw)
return result; return result;
} }
char RandomChar() char RandomChar() {
{
return rand() % 100; return rand() % 100;
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(SD FatFS RW Speed);
MBED_HOSTTEST_START("PERF_3");
// Test header // Test header
printf("\r\n"); printf("\r\n");
printf("SD Card FatFS Performance Test\r\n"); printf("SD Card FatFS Performance Test\r\n");
@ -156,5 +156,5 @@ int main()
} }
break; break;
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

22
libraries/tests/mbed/sd_perf_fhandle/main.cpp
View File

@ -55,16 +55,14 @@ SDFileSystem sd(SDMOSI, SDMISO, SDSCLK, SDSSEL, "sd");
SDFileSystem sd(p11, p12, p13, p14, "sd"); SDFileSystem sd(p11, p12, p13, p14, "sd");
#endif #endif
namespace namespace {
{
char buffer[1024]; char buffer[1024];
const int KIB_RW = 128; const int KIB_RW = 128;
Timer timer; Timer timer;
const char *bin_filename = "testfile.bin"; const char *bin_filename = "testfile.bin";
} }
bool test_sf_file_write_fhandle(const char *filename, const int kib_rw) bool test_sf_file_write_fhandle(const char *filename, const int kib_rw) {
{
bool result = true; bool result = true;
FileHandle* file = sd.open(filename, O_WRONLY | O_CREAT | O_TRUNC); FileHandle* file = sd.open(filename, O_WRONLY | O_CREAT | O_TRUNC);
if (file != NULL) { if (file != NULL) {
@ -94,8 +92,7 @@ bool test_sf_file_write_fhandle(const char *filename, const int kib_rw)
return result; return result;
} }
bool test_sf_file_read_fhandle(const char *filename, const int kib_rw) bool test_sf_file_read_fhandle(const char *filename, const int kib_rw) {
{
bool result = true; bool result = true;
FileHandle* file = sd.open(filename, O_RDONLY); FileHandle* file = sd.open(filename, O_RDONLY);
if (file) { if (file) {
@ -118,13 +115,16 @@ bool test_sf_file_read_fhandle(const char *filename, const int kib_rw)
return result; return result;
} }
char RandomChar() char RandomChar() {
{
return rand() % 100; return rand() % 100;
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(SD FileHandle RW Speed);
MBED_HOSTTEST_START("PERF_2");
// Test header // Test header
printf("\r\n"); printf("\r\n");
printf("SD Card FileHandle Performance Test\r\n"); printf("SD Card FileHandle Performance Test\r\n");
@ -151,5 +151,5 @@ int main()
} }
break; break;
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

22
libraries/tests/mbed/sd_perf_stdio/main.cpp
View File

@ -55,16 +55,14 @@ SDFileSystem sd(SDMOSI, SDMISO, SDSCLK, SDSSEL, "sd");
SDFileSystem sd(p11, p12, p13, p14, "sd"); SDFileSystem sd(p11, p12, p13, p14, "sd");
#endif #endif
namespace namespace {
{
char buffer[1024]; char buffer[1024];
const int KIB_RW = 128; const int KIB_RW = 128;
Timer timer; Timer timer;
const char *bin_filename = "/sd/testfile.bin"; const char *bin_filename = "/sd/testfile.bin";
} }
bool test_sf_file_write_stdio(const char *filename, const int kib_rw) bool test_sf_file_write_stdio(const char *filename, const int kib_rw) {
{
bool result = true; bool result = true;
FILE* file = fopen(filename, "w"); FILE* file = fopen(filename, "w");
if (file != NULL) { if (file != NULL) {
@ -94,8 +92,7 @@ bool test_sf_file_write_stdio(const char *filename, const int kib_rw)
return result; return result;
} }
bool test_sf_file_read_stdio(const char *filename, const int kib_rw) bool test_sf_file_read_stdio(const char *filename, const int kib_rw) {
{
bool result = true; bool result = true;
FILE* file = fopen(filename, "r"); FILE* file = fopen(filename, "r");
if (file) { if (file) {
@ -118,13 +115,16 @@ bool test_sf_file_read_stdio(const char *filename, const int kib_rw)
return result; return result;
} }
char RandomChar() char RandomChar() {
{
return rand() % 100; return rand() % 100;
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(SD stdio RW Speed);
MBED_HOSTTEST_START("PERF_1");
// Test header // Test header
printf("\r\n"); printf("\r\n");
printf("SD Card Stdio Performance Test\r\n"); printf("SD Card Stdio Performance Test\r\n");
@ -151,5 +151,5 @@ int main()
} }
break; break;
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
} }

7
libraries/tests/mbed/semihost/main.cpp
View File

@ -6,6 +6,10 @@
#define MAC_VENDOR_ARM_2 0xF7 #define MAC_VENDOR_ARM_2 0xF7
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(10);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Semihost);
MBED_HOSTTEST_START("MBED_22");
printf("Semihost connected: %s\n", (semihost_connected()) ? ("Yes") : ("No")); printf("Semihost connected: %s\n", (semihost_connected()) ? ("Yes") : ("No"));
@ -30,6 +34,5 @@ int main() {
printf("MAC Address Prefix: 00:02:F7, Vendor: ARM\r\n"); printf("MAC Address Prefix: 00:02:F7, Vendor: ARM\r\n");
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

10
libraries/tests/mbed/stdio/main.cpp
View File

@ -7,6 +7,11 @@
*/ */
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(stdio_auto);
MBED_HOSTTEST_DESCRIPTION(stdio);
MBED_HOSTTEST_START("MBED_2");
DigitalOut led1(LED1); DigitalOut led1(LED1);
DigitalOut led2(LED2); DigitalOut led2(LED2);
@ -14,12 +19,11 @@ int main() {
int value_int; int value_int;
}; };
notify_start(); notify_start(); // Just to sync with host test supervisor
const char* PRINT_PATTERN = "MBED: Your value was: %d\r\n"; const char* PRINT_PATTERN = "MBED: Your value was: %d\r\n";
while (true) while (true) {
{
// SCANF PRINTF family // SCANF PRINTF family
value_int = 0; value_int = 0;
led1 = 1; led1 = 1;

6
libraries/tests/mbed/ticker/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
void print_char(char c = '*') void print_char(char c = '*')
{ {
@ -32,6 +33,11 @@ void flip_2() {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Ticker Int);
MBED_HOSTTEST_START("MBED_11");
led1 = 0; led1 = 0;
led2 = 0; led2 = 0;
flipper_1.attach(&flip_1, 1.0); // the address of the function to be attached (flip) and the interval (1 second) flipper_1.attach(&flip_1, 1.0); // the address of the function to be attached (flip) and the interval (1 second)

7
libraries/tests/mbed/ticker_2/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
Ticker tick; Ticker tick;
DigitalOut led(LED1); DigitalOut led(LED1);
@ -26,6 +27,12 @@ void togglePin(void)
int main() int main()
{ {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Ticker Int us);
MBED_HOSTTEST_START("MBED_23");
tick.attach_us(togglePin, 1000); tick.attach_us(togglePin, 1000);
while (1); while (1);
} }

7
libraries/tests/mbed/ticker_3/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
void ticker_callback_1(void); void ticker_callback_1(void);
void ticker_callback_2(void); void ticker_callback_2(void);
@ -31,6 +32,12 @@ void ticker_callback_1(void)
int main(void) int main(void)
{ {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Ticker Two callbacks);
MBED_HOSTTEST_START("MBED_34");
ticker.attach(ticker_callback_1, 1.0); ticker.attach(ticker_callback_1, 1.0);
while(1); while(1);
} }

6
libraries/tests/mbed/time_us/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
DigitalOut led(LED1); DigitalOut led(LED1);
@ -14,6 +15,11 @@ void print_char(char c = '*')
int main() int main()
{ {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Time us);
MBED_HOSTTEST_START("MBED_25");
while (true) { while (true) {
for (int i = 0; i < MS_INTERVALS; i++) { for (int i = 0; i < MS_INTERVALS; i++) {
wait_us(1000); wait_us(1000);

19
libraries/tests/mbed/timeout/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
Timeout timer; Timeout timer;
DigitalOut led(LED1); DigitalOut led(LED1);
@ -7,16 +8,14 @@ namespace {
const int MS_INTERVALS = 1000; const int MS_INTERVALS = 1000;
} }
void print_char(char c = '*') void print_char(char c = '*') {
{
printf("%c", c); printf("%c", c);
fflush(stdout); fflush(stdout);
} }
void toggleOff(void); void toggleOff(void);
void toggleOn(void) void toggleOn(void) {
{
static int toggle_counter = 0; static int toggle_counter = 0;
if (toggle_counter == MS_INTERVALS) { if (toggle_counter == MS_INTERVALS) {
led = !led; led = !led;
@ -27,13 +26,17 @@ void toggleOn(void)
timer.attach_us(toggleOff, 500); timer.attach_us(toggleOff, 500);
} }
void toggleOff(void) void toggleOff(void) {
{
timer.attach_us(toggleOn, 500); timer.attach_us(toggleOn, 500);
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Timeout Int us);
MBED_HOSTTEST_START("MBED_24");
toggleOn(); toggleOn();
while (1); while (1);
} }

13
libraries/tests/mbed/vtor_reloc/main.cpp
View File

@ -46,14 +46,17 @@ static bool test_once() {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Interrupt vector relocation);
MBED_HOSTTEST_START("MBED_A18");
// First test, no table reallocation // First test, no table reallocation
{ {
printf("Starting first test (interrupts not relocated).\r\n"); printf("Starting first test (interrupts not relocated).\r\n");
bool ret = test_once(); bool ret = test_once();
if (ret == false) { if (ret == false) {
notify_completion(false); MBED_HOSTTEST_RESULT(false);
return 1;
} }
} }
@ -65,11 +68,9 @@ int main() {
bool ret = test_once(); bool ret = test_once();
if (ret == false) { if (ret == false) {
notify_completion(false); MBED_HOSTTEST_RESULT(false);
return 1;
} }
} }
notify_completion(true); MBED_HOSTTEST_RESULT(true);
return 0;
} }

17
libraries/tests/net/echo/tcp_client/main.cpp
View File

@ -1,8 +1,8 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
#include "EthernetInterface.h" #include "EthernetInterface.h"
struct s_ip_address struct s_ip_address {
{
int ip_1; int ip_1;
int ip_2; int ip_2;
int ip_3; int ip_3;
@ -10,6 +10,11 @@ struct s_ip_address
}; };
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(tcpecho_client_auto);
MBED_HOSTTEST_DESCRIPTION(TCP echo client);
MBED_HOSTTEST_START("NET_4");
char buffer[256] = {0}; char buffer[256] = {0};
char out_buffer[] = "Hello World\n"; char out_buffer[] = "Hello World\n";
char out_success[] = "{{success}}\n{{end}}\n"; char out_success[] = "{{success}}\n{{end}}\n";
@ -17,20 +22,20 @@ int main() {
s_ip_address ip_addr = {0, 0, 0, 0}; s_ip_address ip_addr = {0, 0, 0, 0};
int port = 0; int port = 0;
printf("TCPCllient waiting for server IP and port...\r\n"); printf("TCPCllient waiting for server IP and port..." NL);
scanf("%d.%d.%d.%d:%d", &ip_addr.ip_1, &ip_addr.ip_2, &ip_addr.ip_3, &ip_addr.ip_4, &port); scanf("%d.%d.%d.%d:%d", &ip_addr.ip_1, &ip_addr.ip_2, &ip_addr.ip_3, &ip_addr.ip_4, &port);
printf("Address received:%d.%d.%d.%d:%d\r\n", ip_addr.ip_1, ip_addr.ip_2, ip_addr.ip_3, ip_addr.ip_4, port); printf("Address received:%d.%d.%d.%d:%d" NL, ip_addr.ip_1, ip_addr.ip_2, ip_addr.ip_3, ip_addr.ip_4, port);
EthernetInterface eth; EthernetInterface eth;
eth.init(); //Use DHCP eth.init(); //Use DHCP
eth.connect(); eth.connect();
printf("TCPClient IP Address is %s\r\n", eth.getIPAddress()); printf("TCPClient IP Address is %s" NL, eth.getIPAddress());
sprintf(buffer, "%d.%d.%d.%d", ip_addr.ip_1, ip_addr.ip_2, ip_addr.ip_3, ip_addr.ip_4); sprintf(buffer, "%d.%d.%d.%d", ip_addr.ip_1, ip_addr.ip_2, ip_addr.ip_3, ip_addr.ip_4);
TCPSocketConnection socket; TCPSocketConnection socket;
while (socket.connect(buffer, port) < 0) { while (socket.connect(buffer, port) < 0) {
printf("TCPCllient unable to connect to %s:%d\r\n", buffer, port); printf("TCPCllient unable to connect to %s:%d" NL, buffer, port);
wait(1); wait(1);
} }

9
libraries/tests/net/echo/tcp_client_loop/main.cpp
View File

@ -21,8 +21,12 @@ char char_rand() {
return (rand() % ASCII_MAX) + ' '; return (rand() % ASCII_MAX) + ' ';
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(tcpecho_client_auto);
MBED_HOSTTEST_DESCRIPTION(TCP client echo loop);
MBED_HOSTTEST_START("NET_13");
char buffer[BUFFER_SIZE] = {0}; char buffer[BUFFER_SIZE] = {0};
char out_buffer[BUFFER_SIZE] = {0}; char out_buffer[BUFFER_SIZE] = {0};
s_ip_address ip_addr = {0, 0, 0, 0}; s_ip_address ip_addr = {0, 0, 0, 0};
@ -70,6 +74,5 @@ int main() {
} }
socket.close(); socket.close();
eth.disconnect(); eth.disconnect();
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

12
libraries/tests/net/echo/tcp_server/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
#include "EthernetInterface.h" #include "EthernetInterface.h"
namespace { namespace {
@ -7,22 +8,27 @@ namespace {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(tcpecho_server_auto);
MBED_HOSTTEST_DESCRIPTION(TCP echo server);
MBED_HOSTTEST_START("NET_3");
char buffer[BUFFER_SIZE] = {0}; char buffer[BUFFER_SIZE] = {0};
EthernetInterface eth; EthernetInterface eth;
eth.init(); //Use DHCP eth.init(); //Use DHCP
eth.connect(); eth.connect();
printf("MBED: Server IP Address is %s:%d\r\n", eth.getIPAddress(), ECHO_SERVER_PORT); printf("MBED: Server IP Address is %s:%d" NL, eth.getIPAddress(), ECHO_SERVER_PORT);
TCPSocketServer server; TCPSocketServer server;
server.bind(ECHO_SERVER_PORT); server.bind(ECHO_SERVER_PORT);
server.listen(); server.listen();
while (true) { while (true) {
printf("MBED: Wait for new connection...\n"); printf("MBED: Wait for new connection..." NL);
TCPSocketConnection client; TCPSocketConnection client;
server.accept(client); server.accept(client);
client.set_blocking(false, 1500); // Timeout after (1.5)s client.set_blocking(false, 1500); // Timeout after (1.5)s
printf("MBED: Connection from: %s\r\n", client.get_address()); printf("MBED: Connection from: %s" NL, client.get_address());
while (true) { while (true) {
const int n = client.receive(buffer, sizeof(buffer)); const int n = client.receive(buffer, sizeof(buffer));

12
libraries/tests/net/echo/udp_client/main.cpp
View File

@ -11,8 +11,7 @@ namespace {
const int MAX_ECHO_LOOPS = 100; const int MAX_ECHO_LOOPS = 100;
const char ASCII_MAX = '~' - ' '; const char ASCII_MAX = '~' - ' ';
struct s_ip_address struct s_ip_address {
{
int ip_1; int ip_1;
int ip_2; int ip_2;
int ip_3; int ip_3;
@ -24,8 +23,12 @@ char char_rand() {
return (rand() % ASCII_MAX) + ' '; return (rand() % ASCII_MAX) + ' ';
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(udpecho_client_auto);
MBED_HOSTTEST_DESCRIPTION(UDP echo client);
MBED_HOSTTEST_START("NET_6");
char buffer[BUFFER_SIZE] = {0}; char buffer[BUFFER_SIZE] = {0};
char out_buffer[BUFFER_SIZE] = {0}; char out_buffer[BUFFER_SIZE] = {0};
s_ip_address ip_addr = {0, 0, 0, 0}; s_ip_address ip_addr = {0, 0, 0, 0};
@ -75,6 +78,5 @@ int main() {
socket.close(); socket.close();
eth.disconnect(); eth.disconnect();
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

6
libraries/tests/net/echo/udp_server/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
#include "EthernetInterface.h" #include "EthernetInterface.h"
namespace { namespace {
@ -7,6 +8,11 @@ namespace {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(udpecho_server_auto);
MBED_HOSTTEST_DESCRIPTION(UDP echo server);
MBED_HOSTTEST_START("NET_5");
EthernetInterface eth; EthernetInterface eth;
eth.init(); //Use DHCP eth.init(); //Use DHCP
eth.connect(); eth.connect();

8
libraries/tests/net/helloworld/tcpclient/main.cpp
View File

@ -24,6 +24,11 @@ bool find_substring(const char *first, const char *last, const char *s_first, co
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(TCP client hello world);
MBED_HOSTTEST_START("NET_1");
bool result = false; bool result = false;
EthernetInterface eth; EthernetInterface eth;
eth.init(); //Use DHCP eth.init(); //Use DHCP
@ -76,6 +81,5 @@ int main() {
sock.close(); sock.close();
eth.disconnect(); eth.disconnect();
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

12
libraries/tests/net/helloworld/udpclient/main.cpp
View File

@ -10,6 +10,11 @@ namespace {
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(NIST Internet Time Service);
MBED_HOSTTEST_START("NET_2");
bool result = false; bool result = false;
EthernetInterface eth; EthernetInterface eth;
eth.init(); //Use DHCP eth.init(); //Use DHCP
@ -34,9 +39,11 @@ int main() {
if (n > 0) { if (n > 0) {
result = true; result = true;
const unsigned int timeRes = ntohl(in_buffer_uint); const unsigned int timeRes = ntohl(in_buffer_uint);
const float years = timeRes / 60.0 / 60.0 / 24.0 / 365; const float years = timeRes / 60.0 / 60.0 / 24.0 / 365.0;
const float days = timeRes / 24.0 / 60.0 / 60.0;
printf("UDP: Received %d bytes from server %s on port %d\r\n", n, nist.get_address(), nist.get_port()); printf("UDP: Received %d bytes from server %s on port %d\r\n", n, nist.get_address(), nist.get_port());
printf("UDP: %u seconds since 01/01/1900 00:00 GMT ... %s\r\n", timeRes, timeRes > 0 ? "[OK]" : "[FAIL]"); printf("UDP: %u seconds since 01/01/1900 00:00 GMT ... %s\r\n", timeRes, timeRes > 0 ? "[OK]" : "[FAIL]");
printf("UDP: %.2f days since 01/01/1900 00:00 GMT ... %s\r\n", days, timeRes > 0 ? "[OK]" : "[FAIL]");
printf("UDP: %.2f years since 01/01/1900 00:00 GMT ... %s\r\n", years, timeRes > YEARS_TO_PASS ? "[OK]" : "[FAIL]"); printf("UDP: %.2f years since 01/01/1900 00:00 GMT ... %s\r\n", years, timeRes > YEARS_TO_PASS ? "[OK]" : "[FAIL]");
if (years < YEARS_TO_PASS) { if (years < YEARS_TO_PASS) {
@ -45,6 +52,5 @@ int main() {
} }
sock.close(); sock.close();
eth.disconnect(); eth.disconnect();
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0;
} }

17
libraries/tests/net/protocols/HTTPClient_HelloWorld/main.cpp
View File

@ -8,8 +8,12 @@ namespace {
const int BUFFER_SIZE = 512; const int BUFFER_SIZE = 512;
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(HTTP client hello world);
MBED_HOSTTEST_START("NET_7");
char http_request_buffer[BUFFER_SIZE + 1] = {0}; char http_request_buffer[BUFFER_SIZE + 1] = {0};
HTTPClient http; HTTPClient http;
EthernetInterface eth; EthernetInterface eth;
@ -31,8 +35,7 @@ int main()
if (result == false) { if (result == false) {
eth.disconnect(); eth.disconnect();
notify_completion(false); MBED_HOSTTEST_RESULT(false);
exit(ret);
} }
} }
@ -56,11 +59,9 @@ int main()
if (result == false) { if (result == false) {
eth.disconnect(); eth.disconnect();
notify_completion(false); MBED_HOSTTEST_RESULT(false);
exit(ret);
} }
} }
eth.disconnect(); eth.disconnect();
notify_completion(true); MBED_HOSTTEST_RESULT(true);
return 0;
} }

14
libraries/tests/net/protocols/NTPClient_HelloWorld/main.cpp
View File

@ -3,8 +3,12 @@
#include "EthernetInterface.h" #include "EthernetInterface.h"
#include "NTPClient.h" #include "NTPClient.h"
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(NTP client);
MBED_HOSTTEST_START("NET_8");
EthernetInterface eth; EthernetInterface eth;
NTPClient ntp; NTPClient ntp;
eth.init(); //Use DHCP eth.init(); //Use DHCP
@ -27,11 +31,9 @@ int main()
} }
if (result == false) { if (result == false) {
notify_completion(false); MBED_HOSTTEST_RESULT(false);
exit(ret);
} }
} }
eth.disconnect(); eth.disconnect();
notify_completion(true); MBED_HOSTTEST_RESULT(true);
return 0;
} }

9
libraries/tests/rtos/mbed/basic/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
#include "rtos.h" #include "rtos.h"
/* /*
@ -12,8 +13,7 @@
#define STACK_SIZE DEFAULT_STACK_SIZE #define STACK_SIZE DEFAULT_STACK_SIZE
#endif #endif
void print_char(char c = '*') void print_char(char c = '*') {
{
printf("%c", c); printf("%c", c);
fflush(stdout); fflush(stdout);
} }
@ -30,6 +30,11 @@ void led2_thread(void const *argument) {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Basic thread);
MBED_HOSTTEST_START("RTOS_1");
Thread thread(led2_thread, NULL, osPriorityNormal, STACK_SIZE); Thread thread(led2_thread, NULL, osPriorityNormal, STACK_SIZE);
while (true) { while (true) {

52
libraries/tests/rtos/mbed/file/main.cpp
View File

@ -5,11 +5,17 @@
DigitalOut led2(LED2); DigitalOut led2(LED2);
#define SIZE 120 #define SIZE 100
namespace {
// Allocate data buffers
uint8_t data_written[SIZE] = { 0 };
uint8_t data_read[SIZE] = { 0 };
}
void sd_thread(void const *argument) void sd_thread(void const *argument)
{ {
const char *FILE_NAME = "/sd/out.txt"; const char *FILE_NAME = "/sd/rtos9_test.txt";
#if defined(TARGET_KL25Z) #if defined(TARGET_KL25Z)
SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd"); SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
@ -27,62 +33,64 @@ void sd_thread(void const *argument)
SDFileSystem sd(p11, p12, p13, p14, "sd"); SDFileSystem sd(p11, p12, p13, p14, "sd");
#endif #endif
// Allocate data buffers
uint8_t data_written[SIZE] = { 0 };
uint8_t data_read[SIZE] = { 0 };
{ {
// fill data_written buffer with random data // fill data_written buffer with random data
FILE *f = fopen(FILE_NAME, "w"); FILE *f = fopen(FILE_NAME, "w+");
if (f) { if (f) {
// write these data into the file // write these data into the file
printf("Writing %d bytes to file:\r\n", SIZE); printf("Writing %d bytes to file:" NL, SIZE);
for (int i = 0; i < SIZE; i++) { for (int i = 0; i < SIZE; i++) {
data_written[i] = rand() % 0xff; data_written[i] = rand() % 0xff;
fprintf(f, "%c", data_written[i]); fprintf(f, "%c", data_written[i]);
printf("%02X ", data_written[i]); printf("%02X ", data_written[i]);
if (i && ((i % 20) == 19)) if (i && ((i % 20) == 19))
printf("\r\n"); printf(NL);
} }
fclose(f); fclose(f);
printf("MBED: Done" NL);
} else { } else {
notify_completion(false); printf("MBED: Can't open '%s'" NL, FILE_NAME);
return; MBED_HOSTTEST_RESULT(false);
} }
} }
printf("\r\n\r\n");
printf(NL);
{ {
// read back the data from the file and store them in data_read // read back the data from the file and store them in data_read
FILE *f = fopen(FILE_NAME, "r"); FILE *f = fopen(FILE_NAME, "r");
if (f) { if (f) {
printf("Reading %d bytes from file:\r\n", SIZE); printf("MBED: Reading %d bytes from file:" NL, SIZE);
for (int i = 0; i < SIZE; i++) { for (int i = 0; i < SIZE; i++) {
data_read[i] = fgetc(f); data_read[i] = fgetc(f);
printf("%02X ", data_read[i]); printf("%02X ", data_read[i]);
if (i && ((i % 20) == 19)) if (i && ((i % 20) == 19))
printf("\r\n"); printf(NL);
} }
fclose(f); fclose(f);
printf("MBED: Done\r\n");
} else { } else {
notify_completion(false); printf("MBED: Can't open '%s'" NL, FILE_NAME);
return; MBED_HOSTTEST_RESULT(false);
} }
} }
printf("\r\nDone.\r\n");
// check that the data written == data read // check that the data written == data read
for (int i = 0; i < SIZE; i++) { for (int i = 0; i < SIZE; i++) {
if (data_written[i] != data_read[i]) { if (data_written[i] != data_read[i]) {
notify_completion(false); printf("MBED: Data index=%d: w[0x%02X] != r[0x%02X]" NL, i, data_written[i], data_read[i]);
return; MBED_HOSTTEST_RESULT(false);
} }
} }
notify_completion(true); MBED_HOSTTEST_RESULT(true);
} }
int main() int main() {
{ MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(SD File write read);
MBED_HOSTTEST_START("RTOS_9");
Thread t(sd_thread, NULL, osPriorityNormal, (DEFAULT_STACK_SIZE * 2.25)); Thread t(sd_thread, NULL, osPriorityNormal, (DEFAULT_STACK_SIZE * 2.25));
while (true) { while (true) {

7
libraries/tests/rtos/mbed/isr/main.cpp
View File

@ -36,6 +36,11 @@ void queue_thread(void const *argument) {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(ISR (Queue));
MBED_HOSTTEST_START("RTOS_8");
Thread thread(queue_thread, NULL, osPriorityNormal, STACK_SIZE); Thread thread(queue_thread, NULL, osPriorityNormal, STACK_SIZE);
Ticker ticker; Ticker ticker;
ticker.attach(queue_isr, 1.0); ticker.attach(queue_isr, 1.0);
@ -59,6 +64,6 @@ int main (void) {
} }
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0; return 0;
} }

7
libraries/tests/rtos/mbed/mail/main.cpp
View File

@ -40,6 +40,11 @@ void send_thread (void const *argument) {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Mail messaging);
MBED_HOSTTEST_START("RTOS_6");
Thread thread(send_thread, NULL, osPriorityNormal, STACK_SIZE); Thread thread(send_thread, NULL, osPriorityNormal, STACK_SIZE);
bool result = true; bool result = true;
int result_counter = 0; int result_counter = 0;
@ -65,6 +70,6 @@ int main (void) {
} }
} }
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0; return 0;
} }

10
libraries/tests/rtos/mbed/mutex/main.cpp
View File

@ -16,8 +16,7 @@
#define STACK_SIZE DEFAULT_STACK_SIZE #define STACK_SIZE DEFAULT_STACK_SIZE
#endif #endif
void print_char(char c = '*') void print_char(char c = '*') {
{
printf("%c", c); printf("%c", c);
fflush(stdout); fflush(stdout);
} }
@ -60,6 +59,11 @@ void test_thread(void const *args) {
} }
int main() { int main() {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default);
MBED_HOSTTEST_DESCRIPTION(Mutex resource lock);
MBED_HOSTTEST_START("RTOS_2");
const int t1_delay = THREAD_DELAY * 1; const int t1_delay = THREAD_DELAY * 1;
const int t2_delay = THREAD_DELAY * 2; const int t2_delay = THREAD_DELAY * 2;
const int t3_delay = THREAD_DELAY * 3; const int t3_delay = THREAD_DELAY * 3;
@ -78,6 +82,6 @@ int main() {
} }
fflush(stdout); fflush(stdout);
notify_completion(!mutex_defect); MBED_HOSTTEST_RESULT(!mutex_defect);
return 0; return 0;
} }

7
libraries/tests/rtos/mbed/queue/main.cpp
View File

@ -42,6 +42,11 @@ void send_thread (void const *argument) {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Queue messaging);
MBED_HOSTTEST_START("RTOS_5");
Thread thread(send_thread, NULL, osPriorityNormal, STACK_SIZE); Thread thread(send_thread, NULL, osPriorityNormal, STACK_SIZE);
bool result = true; bool result = true;
int result_counter = 0; int result_counter = 0;
@ -67,6 +72,6 @@ int main (void) {
} }
} }
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0; return 0;
} }

10
libraries/tests/rtos/mbed/semaphore/main.cpp
View File

@ -17,8 +17,7 @@
#define STACK_SIZE DEFAULT_STACK_SIZE #define STACK_SIZE DEFAULT_STACK_SIZE
#endif #endif
void print_char(char c = '*') void print_char(char c = '*') {
{
printf("%c", c); printf("%c", c);
fflush(stdout); fflush(stdout);
} }
@ -49,6 +48,11 @@ void test_thread(void const *delay) {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Semaphore resource lock);
MBED_HOSTTEST_START("RTOS_3");
const int t1_delay = THREAD_DELAY * 1; const int t1_delay = THREAD_DELAY * 1;
const int t2_delay = THREAD_DELAY * 2; const int t2_delay = THREAD_DELAY * 2;
const int t3_delay = THREAD_DELAY * 3; const int t3_delay = THREAD_DELAY * 3;
@ -66,6 +70,6 @@ int main (void) {
} }
fflush(stdout); fflush(stdout);
notify_completion(!sem_defect); MBED_HOSTTEST_RESULT(!sem_defect);
return 0; return 0;
} }

7
libraries/tests/rtos/mbed/signals/main.cpp
View File

@ -30,6 +30,11 @@ void led_thread(void const *argument) {
} }
int main (void) { int main (void) {
MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Signals messaging);
MBED_HOSTTEST_START("RTOS_4");
Thread thread(led_thread, NULL, osPriorityNormal, STACK_SIZE); Thread thread(led_thread, NULL, osPriorityNormal, STACK_SIZE);
bool result = true; bool result = true;
@ -41,6 +46,6 @@ int main (void) {
break; break;
} }
} }
notify_completion(result); MBED_HOSTTEST_RESULT(result);
return 0; return 0;
} }

6
libraries/tests/rtos/mbed/timer/main.cpp
View File

@ -1,4 +1,5 @@
#include "mbed.h" #include "mbed.h"
#include "test_env.h"
#include "rtos.h" #include "rtos.h"
DigitalOut LEDs[4] = { DigitalOut LEDs[4] = {
@ -22,6 +23,11 @@ void blink(void const *n) {
} }
int main(void) { int main(void) {
MBED_HOSTTEST_TIMEOUT(15);
MBED_HOSTTEST_SELECT(wait_us_auto);
MBED_HOSTTEST_DESCRIPTION(Timer);
MBED_HOSTTEST_START("RTOS_7");
RtosTimer led_1_timer(blink, osTimerPeriodic, (void *)0); RtosTimer led_1_timer(blink, osTimerPeriodic, (void *)0);
RtosTimer led_2_timer(blink, osTimerPeriodic, (void *)1); RtosTimer led_2_timer(blink, osTimerPeriodic, (void *)1);
RtosTimer led_3_timer(blink, osTimerPeriodic, (void *)2); RtosTimer led_3_timer(blink, osTimerPeriodic, (void *)2);

10
libraries/tests/utest/testrunner/testrunner.cpp
View File

@ -10,8 +10,12 @@ It is declared in \cpputest\src\Platforms\armcc\UtestPlatform.cpp
*/ */
Serial mbed_cpputest_console(STDIO_UART_TX, STDIO_UART_RX); Serial mbed_cpputest_console(STDIO_UART_TX, STDIO_UART_RX);
int main(int ac, char** av) int main(int ac, char** av) {
{ MBED_HOSTTEST_TIMEOUT(20);
MBED_HOSTTEST_SELECT(default_auto);
MBED_HOSTTEST_DESCRIPTION(Unit test);
MBED_HOSTTEST_START("UT");
unsigned failureCount = 0; unsigned failureCount = 0;
{ {
// Some compilers may not pass ac, av so we need to supply them ourselves // Some compilers may not pass ac, av so we need to supply them ourselves
@ -20,6 +24,6 @@ int main(int ac, char** av)
failureCount = CommandLineTestRunner::RunAllTests(ac, av); failureCount = CommandLineTestRunner::RunAllTests(ac, av);
} }
notify_completion(failureCount == 0); MBED_HOSTTEST_RESULT(failureCount == 0);
return failureCount; return failureCount;
} }

8
setup.py
View File

@ -3,11 +3,11 @@ This module defines the attributes of the
PyPI package for the Mbed SDK PyPI package for the Mbed SDK
""" """
from distutils.core import setup from shutil import copyfileobj
from setuptools import find_packages
from os.path import isfile, join from os.path import isfile, join
from tempfile import TemporaryFile from tempfile import TemporaryFile
from shutil import copyfileobj from setuptools import find_packages
from distutils.core import setup
LICENSE = open('LICENSE').read() LICENSE = open('LICENSE').read()
DESCRIPTION = """A set of Python scripts that can be used to compile programs written on top of the `mbed framework`_. It can also be used to export mbed projects to other build systems and IDEs (uVision, IAR, makefiles). DESCRIPTION = """A set of Python scripts that can be used to compile programs written on top of the `mbed framework`_. It can also be used to export mbed projects to other build systems and IDEs (uVision, IAR, makefiles).
@ -40,7 +40,7 @@ setup(name='mbed-tools',
url='https://github.com/mbedmicro/mbed', url='https://github.com/mbedmicro/mbed',
packages=find_packages(), packages=find_packages(),
license=LICENSE, license=LICENSE,
install_requires=["PrettyTable>=0.7.2", "PySerial>=2.7", "IntelHex>=1.3"]) install_requires=["PrettyTable>=0.7.2", "PySerial>=2.7", "IntelHex>=1.3", "colorama>=0.3.3"])
# Restore previous private_settings if needed # Restore previous private_settings if needed
if backup: if backup:

2
workspace_tools/build_api.py
View File

@ -17,6 +17,8 @@ limitations under the License.
import re import re
import tempfile import tempfile
import colorama
from types import ListType from types import ListType
from shutil import rmtree from shutil import rmtree

2
workspace_tools/build_release.py
View File

@ -83,7 +83,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('RBLAB_BLENANO', ('ARM', 'GCC_ARM')), ('RBLAB_BLENANO', ('ARM', 'GCC_ARM')),
('WALLBOT_BLE', ('ARM', 'GCC_ARM')), ('WALLBOT_BLE', ('ARM', 'GCC_ARM')),
('LPC11U68', ('uARM','GCC_ARM','GCC_CR', 'IAR')), ('LPC11U68', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')),
('OC_MBUINO', ('ARM', 'uARM', 'GCC_ARM', 'IAR')), ('OC_MBUINO', ('ARM', 'uARM', 'GCC_ARM', 'IAR')),
('RZ_A1H' , ('ARM',)), ('RZ_A1H' , ('ARM',)),

1
workspace_tools/build_travis.py
View File

@ -74,6 +74,7 @@ build_list = (
{ "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] }, { "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
{ "target": "ARCH_PRO", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] }, { "target": "ARCH_PRO", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
{ "target": "LPC1549", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] }, { "target": "LPC1549", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },
{ "target": "NRF51822", "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
) )
################################################################################ ################################################################################

20
workspace_tools/export/.hgignore Executable file
View File

@ -0,0 +1,20 @@
syntax: regexp
\.hgignore$
\.git$
\.svn$
\.orig$
\.msub$
\.meta$
\.ctags
\.uvproj$
\.uvopt$
\.project$
\.cproject$
\.launch$
\.project$
\.cproject$
\.launch$
Makefile$
\.ewp$
\.eww$
\.htm$

26
workspace_tools/export/__init__.py
View File

@ -16,10 +16,10 @@ limitations under the License.
""" """
import os, tempfile import os, tempfile
from os.path import join, exists, basename from os.path import join, exists, basename
from shutil import copytree, rmtree from shutil import copytree, rmtree, copy
from workspace_tools.utils import mkdir from workspace_tools.utils import mkdir
from workspace_tools.export import uvision4, codesourcery, codered, gccarm, ds5_5, iar, emblocks, coide, kds from workspace_tools.export import uvision4, codesourcery, codered, gccarm, ds5_5, iar, emblocks, coide, kds, zip
from workspace_tools.export.exporters import zip_working_directory_and_clean_up, OldLibrariesException from workspace_tools.export.exporters import zip_working_directory_and_clean_up, OldLibrariesException
from workspace_tools.targets import TARGET_NAMES, EXPORT_MAP from workspace_tools.targets import TARGET_NAMES, EXPORT_MAP
@ -58,14 +58,18 @@ def export(project_path, project_name, ide, target, destination='/tmp/',
if tempdir is None: if tempdir is None:
tempdir = tempfile.mkdtemp() tempdir = tempfile.mkdtemp()
if ide is None:
# Simply copy everything, no project files to be generated
for d in ['src', 'lib']:
os.system("cp -r %s/* %s" % (join(project_path, d), tempdir))
report = {'success': True}
else:
report = {'success': False} report = {'success': False}
if ide is None or ide == "zip":
# Simple ZIP exporter
try:
ide = "zip"
exporter = zip.ZIP(target, tempdir, project_name, build_url_resolver, extra_symbols=extra_symbols)
exporter.scan_and_copy_resources(project_path, tempdir)
exporter.generate()
report['success'] = True
except OldLibrariesException, e:
report['errormsg'] = ERROR_MESSAGE_NOT_EXPORT_LIBS
else:
if ide not in EXPORTERS: if ide not in EXPORTERS:
report['errormsg'] = "Unsupported toolchain" report['errormsg'] = "Unsupported toolchain"
else: else:
@ -85,7 +89,9 @@ def export(project_path, project_name, ide, target, destination='/tmp/',
zip_path = None zip_path = None
if report['success']: if report['success']:
# add readme file to every offline export. # add readme file to every offline export.
open(os.path.join(tempdir, 'README.html'),'w').write('<meta http-equiv="refresh" content="0; url=http://developer.mbed.org/handbook/ExportToOfflineToolchain#%s#%s"/>'% (target,ide)) open(os.path.join(tempdir, 'GettingStarted.htm'),'w').write('<meta http-equiv="refresh" content="0; url=http://mbed.org/handbook/Getting-Started-mbed-Exporters#%s"/>'% (ide))
# copy .hgignore file to exported direcotry as well.
copy(os.path.join(exporter.TEMPLATE_DIR,'.hgignore'),tempdir)
zip_path = zip_working_directory_and_clean_up(tempdir, destination, project_name, clean) zip_path = zip_working_directory_and_clean_up(tempdir, destination, project_name, clean)
return zip_path, report return zip_path, report

2
workspace_tools/export/gcc_arm_nrf51_dk.tmpl
View File

@ -9,7 +9,7 @@ INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %} LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %} LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
LINKER_SCRIPT = {{linker_script}} LINKER_SCRIPT = {{linker_script}}
SOFTDEVICE = mbed/TARGET_NRF51822/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_0_0/s110_nrf51822_7.0.0_softdevice.hex SOFTDEVICE = mbed/TARGET_NRF51_DK/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
############################################################################### ###############################################################################
AS = $(GCC_BIN)arm-none-eabi-as AS = $(GCC_BIN)arm-none-eabi-as

7
workspace_tools/export/gcc_arm_nucleo_f103rb.tmpl
View File

@ -20,7 +20,7 @@ OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
SIZE = $(GCC_BIN)arm-none-eabi-size SIZE = $(GCC_BIN)arm-none-eabi-size
CPU = -mcpu=cortex-m3 -mthumb CPU = -mcpu=cortex-m3 -mthumb
CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fno-rtti CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
CC_FLAGS += -MMD -MP CC_FLAGS += -MMD -MP
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
@ -34,7 +34,7 @@ else
CC_FLAGS += -DNDEBUG -Os CC_FLAGS += -DNDEBUG -Os
endif endif
all: $(PROJECT).bin $(PROJECT).hex size all: $(PROJECT).bin $(PROJECT).hex
clean: clean:
rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS) rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
@ -46,11 +46,12 @@ clean:
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
.cpp.o: .cpp.o:
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $< $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) $(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
$(SIZE) $@
$(PROJECT).bin: $(PROJECT).elf $(PROJECT).bin: $(PROJECT).elf
@$(OBJCOPY) -O binary $< $@ @$(OBJCOPY) -O binary $< $@

7
workspace_tools/export/gcc_arm_nucleo_f302r8.tmpl
View File

@ -20,7 +20,7 @@ OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
SIZE = $(GCC_BIN)arm-none-eabi-size SIZE = $(GCC_BIN)arm-none-eabi-size
CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=$(FLOAT_ABI) CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=$(FLOAT_ABI)
CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fno-rtti CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
CC_FLAGS += -MMD -MP CC_FLAGS += -MMD -MP
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
@ -40,7 +40,7 @@ else
CC_FLAGS += -DNDEBUG -Os CC_FLAGS += -DNDEBUG -Os
endif endif
all: $(PROJECT).bin $(PROJECT).hex size all: $(PROJECT).bin $(PROJECT).hex
clean: clean:
rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS) rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
@ -52,11 +52,12 @@ clean:
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
.cpp.o: .cpp.o:
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $< $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) $(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
$(SIZE) $@
$(PROJECT).bin: $(PROJECT).elf $(PROJECT).bin: $(PROJECT).elf
@$(OBJCOPY) -O binary $< $@ @$(OBJCOPY) -O binary $< $@

7
workspace_tools/export/gcc_arm_nucleo_l152re.tmpl
View File

@ -20,7 +20,7 @@ OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
SIZE = $(GCC_BIN)arm-none-eabi-size SIZE = $(GCC_BIN)arm-none-eabi-size
CPU = -mcpu=cortex-m3 -mthumb CPU = -mcpu=cortex-m3 -mthumb
CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fno-rtti CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
CC_FLAGS += -MMD -MP CC_FLAGS += -MMD -MP
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
@ -34,7 +34,7 @@ else
CC_FLAGS += -DNDEBUG -Os CC_FLAGS += -DNDEBUG -Os
endif endif
all: $(PROJECT).bin $(PROJECT).hex size all: $(PROJECT).bin $(PROJECT).hex
clean: clean:
rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS) rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
@ -46,11 +46,12 @@ clean:
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
.cpp.o: .cpp.o:
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $< $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) $(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
$(SIZE) $@
$(PROJECT).bin: $(PROJECT).elf $(PROJECT).bin: $(PROJECT).elf
@$(OBJCOPY) -O binary $< $@ @$(OBJCOPY) -O binary $< $@

2
workspace_tools/export/uvision4.py
View File

@ -54,6 +54,7 @@ class Uvision4(Exporter):
'NUCLEO_L152RE', 'NUCLEO_L152RE',
'UBLOX_C027', 'UBLOX_C027',
'LPC1549', 'LPC1549',
'LPC11U68',
# Removed as uvision4_lpc11u35_501.uvproj.tmpl is missing. # Removed as uvision4_lpc11u35_501.uvproj.tmpl is missing.
#'LPC11U35_501', #'LPC11U35_501',
'NRF51822', 'NRF51822',
@ -91,6 +92,7 @@ class Uvision4(Exporter):
'NUCLEO_L053R8', 'NUCLEO_L053R8',
'NUCLEO_L152RE', 'NUCLEO_L152RE',
'LPC1549', 'LPC1549',
'LPC11U68',
'LPC11U35_501', 'LPC11U35_501',
'KL05Z', 'KL05Z',
'LPC11U37H_401', 'LPC11U37H_401',

181
workspace_tools/export/uvision4_lpc11u68.uvopt.tmpl Normal file
View File

@ -0,0 +1,181 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>mbed NXP LPC11U68</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDllName>DARMP1.DLL</SimDlgDllName>
<SimDlgDllArguments>-pLPC11U14</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDllName>TARMP1.DLL</TargetDlgDllName>
<TargetDlgDllArguments>-pLPC11U14</TargetDlgDllArguments>
</DllOpt>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>14</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"MBED CMSIS-DAP" -UA000000001 -O206 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO15 -FD10000000 -FC800 -FN1 -FF0LPC1xxx_32 -FS00 -FL08000</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>8</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>1</TopLine>
<CurrentLine>2</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>main.cpp</PathWithFileName>
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
</File>
</Group>
</ProjectOpt>

419
workspace_tools/export/uvision4_lpc11u68.uvproj.tmpl Normal file
View File

@ -0,0 +1,419 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
<Targets>
<Target>
<TargetName>mbed NXP LPC11U68</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>LPC11U68</Device>
<Vendor>NXP</Vendor>
<Cpu>IRAM(0x10000000-0x10001FFF) IRAM2(0x20004000-0x200047FF) IROM(0-0x1FFFF) CLOCK(12000000) CPUTYPE("Cortex-M0+")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"STARTUP\NXP\LPC11Uxx\startup_LPC11Uxx.s" ("NXP LPC11Uxx Startup Code")</StartupFile>
<FlashDriverDll>UL2CM3(-O4303 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC1xxx_32 -FS00 -FL08000)</FlashDriverDll>
<DeviceId>5738</DeviceId>
<RegisterFile>LPC11Uxx.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>SFD\NXP\LPC11Uxx\LPC11Uxx.SFR</SFDFile>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>NXP\LPC11Uxx\</RegisterFilePath>
<DBRegisterFilePath>NXP\LPC11Uxx\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\</OutputDirectory>
<OutputName>{{name}}</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\build\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>1</RunUserProg2>
<UserProg1Name>$K\ARM\BIN\ELFDWT.EXE "!L"</UserProg1Name>
<UserProg2Name>fromelf --bin -o {{name}}_LPC11U68.bin build\{{name}}.axf</UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DARMP1.DLL</SimDlgDll>
<SimDlgDllArguments>-pLPC11U14</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMP1.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pLPC11U68</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>14</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>BIN\CMSIS_AGDI.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4105</DriverSelection>
</Flash1>
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M0+"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x2000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x10000000</StartAddress>
<Size>0x2000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x20004000</StartAddress>
<Size>0x800</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<VariousControls>
<MiscControls>{% for flag in flags %}{{flag}} {% endfor %}</MiscControls>
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
<Undefine></Undefine>
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x00000000</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<ScatterFile>{{scatter_file}}</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>
{% for file in object_files %}
{{file}}
{% endfor %}
</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
{% for group,files in source_files %}
<Group>
<GroupName>{{group}}</GroupName>
<Files>
{% for file in files %}
<File>
<FileName>{{file.name}}</FileName>
<FileType>{{file.type}}</FileType>
<FilePath>{{file.path}}</FilePath>
{%if file.type == "1" %}
<FileOption>
<FileArmAds>
<Cads>
<VariousControls>
<MiscControls>--c99</MiscControls>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
{% endif %}
</File>
{% endfor %}
</Files>
</Group>
{% endfor %}
</Groups>
</Target>
</Targets>
</Project>

41
workspace_tools/export/zip.py Normal file
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@ -0,0 +1,41 @@
"""
mbed SDK
Copyright (c) 2011-2013 ARM Limited
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
"""
from exporters import Exporter
from os.path import basename
class ZIP(Exporter):
NAME = 'ZIP'
TARGETS = [
]
USING_MICROLIB = [
]
FILE_TYPES = {
'c_sources':'1',
'cpp_sources':'8',
's_sources':'2'
}
def get_toolchain(self):
return 'uARM' if (self.target in self.USING_MICROLIB) else 'ARM'
def generate(self):
return True

3
workspace_tools/export_test.py
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@ -76,6 +76,8 @@ if __name__ == '__main__':
setup_test_user_prj() setup_test_user_prj()
for toolchain, target in [ for toolchain, target in [
('zip', 'LPC1768'),
('emblocks', 'LPC1768'), ('emblocks', 'LPC1768'),
('emblocks', 'LPC1549'), ('emblocks', 'LPC1549'),
('emblocks', 'LPC1114'), ('emblocks', 'LPC1114'),
@ -189,6 +191,7 @@ if __name__ == '__main__':
('iar', 'MTS_MDOT_F405RG'), ('iar', 'MTS_MDOT_F405RG'),
('iar', 'MTS_MDOT_F411RE'), ('iar', 'MTS_MDOT_F411RE'),
(None, None), (None, None),
]: ]:
print '\n=== Exporting to "%s::%s" ===' % (toolchain, target) print '\n=== Exporting to "%s::%s" ===' % (toolchain, target)

43
workspace_tools/host_tests/__init__.py
View File

@ -14,3 +14,46 @@ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and See the License for the specific language governing permissions and
limitations under the License. limitations under the License.
""" """
from host_registry import HostRegistry
# Host test supervisors
from echo import EchoTest
from rtc_auto import RTCTest
from stdio_auto import StdioTest
from hello_auto import HelloTest
from detect_auto import DetectPlatformTest
from default_auto import DefaultAuto
from dev_null_auto import DevNullTest
from wait_us_auto import WaitusTest
from tcpecho_server_auto import TCPEchoServerTest
from udpecho_server_auto import UDPEchoServerTest
from tcpecho_client_auto import TCPEchoClientTest
from udpecho_client_auto import UDPEchoClientTest
# Populate registry with supervising objects
HOSTREGISTRY = HostRegistry()
HOSTREGISTRY.register_host_test("echo", EchoTest())
HOSTREGISTRY.register_host_test("default", DefaultAuto())
HOSTREGISTRY.register_host_test("rtc_auto", RTCTest())
HOSTREGISTRY.register_host_test("hello_auto", HelloTest())
HOSTREGISTRY.register_host_test("stdio_auto", StdioTest())
HOSTREGISTRY.register_host_test("detect_auto", DetectPlatformTest())
HOSTREGISTRY.register_host_test("default_auto", DefaultAuto())
HOSTREGISTRY.register_host_test("wait_us_auto", WaitusTest())
HOSTREGISTRY.register_host_test("dev_null_auto", DevNullTest())
HOSTREGISTRY.register_host_test("tcpecho_server_auto", TCPEchoServerTest())
HOSTREGISTRY.register_host_test("udpecho_server_auto", UDPEchoServerTest())
HOSTREGISTRY.register_host_test("tcpecho_client_auto", TCPEchoClientTest())
HOSTREGISTRY.register_host_test("udpecho_client_auto", UDPEchoClientTest())
###############################################################################
# Functional interface for test supervisor registry
###############################################################################
def get_host_test(ht_name):
return HOSTREGISTRY.get_host_test(ht_name)
def is_host_test(ht_name):
return HOSTREGISTRY.is_host_test(ht_name)

36
workspace_tools/host_tests/default_auto.py Normal file
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@ -0,0 +1,36 @@
"""
mbed SDK
Copyright (c) 2011-2013 ARM Limited
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
"""
from sys import stdout
class DefaultAuto():
""" Simple, basic host test's test runner waiting for serial port
output from MUT, no supervision over test running in MUT is executed.
"""
def test(self, selftest):
result = selftest.RESULT_SUCCESS
try:
while True:
c = selftest.mbed.serial_read(512)
if c is None:
return selftest.RESULT_IO_SERIAL
stdout.write(c)
stdout.flush()
except KeyboardInterrupt, _:
selftest.notify("\r\n[CTRL+C] exit")
result = selftest.RESULT_ERROR
return result

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