mirror of https://github.com/ARMmbed/mbed-os.git
Correct the default pins for the spi flash for the mts dragonfly - on behalf of Ben C.
Ben Cooke
Lin Gao
parent
b895bf6349
commit
3d68a53b81
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@ -95,8 +95,10 @@ enum spif_default_instructions {
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// e.g. (1)Set Write Enable, (2)Program, (3)Wait Memory Ready
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SingletonPtr<PlatformMutex> SPIFBlockDevice::_mutex;
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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// Local Function
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static unsigned int local_math_power(int base, int exp);
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#endif
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//***********************
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// SPIF Block Device APIs
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@ -128,11 +130,14 @@ int SPIFBlockDevice::init()
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uint8_t vendor_device_ids[4];
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size_t data_length = 3;
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int status = SPIF_BD_ERROR_OK;
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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uint32_t basic_table_addr = 0;
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size_t basic_table_size = 0;
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uint32_t sector_map_table_addr = 0;
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size_t sector_map_table_size = 0;
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#endif
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spif_bd_error spi_status = SPIF_BD_ERROR_OK;
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uint32_t density_bits = 0;
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_mutex->lock();
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@ -155,7 +160,6 @@ int SPIFBlockDevice::init()
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tr_info("INFO: Initialize flash memory OK\n");
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}
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/* Read Manufacturer ID (1byte), and Device ID (2bytes)*/
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spi_status = _spi_send_general_command(SPIF_RDID, SPI_NO_ADDRESS_COMMAND, NULL, 0, (char *)vendor_device_ids,
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data_length);
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@ -180,7 +184,7 @@ int SPIFBlockDevice::init()
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status = SPIF_BD_ERROR_READY_FAILED;
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goto exit_point;
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}
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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/**************************** Parse SFDP Header ***********************************/
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if (0 != _sfdp_parse_sfdp_headers(basic_table_addr, basic_table_size, sector_map_table_addr, sector_map_table_size)) {
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tr_error("ERROR: init - Parse SFDP Headers Failed");
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@ -210,11 +214,22 @@ int SPIFBlockDevice::init()
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goto exit_point;
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}
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}
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#else
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density_bits = MBED_CONF_SPIF_DRIVER_DENSITY_BITS;
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_device_size_bytes = (density_bits + 1) / 8;
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_read_instruction = SPIF_READ;
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_prog_instruction = SPIF_PP;
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_erase_instruction = MBED_CONF_SPIF_DRIVER_SECTOR_ERASE_INST;
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// Set Page Size (SPI write must be done on Page limits)
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_page_size_bytes = MBED_CONF_SPIF_DRIVER_PAGE_SIZE_BYTES;
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//_sector_size_pages = MBED_CONF_SPIF_DRIVER_SECTOR_SIZE_PAGES;
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_min_common_erase_size = MBED_CONF_SPIF_DRIVER_SECTOR_SIZE_PAGES * MBED_CONF_SPIF_DRIVER_PAGE_SIZE_BYTES;
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// Configure BUS Mode to 1_1_1 for all commands other than Read
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// Dummy And Mode Cycles Back default 0
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_dummy_and_mode_cycles = _write_dummy_and_mode_cycles;
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_read_dummy_and_mode_cycles = MBED_CONF_SPIF_DRIVER_READ_DUMMY_CYCLES;
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_write_dummy_and_mode_cycles = MBED_CONF_SPIF_DRIVER_MODE_WRITE_DUMMY_CYCLES;
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_is_initialized = true;
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#endif
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exit_point:
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_mutex->unlock();
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@ -333,17 +348,19 @@ int SPIFBlockDevice::erase(bd_addr_t addr, bd_size_t in_size)
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return BD_ERROR_DEVICE_ERROR;
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}
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int type = 0;
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uint32_t offset = 0;
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uint32_t chunk = 4096;
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int cur_erase_inst = _erase_instruction;
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int size = (int)in_size;
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bool erase_failed = false;
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int status = SPIF_BD_ERROR_OK;
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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int type = 0;
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uint32_t offset = 0;
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uint32_t chunk = 4096;
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// Find region of erased address
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int region = _utils_find_addr_region(addr);
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// Erase Types of selected region
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uint8_t bitfield = _region_erase_types_bitfield[region];
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#endif
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tr_info("DEBUG: erase - addr: %llu, in_size: %llu", addr, in_size);
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@ -359,7 +376,7 @@ int SPIFBlockDevice::erase(bd_addr_t addr, bd_size_t in_size)
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// For each iteration erase the largest section supported by current region
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while (size > 0) {
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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// iterate to find next Largest erase type ( a. supported by region, b. smaller than size)
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// find the matching instruction and erase size chunk for that type.
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type = _utils_iterate_next_largest_erase_type(bitfield, size, (unsigned int)addr, _region_high_boundary[region]);
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@ -371,7 +388,7 @@ int SPIFBlockDevice::erase(bd_addr_t addr, bd_size_t in_size)
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addr, size, cur_erase_inst, chunk);
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tr_debug("DEBUG: erase - Region: %d, Type:%d",
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region, type);
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#endif
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_mutex->lock();
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if (_set_write_enable() != 0) {
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@ -382,7 +399,7 @@ int SPIFBlockDevice::erase(bd_addr_t addr, bd_size_t in_size)
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}
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_spi_send_erase_command(cur_erase_inst, addr, size);
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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addr += chunk;
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size -= chunk;
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@ -391,7 +408,10 @@ int SPIFBlockDevice::erase(bd_addr_t addr, bd_size_t in_size)
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region++;
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bitfield = _region_erase_types_bitfield[region];
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}
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#else
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addr += _min_common_erase_size;
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size -= _min_common_erase_size;
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#endif
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if (false == _is_mem_ready()) {
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tr_error("ERROR: SPI After Erase Device not ready - failed\n");
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erase_failed = true;
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@ -431,6 +451,7 @@ bd_size_t SPIFBlockDevice::get_erase_size() const
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// Find minimal erase size supported by the region to which the address belongs to
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bd_size_t SPIFBlockDevice::get_erase_size(bd_addr_t addr)
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{
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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// Find region of current address
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int region = _utils_find_addr_region(addr);
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@ -457,6 +478,9 @@ bd_size_t SPIFBlockDevice::get_erase_size(bd_addr_t addr)
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}
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return (bd_size_t)min_region_erase_size;
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#else
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return _min_common_erase_size;
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#endif
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}
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bd_size_t SPIFBlockDevice::size() const
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@ -596,6 +620,7 @@ spif_bd_error SPIFBlockDevice::_spi_send_general_command(int instruction, bd_add
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return SPIF_BD_ERROR_OK;
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}
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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/*********************************************************/
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/********** SFDP Parsing and Detection Functions *********/
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/*********************************************************/
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@ -887,6 +912,7 @@ int SPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table_
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return 0;
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}
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#endif
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int SPIFBlockDevice::_reset_flash_mem()
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{
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@ -1040,6 +1066,7 @@ int SPIFBlockDevice::_utils_iterate_next_largest_erase_type(uint8_t &bitfield, i
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/*********************************************/
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/************** Local Functions **************/
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/*********************************************/
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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static unsigned int local_math_power(int base, int exp)
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{
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// Integer X^Y function, used to calculate size fields given in 2^N format
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@ -1050,5 +1077,4 @@ static unsigned int local_math_power(int base, int exp)
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}
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return result;
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}
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#endif
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@ -198,7 +198,7 @@ public:
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private:
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// Internal functions
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#ifdef MBED_CONF_SPIF_SFDP_ENABLE
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/****************************************/
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/* SFDP Detection and Parsing Functions */
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/****************************************/
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@ -222,7 +222,7 @@ private:
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int _sfdp_detect_erase_types_inst_and_size(uint8_t *basic_param_table_ptr, int basic_param_table_size,
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int &erase4k_inst,
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int *erase_type_inst_arr, unsigned int *erase_type_size_arr);
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#endif
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/***********************/
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/* Utilities Functions */
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/***********************/
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@ -299,8 +299,8 @@ private:
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unsigned int _read_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Read Bus Mode
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unsigned int _write_dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Write Bus Mode
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unsigned int _dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Current Bus Mode
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uint32_t _init_ref_count;
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bool _is_initialized;
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uint32_t _init_ref_count;
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};
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#endif /* MBED_SPIF_BLOCK_DEVICE_H */
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@ -5,7 +5,35 @@
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"SPI_MISO": "SPI_MISO",
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"SPI_CLK": "SPI_SCK",
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"SPI_CS": "SPI_CS",
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"SPI_FREQ": "40000000"
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"SPI_FREQ": "40000000",
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"SFDP_ENABLE": {
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"help": "Enables Serial Flash Discovery Protocal for automatically determining flash parameters from the SFDP register",
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"value": true
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},
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"density_bits": {
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"help": "Flash density in bits. 16Mb = 16000000",
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"value": null
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},
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"page_size_bytes": {
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"help": "Flash page size in bytes",
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"value": null
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},
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"read_dummy_cycles": {
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"help": "Number of dummy cycles required between read cmd/addr and data output",
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"value": null
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},
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"mode_write_dummy_cycles": {
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"help": "Number of dummy cycles required between write or mode commands and data",
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"value": null
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},
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"sector_erase_inst": {
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"help": "Sector erase instruction.",
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"value": null
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},
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"sector_size_pages": {
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"help": "Sector size in pages for sector erase",
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"value": null
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}
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},
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"target_overrides": {
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"LPC54114": {
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@ -36,19 +64,19 @@
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"SPI_MOSI": "PC_3",
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"SPI_MISO": "PC_2",
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"SPI_CLK": "PB_13",
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"SPI_CS": "PC_12"
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"SPI_CS": "PC_12"
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},
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"MTB_MXCHIP_EMW3166": {
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"SPI_MOSI": "PB_15",
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"SPI_MISO": "PB_14",
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"SPI_CLK": "PB_13",
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"SPI_CS": "PA_10"
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"SPI_CS": "PA_10"
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},
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"MTB_USI_WM_BN_BM_22": {
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"SPI_MOSI": "PC_3",
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"SPI_MISO": "PC_2",
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"SPI_CLK": "PB_13",
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"SPI_CS": "PA_6"
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"SPI_CS": "PA_6"
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},
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"MTB_ADV_WISE_1570": {
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"SPI_MOSI": "PA_7",
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@ -62,6 +90,20 @@
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"SPI_MISO": "PE_13",
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"SPI_CLK": "PE_12",
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"SPI_CS": "PE_11"
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},
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"MTS_DRAGONFLY_F411RE": {
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"SPI_MOSI": "SPI3_MOSI",
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"SPI_MISO": "SPI3_MISO",
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"SPI_CLK": "SPI3_SCK",
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"SPI_CS": "SPI_CS1",
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"SPI_FREQ": "40000000",
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"SFDP_ENABLE": null,
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"density_bits": 16000000,
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"page_size_bytes": 256,
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"read_dummy_cycles": 0,
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"mode_write_dummy_cycles": 0,
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"sector_erase_inst": "0xD8",
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"sector_size_pages": 256
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}
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}
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}
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