mirror of https://github.com/ARMmbed/mbed-os.git
[NUCLEO_L053RB] Add cmsis files (2)
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;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
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;* File Name : startup_stm32l053xx.s
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;* Author : MCD Application Team
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;* Version : V1.0.0
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;* Date : 22-April-2014
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;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == Reset_Handler
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;* - Set the vector table entries with the exceptions ISR address
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;* - Branches to __main in the C library (which eventually
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;* calls main()).
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;* After Reset the Cortex-M0+ processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;* <<< Use Configuration Wizard in Context Menu >>>
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;*******************************************************************************
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;*
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;* Redistribution and use in source and binary forms, with or without modification,
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;* are permitted provided that the following conditions are met:
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;* 1. Redistributions of source code must retain the above copyright notice,
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;* this list of conditions and the following disclaimer.
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;* 2. Redistributions in binary form must reproduce the above copyright notice,
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;* this list of conditions and the following disclaimer in the documentation
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;* and/or other materials provided with the distribution.
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;* 3. Neither the name of STMicroelectronics nor the names of its contributors
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;* may be used to endorse or promote products derived from this software
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;* without specific prior written permission.
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;*
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;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;*
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;*******************************************************************************
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;
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; Amount of memory (in bytes) allocated for Stack
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; Tailor this value to your application needs
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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EXPORT __initial_sp
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20002000 ; Top of RAM
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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EXPORT __heap_base
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EXPORT __heap_limit
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDG_IRQHandler ; Window Watchdog
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DCD PVD_IRQHandler ; PVD through EXTI Line detect
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DCD RTC_IRQHandler ; RTC through EXTI Line
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DCD FLASH_IRQHandler ; FLASH
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DCD RCC_CRS_IRQHandler ; RCC and CRS
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DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
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DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
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DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
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DCD TSC_IRQHandler ; TSC
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DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
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DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
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DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
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DCD LPTIM1_IRQHandler ; LPTIM1
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DCD 0 ; Reserved
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DCD TIM2_IRQHandler ; TIM2
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DCD 0 ; Reserved
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DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD TIM21_IRQHandler ; TIM21
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DCD 0 ; Reserved
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DCD TIM22_IRQHandler ; TIM22
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DCD I2C1_IRQHandler ; I2C1
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DCD I2C2_IRQHandler ; I2C2
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DCD SPI1_IRQHandler ; SPI1
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DCD SPI2_IRQHandler ; SPI2
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DCD USART1_IRQHandler ; USART1
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DCD USART2_IRQHandler ; USART2
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DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
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DCD LCD_IRQHandler ; LCD
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DCD USB_IRQHandler ; USB
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler routine
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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IMPORT SystemInit
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WWDG_IRQHandler [WEAK]
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EXPORT PVD_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT FLASH_IRQHandler [WEAK]
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EXPORT RCC_CRS_IRQHandler [WEAK]
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EXPORT EXTI0_1_IRQHandler [WEAK]
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EXPORT EXTI2_3_IRQHandler [WEAK]
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EXPORT EXTI4_15_IRQHandler [WEAK]
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EXPORT TSC_IRQHandler [WEAK]
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EXPORT DMA1_Channel1_IRQHandler [WEAK]
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EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
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EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
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EXPORT ADC1_COMP_IRQHandler [WEAK]
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EXPORT LPTIM1_IRQHandler [WEAK]
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EXPORT TIM2_IRQHandler [WEAK]
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EXPORT TIM6_DAC_IRQHandler [WEAK]
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EXPORT TIM21_IRQHandler [WEAK]
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EXPORT TIM22_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT I2C2_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT SPI2_IRQHandler [WEAK]
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EXPORT USART1_IRQHandler [WEAK]
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EXPORT USART2_IRQHandler [WEAK]
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EXPORT RNG_LPUART1_IRQHandler [WEAK]
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EXPORT LCD_IRQHandler [WEAK]
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EXPORT USB_IRQHandler [WEAK]
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WWDG_IRQHandler
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PVD_IRQHandler
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RTC_IRQHandler
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FLASH_IRQHandler
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RCC_CRS_IRQHandler
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EXTI0_1_IRQHandler
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EXTI2_3_IRQHandler
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EXTI4_15_IRQHandler
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TSC_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_3_IRQHandler
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DMA1_Channel4_5_6_7_IRQHandler
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ADC1_COMP_IRQHandler
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LPTIM1_IRQHandler
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TIM2_IRQHandler
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TIM6_DAC_IRQHandler
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TIM21_IRQHandler
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TIM22_IRQHandler
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I2C1_IRQHandler
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I2C2_IRQHandler
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SPI1_IRQHandler
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SPI2_IRQHandler
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USART1_IRQHandler
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USART2_IRQHandler
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RNG_LPUART1_IRQHandler
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LCD_IRQHandler
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USB_IRQHandler
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B .
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ENDP
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ALIGN
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END
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@ -0,0 +1,45 @@
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; Scatter-Loading Description File
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright (c) 2014, STMicroelectronics
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; 1. Redistributions of source code must retain the above copyright notice,
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; this list of conditions and the following disclaimer.
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; 2. Redistributions in binary form must reproduce the above copyright notice,
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; this list of conditions and the following disclaimer in the documentation
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; and/or other materials provided with the distribution.
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; 3. Neither the name of STMicroelectronics nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; STM32L053R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000)
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LR_IROM1 0x08000000 0x10000 { ; load region size_region
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ER_IROM1 0x08000000 0x10000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
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RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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@ -0,0 +1,56 @@
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/* mbed Microcontroller Library - stackheap
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* Setup a fixed single stack/heap memory model,
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* between the top of the RW/ZI region and the stackpointer
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*******************************************************************************
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* Copyright (c) 2014, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rt_misc.h>
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#include <stdint.h>
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extern char Image$$RW_IRAM1$$ZI$$Limit[];
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
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uint32_t sp_limit = __current_sp();
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
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struct __initial_stackheap r;
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r.heap_base = zi_limit;
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r.heap_limit = sp_limit;
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return r;
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}
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#ifdef __cplusplus
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}
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#endif
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@ -0,0 +1,215 @@
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;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
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;* File Name : startup_stm32l053xx.s
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;* Author : MCD Application Team
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;* Version : V1.0.0
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;* Date : 22-April-2014
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;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
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;* This module performs:
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;* - Set the initial SP
|
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;* - Set the initial PC == Reset_Handler
|
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;* - Set the vector table entries with the exceptions ISR address
|
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;* - Branches to __main in the C library (which eventually
|
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;* calls main()).
|
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;* After Reset the Cortex-M0+ processor is in Thread mode,
|
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;* priority is Privileged, and the Stack is set to Main.
|
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;* <<< Use Configuration Wizard in Context Menu >>>
|
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;*******************************************************************************
|
||||
;*
|
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;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
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;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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;*
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;*******************************************************************************
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__initial_sp EQU 0x20002000 ; Top of RAM
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDG_IRQHandler ; Window Watchdog
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DCD PVD_IRQHandler ; PVD through EXTI Line detect
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DCD RTC_IRQHandler ; RTC through EXTI Line
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DCD FLASH_IRQHandler ; FLASH
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DCD RCC_CRS_IRQHandler ; RCC and CRS
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DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
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DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
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DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
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DCD TSC_IRQHandler ; TSC
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DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
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DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
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DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
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DCD LPTIM1_IRQHandler ; LPTIM1
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DCD 0 ; Reserved
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DCD TIM2_IRQHandler ; TIM2
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DCD 0 ; Reserved
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DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD TIM21_IRQHandler ; TIM21
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DCD 0 ; Reserved
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DCD TIM22_IRQHandler ; TIM22
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DCD I2C1_IRQHandler ; I2C1
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DCD I2C2_IRQHandler ; I2C2
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DCD SPI1_IRQHandler ; SPI1
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DCD SPI2_IRQHandler ; SPI2
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DCD USART1_IRQHandler ; USART1
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DCD USART2_IRQHandler ; USART2
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DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
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DCD LCD_IRQHandler ; LCD
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DCD USB_IRQHandler ; USB
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler routine
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
IMPORT SystemInit
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_CRS_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM21_IRQHandler [WEAK]
|
||||
EXPORT TIM22_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT I2C2_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT RNG_LPUART1_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT USB_IRQHandler [WEAK]
|
||||
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_CRS_IRQHandler
|
||||
EXTI0_1_IRQHandler
|
||||
EXTI2_3_IRQHandler
|
||||
EXTI4_15_IRQHandler
|
||||
TSC_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
DMA1_Channel4_5_6_7_IRQHandler
|
||||
ADC1_COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM21_IRQHandler
|
||||
TIM22_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
I2C2_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
RNG_LPUART1_IRQHandler
|
||||
LCD_IRQHandler
|
||||
USB_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
END
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
; All rights reserved.
|
||||
;
|
||||
; Redistribution and use in source and binary forms, with or without
|
||||
; modification, are permitted provided that the following conditions are met:
|
||||
;
|
||||
; 1. Redistributions of source code must retain the above copyright notice,
|
||||
; this list of conditions and the following disclaimer.
|
||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
; this list of conditions and the following disclaimer in the documentation
|
||||
; and/or other materials provided with the distribution.
|
||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
; may be used to endorse or promote products derived from this software
|
||||
; without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32L053R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000)
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/* mbed Microcontroller Library - stackheap
|
||||
* Setup a fixed single stack/heap memory model,
|
||||
* between the top of the RW/ZI region and the stackpointer
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <rt_misc.h>
|
||||
#include <stdint.h>
|
||||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||
|
||||
struct __initial_stackheap r;
|
||||
r.heap_base = zi_limit;
|
||||
r.heap_limit = sp_limit;
|
||||
return r;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
/* mbed Microcontroller Library
|
||||
* A generic CMSIS include header
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_H
|
||||
#define MBED_CMSIS_H
|
||||
|
||||
#include "stm32l0xx.h"
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
/* mbed Microcontroller Library
|
||||
* CMSIS-style functionality to support dynamic vectors
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
||||
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
uint32_t *vectors = (uint32_t *)SCB->VTOR;
|
||||
uint32_t i;
|
||||
|
||||
// Copy and switch to dynamic vectors if the first time called
|
||||
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
|
||||
uint32_t *old_vectors = vectors;
|
||||
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
|
||||
for (i=0; i<NVIC_NUM_VECTORS; i++) {
|
||||
vectors[i] = old_vectors[i];
|
||||
}
|
||||
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
|
||||
}
|
||||
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
|
||||
}
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
/* mbed Microcontroller Library
|
||||
* CMSIS-style functionality to support dynamic vectors
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2014, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_NVIC_H
|
||||
#define MBED_CMSIS_NVIC_H
|
||||
|
||||
// STM32L053R8
|
||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
||||
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF
|
||||
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
#define NVIC_NUM_VECTORS 48
|
||||
#define NVIC_USER_IRQ_OFFSET 16
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,206 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
|
||||
* This file contains all the peripheral register's definitions, bits
|
||||
* definitions and memory mapping for STM32L0xx devices.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The device used in the target application
|
||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral’s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l0xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef __STM32L0xx_H
|
||||
#define __STM32L0xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Uncomment the line below according to the target STM32 device used in your
|
||||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32L051xx) && !defined (STM32L052xx) && !defined (STM32L053xx) && !defined (STM32L062xx) && \
|
||||
!defined (STM32L063xx) && !defined (STM32L061xx)
|
||||
/* #define STM32L051xx */ /*!< STM32L051K8, STM32L051C6,STM32L051C8,STM32L051R6 and STM32L051R8 Devices */
|
||||
/* #define STM32L052xx */ /*!< STM32L052K6, STM32L052K8,STM32L052C6,STM32L052C8,STM32L052R6 and STM32L052R8 Devices */
|
||||
#define STM32L053xx /*!< STM32L053C6, STM32L053C8, STM32L053R6, and STM32L053R8 Devices */
|
||||
/* #define STM32L062xx */ /*!< STM32L062K8 */
|
||||
/* #define STM32L063xx */ /*!< STM32L063C8, STM32L063R8 */
|
||||
/* #define STM32L061xx */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
#define USE_HAL_DRIVER
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.0.0
|
||||
*/
|
||||
#define __STM32L0xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
|
||||
#define __STM32L0xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32L0xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32L0xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_RC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32L051xx)
|
||||
#include "stm32l051xx.h"
|
||||
#elif defined(STM32L052xx)
|
||||
#include "stm32l052xx.h"
|
||||
#elif defined(STM32L053xx)
|
||||
#include "stm32l053xx.h"
|
||||
#elif defined(STM32L062xx)
|
||||
#include "stm32l062xx.h"
|
||||
#elif defined(STM32L063xx)
|
||||
#include "stm32l063xx.h"
|
||||
#elif defined(STM32L061xx)
|
||||
#include "stm32l061xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32L0xx device used in your application (in stm32l0xx.h file)"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ERROR = 0,
|
||||
SUCCESS = !ERROR
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macro
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (USE_HAL_DRIVER)
|
||||
#include "stm32l0xx_hal.h"
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* __STM32L0xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,642 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief HAL module driver.
|
||||
* This is the common part of the HAL initialization
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
The common HAL driver contains a set of generic and common APIs that can be
|
||||
used by the PPP peripheral drivers and the user to start using the HAL.
|
||||
[..]
|
||||
The HAL contains two APIs' categories:
|
||||
(+) Common HAL APIs
|
||||
(+) Services HAL APIs
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HAL
|
||||
* @brief HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief STM32L0xx HAL Driver version number V1.0.0
|
||||
*/
|
||||
#define __STM32L0xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32L0xx_HAL_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
|
||||
#define __STM32L0xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32L0xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32L0xx_HAL_VERSION ((__STM32L0xx_HAL_VERSION_MAIN << 24)\
|
||||
|(__STM32L0xx_HAL_VERSION_SUB1 << 16)\
|
||||
|(__STM32L0xx_HAL_VERSION_SUB2 << 8 )\
|
||||
|(__STM32L0xx_HAL_VERSION_RC))
|
||||
|
||||
#define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
static __IO uint32_t uwTick;
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup HAL_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_Group1 Initialization and de-initialization Functions
|
||||
* @brief Initialization and de-initialization functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization and de-initialization functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Initializes the Flash interface, the NVIC allocation and initial clock
|
||||
configuration. It initializes the source of time base also when timeout
|
||||
is needed and the backup domain when enabled.
|
||||
(+) de-Initializes common part of the HAL.
|
||||
(+) Configure The time base source to have 1ms time base with a dedicated
|
||||
Tick interrupt priority.
|
||||
(++) Systick timer is used by default as source of time base, but user
|
||||
can eventually implement his proper time base source (a general purpose
|
||||
timer for example or other time source), keeping in mind that Time base
|
||||
duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
|
||||
handled in milliseconds basis.
|
||||
(++) Time base configuration function (HAL_InitTick ()) is called automatically
|
||||
at the beginning of the program after reset by HAL_Init() or at any time
|
||||
when clock is configured, by HAL_RCC_ClockConfig().
|
||||
(++) Source of time base is configured to generate interrupts at regular
|
||||
time intervals. Care must be taken if HAL_Delay() is called from a
|
||||
peripheral ISR process, the Tick interrupt line must have higher priority
|
||||
(numerically lower) than the peripheral interrupt. Otherwise the caller
|
||||
ISR process will be blocked.
|
||||
(++) functions affecting time base configurations are declared as __Weak
|
||||
to make override possible in case of other implementations in user file.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief This function configures the Flash prefetch, Flash preread and Buffer cache,
|
||||
* Configures time base source, NVIC and Low level hardware
|
||||
* @note This function is called at the beginning of program after reset and before
|
||||
* the clock configuration
|
||||
* @note The time base configuration is based on MSI clock when exiting from Reset.
|
||||
* Once done, time base tick start incrementing.
|
||||
* In the default implementation,Systick is used as source of time base.
|
||||
* the tick variable is incremented each 1ms in its ISR.
|
||||
* @param None
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_Init(void)
|
||||
{
|
||||
/* Configure Buffer cache, Flash prefetch, Flash preread */
|
||||
#if (BUFFER_CACHE_DISABLE != 0)
|
||||
__HAL_FLASH_BUFFER_CACHE_DISABLE();
|
||||
#endif /* BUFFER_CACHE_DISABLE */
|
||||
|
||||
#if (PREREAD_ENABLE != 0)
|
||||
__HAL_FLASH_PREREAD_BUFFER_ENABLE();
|
||||
#endif /* PREREAD_ENABLE */
|
||||
|
||||
#if (PREFETCH_ENABLE != 0)
|
||||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||||
#endif /* PREFETCH_ENABLE */
|
||||
|
||||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
|
||||
|
||||
HAL_InitTick(TICK_INT_PRIORITY);
|
||||
|
||||
/* Init the low level hardware */
|
||||
HAL_MspInit();
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function de-Initializes common part of the HAL and stops the source
|
||||
* of time base.
|
||||
* @note This function is optional.
|
||||
* @param None
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DeInit(void)
|
||||
{
|
||||
/* Reset of all peripherals */
|
||||
__APB1_FORCE_RESET();
|
||||
__APB1_RELEASE_RESET();
|
||||
|
||||
__APB2_FORCE_RESET();
|
||||
__APB2_RELEASE_RESET();
|
||||
|
||||
__AHB_FORCE_RESET();
|
||||
__AHB_RELEASE_RESET();
|
||||
|
||||
__IOP_FORCE_RESET();
|
||||
__IOP_RELEASE_RESET();
|
||||
|
||||
/* De-Init the low level hardware */
|
||||
HAL_MspDeInit();
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the MSP.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_MspInit(void)
|
||||
{
|
||||
/* NOTE : This function Should not be modified, when the callback is needed,
|
||||
the HAL_MspInit could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the MSP.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_MspDeInit(void)
|
||||
{
|
||||
/* NOTE : This function Should not be modified, when the callback is needed,
|
||||
the HAL_MspDeInit could be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief This function configures the source of the time base.
|
||||
* The time source is configured to have 1ms time base with a dedicated
|
||||
* Tick interrupt priority.
|
||||
* @note This function is called automatically at the beginning of program after
|
||||
* reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
|
||||
* @note In the default implementation, SysTick timer is the source of time base.
|
||||
* It is used to generate interrupts at regular time intervals.
|
||||
* Care must be taken if HAL_Delay() is called from a peripheral ISR process,
|
||||
* The the SysTick interrupt must have higher priority (numerically lower)
|
||||
* than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
|
||||
* The function is declared as __Weak to be overwritten in case of other
|
||||
* implementation in user file.
|
||||
* @param TickPriority: Tick interrupt priority.
|
||||
* @retval HAL status
|
||||
*/
|
||||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||
{
|
||||
/*Configure the SysTick to have interrupt in 1ms time basis*/
|
||||
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
|
||||
|
||||
/*Configure the SysTick IRQ priority */
|
||||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/** @defgroup HAL_Group2 HAL Control functions
|
||||
* @brief HAL Control functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### HAL Control functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Provide a tick value in millisecond
|
||||
(+) Provide a blocking delay in millisecond
|
||||
(+) Suspend the time base source interrupt
|
||||
(+) Resume the time base source interrupt
|
||||
(+) Get the HAL API driver version
|
||||
(+) Get the device identifier
|
||||
(+) Get the device revision identifier
|
||||
(+) Configures low power mode behavior when the MCU is in Debug mode
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief This function is called to increment a global variable "uwTick"
|
||||
* used as application time base.
|
||||
* @note In the default implementation, this variable is incremented each 1ms
|
||||
* in Systick ISR.
|
||||
* @note This function is declared as __weak to be overwritten in case of other
|
||||
* implementations in user file.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_IncTick(void)
|
||||
{
|
||||
uwTick++;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Provides a tick value in millisecond.
|
||||
* @note This function is declared as __weak to be overwritten in case of other
|
||||
* implementations in user file.
|
||||
* @param None
|
||||
* @retval tick value
|
||||
*/
|
||||
__weak uint32_t HAL_GetTick(void)
|
||||
{
|
||||
return uwTick;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function provides accurate delay (in milliseconds) based
|
||||
* on variable incremented.
|
||||
* @note In the default implementation , SysTick timer is the source of time base.
|
||||
* It is used to generate interrupts at regular time intervals where uwTick
|
||||
* is incremented.
|
||||
* @note ThiS function is declared as __weak to be overwritten in case of other
|
||||
* implementations in user file.
|
||||
* @param Delay: specifies the delay time length, in milliseconds.
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_Delay(__IO uint32_t Delay)
|
||||
{
|
||||
uint32_t tickstart = 0;
|
||||
tickstart = HAL_GetTick();
|
||||
while((HAL_GetTick() - tickstart) < Delay)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Suspend Tick increment.
|
||||
* @note In the default implementation , SysTick timer is the source of time base. It is
|
||||
* used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
|
||||
* is called, the the SysTick interrupt will be disabled and so Tick increment
|
||||
* is suspended.
|
||||
* @note This function is declared as __weak to be overwritten in case of other
|
||||
* implementations in user file.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_SuspendTick(void)
|
||||
{
|
||||
/* Disable SysTick Interrupt */
|
||||
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resume Tick increment.
|
||||
* @note In the default implementation , SysTick timer is the source of time base. It is
|
||||
* used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
|
||||
* is called, the the SysTick interrupt will be enabled and so Tick increment
|
||||
* is resumed.
|
||||
* @note This function is declared as __weak to be overwritten in case of other
|
||||
* implementations in user file.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_ResumeTick(void)
|
||||
{
|
||||
/* Enable SysTick Interrupt */
|
||||
SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the HAL revision
|
||||
* @param None
|
||||
* @retval version: 0xXYZR (8bits for each decimal, R for RC)
|
||||
*/
|
||||
uint32_t HAL_GetHalVersion(void)
|
||||
{
|
||||
return __STM32L0xx_HAL_VERSION;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the device revision identifier.
|
||||
* @param None
|
||||
* @retval Device revision identifier
|
||||
*/
|
||||
uint32_t HAL_GetREVID(void)
|
||||
{
|
||||
return((DBGMCU->IDCODE) >> 16);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the device identifier.
|
||||
* @param None
|
||||
* @retval Device identifier
|
||||
*/
|
||||
uint32_t HAL_GetDEVID(void)
|
||||
{
|
||||
return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures low power mode behavior when the MCU is in Debug mode.
|
||||
* @param Periph: specifies the low power mode.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
|
||||
* @arg DBGMCU_STOP: Keep debugger connection during STOP mode
|
||||
* @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
|
||||
* @param NewState: new state of the specified low power mode in Debug mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_DBG_LowPowerConfig(uint32_t Periph, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DBGMCU_PERIPH(Periph));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
DBGMCU->CR |= Periph;
|
||||
}
|
||||
else
|
||||
{
|
||||
DBGMCU->CR &= ~Periph;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the boot mode as configured by user.
|
||||
* @param None.
|
||||
* @retval The boot mode as configured by user. The returned value can be one
|
||||
* of the following values:
|
||||
* - 0x00000000: Boot is configured in Main Flash memory
|
||||
* - 0x00000100: Boot is configured in System Flash memory
|
||||
* - 0x00000300: Boot is configured in Embedded SRAM memory
|
||||
*/
|
||||
uint32_t HAL_GetBootMode(void)
|
||||
{
|
||||
return (SYSCFG->CFGR1 & SYSCFG_CFGR1_BOOT_MODE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the I2C fast mode plus driving capability.
|
||||
* @param SYSCFG_I2CFastModePlus: selects the pin.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SYSCFG_I2CFastModePlus_PB6: Configure fast mode plus driving capability for PB6
|
||||
* @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7
|
||||
* @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8
|
||||
* @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9
|
||||
* @arg SYSCFG_I2CFastModePlus_I2C1: Configure fast mode plus driving capability for I2C1 pins
|
||||
* @arg SYSCFG_I2CFastModePlus_I2C2: Configure fast mode plus driving capability for I2C2 pins
|
||||
* @param NewState: This parameter can be:
|
||||
* @arg ENABLE: Enable fast mode plus driving capability for selected I2C pin
|
||||
* @arg DISABLE: Disable fast mode plus driving capability for selected I2C pin
|
||||
* @note For I2C1, fast mode plus driving capability can be enabled on all selected
|
||||
* I2C1 pins using SYSCFG_I2CFastModePlus_I2C1 parameter or independently
|
||||
* on each one of the following pins PB6, PB7, PB8 and PB9.
|
||||
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
|
||||
* can be enabled only by using SYSCFG_I2CFastModePlus_I2C1 parameter.
|
||||
* @note For all I2C2 pins fast mode plus driving capability can be enabled
|
||||
* only by using SYSCFG_I2CFastModePlus_I2C2 parameter.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SYSCFG_I2C_FMP(SYSCFG_I2CFastModePlus));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable fast mode plus driving capability for selected pin */
|
||||
SYSCFG->CFGR2 |= (uint32_t)SYSCFG_I2CFastModePlus;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable fast mode plus driving capability for selected pin */
|
||||
SYSCFG->CFGR2 &= (uint32_t)(~SYSCFG_I2CFastModePlus);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the VREFINT.
|
||||
* @param NewState: new state of the Vrefint.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_VREFINT_Cmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the VREFINT by setting EN_VREFINT bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 |= SYSCFG_CFGR3_EN_VREFINT;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the VREFINT by setting EN_VREFINT bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)SYSCFG_CFGR3_EN_VREFINT);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the output of internal reference voltage (VREFINT).
|
||||
* The VREFINT output can be routed to(PB0) or
|
||||
* (PB1) or both.
|
||||
* @param SYSCFG_Vrefint_OUTPUT: new state of the Vrefint output.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SYSCFG_VREFINT_OUT_NONE
|
||||
* @arg SYSCFG_VREFINT_OUT_PB0
|
||||
* @arg SYSCFG_VREFINT_OUT_PB1
|
||||
* @arg SYSCFG_VREFINT_OUT_PB0_PB1
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SYSCFG_VREFINT_OUT_SELECT(SYSCFG_Vrefint_OUTPUT));
|
||||
|
||||
/* Set the output Vrefint pin */
|
||||
SYSCFG->CFGR3 &= ~(SYSCFG_CFGR3_VREF_OUT);
|
||||
SYSCFG->CFGR3 |= (uint32_t)(SYSCFG_Vrefint_OUTPUT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Buffer Vrefint for the ADC.
|
||||
* @param NewState: new state of the Vrefint.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @note This is functional only if the LOCK is not set
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ADC_EnableBuffer_Cmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the Buffer for the ADC by setting EN_VREFINT bit and the ENBUF_VREFINT_ADC in the CFGR3 register */
|
||||
SYSCFG->CFGR3 |= (SYSCFG_CFGR3_ENBUF_VREFINT_ADC | SYSCFG_CFGR3_EN_VREFINT);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Vrefint by resetting ENBUF_BGAP_ADC bit and the EN_VREFINT bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)(SYSCFG_CFGR3_ENBUF_VREFINT_ADC | SYSCFG_CFGR3_EN_VREFINT));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Buffer Sensor for the ADC.
|
||||
* @param NewState: new state of the Vrefint.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @note This is functional only if the LOCK is not set.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ADC_EnableBufferSensor_Cmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the Buffer for the ADC by setting EN_VREFINT bit and the ENBUF_SENSOR_ADC in the CFGR3 register */
|
||||
SYSCFG->CFGR3 |= (SYSCFG_CFGR3_ENBUF_SENSOR_ADC | SYSCFG_CFGR3_EN_VREFINT);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Vrefint by resetting EN_VREFINT bit and the ENBUF_SENSOR_ADC in the CFGR3 register */
|
||||
SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)(SYSCFG_CFGR3_ENBUF_SENSOR_ADC | SYSCFG_CFGR3_EN_VREFINT));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Buffer Vrefint for the COMP.
|
||||
* @param NewState: new state of the Vrefint.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @note This is functional only if the LOCK is not set
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_COMP_EnableBuffer_Cmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the Buffer for the COMP by setting EN_VREFINT bit and the ENBUFLP_VREFINT_COMP in the CFGR3 register */
|
||||
SYSCFG->CFGR3 |= (SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP | SYSCFG_CFGR3_EN_VREFINT);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Vrefint by resetting ENBUFLP_BGAP_COMP bit and the EN_VREFINT bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)(SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP | SYSCFG_CFGR3_EN_VREFINT));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Buffer Vrefint for the RC48.
|
||||
* @param NewState: new state of the Vrefint.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @note This is functional only if the LOCK is not set
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RC48_EnableBuffer_Cmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the Buffer for the ADC by setting EN_VREFINT bit and the SYSCFG_CFGR3_ENREF_HSI48 in the CFGR3 register */
|
||||
SYSCFG->CFGR3 |= (SYSCFG_CFGR3_ENREF_HSI48 | SYSCFG_CFGR3_EN_VREFINT);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Vrefint by resetting SYSCFG_CFGR3_ENREF_HSI48 bit and the EN_VREFINT bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)(SYSCFG_CFGR3_ENREF_HSI48 | SYSCFG_CFGR3_EN_VREFINT));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Lock.
|
||||
* @param NewState: new state of the Lock.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_Lock_Cmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the LOCK by setting REF_LOCK bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 |= SYSCFG_CFGR3_REF_LOCK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the LOCK by setting REF_LOCK bit in the CFGR3 register */
|
||||
SYSCFG->CFGR3 &= (uint32_t)~((uint32_t)SYSCFG_CFGR3_REF_LOCK);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,235 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief This file contains all the functions prototypes for the HAL
|
||||
* module driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_HAL_H
|
||||
#define __STM32L0xx_HAL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_conf.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup HAL_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DBGMCU_Low_Power_Config
|
||||
* @{
|
||||
*/
|
||||
#define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP
|
||||
#define DBGMCU_STOP DBGMCU_CR_DBG_STOP
|
||||
#define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
|
||||
#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SYSCFG_I2C_FastModePlus_Config
|
||||
* @{
|
||||
*/
|
||||
#define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /* Enable Fast Mode Plus on PB6 */
|
||||
#define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /* Enable Fast Mode Plus on PB7 */
|
||||
#define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /* Enable Fast Mode Plus on PB8 */
|
||||
#define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /* Enable Fast Mode Plus on PB9 */
|
||||
#define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR2_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
|
||||
#define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR2_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
|
||||
|
||||
#define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB7) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB8) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB9) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_I2C2))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_VREFINT_OUT_SELECT
|
||||
* @{
|
||||
*/
|
||||
#define SYSCFG_VREFINT_OUT_NONE ((uint32_t)0x00000000) /* no pad connected */
|
||||
#define SYSCFG_VREFINT_OUT_PB0 SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */
|
||||
#define SYSCFG_VREFINT_OUT_PB1 SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */
|
||||
#define SYSCFG_VREFINT_OUT_PB0_PB1 SYSCFG_CFGR3_VREF_OUT /* Selects PBO and PB1 as output for the Vrefint */
|
||||
|
||||
#define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT) (((OUTPUT) == SYSCFG_VREFINT_OUT_PB0) || \
|
||||
((OUTPUT) == SYSCFG_VREFINT_OUT_PB1) || \
|
||||
((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SYSCFG_FLAG_RC48 SYSCFG_CFGR3_REF_HSI48_RDYF
|
||||
#define SYSCFG_FLAG_SENSOR_ADC SYSCFG_CFGR3_SENSOR_ADC_RDYF
|
||||
#define SYSCFG_FLAG_VREF_ADC SYSCFG_VREFINT_ADC_RDYF
|
||||
#define SYSCFG_FLAG_VREF_COMP SYSCFG_CFGR3_VREFINT_COMP_RDYF
|
||||
#define SYSCFG_FLAG_VREF_READY SYSCFG_CFGR3_VREFINT_RDYF
|
||||
|
||||
#define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_RC48) || \
|
||||
((FLAG) == SYSCFG_FLAG_SENSOR_ADC) || \
|
||||
((FLAG) == SYSCFG_FLAG_VREF_ADC) || \
|
||||
((FLAG) == SYSCFG_FLAG_VREF_COMP) || \
|
||||
((FLAG) == SYSCFG_FLAG_VREF_READY))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @brief Freeze/Unfreeze Peripherals in Debug mode
|
||||
*/
|
||||
#define __HAL_FREEZE_TIM2_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
|
||||
#define __HAL_FREEZE_TIM6_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
|
||||
#define __HAL_FREEZE_RTC_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
|
||||
#define __HAL_FREEZE_WWDG_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
|
||||
#define __HAL_FREEZE_IWDG_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
|
||||
#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_STOP))
|
||||
#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_STOP))
|
||||
#define __HAL_FREEZE_LPTIMER_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP))
|
||||
#define __HAL_FREEZE_TIM22_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM22_STOP))
|
||||
#define __HAL_FREEZE_TIM21_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM21_STOP))
|
||||
|
||||
#define __HAL_UNFREEZE_TIM2_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
|
||||
#define __HAL_UNFREEZE_TIM6_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
|
||||
#define __HAL_UNFREEZE_RTC_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
|
||||
#define __HAL_UNFREEZE_WWDG_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
|
||||
#define __HAL_UNFREEZE_IWDG_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
|
||||
#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_STOP))
|
||||
#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_STOP))
|
||||
#define __HAL_UNFREEZE_LPTIMER_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIMER_STOP))
|
||||
#define __HAL_UNFREEZE_TIM22_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM22_STOP))
|
||||
#define __HAL_UNFREEZE_TIM21_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM21_STOP))
|
||||
|
||||
/** @brief Main Flash memory mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_REMAPMEMORY_FLASH (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE))
|
||||
|
||||
/** @brief System Flash memory mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_REMAPMEMORY_SYSTEMFLASH do {SYSCFG->MEMRMP &= ~(SYSCFG_CFGR1_MEM_MODE);\
|
||||
SYSCFG->MEMRMP |= SYSCFG_CFGR1_MEM_MODE_0;\
|
||||
}while(0);
|
||||
|
||||
/** @brief Embedded SRAM mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_REMAPMEMORY_SRAM do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE);\
|
||||
SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1);\
|
||||
}while(0);
|
||||
|
||||
/** @brief Check whether the specified SYSCFG flag is set or not.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* SYSCFG_FLAG_PE: SRAM parity error flag.
|
||||
* @arg SYSCFG_FLAG_RC48
|
||||
* @arg SYSCFG_FLAG_SENSOR_ADC
|
||||
* @arg SYSCFG_FLAG_VREF_ADC
|
||||
* @arg SYSCFG_FLAG_VREF_COMP
|
||||
* @arg SYSCFG_FLAG_VREF_READY
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/* Initialization and de-initialization functions ******************************/
|
||||
HAL_StatusTypeDef HAL_Init(void);
|
||||
HAL_StatusTypeDef HAL_DeInit(void);
|
||||
void HAL_MspInit(void);
|
||||
void HAL_MspDeInit(void);
|
||||
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
|
||||
|
||||
/* Peripheral Control functions ************************************************/
|
||||
void HAL_IncTick(void);
|
||||
void HAL_Delay(__IO uint32_t Delay);
|
||||
uint32_t HAL_GetTick(void);
|
||||
void HAL_SuspendTick(void);
|
||||
void HAL_ResumeTick(void);
|
||||
uint32_t HAL_GetHalVersion(void);
|
||||
uint32_t HAL_GetREVID(void);
|
||||
uint32_t HAL_GetDEVID(void);
|
||||
|
||||
void HAL_DBG_LowPowerConfig(uint32_t Periph, FunctionalState NewState);
|
||||
uint32_t HAL_GetBootMode(void);
|
||||
void HAL_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
|
||||
void HAL_VREFINT_Cmd(FunctionalState NewState);
|
||||
void HAL_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT);
|
||||
void HAL_ADC_EnableBuffer_Cmd(FunctionalState NewState);
|
||||
void HAL_ADC_EnableBufferSensor_Cmd(FunctionalState NewState);
|
||||
void HAL_COMP_EnableBuffer_Cmd(FunctionalState NewState);
|
||||
void HAL_RC48_EnableBuffer_Cmd(FunctionalState NewState);
|
||||
void HAL_Lock_Cmd(FunctionalState NewState);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,939 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_adc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief This file contains all the functions prototypes for the ADC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_ADC_H
|
||||
#define __STM32L0xx_ADC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ADC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_ADC_STATE_RESET = 0x00, /*!< ADC not yet initialized or disabled */
|
||||
HAL_ADC_STATE_READY = 0x01, /*!< ADC peripheral ready for use */
|
||||
HAL_ADC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
|
||||
HAL_ADC_STATE_BUSY_REG = 0x12, /*!< Regular conversion is ongoing */
|
||||
HAL_ADC_STATE_TIMEOUT = 0x03, /*!< Timeout state */
|
||||
HAL_ADC_STATE_ERROR = 0x04, /*!< ADC state error */
|
||||
HAL_ADC_STATE_EOC = 0x05, /*!< Conversion is completed */
|
||||
HAL_ADC_STATE_AWD = 0x06, /*!< ADC state analog watchdog */
|
||||
}HAL_ADC_StateTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief ADC Oversampler structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Ratio; /*!< Configures the oversampling ratio.
|
||||
This parameter can be a value of @ref ADC_Oversampling_Ratio */
|
||||
uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
|
||||
This parameter can be a value of @ref ADC_Right_Bit_Shift */
|
||||
uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode
|
||||
This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
|
||||
|
||||
}ADC_OversamplingTypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC Init structure definition
|
||||
* @note The setting of these parameters with function HAL_ADC_Init() is conditioned by the ADC state.
|
||||
* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
|
||||
* without error reporting (as it can be the expected behaviour in case of intended action to update antother parameter (which fullfills the ADC state condition) on the fly).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
ADC_OversamplingTypeDef Oversample; /*!< Specifies the Oversampling parameters
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t ClockPrescaler; /*!< Selects the ADC clock frequency.
|
||||
This parameter can be a value of @ref ADC_ClockPrescaler
|
||||
Note: This parameter can be modified only if ADC is disabled. */
|
||||
uint32_t Resolution; /*!< Configures the ADC resolution mode.
|
||||
This parameter can be a value of @ref ADC_Resolution
|
||||
Note: This parameter can be modified only if ADC is disabled. */
|
||||
uint32_t SamplingTime; /*!< The sample time value to be set for all channels.
|
||||
This parameter can be a value of @ref ADC_sampling_times.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t ScanDirection; /*!< The scan sequence direction.
|
||||
This parameter can be a value of @ref ADC_scan_direction.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
|
||||
This parameter can be a value of @ref ADC_data_align.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in Continuous or Single mode.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversion is performed
|
||||
in Complete-sequence/Discontinuous-sequence.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t ExternalTrigConvEdge; /*!< Select the external trigger edge and enable the trigger.
|
||||
This parameter can be a value of @ref ADC_External_trigger_Edge.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t ExternalTrigConv; /*!< Select the external event used to trigger the start of conversion.
|
||||
This parameter can be a value of @ref ADC_External_trigger_Source.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
|
||||
or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
|
||||
Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer max pointer is reached.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion polling and interruption:
|
||||
end of single channel conversion or end of channels conversions sequence.
|
||||
This parameter can be a value of @ref ADC_EOCSelection. */
|
||||
uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
|
||||
This parameter has an effect on regular channels only, including in DMA mode.
|
||||
This parameter can be a value of @ref ADC_Overrun.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t LowPowerAutoWait; /*!< Specifies the usage of dynamic low power Auto Delay: new conversion start only
|
||||
when the previous conversion (for regular channel) is completed.
|
||||
This avoids risk of overrun for low frequency application.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t LowPowerFrequencyMode; /*!< When selecting an analog ADC clock frequency lower than 2.8MHz,
|
||||
it is mandatory to first enable the Low Frequency Mode.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
uint32_t LowPowerAutoOff; /*!< When setting the AutoOff feature, the ADC is always powered off when not converting and automatically
|
||||
wakes-up when a conversion is started (by software or hardware trigger).
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter can be modified only if there is no conversion is ongoing. */
|
||||
}ADC_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC handle Structure definition
|
||||
*/
|
||||
typedef struct __ADC_HandleTypeDef
|
||||
{
|
||||
ADC_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
ADC_InitTypeDef Init; /*!< ADC required parameters */
|
||||
|
||||
DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< ADC locking object */
|
||||
|
||||
__IO HAL_ADC_StateTypeDef State; /*!< ADC communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< ADC Error code */
|
||||
}ADC_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @brief ADC Configuration regular Channel structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Channel; /*!< the ADC channel to configure
|
||||
This parameter can be a value of @ref ADC_channels */
|
||||
}ADC_ChannelConfTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief ADC Configuration analog watchdog definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels.
|
||||
This parameter can be a value of @ref ADC_analog_watchdog_mode. */
|
||||
uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
|
||||
This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
|
||||
This parameter can be a value of @ref ADC_channels. */
|
||||
uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
Depending of ADC resolution selected (12, 10, 8 or 6 bits),
|
||||
this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
|
||||
uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
Depending of ADC resolution selected (12, 10, 8 or 6 bits),
|
||||
this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
|
||||
}ADC_AnalogWDGConfTypeDef;
|
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup ADC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Error_Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */
|
||||
#define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
|
||||
enable/disable, erroneous state */
|
||||
#define HAL_ADC_ERROR_OVR ((uint32_t)0x01) /*!< OVR error */
|
||||
#define HAL_ADC_ERROR_DMA ((uint32_t)0x02) /*!< DMA transfer error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_TimeOut_Values
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Fixed timeout values for ADC calibration, enable settling time, disable */
|
||||
/* settling time. */
|
||||
/* Values defined to be higher than worst cases: low clocks freq, */
|
||||
/* maximum prescalers. */
|
||||
/* Unit: ms */
|
||||
#define ADC_ENABLE_TIMEOUT 10
|
||||
#define ADC_DISABLE_TIMEOUT 10
|
||||
#define ADC_STOP_CONVERSION_TIMEOUT 10
|
||||
|
||||
/* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
|
||||
/* the minimum number of CPU cycles to fulfill this delay */
|
||||
#define ADC_DELAY_10US_MIN_CPU_CYCLES 1800
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_ClockPrescaler
|
||||
* @{
|
||||
*/
|
||||
#define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode divided by 1 */
|
||||
#define ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
|
||||
|
||||
#define ADC_CLOCKPRESCALER_PCLK_DIV1 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< Synchronous clock mode divided by 1 */
|
||||
#define ADC_CLOCKPRESCALER_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< Synchronous clock mode divided by 2 */
|
||||
#define ADC_CLOCKPRESCALER_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE) /*!< Synchronous clock mode divided by 4 */
|
||||
|
||||
#define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCKPRESCALER_PCLK_DIV1) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCKPRESCALER_PCLK_DIV2) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCKPRESCALER_PCLK_DIV4) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV6 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV8 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV10 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV12 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV16 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV32 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV64 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV128 ) ||\
|
||||
((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Resolution
|
||||
* @{
|
||||
*/
|
||||
#define ADC_RESOLUTION12b ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
|
||||
#define ADC_RESOLUTION10b ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
|
||||
#define ADC_RESOLUTION8b ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
|
||||
#define ADC_RESOLUTION6b ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
|
||||
|
||||
#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION12b) || \
|
||||
((RESOLUTION) == ADC_RESOLUTION10b) || \
|
||||
((RESOLUTION) == ADC_RESOLUTION8b) || \
|
||||
((RESOLUTION) == ADC_RESOLUTION6b))
|
||||
|
||||
#define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION8b) || \
|
||||
((RESOLUTION) == ADC_RESOLUTION6b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_data_align
|
||||
* @{
|
||||
*/
|
||||
#define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
|
||||
#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
|
||||
|
||||
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
|
||||
((ALIGN) == ADC_DATAALIGN_LEFT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_External_trigger_Edge
|
||||
* @{
|
||||
*/
|
||||
#define ADC_EXTERNALTRIG_EDGE_NONE ((uint32_t)0x00000000)
|
||||
#define ADC_EXTERNALTRIG_EDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
|
||||
#define ADC_EXTERNALTRIG_EDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
|
||||
#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
|
||||
|
||||
#define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIG_EDGE_NONE) || \
|
||||
((EDGE) == ADC_EXTERNALTRIG_EDGE_RISING) || \
|
||||
((EDGE) == ADC_EXTERNALTRIG_EDGE_FALLING) || \
|
||||
((EDGE) == ADC_EXTERNALTRIG_EDGE_RISINGFALLING))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_External_trigger_Source
|
||||
* @{
|
||||
*/
|
||||
#define ADC_EXTERNALTRIG0_T6_TRGO ((uint32_t)0x00000000)
|
||||
#define ADC_EXTERNALTRIG1_T21_CC2 ADC_CFGR1_EXTSEL_0
|
||||
#define ADC_EXTERNALTRIG2_T2_TRGO ADC_CFGR1_EXTSEL_1
|
||||
#define ADC_EXTERNALTRIG3_T2_CC4 ((uint32_t)0x000000C0)
|
||||
#define ADC_EXTERNALTRIG4_T22_TRGO ADC_CFGR1_EXTSEL_2
|
||||
#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_CFGR1_EXTSEL
|
||||
|
||||
#define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_EXTERNALTRIG0_T6_TRGO ) || \
|
||||
((CONV) == ADC_EXTERNALTRIG1_T21_CC2 ) || \
|
||||
((CONV) == ADC_EXTERNALTRIG2_T2_TRGO ) || \
|
||||
((CONV) == ADC_EXTERNALTRIG3_T2_CC4 ) || \
|
||||
((CONV) == ADC_EXTERNALTRIG4_T22_TRGO ) || \
|
||||
((CONV) == ADC_EXTERNALTRIG7_EXT_IT11 ))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_EOCSelection
|
||||
* @{
|
||||
*/
|
||||
#define EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
|
||||
#define EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
|
||||
#define EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */
|
||||
|
||||
#define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == EOC_SINGLE_CONV) || \
|
||||
((EOC_SELECTION) == EOC_SEQ_CONV) || \
|
||||
((EOC_SELECTION) == EOC_SINGLE_SEQ_CONV))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Overrun
|
||||
* @{
|
||||
*/
|
||||
#define OVR_DATA_PRESERVED ((uint32_t)0x00000000)
|
||||
#define OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR1_OVRMOD)
|
||||
|
||||
#define IS_ADC_OVERRUN(OVR) (((OVR) == OVR_DATA_PRESERVED) || \
|
||||
((OVR) == OVR_DATA_OVERWRITTEN))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_channels
|
||||
* @{
|
||||
*/
|
||||
#define ADC_CHANNEL_0 ((uint32_t)(ADC_CHSELR_CHSEL0))
|
||||
#define ADC_CHANNEL_1 ((uint32_t)(ADC_CHSELR_CHSEL1) | ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_2 ((uint32_t)(ADC_CHSELR_CHSEL2) | ADC_CFGR1_AWDCH_1)
|
||||
#define ADC_CHANNEL_3 ((uint32_t)(ADC_CHSELR_CHSEL3)| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_4 ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
|
||||
#define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_6 ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
|
||||
#define ADC_CHANNEL_7 ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_8 ((uint32_t)(ADC_CHSELR_CHSEL8)| ADC_CFGR1_AWDCH_3)
|
||||
#define ADC_CHANNEL_9 ((uint32_t)(ADC_CHSELR_CHSEL9)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_10 ((uint32_t)(ADC_CHSELR_CHSEL10)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1)
|
||||
#define ADC_CHANNEL_11 ((uint32_t)(ADC_CHSELR_CHSEL11)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_12 ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
|
||||
#define ADC_CHANNEL_13 ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_14 ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
|
||||
#define ADC_CHANNEL_15 ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_16 ((uint32_t)(ADC_CHSELR_CHSEL16)| ADC_CFGR1_AWDCH_4)
|
||||
#define ADC_CHANNEL_17 ((uint32_t)(ADC_CHSELR_CHSEL17)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_0)
|
||||
#define ADC_CHANNEL_18 ((uint32_t)(ADC_CHSELR_CHSEL18)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_1)
|
||||
|
||||
/* Internal channels */
|
||||
#define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16
|
||||
#define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
|
||||
#define ADC_CHANNEL_VLCD ADC_CHANNEL_18
|
||||
|
||||
|
||||
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
|
||||
((CHANNEL) == ADC_CHANNEL_1) || \
|
||||
((CHANNEL) == ADC_CHANNEL_2) || \
|
||||
((CHANNEL) == ADC_CHANNEL_3) || \
|
||||
((CHANNEL) == ADC_CHANNEL_4) || \
|
||||
((CHANNEL) == ADC_CHANNEL_5) || \
|
||||
((CHANNEL) == ADC_CHANNEL_6) || \
|
||||
((CHANNEL) == ADC_CHANNEL_7) || \
|
||||
((CHANNEL) == ADC_CHANNEL_8) || \
|
||||
((CHANNEL) == ADC_CHANNEL_9) || \
|
||||
((CHANNEL) == ADC_CHANNEL_10) || \
|
||||
((CHANNEL) == ADC_CHANNEL_11) || \
|
||||
((CHANNEL) == ADC_CHANNEL_12) || \
|
||||
((CHANNEL) == ADC_CHANNEL_13) || \
|
||||
((CHANNEL) == ADC_CHANNEL_14) || \
|
||||
((CHANNEL) == ADC_CHANNEL_15) || \
|
||||
((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
|
||||
((CHANNEL) == ADC_CHANNEL_VREFINT) || \
|
||||
((CHANNEL) == ADC_CHANNEL_VLCD))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Channel_AWD_Masks
|
||||
* @{
|
||||
*/
|
||||
#define ADC_CHANNEL_MASK ((uint32_t)0x0007FFFF)
|
||||
#define ADC_CHANNEL_AWD_MASK ((uint32_t)0x7C000000)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup ADC_sampling_times
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x00000000) /*!< ADC sampling time 1.5 cycle */
|
||||
#define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_0) /*!< ADC sampling time 7.5 CYCLES */
|
||||
#define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_1) /*!< ADC sampling time 13.5 CYCLES */
|
||||
#define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_1 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 28.5 CYCLES */
|
||||
#define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_2) /*!< ADC sampling time 41.5 CYCLES */
|
||||
#define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 55.5 CYCLES */
|
||||
#define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_1)) /*!< ADC sampling time 71.5 CYCLES */
|
||||
#define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t)ADC_SMPR_SMPR) /*!< ADC sampling time 239.5 CYCLES */
|
||||
|
||||
#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_7CYCLES_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_13CYCLES_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_28CYCLES_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_41CYCLES_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_55CYCLES_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_71CYCLES_5 ) || \
|
||||
((TIME) == ADC_SAMPLETIME_239CYCLES_5))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_scan_direction
|
||||
* @{
|
||||
*/
|
||||
#define ADC_SCAN_DIRECTION_UPWARD ((uint32_t)0x00000000)
|
||||
#define ADC_SCAN_DIRECTION_BACKWARD ADC_CFGR1_SCANDIR
|
||||
|
||||
|
||||
#define IS_ADC_SCAN_DIRECTION(DIRECTION) (((DIRECTION) == ADC_SCAN_DIRECTION_UPWARD) || \
|
||||
((DIRECTION) == ADC_SCAN_DIRECTION_BACKWARD))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Oversampling_Ratio
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /*!< ADC Oversampling ratio 2x */
|
||||
#define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)0x00000004) /*!< ADC Oversampling ratio 4x */
|
||||
#define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)0x00000008) /*!< ADC Oversampling ratio 8x */
|
||||
#define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)0x0000000C) /*!< ADC Oversampling ratio 16x */
|
||||
#define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)0x00000010) /*!< ADC Oversampling ratio 32x */
|
||||
#define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)0x00000014) /*!< ADC Oversampling ratio 64x */
|
||||
#define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)0x00000018) /*!< ADC Oversampling ratio 128x */
|
||||
#define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)0x0000001C) /*!< ADC Oversampling ratio 256x */
|
||||
#define IS_ADC_OVERSAMPLING_RATIO(RATIO) (((RATIO) == ADC_OVERSAMPLING_RATIO_2 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_4 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_8 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_16 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_32 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_64 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_128 ) || \
|
||||
((RATIO) == ADC_OVERSAMPLING_RATIO_256 ))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Right_Bit_Shift
|
||||
* @{
|
||||
*/
|
||||
#define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_1 ((uint32_t)0x00000020) /*!< ADC 1 bit shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_2 ((uint32_t)0x00000040) /*!< ADC 2 bits shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_3 ((uint32_t)0x00000060) /*!< ADC 3 bits shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_4 ((uint32_t)0x00000080) /*!< ADC 4 bits shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_5 ((uint32_t)0x000000A0) /*!< ADC 5 bits shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_6 ((uint32_t)0x000000C0) /*!< ADC 6 bits shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_7 ((uint32_t)0x000000E0) /*!< ADC 7 bits shift for oversampling */
|
||||
#define ADC_RIGHTBITSHIFT_8 ((uint32_t)0x00000100) /*!< ADC 8 bits shift for oversampling */
|
||||
#define IS_ADC_RIGHT_BIT_SHIFT(SHIFT) (((SHIFT) == ADC_RIGHTBITSHIFT_NONE) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_1 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_2 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_3 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_4 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_5 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_6 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_7 ) || \
|
||||
((SHIFT) == ADC_RIGHTBITSHIFT_8 ))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Triggered_Oversampling_Mode
|
||||
* @{
|
||||
*/
|
||||
#define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
|
||||
#define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)0x00000200) /*!< ADC No bit shift for oversampling */
|
||||
#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(MODE) (((MODE) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
|
||||
((MODE) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_analog_watchdog_mode
|
||||
* @{
|
||||
*/
|
||||
#define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000)
|
||||
#define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
|
||||
#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
|
||||
|
||||
|
||||
#define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE ) || \
|
||||
((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
|
||||
((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG ))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_conversion_type
|
||||
* @{
|
||||
*/
|
||||
#define REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS))
|
||||
#define IS_ADC_CONVERSION_GROUP(CONVERSION) ((CONVERSION) == REGULAR_GROUP)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_Event_type
|
||||
* @{
|
||||
*/
|
||||
#define AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
|
||||
#define OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
|
||||
|
||||
#define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == AWD_EVENT) || \
|
||||
((EVENT) == OVR_EVENT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
#define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready (ADRDY) interrupt source */
|
||||
#define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
|
||||
#define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
|
||||
#define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
|
||||
#define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
|
||||
#define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog 1 interrupt source */
|
||||
#define ADC_IT_EOCAL ADC_IER_EOCALIE /*!< ADC End of Calibration interrupt source */
|
||||
|
||||
/* Check of single flag */
|
||||
#define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_RDY) || \
|
||||
((IT) == ADC_IT_EOSMP) || ((IT) == ADC_IT_EOC) || \
|
||||
((IT) == ADC_IT_EOS) || ((IT) == ADC_IT_OVR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/** @defgroup ADC_flags_definition
|
||||
* @{
|
||||
*/
|
||||
#define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready (ADRDY) flag */
|
||||
#define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
|
||||
#define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
|
||||
#define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
|
||||
#define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
|
||||
#define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
|
||||
#define ADC_FLAG_EOCAL ADC_ISR_EOCAL /*!< ADC Enf Of Calibration flag */
|
||||
|
||||
|
||||
#define ADC_FLAG_ALL (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS | \
|
||||
ADC_FLAG_OVR | ADC_FLAG_AWD | ADC_FLAG_EOCAL)
|
||||
|
||||
/* Check of single flag */
|
||||
#define IS_ADC_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
|
||||
((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
|
||||
((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_AWD) || \
|
||||
((FLAG) == ADC_FLAG_EOCAL))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup ADC_range_verification
|
||||
* in function of ADC resolution selected (12, 10, 8 or 6 bits)
|
||||
* @{
|
||||
*/
|
||||
#define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
|
||||
((((RESOLUTION) == ADC_RESOLUTION12b) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \
|
||||
(((RESOLUTION) == ADC_RESOLUTION10b) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \
|
||||
(((RESOLUTION) == ADC_RESOLUTION8b) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \
|
||||
(((RESOLUTION) == ADC_RESOLUTION6b) && ((ADC_VALUE) <= ((uint32_t)0x003F))))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_regular_nb_conv_verification
|
||||
* @{
|
||||
*/
|
||||
#define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)16)))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup ADC_Exported_Macro
|
||||
* @{
|
||||
*/
|
||||
/** @brief Reset ADC handle state
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
|
||||
|
||||
/**
|
||||
* @brief Enable the ADC peripheral
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
|
||||
|
||||
/**
|
||||
* @brief Verification of hardware constraints before ADC can be enabled
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
|
||||
*/
|
||||
#define __HAL_ADC_ENABLING_CONDITIONS(__HANDLE__) \
|
||||
(( ( ((__HANDLE__)->Instance->CR) & \
|
||||
(ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | \
|
||||
ADC_CR_ADDIS | ADC_CR_ADEN ) \
|
||||
) == RESET \
|
||||
) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Disable the ADC peripheral
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_DISABLE(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
|
||||
__HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Verification of hardware constraints before ADC can be disabled
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
|
||||
*/
|
||||
#define __HAL_ADC_DISABLING_CONDITIONS(__HANDLE__) \
|
||||
(( ( ((__HANDLE__)->Instance->CR) & \
|
||||
(ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
|
||||
) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Verification of ADC state: enabled or disabled
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval SET (ADC enabled) or RESET (ADC disabled)
|
||||
*/
|
||||
#define __HAL_ADC_IS_ENABLED(__HANDLE__) \
|
||||
(( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
|
||||
((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
|
||||
) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Returns resolution bits in CFGR register: RES[1:0]. Return value among parameter to @ref ADC_Resolution.
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
|
||||
|
||||
/**
|
||||
* @brief Check if no conversion is ongoing on regular groups
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval SET (conversion is on going) or RESET (no conversion is on going)
|
||||
*/
|
||||
#define __HAL_ADC_IS_CONVERSION_ONGOING(__HANDLE__) \
|
||||
(( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART)) == RESET ) ? RESET : SET)
|
||||
|
||||
/**
|
||||
* @brief Enable ADC continuous conversion mode.
|
||||
* @param _CONTINUOUS_MODE_: Continuous mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_CFGR1_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 13)
|
||||
|
||||
/**
|
||||
* @brief Configures the number of discontinuous conversions for the regular group channels.
|
||||
* @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_CFGR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1) << 17)
|
||||
|
||||
/**
|
||||
* @brief Enable the ADC DMA continuous request.
|
||||
* @param _DMAContReq_MODE_: DMA continuous request mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_CFGR1_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 1)
|
||||
|
||||
/**
|
||||
* @brief Enable the ADC Auto Delay.
|
||||
* @param _AutoDelay_: Auto delay bit enable or disable.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_CFGR1_AutoDelay(_AutoDelay_) ((_AutoDelay_) << 14)
|
||||
|
||||
/**
|
||||
* @brief Enable the ADC LowPowerAutoOff.
|
||||
* @param _AUTOFF_: AutoOff bit enable or disable.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_CFGR1_AUTOFF(_AUTOFF_) ((_AUTOFF_) << 15)
|
||||
|
||||
/**
|
||||
* @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
|
||||
* @param _Threshold_: Threshold value
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_TRx_HighThreshold(_Threshold_) ((_Threshold_) << 16)
|
||||
|
||||
/**
|
||||
* @brief Enable the ADC Low Frequency mode.
|
||||
* @param _LOW_FREQUENCY_MODE_: Low Frequency mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_CCR_LOWFREQUENCY(_LOW_FREQUENCY_MODE_) ((_LOW_FREQUENCY_MODE_) << 25)
|
||||
|
||||
/**
|
||||
* @brief Shift the offset in function of the selected ADC resolution.
|
||||
* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0
|
||||
* If resolution 12 bits, no shift.
|
||||
* If resolution 10 bits, shift of 2 ranks on the right.
|
||||
* If resolution 8 bits, shift of 4 ranks on the right.
|
||||
* If resolution 6 bits, shift of 6 ranks on the right.
|
||||
* therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
|
||||
* @param __HANDLE__: ADC handle.
|
||||
* @param _Offset_: Value to be shifted
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_Offset_shift_resolution(__HANDLE__, _Offset_) \
|
||||
((_Offset_) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR1_RES) >> 3)*2))
|
||||
|
||||
/**
|
||||
* @brief Shift the AWD1 threshold in function of the selected ADC resolution.
|
||||
* Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0
|
||||
* If resolution 12 bits, no shift.
|
||||
* If resolution 10 bits, shift of 2 ranks on the right.
|
||||
* If resolution 8 bits, shift of 4 ranks on the right.
|
||||
* If resolution 6 bits, shift of 6 ranks on the right.
|
||||
* therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
|
||||
* @param __HANDLE__: ADC handle.
|
||||
* @param _Threshold_: Value to be shifted
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_AWD1Threshold_shift_resolution(__HANDLE__, _Threshold_) \
|
||||
((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2))
|
||||
|
||||
/**
|
||||
* @brief Shift the value on the left, less significant are set to 0.
|
||||
* @param _Value_: Value to be shifted
|
||||
* @param _Shift_: Number of shift to be done
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_Value_Shift_left(_Value_, _Shift_) ((_Value_) << (_Shift_))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enable the ADC end of conversion interrupt.
|
||||
* @param __HANDLE__: ADC handle.
|
||||
* @param __INTERRUPT__: ADC Interrupt.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Disable the ADC end of conversion interrupt.
|
||||
* @param __HANDLE__: ADC handle.
|
||||
* @param __INTERRUPT__: ADC interrupt.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
|
||||
|
||||
/** @brief Checks if the specified ADC interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the ADC Handle.
|
||||
* @param __INTERRUPT__: specifies the ADC interrupt source to check.
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Clear the ADC's pending flags
|
||||
* @param __HANDLE__: ADC handle.
|
||||
* @param __FLAG__: ADC flag.
|
||||
* @retval None
|
||||
*/
|
||||
/* Note: bit cleared bit by writing 1 */
|
||||
#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) &= (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Get the selected ADC's flag status.
|
||||
* @param __HANDLE__: ADC handle.
|
||||
* @param __FLAG__: ADC flag.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configuration of ADC clock & prescaler: clock source PCLK or Asynchronous with selectable prescaler
|
||||
* @param __HANDLE__: ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
#define __HAL_ADC_CLOCK_PRESCALER(__HANDLE__) \
|
||||
do{ \
|
||||
if ((((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCKPRESCALER_PCLK_DIV1) || \
|
||||
(((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCKPRESCALER_PCLK_DIV2) || \
|
||||
(((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCKPRESCALER_PCLK_DIV2)) \
|
||||
{ \
|
||||
(__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
|
||||
(__HANDLE__)->Instance->CFGR2 |= (__HANDLE__)->Init.ClockPrescaler; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
/* CKMOD bits must be reset */ \
|
||||
(__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
|
||||
ADC->CCR &= ~(ADC_CCR_PRESC); \
|
||||
ADC->CCR |= (__HANDLE__)->Init.ClockPrescaler; \
|
||||
} \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include ADC HAL Extension module */
|
||||
#include "stm32l0xx_hal_adc_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Initialization and de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
|
||||
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
|
||||
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
|
||||
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
/* Blocking mode: Polling */
|
||||
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
|
||||
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
|
||||
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
|
||||
|
||||
/* Non-blocking mode: Interruption */
|
||||
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
|
||||
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
|
||||
|
||||
/* Non-blocking mode: DMA */
|
||||
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
|
||||
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
|
||||
|
||||
/* ADC retrieve conversion value intended to be used with polling or interruption */
|
||||
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
|
||||
|
||||
/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
|
||||
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
|
||||
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
|
||||
void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
|
||||
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
|
||||
void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
|
||||
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
|
||||
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
|
||||
|
||||
/* Peripheral State functions *************************************************/
|
||||
HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
|
||||
uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32L0xx_ADC_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,273 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_adc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Analog to Digital Convertor (ADC)
|
||||
* peripheral:
|
||||
* + Start calibration.
|
||||
* + Read the calibration factor.
|
||||
* + Set a calibration factor.
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### ADC specific features #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(#) Self calibration.
|
||||
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
|
||||
(#) Call HAL_ADCEx_Calibration_Start() to start calibration
|
||||
|
||||
(#) Read the calibration factor using HAL_ADCEx_Calibration_GetValue()
|
||||
|
||||
(#) User can set a his calibration factor using HAL_ADCEx_Calibration_SetValue()
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ADCEx
|
||||
* @brief ADC driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
|
||||
/** @defgroup ADCEx_Group ADC Extended features functions
|
||||
* @brief ADC Extended features functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### ADC Extended features functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides functions allowing to:
|
||||
(+) Start calibration.
|
||||
(+) Get calibration factor.
|
||||
(+) Set calibration factor.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Start an automatic calibration
|
||||
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified ADC.
|
||||
* @param SingleDiff: Selection of single-ended or differential input
|
||||
* This parameter can be only of the following values:
|
||||
* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
|
||||
{
|
||||
uint32_t tickstart = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
||||
assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hadc);
|
||||
|
||||
/* Disable the ADC (if not already disabled) */
|
||||
if (__HAL_ADC_IS_ENABLED(hadc) != RESET )
|
||||
{
|
||||
/* Check if conditions to disable the ADC are fulfilled */
|
||||
if (__HAL_ADC_DISABLING_CONDITIONS(hadc) != RESET)
|
||||
{
|
||||
__HAL_ADC_DISABLE(hadc);
|
||||
}
|
||||
else
|
||||
{
|
||||
hadc->State= HAL_ADC_STATE_ERROR;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hadc);
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Wait for ADC effectively disabled */
|
||||
/* Get timeout */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
/* Wait for disabling completion */
|
||||
while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
|
||||
{
|
||||
/* Check for the Timeout */
|
||||
if(ADC_DISABLE_TIMEOUT != HAL_MAX_DELAY)
|
||||
{
|
||||
if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)
|
||||
{
|
||||
hadc->State= HAL_ADC_STATE_TIMEOUT;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hadc);
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Start ADC calibration */
|
||||
hadc->Instance->CR |= ADC_CR_ADCAL;
|
||||
|
||||
/* Get timeout */
|
||||
tickstart = HAL_GetTick();
|
||||
|
||||
/* Wait for calibration completion */
|
||||
while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
|
||||
{
|
||||
/* Check for the Timeout */
|
||||
if(ADC_CALIBRATION_TIMEOUT != HAL_MAX_DELAY)
|
||||
{
|
||||
if((HAL_GetTick() - tickstart ) > ADC_CALIBRATION_TIMEOUT)
|
||||
{
|
||||
hadc->State= HAL_ADC_STATE_TIMEOUT;
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hadc);
|
||||
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hadc);
|
||||
|
||||
/* Return function status */
|
||||
return HAL_OK;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the calibration factor.
|
||||
* @param hadc: ADC handle.
|
||||
* @param SingleDiff: This parameter can be only:
|
||||
* @arg ADC_SINGLE_ENDED: Channel in mode input single ended.
|
||||
* @retval Calibration value.
|
||||
*/
|
||||
uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
||||
assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
|
||||
|
||||
/* Return the ADC calibration value */
|
||||
return ((hadc->Instance->CALFACT) & 0x0000007F);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the calibration factor to overwrite automatic conversion result.
|
||||
* ADC must be enabled and no conversion is ongoing.
|
||||
* @param hadc: ADC handle
|
||||
* @param SingleDiff: This parameter can be only:
|
||||
* @arg ADC_SINGLE_ENDED: Channel in mode input single ended.
|
||||
* @param CalibrationFactor: Calibration factor (coded on 7 bits maximum)
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
|
||||
{
|
||||
HAL_StatusTypeDef tmpHALStatus = HAL_OK;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
|
||||
assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
|
||||
assert_param(IS_ADC_CALFACT(CalibrationFactor));
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hadc);
|
||||
|
||||
/* Verification of hardware constraints before modifying the calibration */
|
||||
/* factors register: ADC must be enabled, no conversion on going. */
|
||||
if ( (__HAL_ADC_IS_ENABLED(hadc) != RESET) &&
|
||||
(__HAL_ADC_IS_CONVERSION_ONGOING(hadc) == RESET) )
|
||||
{
|
||||
/* Set the selected ADC calibration value */
|
||||
hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT;
|
||||
hadc->Instance->CALFACT |= CalibrationFactor;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update ADC state machine to error */
|
||||
hadc->State = HAL_ADC_STATE_ERROR;
|
||||
|
||||
/* Update ADC state machine to error */
|
||||
tmpHALStatus = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hadc);
|
||||
|
||||
/* Return function status */
|
||||
return tmpHALStatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,121 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_adc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief This file contains all the functions prototypes for the ADC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_ADC_EX_H
|
||||
#define __STM32L0xx_ADC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ADCEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup ADCEx_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ADCEx_TimeOut_Values
|
||||
* @{
|
||||
*/
|
||||
#define ADC_CALIBRATION_TIMEOUT 10
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup ADCEx_Channel_Mode
|
||||
* @{
|
||||
*/
|
||||
#define ADC_SINGLE_ENDED (uint32_t)0x00000000 /* dummy value */
|
||||
#define IS_ADC_SINGLE_DIFFERENTIAL(SING_DIFF) ((SING_DIFF) == ADC_SINGLE_ENDED)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADCEx_calibration_factor_length_verification
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Calibration factor lenght verification (7 bits maximum)
|
||||
* @param _Calibration_Factor_: Calibration factor value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_ADC_CALFACT(_Calibration_Factor_) ((_Calibration_Factor_) <= ((uint32_t)0x7F))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff);
|
||||
uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff);
|
||||
HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32L0xx_ADC_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,609 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_comp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief COMP HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the COMP peripheral:
|
||||
* + Initialization/de-initialization functions
|
||||
* + I/O operation functions
|
||||
* + Peripheral Control functions
|
||||
* + Peripheral State functions
|
||||
*
|
||||
@verbatim
|
||||
================================================================================
|
||||
##### COMP Peripheral features #####
|
||||
================================================================================
|
||||
|
||||
[..]
|
||||
The STM32L0xx device family integrates 2 analog comparators COMP1 and COMP2:
|
||||
(#) The non inverting input and inverting input can be set to GPIO pins
|
||||
as shown in table1. COMP Inputs below.
|
||||
|
||||
(#) The COMP output is available using HAL_COMP_GetOutputLevel()
|
||||
and can be set on GPIO pins. Refer to table 2. COMP Outputs below.
|
||||
|
||||
(#) The COMP output can be redirected to embedded timers (TIM2, TIM21, TIM22...) and LPTIM
|
||||
Refer to TIM and LPTIM drivers.
|
||||
|
||||
(#) The comparators COMP1 and COMP2 can be combined in window mode and only COMP2 non inverting input can be used as non-inverting input.
|
||||
|
||||
(#) The 2 comparators have interrupt capability with wake-up
|
||||
from Sleep and Stop modes (through the EXTI controller):
|
||||
(++) COMP1 is internally connected to EXTI Line 21
|
||||
(++) COMP2 is internally connected to EXTI Line 22
|
||||
|
||||
From the corresponding IRQ handler, the right interrupt source can be retrieved with the
|
||||
macro __HAL_COMP_EXTI_GET_FLAG(). Possible values are:
|
||||
(++) COMP_EXTI_LINE_COMP1_EVENT
|
||||
(++) COMP_EXTI_LINE_COMP2_EVENT
|
||||
|
||||
|
||||
[..] Table 1. COMP Inputs for the STM32L0xx devices
|
||||
+--------------------------------------------------+
|
||||
| | | COMP1 | COMP2 |
|
||||
|-----------------|----------------|---------------|
|
||||
| | 1/4 VREFINT | -- | OK |
|
||||
| | 1/2 VREFINT | -- | OK |
|
||||
| | 3/4 VREFINT | -- | OK |
|
||||
| Inverting Input | VREFINT | OK | OK |
|
||||
| | DAC OUT (PA4) | OK | OK |
|
||||
| | IO1 | PA0 | PA2 |
|
||||
| | IO2 | PA5 | PA5 |
|
||||
| | IO3 | --- | PB3 |
|
||||
|-----------------|----------------|-------|-------|
|
||||
| Non Inverting | IO1 | PA1 | PA3 |
|
||||
| Input | IO2 | --- | PB4 |
|
||||
| | IO3 | --- | PB5 |
|
||||
| | IO4 | --- | PB6 |
|
||||
| | IO5 | --- | PB7 |
|
||||
+--------------------------------------------------+
|
||||
|
||||
[..] Table 2. COMP Outputs for the STM32L0xx devices
|
||||
+---------------+
|
||||
| COMP1 | COMP2 |
|
||||
|-------|-------|
|
||||
| PA0 | PA2 |
|
||||
| PA6 | PA7 |
|
||||
| PA11 | PA12 |
|
||||
+---------------+
|
||||
|
||||
|
||||
##### How to use this driver #####
|
||||
================================================================================
|
||||
[..]
|
||||
This driver provides functions to configure and program the Comparators of all STM32L0xx devices.
|
||||
|
||||
To use the comparator, perform the following steps:
|
||||
|
||||
(#) Initialize the COMP low level resources by implementing the HAL_COMP_MspInit().
|
||||
(++) Enable the SYSCFG APB clock to get write access to comparator register using __SYSCFG_CLK_ENABLE().
|
||||
(++) Configure the comparator input in analog mode using HAL_GPIO_Init().
|
||||
(++) Configure the comparator output in alternate function mode using HAL_GPIO_Init() to map the comparator
|
||||
output to the GPIO pin.
|
||||
(++) If required enable the VREFINT reference using HAL_VREFINT_Cmd() and HAL_COMP_EnableBuffer_Cmd().
|
||||
(++) If required enable the COMP interrupt by configuring and enabling EXTI line in Interrupt mode and
|
||||
selecting the desired sensitivity level using HAL_GPIO_Init() function. After that enable the comparator
|
||||
interrupt vector using HAL_NVIC_EnableIRQ() function.
|
||||
|
||||
(#) Configure the comparator using HAL_COMP_Init() function:
|
||||
(++) Select the inverting input
|
||||
(++) Select the non-inverting input
|
||||
(++) Select the output polarity
|
||||
(++) Select the power mode
|
||||
(++) Select the window mode
|
||||
|
||||
(#) Enable the comparator using HAL_COMP_Start() function
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup COMP
|
||||
* @brief COMP HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* CSR register reset value */
|
||||
#define COMP_CSR_RESET_VALUE ((uint32_t)0x00000000)
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup COMP_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_COMP_Group1 Initialization/de-initialization functions
|
||||
* @brief Initialization and Configuration functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Initialization/de-initialization functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions to initialize and de-initialize comparators
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the COMP according to the specified
|
||||
* parameters in the COMP_InitTypeDef and create the associated handle.
|
||||
* @note If the selected comparator is locked, initialization can't be performed.
|
||||
* To unlock the configuration, perform a system reset.
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
assert_param(IS_COMP_INVERTINGINPUT(hcomp->Init.InvertingInput));
|
||||
assert_param(IS_COMP_NONINVERTINGINPUT(hcomp->Init.NonInvertingInput));
|
||||
assert_param(IS_COMP_OUTPUTPOL(hcomp->Init.OutputPol));
|
||||
assert_param(IS_COMP_MODE(hcomp->Init.Mode));
|
||||
|
||||
if(hcomp->Init.WindowMode != COMP_WINDOWMODE_DISABLED)
|
||||
{
|
||||
assert_param(IS_COMP_WINDOWMODE_INSTANCE(hcomp->Instance));
|
||||
assert_param(IS_COMP_WINDOWMODE(hcomp->Init.WindowMode));
|
||||
}
|
||||
|
||||
if(hcomp->State == HAL_COMP_STATE_RESET)
|
||||
{
|
||||
/* Init the low level hardware : SYSCFG to access comparators */
|
||||
HAL_COMP_MspInit(hcomp);
|
||||
}
|
||||
|
||||
/* Change COMP peripheral state */
|
||||
hcomp->State = HAL_COMP_STATE_BUSY;
|
||||
|
||||
/* Set COMP parameters */
|
||||
/* Set COMPxINSEL bits according to hcomp->Init.InvertingInput value */
|
||||
/* Set COMPxNONINSEL bits according to hcomp->Init.NonInvertingInput value */
|
||||
/* Set COMPxPOL bit according to hcomp->Init.OutputPol value */
|
||||
/* Set COMPxMODE bits according to hcomp->Init.Mode value */
|
||||
/* Set COMP1WM bit according to hcomp->Init.WindowMode value */
|
||||
MODIFY_REG(hcomp->Instance->CSR, COMP_CSR_UPDATE_PARAMETERS_MASK, \
|
||||
hcomp->Init.InvertingInput | \
|
||||
hcomp->Init.NonInvertingInput | \
|
||||
hcomp->Init.OutputPol | \
|
||||
hcomp->Init.Mode | \
|
||||
hcomp->Init.WindowMode);
|
||||
|
||||
|
||||
/* Initialize the COMP state*/
|
||||
hcomp->State = HAL_COMP_STATE_READY;
|
||||
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the COMP peripheral
|
||||
* @note Deinitialization can't be performed if the COMP configuration is locked.
|
||||
* To unlock the configuration, perform a system reset.
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
/* Set COMP_CSR register to reset value */
|
||||
WRITE_REG(hcomp->Instance->CSR, COMP_CSR_RESET_VALUE);
|
||||
|
||||
/* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
|
||||
HAL_COMP_MspDeInit(hcomp);
|
||||
|
||||
hcomp->State = HAL_COMP_STATE_RESET;
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hcomp);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the COMP MSP.
|
||||
* @param hcomp: COMP handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* NOTE : This function Should not be modified, when the callback is needed,
|
||||
the HAL_COMP_MspInit could be implenetd in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes COMP MSP.
|
||||
* @param hcomp: COMP handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* NOTE : This function Should not be modified, when the callback is needed,
|
||||
the HAL_COMP_MspDeInit could be implenetd in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_COMP_Group2 I/O operation functions
|
||||
* @brief Data transfers functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides a set of functions allowing to manage the COMP data
|
||||
transfers.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Start the comparator
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
if(hcomp->State == HAL_COMP_STATE_READY)
|
||||
{
|
||||
/* Enable the selected comparator */
|
||||
__HAL_COMP_ENABLE(hcomp);
|
||||
|
||||
hcomp->State = HAL_COMP_STATE_BUSY;
|
||||
}
|
||||
else
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stop the comparator
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
if(hcomp->State == HAL_COMP_STATE_BUSY)
|
||||
{
|
||||
/* Disable the selected comparator */
|
||||
__HAL_COMP_DISABLE(hcomp);
|
||||
|
||||
hcomp->State = HAL_COMP_STATE_READY;
|
||||
}
|
||||
else
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables the interrupt and starts the comparator
|
||||
* @param hcomp: COMP handle
|
||||
* @param mode: IT trigger mode: a value of @ref COMP_TriggerMode
|
||||
* @retval HAL status.
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t extiline = 0;
|
||||
|
||||
status = HAL_COMP_Start(hcomp);
|
||||
if(status == HAL_OK)
|
||||
{
|
||||
/* Check the Exti Line output configuration */
|
||||
extiline = __HAL_COMP_GET_EXTI_LINE(hcomp->Instance);
|
||||
|
||||
/* Configure the rising edge */
|
||||
if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_RISING) != 0x00)
|
||||
{
|
||||
__HAL_COMP_EXTI_RISING_IT_ENABLE(extiline);
|
||||
}
|
||||
else
|
||||
{
|
||||
__HAL_COMP_EXTI_RISING_IT_DISABLE(extiline);
|
||||
}
|
||||
|
||||
/* Configure the falling edge */
|
||||
if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_FALLING) != 0x00)
|
||||
{
|
||||
__HAL_COMP_EXTI_FALLING_IT_ENABLE(extiline);
|
||||
}
|
||||
else
|
||||
{
|
||||
__HAL_COMP_EXTI_FALLING_IT_DISABLE(extiline);
|
||||
}
|
||||
|
||||
/* Enable Exti interrupt mode */
|
||||
__HAL_COMP_EXTI_ENABLE_IT(extiline);
|
||||
|
||||
/* Clear COMP Exti pending bit */
|
||||
__HAL_COMP_EXTI_CLEAR_FLAG(extiline);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable the interrupt and Stop the comparator
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Disable the Exti Line interrupt mode */
|
||||
__HAL_COMP_EXTI_DISABLE_IT(__HAL_COMP_GET_EXTI_LINE(hcomp->Instance));
|
||||
|
||||
status = HAL_COMP_Stop(hcomp);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Comparator IRQ Handler
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
uint32_t extiline = __HAL_COMP_GET_EXTI_LINE(hcomp->Instance);
|
||||
|
||||
/* Check COMP Exti flag */
|
||||
if(__HAL_COMP_EXTI_GET_FLAG(extiline) != RESET)
|
||||
{
|
||||
/* Clear COMP Exti pending bit */
|
||||
__HAL_COMP_EXTI_CLEAR_FLAG(extiline);
|
||||
}
|
||||
|
||||
/* COMP trigger user callback */
|
||||
HAL_COMP_TriggerCallback(hcomp);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_COMP_Group3 Peripheral Control functions
|
||||
* @brief management functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Peripheral Control functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides a set of functions allowing to control the COMP data
|
||||
transfers.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Lock the selected comparator configuration.
|
||||
* @param hcomp: COMP handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the COMP handle allocation and lock status */
|
||||
if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00))
|
||||
{
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
/* Set lock flag */
|
||||
hcomp->State |= COMP_STATE_BIT_LOCK;
|
||||
|
||||
/* Set the lock bit corresponding to selected comparator */
|
||||
__HAL_COMP_LOCK(hcomp);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the output level (high or low) of the selected comparator.
|
||||
* The output level depends on the selected polarity.
|
||||
* If the polarity is not inverted:
|
||||
* - Comparator output is low when the non-inverting input is at a lower
|
||||
* voltage than the inverting input
|
||||
* - Comparator output is high when the non-inverting input is at a higher
|
||||
* voltage than the inverting input
|
||||
* If the polarity is inverted:
|
||||
* - Comparator output is high when the non-inverting input is at a lower
|
||||
* voltage than the inverting input
|
||||
* - Comparator output is low when the non-inverting input is at a higher
|
||||
* voltage than the inverting input
|
||||
* @param hcomp: COMP handle
|
||||
* @retval Returns the selected comparator output level: COMP_OUTPUTLEVEL_LOW or COMP_OUTPUTLEVEL_HIGH.
|
||||
*
|
||||
*/
|
||||
uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
return((uint32_t)(hcomp->Instance->CSR & COMP_OUTPUTLEVEL_HIGH));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Comparator callback.
|
||||
* @param hcomp: COMP handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* NOTE : This function should not be modified, when the callback is needed,
|
||||
the HAL_COMP_TriggerCallback should be implemented in the user file
|
||||
*/
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_COMP_Group4 Peripheral State functions
|
||||
* @brief Peripheral State functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Peripheral State functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection permit to get in run-time the status of the peripheral
|
||||
and the data flow.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Return the COMP state
|
||||
* @param hcomp : COMP handle
|
||||
* @retval HAL state
|
||||
*/
|
||||
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* Check the COMP handle allocation */
|
||||
if(hcomp == NULL)
|
||||
{
|
||||
return HAL_COMP_STATE_RESET;
|
||||
}
|
||||
|
||||
/* Check the parameter */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
return hcomp->State;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,411 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_comp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Header file of COMP HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_HAL_COMP_H
|
||||
#define __STM32L0xx_HAL_COMP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup COMP
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief COMP Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint32_t InvertingInput; /*!< Selects the inverting input of the comparator.
|
||||
This parameter can be a value of @ref COMP_InvertingInput */
|
||||
|
||||
uint32_t NonInvertingInput; /*!< Selects the non inverting input of the comparator.
|
||||
This parameter can be a value of @ref COMP_NonInvertingInput */
|
||||
|
||||
uint32_t OutputPol; /*!< Selects the output polarity of the comparator.
|
||||
This parameter can be a value of @ref COMP_OutputPolarity */
|
||||
|
||||
uint32_t Mode; /*!< Selects the operating comsumption mode of the comparator
|
||||
to adjust the speed/consumption.
|
||||
This parameter can be a value of @ref COMP_Mode */
|
||||
|
||||
uint32_t WindowMode; /*!< Selects the window mode of the comparator 2.
|
||||
This parameter can be a value of @ref COMP_WindowMode */
|
||||
|
||||
uint32_t TriggerMode; /*!< Selects the trigger mode of the comparator (interrupt mode).
|
||||
This parameter can be a value of @ref COMP_TriggerMode */
|
||||
|
||||
}COMP_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_COMP_STATE_RESET = 0x00, /*!< COMP not yet initialized or disabled */
|
||||
HAL_COMP_STATE_READY = 0x01, /*!< COMP initialized and ready for use */
|
||||
HAL_COMP_STATE_READY_LOCKED = 0x11, /*!< COMP initialized but the configuration is locked */
|
||||
HAL_COMP_STATE_BUSY = 0x02, /*!< COMP is running */
|
||||
HAL_COMP_STATE_BUSY_LOCKED = 0x12 /*!< COMP is running and the configuration is locked */
|
||||
}HAL_COMP_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief PPP Handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
COMP_TypeDef *Instance; /*!< Register base address */
|
||||
COMP_InitTypeDef Init; /*!< COMP required parameters */
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
__IO HAL_COMP_StateTypeDef State; /*!< COMP communication state */
|
||||
} COMP_HandleTypeDef;
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup COMP_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup COMP_OutputPolarity
|
||||
* @{
|
||||
*/
|
||||
#define COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000) /*!< COMP output on GPIO isn't inverted */
|
||||
#define COMP_OUTPUTPOL_INVERTED COMP_CSR_COMPxPOLARITY /*!< COMP output on GPIO is inverted */
|
||||
#define IS_COMP_OUTPUTPOL(POL) (((POL) == COMP_OUTPUTPOL_NONINVERTED) || \
|
||||
((POL) == COMP_OUTPUTPOL_INVERTED))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup COMP_InvertingInput
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Inverting Input specific to COMP1 */
|
||||
#define COMP_INVERTINGINPUT_VREFINT ((uint32_t)0x00000000) /*!< VREFINT connected to comparator1 inverting input */
|
||||
#define COMP_INVERTINGINPUT_IO1 ((uint32_t)0x00000010) /*!< I/O1 connected to comparator inverting input (PA0) for COMP1 and (PA2) for COMP2*/
|
||||
#define COMP_INVERTINGINPUT_DAC1 ((uint32_t)0x00000020) /*!< DAC1_OUT (PA4) connected to comparator inverting input */
|
||||
#define COMP_INVERTINGINPUT_IO2 ((uint32_t)0x00000030) /*!< I/O2 (PA5) connected to comparator inverting input */
|
||||
|
||||
/* Inverting Input specific to COMP2 */
|
||||
#define COMP_INVERTINGINPUT_1_4VREFINT ((uint32_t)0x00000040) /*!< 1/4 VREFINT connected to comparator inverting input */
|
||||
#define COMP_INVERTINGINPUT_1_2VREFINT ((uint32_t)0x00000050) /*!< 1/2 VREFINT connected to comparator inverting input */
|
||||
#define COMP_INVERTINGINPUT_3_4VREFINT ((uint32_t)0x00000060) /*!< 3/4 VREFINT connected to comparator inverting input */
|
||||
#define COMP_INVERTINGINPUT_IO3 ((uint32_t)0x00000070) /*!< I/O3 (PB3) for COMP2 connected to comparator inverting input */
|
||||
|
||||
|
||||
#define IS_COMP_INVERTINGINPUT(INPUT) (((INPUT) == COMP_INVERTINGINPUT_VREFINT) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_IO1) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_DAC1) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_IO2) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_1_4VREFINT) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_1_2VREFINT) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_3_4VREFINT) || \
|
||||
((INPUT) == COMP_INVERTINGINPUT_IO3))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup COMP_NonInvertingInput
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< I/O1 (PA3) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO2 ((uint32_t)0x00000100) /*!< I/O2 (PB4) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO3 ((uint32_t)0x00000200) /*!< I/O3 (PB5) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO4 ((uint32_t)0x00000300) /*!< I/O1 (PB6) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO5 ((uint32_t)0x00000400) /*!< I/O3 (PB7) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO6 ((uint32_t)0x00000500) /*!< I/O3 (PB7) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO7 ((uint32_t)0x00000600) /*!< I/O3 (PB7) connected to comparator non inverting input */
|
||||
#define COMP_NONINVERTINGINPUT_IO8 ((uint32_t)0x00000700) /*!< I/O3 (PB7) connected to comparator non inverting input */
|
||||
|
||||
#define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_IO1) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO2) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO3) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO4) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO5) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO6) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO7) || \
|
||||
((INPUT) == COMP_NONINVERTINGINPUT_IO8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup COMP_Mode
|
||||
* @{
|
||||
*/
|
||||
/* Please refer to the electrical characteristics in the device datasheet for
|
||||
the power consumption values */
|
||||
#define COMP_MODE_HIGHSPEED COMP_CSR_COMP2SPEED /*!< High Speed */
|
||||
#define COMP_MODE_LOWSPEED ((uint32_t)0x00000000) /*!< Low Speed */
|
||||
|
||||
#define IS_COMP_MODE(SPEED) (((SPEED) == COMP_MODE_HIGHSPEED) || \
|
||||
((SPEED) == COMP_MODE_LOWSPEED))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup COMP_WindowMode
|
||||
* @{
|
||||
*/
|
||||
#define COMP_WINDOWMODE_DISABLED ((uint32_t)0x00000000) /*!< Window mode disabled (Plus input of comparator 1 connected to PA1)*/
|
||||
#define COMP_WINDOWMODE_ENABLED COMP_CSR_COMP1WM /*!< Window mode enabled: Plus input of comparator 1 shorted with Plus input of comparator 2 */
|
||||
#define IS_COMP_WINDOWMODE(WINDOWMODE) (((WINDOWMODE) == COMP_WINDOWMODE_DISABLED) || \
|
||||
((WINDOWMODE) == COMP_WINDOWMODE_ENABLED))
|
||||
|
||||
#define IS_COMP_WINDOWMODE_INSTANCE(INSTANCE) ((INSTANCE) == COMP1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup COMP_OutputLevel
|
||||
* @{
|
||||
*/
|
||||
/* When output polarity is not inverted, comparator output is low when
|
||||
the non-inverting input is at a lower voltage than the inverting input*/
|
||||
#define COMP_OUTPUTLEVEL_LOW ((uint32_t)0x00000000)
|
||||
/* When output polarity is not inverted, comparator output is high when
|
||||
the non-inverting input is at a higher voltage than the inverting input */
|
||||
#define COMP_OUTPUTLEVEL_HIGH COMP_CSR_COMPxOUTVALUE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* CSR register Mask */
|
||||
#define COMP_CSR_UPDATE_PARAMETERS_MASK ((uint32_t)0xC0008779)
|
||||
|
||||
#define COMP_LOCK_DISABLE ((uint32_t)0x00000000)
|
||||
#define COMP_LOCK_ENABLE COMP_CSR_COMPxLOCK
|
||||
|
||||
#define COMP_STATE_BIT_LOCK ((uint32_t)0x10)
|
||||
|
||||
/** @defgroup COMP_TriggerMode
|
||||
* @{
|
||||
*/
|
||||
#define COMP_TRIGGERMODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */
|
||||
#define COMP_TRIGGERMODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */
|
||||
#define COMP_TRIGGERMODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
|
||||
#define IS_COMP_TRIGGERMODE(MODE) (((MODE) == COMP_TRIGGERMODE_IT_RISING) || \
|
||||
((MODE) == COMP_TRIGGERMODE_IT_FALLING) || \
|
||||
((MODE) == COMP_TRIGGERMODE_IT_RISING_FALLING))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup COMP_ExtiLineEvent
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define COMP_EXTI_LINE_COMP2_EVENT ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to COMP2 */
|
||||
#define COMP_EXTI_LINE_COMP1_EVENT ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to COMP1 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @brief Reset COMP handle state
|
||||
* @param __HANDLE__: COMP handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
|
||||
|
||||
/**
|
||||
* @brief Enables the specified comparator
|
||||
* @param __HANDLE__: COMP handle.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CSR |= (COMP_CSR_COMPxEN))
|
||||
|
||||
/**
|
||||
* @brief Disables the specified comparator
|
||||
* @param __HANDLE__: COMP handle.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CSR &= ~(COMP_CSR_COMPxEN))
|
||||
|
||||
/**
|
||||
* @brief Lock the specified comparator configuration
|
||||
* @param __HANDLE__: COMP handle.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_LOCK(__HANDLE__) ((__HANDLE__)->Instance->CSR |= COMP_CSR_COMPxLOCK)
|
||||
|
||||
/** @brief Checks whether the specified COMP flag is set or not.
|
||||
* @param __HANDLE__: specifies the COMP Handle.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg COMP_FLAG_LOCK: lock flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->CSR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enable the Exti Line rising edge trigger.
|
||||
* @param __EXTILINE__: specifies the COMP Exti sources to be enabled.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (EXTI->RTSR |= (__EXTILINE__))
|
||||
|
||||
/**
|
||||
* @brief Disable the Exti Line rising edge trigger.
|
||||
* @param __EXTILINE__: specifies the COMP Exti sources to be disabled.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (EXTI->RTSR &= ~(__EXTILINE__))
|
||||
|
||||
/**
|
||||
* @brief Enable the Exti Line falling edge trigger.
|
||||
* @param __EXTILINE__: specifies the COMP Exti sources to be enabled.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (EXTI->FTSR |= (__EXTILINE__))
|
||||
|
||||
/**
|
||||
* @brief Disable the Exti Line falling edge trigger.
|
||||
* @param __EXTILINE__: specifies the COMP Exti sources to be disabled.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (EXTI->FTSR &= ~(__EXTILINE__))
|
||||
|
||||
/**
|
||||
* @brief Get the specified EXTI line for a comparator instance
|
||||
* @param __INSTANCE__: specifies the COMP instance.
|
||||
* @retval value of @ref COMP_ExtiLineEvent
|
||||
*/
|
||||
#define __HAL_COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1_EVENT : \
|
||||
COMP_EXTI_LINE_COMP2_EVENT)
|
||||
|
||||
/**
|
||||
* @brief Enable the COMP Exti Line.
|
||||
* @param __EXTILINE__: specifies the COMP Exti sources to be enabled.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (EXTI->IMR |= (__EXTILINE__))
|
||||
|
||||
/**
|
||||
* @brief Disable the COMP Exti Line.
|
||||
* @param __EXTILINE__: specifies the COMP Exti sources to be disabled.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (EXTI->IMR &= ~(__EXTILINE__))
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified EXTI line flag is set or not.
|
||||
* @param __FLAG__: specifies the COMP Exti sources to be checked.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval The state of __FLAG__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (EXTI->PR & (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Clear the COMP Exti flags.
|
||||
* @param __FLAG__: specifies the COMP Exti sources to be cleared.
|
||||
* This parameter can be a value of @ref COMP_ExtiLineEvent
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (EXTI->PR |= (__FLAG__))
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
|
||||
HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
|
||||
void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
|
||||
void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
|
||||
|
||||
/* I/O operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp);
|
||||
HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp);
|
||||
HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp);
|
||||
HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp);
|
||||
void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp);
|
||||
|
||||
/* Peripheral Control functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp);
|
||||
uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
|
||||
|
||||
/* Callback in Interrupt mode */
|
||||
void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
|
||||
|
||||
/* Peripheral State functions **************************************************/
|
||||
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_HAL_COMP_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,212 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_flash_ramfunc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief FLASH RAMFUNC driver.
|
||||
* This file provides a Flash firmware functions which should be
|
||||
* executed from internal SRAM
|
||||
* + FLASH HalfPage Programming
|
||||
* + FLASH Power Down in Run mode
|
||||
*
|
||||
* @verbatim
|
||||
|
||||
*** ARM Compiler ***
|
||||
--------------------
|
||||
[..] RAM functions are defined using the toolchain options.
|
||||
Functions that are be executed in RAM should reside in a separate
|
||||
source module. Using the 'Options for File' dialog you can simply change
|
||||
the 'Code / Const' area of a module to a memory space in physical RAM.
|
||||
Available memory areas are declared in the 'Target' tab of the
|
||||
Options for Target' dialog.
|
||||
|
||||
*** ICCARM Compiler ***
|
||||
-----------------------
|
||||
[..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
|
||||
|
||||
*** GNU Compiler ***
|
||||
--------------------
|
||||
[..] RAM functions are defined using a specific toolchain attribute
|
||||
"__attribute__((section(".RamFunc")))".
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal.h"
|
||||
/** @addtogroup STM32L0XX_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_RAMFUNC Driver
|
||||
* @brief FLASH functions executed from RAM
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
static __RAM_FUNC FLASH_Program_HalfPage(uint32_t Address, uint32_t *Data);
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @defgroup FLASH_RAMFUNC_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions
|
||||
* @brief Data transfers functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### ramfunc functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides a set of functions that should be executed from RAM
|
||||
transfers.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Program a half page word at a specified address,
|
||||
* @note This function should be executed from RAM
|
||||
* @param Address: specifies the address to be programmed,
|
||||
* the address should be half page aligned.
|
||||
* @param *Data: specifies the buffer of data to be programmed,
|
||||
* the size of the buffer is 16 words.
|
||||
*
|
||||
* @retval HAL_StatusTypeDef HAL Status
|
||||
*/
|
||||
__RAM_FUNC FLASH_HalfPageProgram(uint32_t Address, uint32_t *Data)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t timeout = 0xFFFFFFFF;
|
||||
/*Program word (32-bit) at a specified address.*/
|
||||
FLASH_Program_HalfPage(Address, Data);
|
||||
|
||||
/* Wait for a FLASH operation to complete or a TIMEOUT to occur */
|
||||
while(((FLASH->SR & FLASH_FLAG_BSY) != 0x00) && (timeout != 0x00))
|
||||
{
|
||||
timeout--;
|
||||
}
|
||||
|
||||
/* Reset PROG bit */
|
||||
FLASH->PECR &= ~FLASH_PECR_PROG;
|
||||
FLASH->PECR &= ~FLASH_PECR_FPRG;
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Program a half page in program memory.
|
||||
* @param Address: The Half page address in program memory to be written.
|
||||
* @param Data:
|
||||
* @retval None
|
||||
*/
|
||||
static __RAM_FUNC FLASH_Program_HalfPage(uint32_t Address, uint32_t *Data)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t i =0;
|
||||
|
||||
/* Set PROG bit */
|
||||
FLASH->PECR |= FLASH_PECR_PROG;
|
||||
|
||||
/* Set FPRG bit */
|
||||
FLASH->PECR |= FLASH_PECR_FPRG;
|
||||
|
||||
*(__IO uint32_t*)Address = Data[0];
|
||||
|
||||
for(i = 1; i <= 15; i++)
|
||||
{
|
||||
*(__IO uint32_t*)(Address + 4) = Data[i];
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the Power down in Run Mode
|
||||
* @note This fuction should be called and executed from SRAM memory
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__RAM_FUNC FLASH_EnableRunPowerDown(void)
|
||||
{
|
||||
/* Enable the Power Down in Run mode*/
|
||||
__HAL_FLASH_POWER_DOWN_ENABLE();
|
||||
|
||||
return HAL_OK;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable the Power down in Run Mode
|
||||
* @note This fuction should be called and executed from SRAM memory
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
__RAM_FUNC FLASH_DisableRunPowerDown(void)
|
||||
{
|
||||
/* Disable the Power Down in Run mode*/
|
||||
__HAL_FLASH_POWER_DOWN_DISABLE();
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l0xx_hal_flash_ramfunc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 22-April-2014
|
||||
* @brief Header file of FLASH RAMFUNC driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L0xx_FLASH_RAMFUNC_H
|
||||
#define __STM32L0xx_FLASH_RAMFUNC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l0xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH_RAMFUNC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/* I/O operation functions *****************************************************/
|
||||
/* Peripheral Control functions ************************************************/
|
||||
|
||||
|
||||
__RAM_FUNC FLASH_HalfPageProgram(uint32_t Address, uint32_t *Data);
|
||||
__RAM_FUNC FLASH_EnableRunPowerDown(void);
|
||||
__RAM_FUNC FLASH_DisableRunPowerDown(void);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L0xx_FLASH_RAMFUNC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Loading…
Reference in New Issue