diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_B96B_F446VE/device/system_stm32f4xx.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_B96B_F446VE/device/system_stm32f4xx.h index bb88f0d38f..f225ddbbb7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_B96B_F446VE/device/system_stm32f4xx.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_B96B_F446VE/device/system_stm32f4xx.h @@ -100,6 +100,7 @@ extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Cloc * @{ */ +extern void SystemInitPre(void); extern void SystemInit(void); extern void SystemCoreClockUpdate(void); extern void SetSysClock(void); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/STM32F429ZI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/STM32F429ZI.ld index 1ae1add65c..225a017bb4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/STM32F429ZI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/STM32F429ZI.ld @@ -1,16 +1,23 @@ -/* Linker script to configure memory regions. */ +M_VECTOR_RAM_SIZE = 0x400; + +/* Heap: 1/4 of RAM. Stack: 1/8 of RAM. */ +STACK_SIZE = 0x6000; +HEAP_SIZE = 0xC000; + +/* Specify the memory areas */ MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k - CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K - RAM (rwx) : ORIGIN = 0x200001AC, LENGTH = 192k - 0x1AC +{ + VECTORS (rx) : ORIGIN = 0x08000000, LENGTH = 0x400 + FLASH (rx) : ORIGIN = 0x08000400, LENGTH = 2048k - 0x400 + CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192k } /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler - * + * * It defines following symbols, which code can use without definition: * __exidx_start * __exidx_end @@ -37,10 +44,28 @@ ENTRY(Reset_Handler) SECTIONS { - .text : + .isr_vector : { + __vector_table = .; KEEP(*(.isr_vector)) + . = ALIGN(4); + } > VECTORS + + /* Note: The uVisor expects this section at a fixed location, as specified + * by the porting process configuration parameter: + * FLASH_OFFSET. */ + __UVISOR_FLASH_OFFSET = 0x400; + __UVISOR_FLASH_START = ORIGIN(VECTORS) + __UVISOR_FLASH_OFFSET; + .text __UVISOR_FLASH_START : + { + /* uVisor code and data */ + . = ALIGN(4); + __uvisor_main_start = .; + *(.uvisor.main) + __uvisor_main_end = .; + *(.text*) + KEEP(*(.init)) KEEP(*(.fini)) @@ -69,6 +94,7 @@ SECTIONS } > FLASH __exidx_start = .; + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) @@ -78,8 +104,62 @@ SECTIONS __etext = .; _sidata = .; - .data : AT (__etext) + .interrupts_ram : { + . = ALIGN(4); + __VECTOR_RAM__ = .; + __interrupts_ram_start__ = .; /* Create a global symbol at data start */ + *(.m_interrupts_ram) /* This is a user defined section */ + . += M_VECTOR_RAM_SIZE; + . = ALIGN(4); + __interrupts_ram_end__ = .; /* Define a global symbol at data end */ + } > RAM + + /* uVisor own memory and private box memories + /* Note: The uVisor expects this section at a fixed location, as specified + by the porting process configuration parameter: SRAM_OFFSET. */ + __UVISOR_SRAM_OFFSET = 0x0; + __UVISOR_SRAM_START = ORIGIN(CCM) + __UVISOR_SRAM_OFFSET; + .uvisor.bss __UVISOR_SRAM_START (NOLOAD): + { + . = ALIGN(32); + __uvisor_bss_start = .; + + /* Protected uVisor own BSS section */ + . = ALIGN(32); + __uvisor_bss_main_start = .; + KEEP(*(.keep.uvisor.bss.main)) + . = ALIGN(32); + __uvisor_bss_main_end = .; + + /* Protected uVisor boxes' static memories */ + . = ALIGN(32); + __uvisor_bss_boxes_start = .; + KEEP(*(.keep.uvisor.bss.boxes)) + . = ALIGN(32); + __uvisor_bss_boxes_end = .; + + . = ALIGN(32); + __uvisor_bss_end = .; + } > CCM + + /* Heap space for the page allocator + /* If uVisor shares the SRAM with the OS/app, ensure that this section is + * the first one after the uVisor BSS section. Otherwise, ensure it is the + * first one after the VTOR relocation section. */ + .page_heap (NOLOAD) : + { + . = ALIGN(32); + __uvisor_page_start = .; + KEEP(*(.keep.uvisor.page_heap)) + . = ALIGN((1 << LOG2CEIL(LENGTH(RAM))) / 8); + __uvisor_page_end = .; + } > RAM + + .data : + { + PROVIDE( __etext = LOADADDR(.data) ); + __data_start__ = .; _sdata = .; *(vtable) @@ -112,9 +192,54 @@ SECTIONS __data_end__ = .; _edata = .; + } > RAM AT > FLASH + + /* uVisor configuration section + * This section must be located after all other flash regions. */ + .uvisor.secure : + { + . = ALIGN(32); + __uvisor_secure_start = .; + + /* uVisor secure boxes configuration tables */ + . = ALIGN(32); + __uvisor_cfgtbl_start = .; + KEEP(*(.keep.uvisor.cfgtbl)) + . = ALIGN(32); + __uvisor_cfgtbl_end = .; + + /* Pointers to the uVisor secure boxes configuration tables */ + /* Note: Do not add any further alignment here, as uVisor will need to + * have access to the exact list of pointers. */ + __uvisor_cfgtbl_ptr_start = .; + KEEP(*(.keep.uvisor.cfgtbl_ptr_first)) + KEEP(*(.keep.uvisor.cfgtbl_ptr)) + __uvisor_cfgtbl_ptr_end = .; + + /* Pointers to all boxes register gateways. These are grouped here to + allow discoverability and firmware verification. */ + __uvisor_register_gateway_ptr_start = .; + KEEP(*(.keep.uvisor.register_gateway_ptr)) + __uvisor_register_gateway_ptr_end = .; + + . = ALIGN(32); + __uvisor_secure_end = .; + } > FLASH + + /* Uninitialized data section + * This region is not initialized by the C/C++ library and can be used to + * store state across soft reboots. */ + .uninitialized (NOLOAD): + { + . = ALIGN(32); + __uninitialized_start = .; + *(.uninitialized) + KEEP(*(.keep.uninitialized)) + . = ALIGN(32); + __uninitialized_end = .; } > RAM - .bss : + .bss (NOLOAD): { . = ALIGN(4); __bss_start__ = .; @@ -126,29 +251,27 @@ SECTIONS _ebss = .; } > RAM - .heap (COPY): + .heap (NOLOAD): { + __uvisor_heap_start = .; __end__ = .; end = __end__; - *(.heap*) + . += HEAP_SIZE; __HeapLimit = .; + __uvisor_heap_end = .; } > RAM - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - SIZEOF(.stack_dummy); - PROVIDE(__stack = __StackTop); + __stack = __StackTop; + __StackLimit = __StackTop - STACK_SIZE; - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + ASSERT(__StackLimit >= __HeapLimit, "Region RAM overflowed with stack and heap") + + /* Provide physical memory boundaries for uVisor. */ + __uvisor_flash_start = ORIGIN(VECTORS); + __uvisor_flash_end = ORIGIN(FLASH) + LENGTH(FLASH); + __uvisor_sram_start = ORIGIN(CCM); + __uvisor_sram_end = ORIGIN(CCM) + LENGTH(CCM); + __uvisor_public_sram_start = ORIGIN(RAM); + __uvisor_public_sram_end = ORIGIN(RAM) + LENGTH(RAM); } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S index e5d498532d..c9d39d8315 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S @@ -72,10 +72,10 @@ defined in linker script */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ +Reset_Handler: + ldr sp, =__stack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit @@ -93,6 +93,12 @@ LoopCopyDataInit: bcc CopyDataInit /* Call the clock system intitialization function.*/ + bl SystemInitPre + bl HAL_InitPre +#if defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED) + ldr r0, =uvisor_init + blx r0 +#endif /* defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED) */ bl SystemInit /* Call static constructors */ //bl __libc_init_array @@ -130,7 +136,7 @@ Infinite_Loop: .size g_pfnVectors, .-g_pfnVectors g_pfnVectors: - .word _estack + .word __stack .word Reset_Handler .word NMI_Handler diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.c index 2da63fc9af..4a35e6e7f9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.c @@ -33,7 +33,7 @@ #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash -void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { +void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { uint32_t *vectors = (uint32_t *)SCB->VTOR; uint32_t i; @@ -49,7 +49,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector; } -uint32_t NVIC_GetVector(IRQn_Type IRQn) { +uint32_t __NVIC_GetVector(IRQn_Type IRQn) { uint32_t *vectors = (uint32_t*)SCB->VTOR; return vectors[IRQn + NVIC_USER_IRQ_OFFSET]; } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.h index f8403dae25..7b9f0dd916 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/cmsis_nvic.h @@ -45,8 +45,8 @@ extern "C" { #endif -void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); -uint32_t NVIC_GetVector(IRQn_Type IRQn); +void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); +uint32_t __NVIC_GetVector(IRQn_Type IRQn); #ifdef __cplusplus } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_init_pre.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_init_pre.c new file mode 100644 index 0000000000..bedfab07ad --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_init_pre.c @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2015-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "stm32f4xx.h" + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* note: if uVisor is present the definition must go in system_init_pre.c */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + +/* this function is needed to peform hardware initialization that must happen + * before the uVisor; the whole SystemInit function for the STM32F4 cannot be + * put here as it depends on some APIs that need uVisor to be enabled */ +void SystemInitPre(void) +{ + /* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ +#endif + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_stm32f4xx.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_stm32f4xx.c index 09b87318d4..82b3265504 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_stm32f4xx.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/device/system_stm32f4xx.c @@ -187,10 +187,6 @@ void SetSysClock(void); */ void SystemInit(void) { - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; @@ -214,13 +210,6 @@ void SystemInit(void) SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif - /* Configure the Cube driver */ SystemCoreClock = 16000000; // At this stage the HSI is used as system clock HAL_Init(); diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/hal_init_pre.c b/targets/TARGET_STM/TARGET_STM32F4/device/hal_init_pre.c new file mode 100644 index 0000000000..37deb42b6c --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/device/hal_init_pre.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2015-2015, ARM Limited, All Rights Reserved + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "stm32f4xx_hal.h" + +/* this function is needed to peform hardware initialization that must happen + * before the uVisor; the whole SystemInit function for the STM32F4 cannot be + * put here as it depends on some APIs that need uVisor to be enabled */ +HAL_StatusTypeDef HAL_InitPre(void) +{ + /* Set Interrupt Group Priority */ + HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + + /* Return function status */ + return HAL_OK; +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c index 98fde7ec8a..ec9d83d889 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c @@ -179,9 +179,6 @@ HAL_StatusTypeDef HAL_Init(void) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h index 7c3c84bf8d..88d236b92d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h @@ -190,6 +190,7 @@ * @{ */ /* Initialization and de-initialization functions ******************************/ +HAL_StatusTypeDef HAL_InitPre(void); HAL_StatusTypeDef HAL_Init(void); HAL_StatusTypeDef HAL_DeInit(void); void HAL_MspInit(void);