mirror of https://github.com/ARMmbed/mbed-os.git
parent
43a304351a
commit
39ee51a017
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@ -349,8 +349,8 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
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uint8_t do_ping)
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uint8_t do_ping)
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{
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{
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// Added for MBED PR #3432
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// Added for MBED PR #3432
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if ((hhcd->hc[ch_num].ep_is_in != direction)) {
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if (hhcd->hc[ch_num].ep_is_in != direction) {
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if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
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if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
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/* reconfigure the endpoint !!! from tx -> rx, and rx ->tx */
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/* reconfigure the endpoint !!! from tx -> rx, and rx ->tx */
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USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
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USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
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if (direction)
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if (direction)
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@ -343,7 +343,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
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USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
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USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
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uint32_t index = 0U, ep_intr = 0U, epint = 0U, epnum = 0U;
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uint32_t index = 0U, ep_intr = 0U, epint = 0U, epnum = 0U;
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uint32_t fifoemptymsk = 0U, temp = 0U;
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uint32_t fifoemptymsk = 0U, temp = 0U;
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USB_OTG_EPTypeDef *ep = NULL;
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// USB_OTG_EPTypeDef *ep = NULL;
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uint32_t hclk = 80000000;
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uint32_t hclk = 80000000;
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/* ensure that we are in device mode */
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/* ensure that we are in device mode */
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@ -387,11 +387,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
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assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if((pData == 0 ) && (Length > 0))
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if((pData == 0 ) && (Length > 0))
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{
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{
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@ -795,11 +795,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
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assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if(((uint32_t)pData == 0 ) && (Length > 0))
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if(((uint32_t)pData == 0 ) && (Length > 0))
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{
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{
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@ -1315,11 +1315,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
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assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if(((uint32_t)pData == 0 ) && (Length > 0))
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if(((uint32_t)pData == 0 ) && (Length > 0))
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{
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{
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@ -1802,11 +1802,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
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assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
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assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
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assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
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assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if((pData == 0 ) && (Length > 0))
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if((pData == 0 ) && (Length > 0))
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{
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{
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@ -2643,11 +2643,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
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assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
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if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
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{
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{
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@ -3473,11 +3473,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
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assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
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assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
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assert_param(IS_TIM_DMA_LENGTH(BurstLength));
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assert_param(IS_TIM_DMA_LENGTH(BurstLength));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if((BurstBuffer == 0 ) && (BurstLength > 0))
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if((BurstBuffer == 0 ) && (BurstLength > 0))
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{
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{
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@ -3696,11 +3696,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
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assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
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assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
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assert_param(IS_TIM_DMA_LENGTH(BurstLength));
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assert_param(IS_TIM_DMA_LENGTH(BurstLength));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if((BurstBuffer == 0 ) && (BurstLength > 0))
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if((BurstBuffer == 0 ) && (BurstLength > 0))
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{
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{
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@ -385,11 +385,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
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assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if(((uint32_t)pData == 0 ) && (Length > 0))
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if(((uint32_t)pData == 0 ) && (Length > 0))
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{
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{
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@ -685,11 +685,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
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assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if(((uint32_t)pData == 0 ) && (Length > 0))
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if(((uint32_t)pData == 0 ) && (Length > 0))
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{
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{
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@ -1096,11 +1096,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
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assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
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if((htim->State == HAL_TIM_STATE_BUSY))
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if(htim->State == HAL_TIM_STATE_BUSY)
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{
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{
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return HAL_BUSY;
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return HAL_BUSY;
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}
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}
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else if((htim->State == HAL_TIM_STATE_READY))
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else if(htim->State == HAL_TIM_STATE_READY)
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{
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{
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if(((uint32_t)pData == 0 ) && (Length > 0))
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if(((uint32_t)pData == 0 ) && (Length > 0))
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{
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{
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