From 39975b818d9ccce6e799e07cad6f2e49f5cb5de9 Mon Sep 17 00:00:00 2001
From: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Date: Tue, 23 Apr 2019 10:29:18 -0500
Subject: [PATCH] LPC55S69: Add support for UART hardware flow control

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
---
 .../TARGET_LPC/serial_api.c                   | 43 +++++++++++++++++++
 .../TARGET_LPCXpresso/PeripheralPins.c        |  6 +++
 targets/targets.json                          |  1 +
 3 files changed, 50 insertions(+)

diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/serial_api.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/serial_api.c
index ee91e722a8..04d347524a 100644
--- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/serial_api.c
+++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/serial_api.c
@@ -28,6 +28,7 @@
 #include "fsl_usart.h"
 #include "PeripheralPins.h"
 #include "clock_config.h"
+#include "gpio_api.h"
 
 static uint32_t serial_irq_ids[FSL_FEATURE_SOC_USART_COUNT] = {0};
 static uart_irq_handler irq_handler;
@@ -381,6 +382,48 @@ void serial_break_clear(serial_t *obj)
     uart_addrs[obj->index]->CTL &= ~USART_CTL_TXBRKEN_MASK;
 }
 
+#if DEVICE_SERIAL_FC
+/*
+ * Only hardware flow control is implemented in this API.
+ */
+void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
+{
+    gpio_t gpio;
+
+    switch(type) {
+        case FlowControlRTS:
+            pinmap_pinout(rxflow, PinMap_UART_RTS);
+            uart_addrs[obj->index]->CFG &= ~USART_CFG_CTSEN_MASK;
+            break;
+
+        case FlowControlCTS:
+            /* Do not use RTS, configure pin to GPIO input */
+            gpio_init(&gpio, rxflow);
+            gpio_dir(&gpio, PIN_INPUT);
+
+            pinmap_pinout(txflow, PinMap_UART_CTS);
+            uart_addrs[obj->index]->CFG |= USART_CFG_CTSEN_MASK;
+            break;
+
+        case FlowControlRTSCTS:
+            pinmap_pinout(rxflow, PinMap_UART_RTS);
+            pinmap_pinout(txflow, PinMap_UART_CTS);
+            uart_addrs[obj->index]->CFG |= USART_CFG_CTSEN_MASK;
+            break;
+
+        case FlowControlNone:
+            /* Do not use RTS, configure pin to GPIO input */
+            gpio_init(&gpio, rxflow);
+            gpio_dir(&gpio, PIN_INPUT);
+
+            uart_addrs[obj->index]->CFG &= ~USART_CFG_CTSEN_MASK;
+            break;
+
+        default:
+            break;
+    }
+}
+#endif
 const PinMap *serial_tx_pinmap()
 {
     return PinMap_UART_TX;
diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_LPCXpresso/PeripheralPins.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_LPCXpresso/PeripheralPins.c
index 4ed674bfa5..2ccdba694b 100644
--- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_LPCXpresso/PeripheralPins.c
+++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_LPCXpresso/PeripheralPins.c
@@ -65,21 +65,27 @@ const PinMap PinMap_I2C_SCL[] = {
 /************UART***************/
 const PinMap PinMap_UART_TX[] = {
     {P0_30, UART_0, 1},
+    {P1_6,  UART_0, 1},
     {P0_27, UART_1, 1},
     {NC   ,  NC   , 0}
 };
 
 const PinMap PinMap_UART_RX[] = {
     {P0_29, UART_0, 1},
+    {P1_5,  UART_0, 1},
     {P1_24, UART_1, 1},
     {NC   ,  NC   , 0}
 };
 
 const PinMap PinMap_UART_CTS[] = {
+    {P1_8,  UART_0, 1},
+    {P1_26, UART_1, 1},
     {NC   , NC    , 0}
 };
 
 const PinMap PinMap_UART_RTS[] = {
+    {P1_7,  UART_0, 1},
+    {P1_27, UART_1, 1},
     {NC   , NC    , 0}
 };
 
diff --git a/targets/targets.json b/targets/targets.json
index dc893be6f1..ab17d40df1 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -2088,6 +2088,7 @@
             "PORTINOUT",
             "PORTOUT",
             "SERIAL",
+            "SERIAL_FC",
             "SLEEP",
             "SPI",
             "SPISLAVE",