From ed0b72233e2379b3a96ab92c29d1996f87e84aba Mon Sep 17 00:00:00 2001 From: Neil Thiessen Date: Tue, 20 May 2014 11:03:49 -0600 Subject: [PATCH 1/5] Changed LED mapping to RGB Changed the pin mapping for LED1, LED2, and LED3, to Red, Green, and Blue respectively. This matches the KL25Z, and makes more sense in my opinion. --- .../mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/PinNames.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/PinNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/PinNames.h index 4d43a937ea..143c5775ea 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/PinNames.h +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/PinNames.h @@ -121,10 +121,10 @@ typedef enum { LED_BLUE = P2_18, // mbed original LED naming - LED1 = LED_BLUE, + LED1 = LED_RED, LED2 = LED_GREEN, - LED3 = LED_RED, - LED4 = LED_RED, + LED3 = LED_BLUE, + LED4 = LED_BLUE, // Serial to USB pins USBTX = P0_19, From 7a7376bff0eeb950836ef6afcea0503c8f212d0a Mon Sep 17 00:00:00 2001 From: bcostm Date: Wed, 21 May 2014 15:00:59 +0200 Subject: [PATCH 2/5] [NUCLEO_F072RB] Add platform in python files --- workspace_tools/build_release.py | 5 +++-- workspace_tools/export/uvision4.py | 2 ++ workspace_tools/export_test.py | 5 +++-- workspace_tools/targets.py | 17 +++++++++++++++++ 4 files changed, 25 insertions(+), 4 deletions(-) diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py index 45f02b66e5..fedaa46808 100644 --- a/workspace_tools/build_release.py +++ b/workspace_tools/build_release.py @@ -44,13 +44,14 @@ OFFICIAL_MBED_LIBRARY_BUILD = ( ('KL46Z', ('ARM', 'GCC_ARM')), ('K64F', ('ARM',)), - ('NUCLEO_F030R8', ('ARM', 'uARM')), + ('NUCLEO_F030R8', ('ARM', 'uARM')), + ('NUCLEO_F072RB', ('ARM', 'uARM')), ('NUCLEO_F103RB', ('ARM', 'uARM')), ('NUCLEO_F302R8', ('ARM', 'uARM')), ('NUCLEO_F401RE', ('ARM', 'uARM')), ('NUCLEO_L053R8', ('ARM', 'uARM')), ('NUCLEO_L152RE', ('ARM', 'uARM')), - + ('NRF51822', ('ARM', )), ('LPC11U68', ('uARM',)), diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py index 1a6a838ad7..beb75267ec 100644 --- a/workspace_tools/export/uvision4.py +++ b/workspace_tools/export/uvision4.py @@ -35,6 +35,7 @@ class Uvision4(Exporter): 'LPC4088', 'LPC812', 'NUCLEO_F030R8', + 'NUCLEO_F072RB', 'NUCLEO_F103RB', 'NUCLEO_F302R8', 'NUCLEO_F401RE', @@ -52,6 +53,7 @@ class Uvision4(Exporter): 'LPC11C24', 'LPC812', 'NUCLEO_F030R8', + 'NUCLEO_F072RB', 'NUCLEO_F103RB', 'NUCLEO_F302R8', 'NUCLEO_F401RE', diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py index 9acaf02e66..d99329b7dd 100644 --- a/workspace_tools/export_test.py +++ b/workspace_tools/export_test.py @@ -78,13 +78,14 @@ if __name__ == '__main__': for toolchain, target in [ ('uvision', 'LPC1768'), ('uvision', 'LPC11U24'), ('uvision', 'KL25Z'), ('uvision', 'LPC1347'), ('uvision', 'LPC1114'), ('uvision', 'LPC4088'), - ('uvision', 'NUCLEO_F030R8'), + ('uvision', 'NUCLEO_F030R8'), + ('uvision', 'NUCLEO_F072RB'), ('uvision', 'NUCLEO_F103RB'), ('uvision', 'NUCLEO_F302R8'), ('uvision', 'NUCLEO_F401RE'), ('uvision', 'NUCLEO_L053R8'), ('uvision', 'NUCLEO_L152RE'), - + ('lpcxpresso', 'LPC1768'), ('lpcxpresso', 'LPC4088'),('lpcxpresso', 'LPC1114'), ('lpcxpresso', 'LPC11U35_401'), ('lpcxpresso', 'LPC11U35_501'), diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index d389414836..95d11400fb 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -317,6 +317,22 @@ class NUCLEO_F030R8(Target): self.supported_form_factors = ["ARDUINO", "MORPHO"] +class NUCLEO_F072RB(Target): + ONLINE_TOOLCHAIN = "uARM" + OUTPUT_NAMING = "8.3" + + def __init__(self): + Target.__init__(self) + + self.core = "Cortex-M0" + + self.extra_labels = ['STM', 'STM32F0', 'STM32F072RB'] + + self.supported_toolchains = ["ARM", "uARM"] + + self.supported_form_factors = ["ARDUINO", "MORPHO"] + + class NUCLEO_F103RB(Target): ONLINE_TOOLCHAIN = "uARM" OUTPUT_NAMING = "8.3" @@ -631,6 +647,7 @@ TARGETS = [ STM32F3XX(), STM32F407(), NUCLEO_F030R8(), + NUCLEO_F072RB(), NUCLEO_F103RB(), NUCLEO_F302R8(), NUCLEO_F401RE(), From b728ea13246eab1f113652e4e91a2126e744e8ad Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Wed, 21 May 2014 15:08:55 +0100 Subject: [PATCH 3/5] [LPC11CXX] can_frequency - bug fix - link on the mbed issue report: https://mbed.org/users/mbed_official/code/mbed-src/issues/2 --- .../TARGET_LPC11CXX/can_api.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c index 509957e4c3..108bf6ef67 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c @@ -87,7 +87,7 @@ int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t LPC_CAN->IF1_CMDREQ = BFN_PREP(handle, CANIFn_CMDREQ_MN); // Wait until transfer to message ram complete - TODO: maybe not block?? - while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); + while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); } return handle; @@ -100,7 +100,7 @@ static inline void can_irq() { // Register CAN object's irq handler void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) { irq_handler = handler; - can_irq_id = id; + can_irq_id = id; } // Unregister CAN object's irq handler @@ -264,18 +264,20 @@ int can_frequency(can_t *obj, int f) { btr = btr & 0xFFFF; if (btr > 0) { + uint32_t cntl_init = LPC_CAN->CNTL | CANCNTL_INIT; // Set the bit clock - LPC_CAN->CNTL |= CANCNTL_CCE; + LPC_CAN->CNTL |= CANCNTL_CCE | CANCNTL_INIT; LPC_CAN->CLKDIV = clkdiv; LPC_CAN->BT = btr; LPC_CAN->BRPE = 0x0000; - LPC_CAN->CNTL &= ~CANCNTL_CCE; + LPC_CAN->CNTL &= ~(CANCNTL_CCE | CANCNTL_INIT); + LPC_CAN->CNTL |= cntl_init; return 1; } return 0; } -int can_write(can_t *obj, CAN_Message msg, int cc) { +int can_write(can_t *obj, CAN_Message msg, int cc) { uint16_t msgnum = 0; // Make sure controller is enabled @@ -352,13 +354,13 @@ int can_read(can_t *obj, CAN_Message *msg, int handle) { // Wait until transfer to message ram complete while( LPC_CAN->IF2_CMDREQ & CANIFn_CMDREQ_BUSY ); - if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_XTD) { - msg->format = CANExtended; + if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_XTD) { + msg->format = CANExtended; msg->id = (LPC_CAN->IF2_ARB1 & CANIFn_ARB2_ID_MASK) << 16; msg->id |= (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK); } else { - msg->format = CANStandard; + msg->format = CANStandard; msg->id = (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK) >> 2; } From f7720b2df413600ea20fa3f14c3fdbad117626f5 Mon Sep 17 00:00:00 2001 From: bcostm Date: Wed, 21 May 2014 16:13:06 +0200 Subject: [PATCH 4/5] [NUCLEO_F072RB] Add uvision exporter template files + correct compiler option on L053R8 --- .../export/uvision4_nucleo_f072rb.uvopt.tmpl | 218 +++++++++ .../export/uvision4_nucleo_f072rb.uvproj.tmpl | 438 ++++++++++++++++++ .../export/uvision4_nucleo_l053r8.uvproj.tmpl | 4 +- 3 files changed, 658 insertions(+), 2 deletions(-) create mode 100644 workspace_tools/export/uvision4_nucleo_f072rb.uvopt.tmpl create mode 100644 workspace_tools/export/uvision4_nucleo_f072rb.uvproj.tmpl diff --git a/workspace_tools/export/uvision4_nucleo_f072rb.uvopt.tmpl b/workspace_tools/export/uvision4_nucleo_f072rb.uvopt.tmpl new file mode 100644 index 0000000000..37e8f8834d --- /dev/null +++ b/workspace_tools/export/uvision4_nucleo_f072rb.uvopt.tmpl @@ -0,0 +1,218 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + mbed NUCLEO_F072RB + 0x4 + ARM-ADS + + 48000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 13 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U-O207 -O207 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F05x_128 -FS08000000 -FL020000 + + + 0 + UL2CM3 + -O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F0xx_128 -FS08000000 -FL020000) + + + 0 + ULP2CM3 + -O2510 -S0 -C0 -FO15 -FN1 -FC800 -FD20000000 -FF0MK_P128_48MHZ -FL020000 -FS00 + + + 0 + CMSIS_AGDI + -X"MBED CMSIS-DAP" -UA000000001 -O462 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BC11477) -L00(0) -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P128_48MHZ -FS00 -FL020000 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + src + 1 + 0 + 0 + 0 + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + main.cpp + main.cpp + 0 + 0 + + + + diff --git a/workspace_tools/export/uvision4_nucleo_f072rb.uvproj.tmpl b/workspace_tools/export/uvision4_nucleo_f072rb.uvproj.tmpl new file mode 100644 index 0000000000..6b7adb144f --- /dev/null +++ b/workspace_tools/export/uvision4_nucleo_f072rb.uvproj.tmpl @@ -0,0 +1,438 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + mbed NUCLEO_F072RB + 0x4 + ARM-ADS + + + STM32F072RB + STMicroelectronics + IRAM(0x20000000-0x20003FFF) IROM(0x08000000-0x0801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0") + + "Startup\ST\STM32F0xx\startup_stm32f072.s" ("STM32F072 Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F0xx_128 -FS08000000 -FL020000) + 7471 + stm32f0xx.h + + + + + + + + + + SFD\ST\STM32F0xx\STM32F072x.SFR + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\ + {{name}} + 1 + 0 + 0 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin -o build\{{name}}_NUCLEO_F072RB.bin build\{{name}}.axf + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 11 + + + + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x8000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + + {% for flag in flags %}{{flag}} {% endfor %} + {% for s in symbols %} {{s}}, {% endfor %} + + {% for path in include_paths %} {{path}}; {% endfor %} + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x10000000 + {{scatter_file}} + + + + {% for file in object_files %} + {{file}} + {% endfor %} + + + + + + + + {% for group,files in source_files %} + + {{group}} + + {% for file in files %} + + {{file.name}} + {{file.type}} + {{file.path}} + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + + + {% endfor %} + + + {% endfor %} + + + + + diff --git a/workspace_tools/export/uvision4_nucleo_l053r8.uvproj.tmpl b/workspace_tools/export/uvision4_nucleo_l053r8.uvproj.tmpl index a74929f120..b19b0feea8 100644 --- a/workspace_tools/export/uvision4_nucleo_l053r8.uvproj.tmpl +++ b/workspace_tools/export/uvision4_nucleo_l053r8.uvproj.tmpl @@ -341,8 +341,8 @@ 1 - 4 - 1 + 1 + 0 0 0 0 From 3c2119fab6f21f7d8fdce8bd96665bbaf8e5beec Mon Sep 17 00:00:00 2001 From: Sergio Scaglia Date: Wed, 21 May 2014 15:05:29 -0700 Subject: [PATCH 5/5] These changes solve: 1) Endianess of TX_DESC_UPDATED_MASK so Tx buffers can be released after tranmission. 2) Avoid assert( ) failure due uninitialized variable in enet_hal)config_tx_fifo( ) function. Signed-off-by: Sergio Scaglia --- .../TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.c | 2 +- .../TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.h | 3 ++- libraries/net/eth/lwip-eth/arch/TARGET_K64F/k64f_emac.c | 1 - 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.c index a6919e4be3..26b6ae1982 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.c @@ -144,12 +144,12 @@ void enet_hal_config_tx_fifo(uint32_t instance, enet_config_tx_fifo_t *threshold { assert(instance < HW_ENET_INSTANCE_COUNT); assert(thresholdCfg); - assert(thresholdCfg->txFifoWrite <= BM_ENET_TFWR_TFWR); BW_ENET_TFWR_STRFWD(instance, thresholdCfg->isStoreForwardEnabled); /* Set store and forward mode*/ if(!thresholdCfg->isStoreForwardEnabled) { BW_ENET_TFWR_TFWR(instance, thresholdCfg->txFifoWrite); /* Set transmit FIFO write bytes*/ + assert(thresholdCfg->txFifoWrite <= BM_ENET_TFWR_TFWR); } BW_ENET_TSEM_TX_SECTION_EMPTY(instance,thresholdCfg->txEmpty); /* Set transmit FIFO empty threshold*/ BW_ENET_TAEM_TX_ALMOST_EMPTY(instance,thresholdCfg->txAlmostEmpty); /* Set transmit FIFO almost empty threshold*/ diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.h index a0c3cb0ab8..b9e6ac3013 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.h +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.h @@ -345,7 +345,7 @@ typedef struct ENETBdStruct uint16_t reserved3; uint16_t reserved4; } enet_bd_struct_t; - +#define TX_DESC_UPDATED_MASK (0x8000) #else /*! @brief Defines the buffer descriptors structure for the Big-Endian system.*/ typedef struct ENETBdStruct @@ -366,6 +366,7 @@ typedef struct ENETBdStruct uint16_t reserved3; uint16_t reserved4; } enet_bd_struct_t; +#define TX_DESC_UPDATED_MASK (0x0080) #endif /*! @brief Defines the configuration structure for the 1588 PTP timer.*/ diff --git a/libraries/net/eth/lwip-eth/arch/TARGET_K64F/k64f_emac.c b/libraries/net/eth/lwip-eth/arch/TARGET_K64F/k64f_emac.c index b5bd64f649..76a7fe4f1a 100644 --- a/libraries/net/eth/lwip-eth/arch/TARGET_K64F/k64f_emac.c +++ b/libraries/net/eth/lwip-eth/arch/TARGET_K64F/k64f_emac.c @@ -110,7 +110,6 @@ static enet_phy_config_t g_enetPhyCfg[HW_ENET_INSTANCE_COUNT] = // K64F-specific macros #define RX_PBUF_AUTO_INDEX (-1) -#define TX_DESC_UPDATED_MASK (0x0080) /******************************************************************************** * Buffer management