mirror of https://github.com/ARMmbed/mbed-os.git
rtl8195am - fix ARMCC SRAM + SDRAM porting
Signed-off-by: Tony Wu <tonywu@realtek.com>pull/4665/head
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d1c87347af
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35d7ca27be
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@ -1,55 +1,57 @@
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; *************************************************************
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; Realtek Semiconductor Corp.
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; *** Scatter-Loading Description File for RTL8195A ***
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;
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; *************************************************************
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; RTL8195A ARMCC Scatter File
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LR_ROM 0x00000000 0x00030000{
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;
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_ROM_CODE 0x00000000 0x00030000 {
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; MEMORY
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;*.o (RESET, +First)
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; {
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;*(InRoot$$Sections)
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; SROM (rx) : ORIGIN = 0x10000000, LENGTH = 0x00007000
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}
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; SRAM (rwx) : ORIGIN = 0x10007000, LENGTH = 0x00070000 - 0x00007000
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}
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; TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000
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; DRAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
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LR_RAM 0x10006000 0x6FFFF {
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;LR_RAM 0x10000000 0x6FFFF {
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;ROM_BSS 0x10000000 0x0005FFF{
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;rtl_console.o(.mon.ram.bss*)
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; }
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; }
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.image2.table 0x10006000 FIXED {
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LR_IRAM 0x10007000 (0x70000 - 0x7000) {
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rtl8195a_init.o(.image2.ram.data*)
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rtl8195a_init.o(.image2.validate.rodata*)
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IMAGE2_TABLE 0x10007000 FIXED {
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*rtl8195a_init.o(.image2.ram.data*, +FIRST)
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*rtl8195a_init.o(.image2.validate.rodata*)
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}
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}
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.text +0 FIXED{
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ER_IRAM +0 FIXED {
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rtl8195a_init.o(.infra.ram.start)
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*rtl8195a_crypto.o(.text*, .rodata*)
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;*.o(.mon.ram.text*)
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*mbedtls*.o(.text*, .rodata*)
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;*.o(.hal.flash.text*)
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libc.a: (.text*, .rodata*)
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;*.o(.hal.sdrc.text*)
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;*.o(.hal.gpio.text*)
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;*.o(.text*)
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;*.o(.rodata*)
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.ANY (+RO)
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}
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.data +0 FIXED{
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.ANY (+RW)
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}
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}
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RW_IRAM1 +0 UNINIT FIXED {
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RW_IRAM1 +0 UNINIT FIXED {
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.ANY (+ZI)
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*rtl8195a_crypto.o(.data*)
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*mbedtls*.o(.data*)
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libc.a: (.data*)
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*(.sdram.data*)
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}
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RW_IRAM2 +0 UNINIT FIXED {
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*rtl8195a_crypto.o(.bss*, COMMON)
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*mbedtls*.o(.bss*, COMMON)
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libc.a: (.bss*, COMMON)
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*(.bss.thread_stack_main)
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}
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}
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ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 {
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ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 {
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}
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}
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TCM_OVERLAY 0x1FFF0000 0x10000{
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lwip_mem.o(.bss*)
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lwip_memp.o(.bss*)
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*.o(.tcm.heap*)
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}
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}
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}
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LR_DRAM 0x30000000 0x1FFFFF{
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LR_DRAM 0x30000000 0x200000 {
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_DRAM_CODE 0x30000000 0x1FFFFF{
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*.o(.text*)
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ER_DRAM +0 FIXED {
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.ANY (+RO)
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}
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RW_DRAM1 +0 UNINIT FIXED {
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.ANY (+RW)
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}
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RW_DRAM2 +0 UNINIT FIXED {
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.ANY (+ZI)
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}
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}
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}
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}
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@ -1,24 +1,9 @@
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/******************************************************************************
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/* mbed Microcontroller Library - stackheap
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* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
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* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
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*
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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* mbed Microcontroller Library - stackheap
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* Setup a fixed single stack/heap memory model,
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* Setup a fixed single stack/heap memory model,
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* between the top of the RW/ZI region and the stackpointer
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* between the top of the RW/ZI region and the stackpointer
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******************************************************************************/
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*/
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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@ -26,21 +11,14 @@ extern "C" {
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#include <rt_misc.h>
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#include <rt_misc.h>
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#include <stdint.h>
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#include <stdint.h>
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extern char Image$$RW_IRAM1$$ZI$$Limit[];
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extern char Image$$RW_IRAM2$$ZI$$Limit[];
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM2$$ZI$$Limit;
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uint32_t sp_limit = __current_sp();
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uint32_t sp_limit = __current_sp();
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
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//push down stack pointer to recycle some of the stack space that are not use in future
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__asm volatile
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(
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"MRS IP, MSP \n"
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"ADD IP, #64 \n"
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"BIC IP, IP, #7 \n"
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"MSR MSP, IP \n"
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);
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struct __initial_stackheap r;
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struct __initial_stackheap r;
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r.heap_base = zi_limit;
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r.heap_base = zi_limit;
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r.heap_limit = sp_limit;
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r.heap_limit = sp_limit;
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@ -28,10 +28,14 @@
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(defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
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(defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
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extern uint8_t Image$$RW_IRAM1$$ZI$$Base[];
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extern uint8_t Image$$RW_IRAM2$$ZI$$Base[];
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extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[];
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extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[];
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#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base
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extern uint8_t Image$$RW_DRAM2$$ZI$$Base[];
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#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit
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extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[];
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#define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base
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#define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit
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#define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base
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#define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit
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#elif defined (__ICCARM__)
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#elif defined (__ICCARM__)
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@ -181,11 +185,11 @@ void PLAT_Start(void)
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#endif
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#endif
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// Clear RAM BSS
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// Clear RAM BSS
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#if defined (__ICCARM__) || defined (__CC_ARM)
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#if defined (__ICCARM__)
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__memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
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__memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
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#else
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#else
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__memset((void *)__bss_sram1_start__, 0, __bss_sram1_end__ - __bss_sram1_start__);
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__memset((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__);
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__memset((void *)__bss_sram2_start__, 0, __bss_sram2_end__ - __bss_sram2_start__);
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__memset((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
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#endif
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#endif
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#if defined (__CC_ARM)
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#if defined (__CC_ARM)
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@ -21,16 +21,14 @@
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#include "rtl8195a.h"
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#include "rtl8195a.h"
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#if defined(__CC_ARM)
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#if defined(__CC_ARM)
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#ifdef CONFIG_RTL8195A
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
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#define INITIAL_SP 0x10070000
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[];
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#define ISR_STACK_START 0x1FFFEFFC
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#define ISR_STACK_START (unsigned char *)(Image$$ARM_LIB_STACK$$ZI$$Base)
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#else
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#define ISR_STACK_SIZE (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Length)
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#ERROR "NOT SUPPORT NOW"
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#define INITIAL_SP (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Base)
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#endif
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#elif defined(__GNUC__)
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#elif defined(__GNUC__)
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extern uint32_t __StackTop[];
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extern uint32_t __StackTop[];
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extern uint32_t __StackLimit[];
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extern uint32_t __StackLimit[];
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// extern uint32_t __end__[];
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extern uint32_t __HeapLimit[];
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extern uint32_t __HeapLimit[];
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#define INITIAL_SP (__StackTop)
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#define INITIAL_SP (__StackTop)
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#endif
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#endif
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@ -54,4 +52,3 @@
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#endif
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#endif
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#endif
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#endif
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@ -6,6 +6,7 @@ RTL8195A elf2bin script
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import sys, array, struct, os, re, subprocess
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import sys, array, struct, os, re, subprocess
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import hashlib
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import hashlib
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import shutil
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from tools.paths import TOOLS_BOOTLOADERS
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from tools.paths import TOOLS_BOOTLOADERS
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from datetime import datetime
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from datetime import datetime
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secs = int((datetime.now()-datetime(2016,11,1)).total_seconds())
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secs = int((datetime.now()-datetime(2016,11,1)).total_seconds())
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return RAM2_VER + secs
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return RAM2_VER + secs
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# ----------------------------
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# main function
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# ----------------------------
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def prepend(image, entry, segment, image_ram2, image_ota):
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def prepend(image, entry, segment, image_ram2, image_ota):
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# parse input arguments
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# parse input arguments
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def write_load_segment(image_elf, image_bin, segment):
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def write_load_segment(image_elf, image_bin, segment):
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file_elf = open(image_elf, "rb")
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file_elf = open(image_elf, "rb")
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#delete folder with same name when using ARMCC
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if os.path.isfile(image_bin):
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pass
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else:
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for i in os.listdir(image_bin):
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os.remove(os.path.join(image_bin, i))
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os.removedirs(image_bin)
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file_bin = open(image_bin, "wb")
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file_bin = open(image_bin, "wb")
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for (offset, addr, size) in segment:
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for (offset, addr, size) in segment:
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file_elf.seek(offset)
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file_elf.seek(offset)
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# main function
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# main function
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# ----------------------------
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# ----------------------------
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def rtl8195a_elf2bin(t_self, image_elf, image_bin):
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def rtl8195a_elf2bin(t_self, image_elf, image_bin):
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# remove target binary file/path
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if os.path.isfile(image_bin):
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os.remove(image_bin)
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else:
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shutil.rmtree(image_bin)
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segment = parse_load_segment(t_self.name, image_elf)
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segment = parse_load_segment(t_self.name, image_elf)
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write_load_segment(image_elf, image_bin, segment)
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write_load_segment(image_elf, image_bin, segment)
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