From 3478664d1ed90bc60e9a2cb4f72e89977303695a Mon Sep 17 00:00:00 2001 From: cyliangtw Date: Wed, 22 Mar 2017 14:28:58 +0800 Subject: [PATCH] Support bootloader --- .../device/TOOLCHAIN_ARM_MICRO/M453.sct | 15 ++++++++++++--- .../TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct | 15 ++++++++++++--- .../TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld | 12 ++++++++++-- .../TARGET_M451/device/TOOLCHAIN_IAR/M453.icf | 8 +++++--- .../TARGET_M451/device/cmsis_nvic.h | 14 ++++++++++++-- .../TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 15 ++++++++++++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 15 ++++++++++++--- .../TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 15 ++++++++++++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 15 ++++++++++++--- .../TARGET_NU_XRAM_SUPPORTED/NUC472.ld | 12 ++++++++++-- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld | 12 ++++++++++-- .../TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf | 8 +++++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf | 8 +++++--- .../TARGET_NUC472/device/cmsis_nvic.h | 14 ++++++++++++-- 14 files changed, 141 insertions(+), 37 deletions(-) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct index f9346f10c3..77b369f24f 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct @@ -1,6 +1,15 @@ +#! armcc -E -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00040000 +#endif + +LR_IROM1 MBED_APP_START { + ER_IROM1 MBED_APP_START { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) @@ -23,6 +32,6 @@ LR_IROM1 0x00000000 { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00040000) ; 256 KB APROM +ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 256 KB APROM ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct index f9346f10c3..77b369f24f 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct @@ -1,6 +1,15 @@ +#! armcc -E -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00040000 +#endif + +LR_IROM1 MBED_APP_START { + ER_IROM1 MBED_APP_START { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) @@ -23,6 +32,6 @@ LR_IROM1 0x00000000 { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00040000) ; 256 KB APROM +ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 256 KB APROM ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld index 05812d7a4c..20b4ac9bcb 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld @@ -2,12 +2,20 @@ * Nuvoton M453 GCC linker script file */ +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00040000 +#endif + StackSize = 0x800; MEMORY { - VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 - FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00040000 - 0x00000400 + VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400 + FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400 RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 - 0x00000000 } diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf index b9f722055f..04fab3eee8 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf @@ -1,11 +1,13 @@ /*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } +if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; } /*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x00000000; +define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x00040000; +define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; +define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000; define symbol __ICFEDIT_region_IRAM_end__ = 0x20008000; /*-Sizes-*/ diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/cmsis_nvic.h b/targets/TARGET_NUVOTON/TARGET_M451/device/cmsis_nvic.h index 77cc94d986..26049c886f 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/cmsis_nvic.h +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/cmsis_nvic.h @@ -32,8 +32,18 @@ # define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__) #endif - -#define NVIC_FLASH_VECTOR_ADDRESS 0 +#if defined(__CC_ARM) + extern uint32_t Load$$LR$$LR_IROM1$$Base[]; + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) +#elif defined(__ICCARM__) + #pragma section=".intvec" + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) +#elif defined(__GNUC__) + extern uint32_t __vector_table; + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)&__vector_table) +#else + #error "Flash vector address not set for this toolchain" +#endif #ifdef __cplusplus extern "C" { diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index be17f4b49f..20cb051193 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -1,6 +1,15 @@ +#! armcc -E -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00080000 +#endif + +LR_IROM1 MBED_APP_START { + ER_IROM1 MBED_APP_START { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) @@ -29,7 +38,7 @@ LR_IROM1 0x00000000 { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM +ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal) ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index 5b3d1bc55d..1ea45d1756 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -1,6 +1,15 @@ +#! armcc -E -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00080000 +#endif + +LR_IROM1 MBED_APP_START { + ER_IROM1 MBED_APP_START { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) @@ -24,6 +33,6 @@ LR_IROM1 0x00000000 { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM +ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index 459f97c3d3..7c7f225f40 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -1,6 +1,15 @@ +#! armcc -E -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00080000 +#endif + +LR_IROM1 MBED_APP_START { + ER_IROM1 MBED_APP_START { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) @@ -31,7 +40,7 @@ LR_IROM1 0x00000000 { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM +ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal) ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index 5b3d1bc55d..1ea45d1756 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -1,6 +1,15 @@ +#! armcc -E -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00080000 +#endif + +LR_IROM1 MBED_APP_START { + ER_IROM1 MBED_APP_START { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) @@ -24,6 +33,6 @@ LR_IROM1 0x00000000 { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM +ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld index c0ba5faf55..3f16540c97 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld @@ -2,13 +2,21 @@ * Nuvoton NUC472 GCC linker script file */ +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00080000 +#endif + StackSize = 0x800; MEMORY { - VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 - FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00080000 - 0x00000400 + VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400 + FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400 RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - 0x00000000 RAM_EXTERN (rwx) : ORIGIN = 0x60000000, LENGTH = 0x00100000 } diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld index 3440229f87..6a85b9339c 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld @@ -2,13 +2,21 @@ * Nuvoton NUC472 GCC linker script file */ +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00080000 +#endif + StackSize = 0x800; MEMORY { - VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 - FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00080000 - 0x00000400 + VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400 + FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400 RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - 0x00000000 } diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf index e625d5cc79..70faed67f7 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf @@ -1,11 +1,13 @@ /*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } +if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; } /*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x00000000; +define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x00080000; +define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; +define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000; define symbol __ICFEDIT_region_IRAM_end__ = 0x20010000; define symbol __ICFEDIT_region_XRAM_start__ = 0x60000000; diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf index e62e957908..9d27118015 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf @@ -1,11 +1,13 @@ /*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } +if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; } /*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x00000000; +define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x00080000; +define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; +define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000; define symbol __ICFEDIT_region_IRAM_end__ = 0x20010000; /*-Sizes-*/ diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/cmsis_nvic.h b/targets/TARGET_NUVOTON/TARGET_NUC472/device/cmsis_nvic.h index cc87b4a4ac..e5e797a87a 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/cmsis_nvic.h +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/cmsis_nvic.h @@ -32,8 +32,18 @@ # define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__) #endif - -#define NVIC_FLASH_VECTOR_ADDRESS 0 +#if defined(__CC_ARM) + extern uint32_t Load$$LR$$LR_IROM1$$Base[]; + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) +#elif defined(__ICCARM__) + #pragma section=".intvec" + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) +#elif defined(__GNUC__) + extern uint32_t __vector_table; + #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)&__vector_table) +#else + #error "Flash vector address not set for this toolchain" +#endif #ifdef __cplusplus extern "C" {