From 5195c820e6fe364975aeeb61c39384cb7db2b8d7 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Fri, 17 Aug 2018 15:09:13 +0200 Subject: [PATCH 1/2] standardise QSPI pin names --- .../TARGET_NRF52840_DK/PinNames.h | 21 +++++++++++++------ .../TARGET_NUCLEO_F412ZG/PinNames.h | 8 +++++++ .../TARGET_DISCO_F413ZH/PinNames.h | 12 +++++------ .../TARGET_NUCLEO_F413ZH/PinNames.h | 8 +++++++ .../TARGET_NUCLEO_F446ZE/PinNames.h | 8 +++++++ .../TARGET_DISCO_F469NI/PinNames.h | 13 ++++++------ .../TARGET_DISCO_F746NG/PinNames.h | 8 +++++++ .../TARGET_NUCLEO_F746ZG/PinNames.h | 8 +++++++ .../TARGET_NUCLEO_F756ZG/PinNames.h | 8 +++++++ .../TARGET_NUCLEO_F767ZI/PinNames.h | 8 +++++++ .../TARGET_DISCO_F769NI/PinNames.h | 8 +++++++ .../TARGET_NUCLEO_L432KC/PinNames.h | 9 ++++++++ .../TARGET_NUCLEO_L433RC_P/PinNames.h | 8 +++++++ .../TARGET_DISCO_L475VG_IOT01A/PinNames.h | 8 +++++++ .../TARGET_DISCO_L476VG/PinNames.h | 16 ++++++++++++++ .../TARGET_DISCO_L496AG/PinNames.h | 8 +++++++ .../TARGET_NUCLEO_L496ZG/PinNames.h | 8 +++++++ 17 files changed, 149 insertions(+), 18 deletions(-) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h index 4241cdcf47..5730e040c1 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_NRF52840_DK/PinNames.h @@ -227,12 +227,21 @@ typedef enum { A4 = p30, A5 = p31, - QSPI_FLASH_IO0 = P0_20, - QSPI_FLASH_IO1 = P0_21, - QSPI_FLASH_IO2 = P0_22, - QSPI_FLASH_IO3 = P0_23, - QSPI_FLASH_SCK = P0_19, - QSPI_FLASH_CSN = P0_17, + /**** QSPI pins ****/ + QSPI1_IO0 = P0_20, + QSPI1_IO1 = P0_21, + QSPI1_IO2 = P0_22, + QSPI1_IO3 = P0_23, + QSPI1_SCK = P0_19, + QSPI1_CSN = P0_17, + + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = QSPI1_IO0, + QSPI_FLASH1_IO1 = QSPI1_IO1, + QSPI_FLASH1_IO2 = QSPI1_IO2, + QSPI_FLASH1_IO3 = QSPI1_IO3, + QSPI_FLASH1_SCK = QSPI1_SCK, + QSPI_FLASH1_CSN = QSPI1_CSN, // Not connected NC = (int)0xFFFFFFFF diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h index 9bdac54021..df39a64b23 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h @@ -307,6 +307,14 @@ typedef enum { SYS_WKUP2 = PC_0, SYS_WKUP3 = PC_1, + /**** QSPI pins ****/ + QSPI1_IO0 = PD_11, + QSPI1_IO1 = PD_12, + QSPI1_IO2 = PE_2, + QSPI1_IO3 = PD_13, + QSPI1_SCK = PB_2, + QSPI1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h index 1d8185833f..c66237598e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h @@ -304,12 +304,12 @@ typedef enum { SYS_WKUP3 = PC_1, /**** QSPI FLASH pins ****/ - QSPI_PIN_IO0 = PF_8, - QSPI_PIN_IO1 = PF_9, - QSPI_PIN_IO2 = PE_2, - QSPI_PIN_IO3 = PD_13, - QSPI_PIN_SCK = PB_2, - QSPI_PIN_CSN = PG_6, + QSPI_FLASH1_IO0 = PF_8, + QSPI_FLASH1_IO1 = PF_9, + QSPI_FLASH1_IO2 = PE_2, + QSPI_FLASH1_IO3 = PD_13, + QSPI_FLASH1_SCK = PB_2, + QSPI_FLASH1_CSN = PG_6, // Not connected NC = (int)0xFFFFFFFF diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h index 1fba180f55..98e511481d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h @@ -306,6 +306,14 @@ typedef enum { SYS_WKUP2 = PC_0, SYS_WKUP3 = PC_1, + /**** QSPI pins ****/ + QSPI1_IO0 = PD_11, + QSPI1_IO1 = PD_12, + QSPI1_IO2 = PE_2, + QSPI1_IO3 = PD_13, + QSPI1_SCK = PB_2, + QSPI1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h index eb1d885320..cecd65dc63 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h @@ -325,6 +325,14 @@ typedef enum { SYS_WKUP0 = PA_0, SYS_WKUP1 = PC_13, + /**** QSPI pins ****/ + QSPI1_IO0 = PD_11, + QSPI1_IO1 = PD_12, + QSPI1_IO2 = PE_2, + QSPI1_IO3 = PD_13, + QSPI1_SCK = PB_2, + QSPI1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h index 58ebf4e8f6..5e31257cb8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h @@ -406,12 +406,13 @@ typedef enum { SYS_TRACED3_ALT0 = PE_6, SYS_WKUP = PA_0, - QSPI_FLASH_IO0 = PF_8, - QSPI_FLASH_IO1 = PF_9, - QSPI_FLASH_IO2 = PF_7, - QSPI_FLASH_IO3 = PF_6, - QSPI_FLASH_SCK = PF_10, - QSPI_FLASH_CSN = PB_6, + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PF_8, + QSPI_FLASH1_IO1 = PF_9, + QSPI_FLASH1_IO2 = PF_7, + QSPI_FLASH1_IO3 = PF_6, + QSPI_FLASH1_SCK = PF_10, + QSPI_FLASH1_CSN = PB_6, // Not connected NC = (int)0xFFFFFFFF diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h index 8874294d21..2da6cafdf6 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h @@ -420,6 +420,14 @@ typedef enum { SYS_WKUP5 = PI_8, SYS_WKUP6 = PI_11, + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PD_11, + QSPI_FLASH1_IO1 = PD_12, + QSPI_FLASH1_IO2 = PE_2, + QSPI_FLASH1_IO3 = PD_13, + QSPI_FLASH1_SCK = PB_2, + QSPI_FLASH1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h index 74f94f7894..cb79aa44c7 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h @@ -354,6 +354,14 @@ typedef enum { SYS_WKUP3 = PC_1, SYS_WKUP4 = PC_13, + /**** QSPI pins ****/ + QSPI_FLASH1_IO0 = PD_11, + QSPI_FLASH1_IO1 = PD_12, + QSPI_FLASH1_IO2 = PE_2, + QSPI_FLASH1_IO3 = PD_13, + QSPI_FLASH1_SCK = PB_2, + QSPI_FLASH1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h index 74f94f7894..eb4d1e37c8 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h @@ -354,6 +354,14 @@ typedef enum { SYS_WKUP3 = PC_1, SYS_WKUP4 = PC_13, + /**** QSPI pins ****/ + QSPI1_IO0 = PD_11, + QSPI1_IO1 = PD_12, + QSPI1_IO2 = PE_2, + QSPI1_IO3 = PD_13, + QSPI1_SCK = PB_2, + QSPI1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h index 89e4a8596f..46225b1c03 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h @@ -359,6 +359,14 @@ typedef enum { SYS_WKUP3 = PC_1, SYS_WKUP4 = PC_13, + /**** QSPI pins ****/ + QSPI1_IO0 = PD_11, + QSPI1_IO1 = PD_12, + QSPI1_IO2 = PE_2, + QSPI1_IO3 = PD_13, + QSPI1_SCK = PB_2, + QSPI1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h index df3fc26265..b8196989b0 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h @@ -427,6 +427,14 @@ typedef enum { SYS_WKUP5 = PI_8, SYS_WKUP6 = PI_11, + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PC_9, + QSPI_FLASH1_IO1 = PC_10, + QSPI_FLASH1_IO2 = PE_2, + QSPI_FLASH1_IO3 = PD_13, + QSPI_FLASH1_SCK = PB_2, + QSPI_FLASH1_CSN = PB_6, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PinNames.h index c7842cff3a..54301edf3b 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PinNames.h @@ -159,6 +159,15 @@ typedef enum { SYS_WKUP1 = PA_0, SYS_WKUP4 = PA_2, + /**** QSPI pins ****/ + QSPI1_IO0 = PB_1, + QSPI1_IO1 = PB_0, + QSPI1_IO2 = PA_7, + QSPI1_IO3 = PA_6, + QSPI1_SCK = PA_3, + QSPI1_CSN = PA_2, + + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h index 9cc9fcf3de..93a019ca94 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h @@ -236,6 +236,14 @@ typedef enum { SYS_WKUP2 = PC_13, SYS_WKUP4 = PA_2, + /**** QSPI pins ****/ + QSPI1_IO0 = PB_1, + QSPI1_IO1 = PB_0, + QSPI1_IO2 = PA_7, + QSPI1_IO3 = PA_6, + QSPI1_SCK = PB_10, + QSPI1_CSN = PB_11, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h index 7b69f7ea21..c1197d596c 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h @@ -282,6 +282,14 @@ typedef enum { SYS_WKUP4 = PA_2, SYS_WKUP5 = PC_5, + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PE_12, + QSPI_FLASH1_IO1 = PE_13, + QSPI_FLASH1_IO2 = PE_14, + QSPI_FLASH1_IO3 = PE_15, + QSPI_FLASH1_SCK = PE_10, + QSPI_FLASH1_CSN = PE_11, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h index 8fe525f639..3a80beb4c8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h @@ -258,6 +258,22 @@ typedef enum { SYS_WKUP4 = PA_2, SYS_WKUP5 = PC_5, + /**** QSPI pins ****/ + QSPI1_IO0 = PE_12, + QSPI1_IO1 = PE_13, + QSPI1_IO2 = PE_14, + QSPI1_IO3 = PE_15, + QSPI1_SCK = PE_10, + QSPI1_CSN = PE_11, + + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = QSPI1_IO0, + QSPI_FLASH1_IO1 = QSPI1_IO1, + QSPI_FLASH1_IO2 = QSPI1_IO2, + QSPI_FLASH1_IO3 = QSPI1_IO3, + QSPI_FLASH1_SCK = QSPI1_SCK, + QSPI_FLASH1_CSN = QSPI1_CSN, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h index 7b41515f0b..b60b0ec151 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h @@ -341,6 +341,14 @@ typedef enum { SYS_WKUP4 = PA_2, SYS_WKUP5 = PC_5, + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PB_1, + QSPI_FLASH1_IO1 = PB_0, + QSPI_FLASH1_IO2 = PA_7, + QSPI_FLASH1_IO3 = PA_6, + QSPI_FLASH1_SCK = PB_11, + QSPI_FLASH1_CSN = PA_3, + // Not connected NC = (int)0xFFFFFFFF } PinName; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h index e828b5e57e..9a85d7bdb0 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h @@ -317,6 +317,14 @@ typedef enum { SYS_WKUP4 = PA_2, SYS_WKUP5 = PC_5, + /**** QSPI pins ****/ + QSPI1_IO0 = PE_12, + QSPI1_IO1 = PB_0, + QSPI1_IO2 = PE_14, + QSPI1_IO3 = PE_15, + QSPI1_SCK = PB_10, + QSPI1_CSN = PA_2, + // Not connected NC = (int)0xFFFFFFFF } PinName; From 9a41043c0bd21d9af3c71168d90411fbab1c979d Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Fri, 24 Aug 2018 12:40:59 +0200 Subject: [PATCH 2/2] adjust hal QSPI test to new pin names --- TESTS/mbed_hal/qspi/main.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/TESTS/mbed_hal/qspi/main.cpp b/TESTS/mbed_hal/qspi/main.cpp index 0d1db1db35..44ba33e52d 100644 --- a/TESTS/mbed_hal/qspi/main.cpp +++ b/TESTS/mbed_hal/qspi/main.cpp @@ -66,12 +66,12 @@ uint8_t rx_buf[DATA_SIZE_1024]; // some target defines QSPI pins as integers thus conversion needed -#define QPIN_0 static_cast(QSPI_PIN_IO0) -#define QPIN_1 static_cast(QSPI_PIN_IO1) -#define QPIN_2 static_cast(QSPI_PIN_IO2) -#define QPIN_3 static_cast(QSPI_PIN_IO3) -#define QSCK static_cast(QSPI_PIN_SCK) -#define QCSN static_cast(QSPI_PIN_CSN) +#define QPIN_0 static_cast(QSPI_FLASH1_IO0) +#define QPIN_1 static_cast(QSPI_FLASH1_IO1) +#define QPIN_2 static_cast(QSPI_FLASH1_IO2) +#define QPIN_3 static_cast(QSPI_FLASH1_IO3) +#define QSCK static_cast(QSPI_FLASH1_SCK) +#define QCSN static_cast(QSPI_FLASH1_CSN) static void log_data(const char *str, uint8_t *data, uint32_t size)