mirror of https://github.com/ARMmbed/mbed-os.git
remove ethernet driver as it is not compatible
Qinghao Shi
parent
f35ba494ca
commit
304b584040
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@ -1,451 +0,0 @@
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/* MPS2 Peripheral Library
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*
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* Copyright (c) 2006-2018 ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Code implementation file for the LAN Ethernet interface.
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*/
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#include <stdio.h>
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#include "mbed_wait_api.h"
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#include "ETH_MPS2.h"
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// SMSC9220 low-level operations
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unsigned int smsc9220_mac_regread(unsigned char regoffset, unsigned int *data)
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{
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unsigned int val, maccmd;
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int timedout;
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int error;
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error = 0;
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val = SMSC9220->MAC_CSR_CMD;
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if (!(val & ((unsigned int)1 << 31))) { // Make sure there's no pending operation
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maccmd = 0;
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maccmd |= regoffset;
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maccmd |= ((unsigned int)1 << 30); // Indicates read
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maccmd |= ((unsigned int)1 << 31); // Start bit
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SMSC9220->MAC_CSR_CMD = maccmd; // Start operation
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timedout = 50;
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do {
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val = SMSC9220->BYTE_TEST; // A no-op read.
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wait_ms(1);
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timedout--;
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} while (timedout && (SMSC9220->MAC_CSR_CMD & ((unsigned int)1 << 31)));
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if (!timedout) {
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error = 1;
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} else {
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*data = SMSC9220->MAC_CSR_DATA;
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}
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} else {
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*data = 0;
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}
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return error;
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}
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unsigned int smsc9220_mac_regwrite(unsigned char regoffset, unsigned int data)
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{
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unsigned int read, maccmd;
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int timedout;
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int error;
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error = 0;
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read = SMSC9220->MAC_CSR_CMD;
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if (!(read & ((unsigned int)1 << 31))) { // Make sure there's no pending operation
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SMSC9220->MAC_CSR_DATA = data; // Store data.
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maccmd = 0;
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maccmd |= regoffset;
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maccmd &= ~((unsigned int)1 << 30); // Clear indicates write
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maccmd |= ((unsigned int)1 << 31); // Indicate start of operation
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SMSC9220->MAC_CSR_CMD = maccmd;
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timedout = 50;
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do {
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read = SMSC9220->BYTE_TEST; // A no-op read.
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wait_ms(1);
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timedout--;
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} while (timedout && (SMSC9220->MAC_CSR_CMD & ((unsigned int)1 << 31)));
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if (!timedout) {
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error = 1;
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}
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} else {
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printf("Warning: SMSC9220 MAC CSR is busy. No data written.\n");
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}
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return error;
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}
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unsigned int smsc9220_phy_regread(unsigned char regoffset, unsigned short *data)
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{
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unsigned int val, phycmd;
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int error;
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int timedout;
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error = 0;
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smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &val);
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if (!(val & 1)) { // Not busy
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phycmd = 0;
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phycmd |= (1 << 11); // 1 to [15:11]
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phycmd |= ((regoffset & 0x1F) << 6); // Put regoffset to [10:6]
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phycmd &= ~(1 << 1); // Clear [1] indicates read.
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phycmd |= (1 << 0); // Set [0] indicates operation start
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smsc9220_mac_regwrite(SMSC9220_MAC_MII_ACC, phycmd);
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val = 0;
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timedout = 50;
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do {
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wait_ms(1);
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timedout--;
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smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &val);
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} while (timedout && (val & ((unsigned int)1 << 0)));
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if (!timedout) {
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error = 1;
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} else {
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smsc9220_mac_regread(SMSC9220_MAC_MII_DATA, (unsigned int *)data);
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}
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} else {
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*data = 0;
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}
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return error;
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}
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unsigned int smsc9220_phy_regwrite(unsigned char regoffset, unsigned short data)
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{
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unsigned int val, phycmd;
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int error;
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int timedout;
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error = 0;
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smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &val);
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if (!(val & 1)) { // Not busy
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smsc9220_mac_regwrite(SMSC9220_MAC_MII_DATA, (data & 0xFFFF)); // Load the data
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phycmd = 0;
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phycmd |= (1 << 11); // 1 to [15:11]
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phycmd |= ((regoffset & 0x1F) << 6); // Put regoffset to [10:6]
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phycmd |= (1 << 1); // Set [1] indicates write.
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phycmd |= (1 << 0); // Set [0] indicates operation start
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smsc9220_mac_regwrite(SMSC9220_MAC_MII_ACC, phycmd); // Start operation
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phycmd = 0;
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timedout = 50;
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do {
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wait_ms(1);
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timedout--;
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smsc9220_mac_regread(SMSC9220_MAC_MII_ACC, &phycmd);
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} while (timedout && (phycmd & (1 << 0)));
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if (!timedout) {
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error = 1;
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}
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} else {
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printf("Warning: SMSC9220 MAC MII is busy. No data written.\n");
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}
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return error;
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}
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// Returns smsc9220 id.
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unsigned int smsc9220_read_id(void)
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{
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return SMSC9220->ID_REV;
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}
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// Initiates a soft reset, returns 0 on success, or 1 on failure.
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unsigned int smsc9220_soft_reset(void)
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{
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int timedout;
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timedout = 10;
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// Soft reset
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SMSC9220->HW_CFG |= 1;
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do {
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wait_ms(1);
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timedout--;
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} while (timedout && (SMSC9220->HW_CFG & 1));
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if (!timedout) {
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return 1;
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}
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return 0;
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}
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void smsc9220_set_txfifo(unsigned int val)
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{
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// 2kb minimum, 14kb maximum
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if (val < 2 || val > 14) {
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return;
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}
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SMSC9220->HW_CFG = val << 16;
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}
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unsigned int smsc9220_wait_eeprom(void)
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{
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int timedout;
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timedout = 50;
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do {
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wait_ms(1);
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timedout--;
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} while (timedout && (SMSC9220->E2P_CMD & ((unsigned int) 1 << 31)));
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if (!timedout) {
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return 1;
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}
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return 0;
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}
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/* initialise irqs */
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void smsc9220_init_irqs(void)
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{
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SMSC9220->INT_EN = 0x0;
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SMSC9220->INT_STS = 0xFFFFFFFF; // clear all interrupts
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SMSC9220->IRQ_CFG = 0x22000100; // irq deassertion at 220 usecs and master IRQ enable.
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}
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unsigned int smsc9220_check_phy(void)
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{
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unsigned short phyid1, phyid2;
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smsc9220_phy_regread(SMSC9220_PHY_ID1, &phyid1);
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smsc9220_phy_regread(SMSC9220_PHY_ID2, &phyid2);
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return ((phyid1 == 0xFFFF && phyid2 == 0xFFFF) ||
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(phyid1 == 0x0 && phyid2 == 0x0));
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}
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unsigned int smsc9220_reset_phy(void)
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{
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unsigned short read;
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if (smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &read)) {
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return 1;
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}
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read |= (1 << 15);
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if (smsc9220_phy_regwrite(SMSC9220_PHY_BCONTROL, read)) {
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return 1;
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}
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return 0;
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}
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/* Advertise all speeds and pause capabilities */
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void smsc9220_advertise_cap(void)
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{
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unsigned short aneg_adv;
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aneg_adv = 0;
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smsc9220_phy_regread(SMSC9220_PHY_ANEG_ADV, &aneg_adv);
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aneg_adv |= 0xDE0;
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smsc9220_phy_regwrite(SMSC9220_PHY_ANEG_ADV, aneg_adv);
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smsc9220_phy_regread(SMSC9220_PHY_ANEG_ADV, &aneg_adv);
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return;
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}
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void smsc9220_establish_link(void)
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{
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unsigned short bcr;
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smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &bcr);
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bcr |= (1 << 12) | (1 << 9);
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smsc9220_phy_regwrite(SMSC9220_PHY_BCONTROL, bcr);
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smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &bcr);
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{
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unsigned int hw_cfg;
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hw_cfg = 0;
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hw_cfg = SMSC9220->HW_CFG;
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hw_cfg &= 0xF0000;
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hw_cfg |= (1 << 20);
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SMSC9220->HW_CFG = hw_cfg;
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}
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return;
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}
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void smsc9220_enable_xmit(void)
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{
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SMSC9220->TX_CFG = 0x2; // Enable trasmission
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return;
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}
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void smsc9220_enable_mac_xmit(void)
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{
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unsigned int mac_cr;
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mac_cr = 0;
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smsc9220_mac_regread(SMSC9220_MAC_CR, &mac_cr);
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mac_cr |= (1 << 3); // xmit enable
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mac_cr |= (1 << 28); // Heartbeat disable
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smsc9220_mac_regwrite(SMSC9220_MAC_CR, mac_cr);
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return;
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}
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void smsc9220_enable_mac_recv(void)
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{
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unsigned int mac_cr;
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mac_cr = 0;
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smsc9220_mac_regread(SMSC9220_MAC_CR, &mac_cr);
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mac_cr |= (1 << 2); // Recv enable
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smsc9220_mac_regwrite(SMSC9220_MAC_CR, mac_cr);
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return;
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}
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unsigned int smsc9220_check_ready(void)
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{
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return !(SMSC9220->PMT_CTRL & 1);
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}
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/* Generate a soft irq */
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void smsc9220_set_soft_int(void)
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{
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SMSC9220->INT_EN |= 0x80000000;
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}
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/* clear soft irq */
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void smsc9220_clear_soft_int(void)
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{
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SMSC9220->INT_STS |= 0x80000000;
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}
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unsigned int smsc9220_recv_packet(unsigned int *recvbuf, unsigned int *index)
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{
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unsigned int rxfifo_inf; // Tells us the status of rx payload and status fifos.
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unsigned int rxfifo_stat;
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unsigned int pktsize;
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unsigned int dwords_to_read;
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rxfifo_inf = SMSC9220->RX_FIFO_INF;
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if (rxfifo_inf & 0xFFFF) { // If there's data
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rxfifo_stat = SMSC9220->RX_STAT_PORT;
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if (rxfifo_stat != 0) { // Fetch status of this packet
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pktsize = ((rxfifo_stat >> 16) & 0x3FFF);
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if (rxfifo_stat & (1 << 15)) {
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printf("Error occured during receiving of packets on the bus.\n");
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return 1;
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} else {
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/* Below formula (recommended by SMSC9220 code)
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* gives 1 more than required. This is perhaps because
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* a last word is needed for not word aligned packets.
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*/
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dwords_to_read = (pktsize + 3) >> 2;
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// PIO copy of data received:
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while (dwords_to_read > 0) {
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recvbuf[*index] = SMSC9220->RX_DATA_PORT;
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(*index)++;
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dwords_to_read--;
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}
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}
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} else {
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return 1;
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}
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} else {
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return 1;
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}
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rxfifo_stat = SMSC9220->RX_STAT_PORT;
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rxfifo_inf = SMSC9220->RX_FIFO_INF;
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return 0;
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}
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// Does the actual transfer of data to FIFO, note it does no
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// fifo availability checking. This should be done by caller.
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// Assumes the whole frame is transferred at once as a single segment
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void smsc9220_xmit_packet(unsigned char *pkt, unsigned int length)
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{
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unsigned int txcmd_a, txcmd_b;
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unsigned int dwords_to_write;
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volatile unsigned int dwritten;
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unsigned int *pktptr;
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volatile unsigned int xmit_stat, xmit_stat2, xmit_inf;
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int i;
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pktptr = (unsigned int *) pkt;
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txcmd_a = 0;
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txcmd_b = 0;
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txcmd_a |= (1 << 12) | (1 << 13); // First and last segments
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txcmd_a |= length & 0x7FF; // [10:0] contains length
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txcmd_b |= ((length & 0xFFFF) << 16); // [31:16] contains length
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txcmd_b |= length & 0x7FF; // [10:0] also contains length
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SMSC9220->TX_DATA_PORT = txcmd_a;
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SMSC9220->TX_DATA_PORT = txcmd_b;
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dwritten = dwords_to_write = (length + 3) >> 2;
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// PIO Copy to FIFO. Could replace this with DMA.
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while (dwords_to_write > 0) {
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SMSC9220->TX_DATA_PORT = *pktptr;
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pktptr++;
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dwords_to_write--;
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}
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xmit_stat = SMSC9220->TX_STAT_PORT;
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xmit_stat2 = SMSC9220->TX_STAT_PORT;
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xmit_inf = SMSC9220->TX_FIFO_INF;
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if (xmit_stat2 != 0) {
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for (i = 0; i < 6; i++) {
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xmit_stat2 = SMSC9220->TX_STAT_PORT;
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}
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}
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}
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@ -1,65 +0,0 @@
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/* MPS2 Peripheral Library
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*
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* Copyright (c) 2006-2018 ARM Limited
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* All rights reserved.
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
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#ifndef _ETH_MPS2_H_
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#define _ETH_MPS2_H_
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#include "SMM_MPS2.h"
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// Function declarations
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|
||||
unsigned int smsc9220_mac_regread(unsigned char regoffset, unsigned int *data);
|
||||
unsigned int smsc9220_mac_regwrite(unsigned char regoffset, unsigned int data);
|
||||
unsigned int smsc9220_phy_regread(unsigned char regoffset, unsigned short *data);
|
||||
unsigned int smsc9220_phy_regwrite(unsigned char regoffset, unsigned short data);
|
||||
|
||||
unsigned int smsc9220_read_id(void);
|
||||
unsigned int smsc9220_soft_reset(void);
|
||||
void smsc9220_set_txfifo(unsigned int val);
|
||||
unsigned int smsc9220_wait_eeprom(void);
|
||||
void smsc9220_init_irqs(void);
|
||||
unsigned int smsc9220_check_phy(void);
|
||||
unsigned int smsc9220_reset_phy(void);
|
||||
|
||||
void smsc9220_advertise_cap(void);
|
||||
void smsc9220_establish_link(void);
|
||||
void smsc9220_enable_xmit(void);
|
||||
void smsc9220_enable_mac_xmit(void);
|
||||
void smsc9220_enable_mac_recv(void);
|
||||
unsigned int smsc9220_check_ready(void);
|
||||
void smsc9220_set_soft_int(void);
|
||||
void smsc9220_clear_soft_int(void);
|
||||
|
||||
unsigned int smsc9220_recv_packet(unsigned int *recvbuf, unsigned int *index);
|
||||
void smsc9220_xmit_packet(unsigned char *pkt, unsigned int length);
|
||||
|
||||
#endif
|
||||
|
|
@ -1,162 +0,0 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2018 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <string.h>
|
||||
|
||||
#include "mps2_ethernet_api.h"
|
||||
#include "cmsis.h"
|
||||
#include "mbed_interface.h"
|
||||
#include "mbed_toolchain.h"
|
||||
#include "mbed_error.h"
|
||||
#include "ETH_MPS2.h"
|
||||
#include "mbed_wait_api.h"
|
||||
|
||||
#define TX_PKT_SIZE 256
|
||||
#define RX_PKT_SIZE 300
|
||||
|
||||
// Types
|
||||
#undef FALSE
|
||||
#undef TRUE
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
|
||||
int smsc9220_check_id(void)
|
||||
{
|
||||
int error;
|
||||
unsigned int id;
|
||||
error = 0;
|
||||
|
||||
id = smsc9220_read_id();
|
||||
|
||||
// If bottom and top halves of the word are the same
|
||||
if (((id >> 16) & 0xFFFF) == (id & 0xFFFF)) {
|
||||
error = 1;
|
||||
return error;
|
||||
}
|
||||
switch (((id >> 16) & 0xFFFF)) {
|
||||
case 0x9220:
|
||||
break;
|
||||
|
||||
default:
|
||||
error = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
int smsc9220_check_macaddress(void)
|
||||
{
|
||||
const unsigned int mac_valid_high = 0xC00A;
|
||||
const unsigned int mac_valid_low = 0x00F70200;
|
||||
unsigned int mac_low;
|
||||
unsigned int mac_high;
|
||||
|
||||
// Read current mac address.
|
||||
smsc9220_mac_regread(SMSC9220_MAC_ADDRH, &mac_high);
|
||||
smsc9220_mac_regread(SMSC9220_MAC_ADDRL, &mac_low);
|
||||
|
||||
// Writing temporary address:
|
||||
smsc9220_mac_regwrite(SMSC9220_MAC_ADDRH, mac_valid_high);
|
||||
smsc9220_mac_regwrite(SMSC9220_MAC_ADDRL, mac_valid_low);
|
||||
|
||||
// Verify write was correct:
|
||||
smsc9220_mac_regread(SMSC9220_MAC_ADDRH, &mac_high);
|
||||
smsc9220_mac_regread(SMSC9220_MAC_ADDRL, &mac_low);
|
||||
|
||||
|
||||
if (mac_high != mac_valid_high || mac_low != mac_valid_low) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void smsc9220_print_mac_registers()
|
||||
{
|
||||
unsigned int read;
|
||||
int i;
|
||||
|
||||
i = 0;
|
||||
read = 0;
|
||||
|
||||
for (i = 1; i <= 0xC; i++) {
|
||||
smsc9220_mac_regread(i, &read);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
void smsc9220_print_phy_registers()
|
||||
{
|
||||
unsigned short read;
|
||||
unsigned int i;
|
||||
|
||||
i = 0;
|
||||
read = 0;
|
||||
for (i = 0; i <= 6; i++) {
|
||||
smsc9220_phy_regread(i, &read);
|
||||
}
|
||||
smsc9220_phy_regread(i = 17, &read);
|
||||
|
||||
smsc9220_phy_regread(i = 18, &read);
|
||||
|
||||
smsc9220_phy_regread(i = 27, &read);
|
||||
|
||||
smsc9220_phy_regread(i = 29, &read);
|
||||
|
||||
smsc9220_phy_regread(i = 30, &read);
|
||||
|
||||
smsc9220_phy_regread(i = 31, &read);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Ethernet Device initialize
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
int ethernet_transmission(unsigned char *pkt, unsigned int length)
|
||||
{
|
||||
smsc9220_xmit_packet(pkt, length);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ethernet_reception(unsigned int *recvbuf, unsigned int *index)
|
||||
{
|
||||
return smsc9220_recv_packet((unsigned int *)recvbuf, index);
|
||||
}
|
||||
|
||||
int ethernet_mac_address(char *mac)
|
||||
{
|
||||
return smsc9220_check_macaddress();
|
||||
}
|
||||
|
||||
unsigned int ethernet_check_ready(void)
|
||||
{
|
||||
return smsc9220_check_ready();
|
||||
}
|
||||
|
||||
unsigned int ethernet_intf()
|
||||
{
|
||||
unsigned int txfifo_inf;
|
||||
|
||||
txfifo_inf = SMSC9220->TX_FIFO_INF;
|
||||
|
||||
return txfifo_inf;
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -1,57 +0,0 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2018 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef MPS2_ETHERNET_API_H
|
||||
#define MPS2_ETHERNET_API_H
|
||||
|
||||
#include "device.h"
|
||||
|
||||
#if DEVICE_ETHERNET
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Connection constants
|
||||
|
||||
// send ethernet write buffer, returning the packet size sent
|
||||
int ethernet_transmission(unsigned char *pkt, unsigned int length);
|
||||
|
||||
// recieve from ethernet buffer, returning packet size, or 0 if no packet
|
||||
int ethernet_reception(unsigned int *recvbuf, unsigned int *index);
|
||||
|
||||
// get the ethernet address
|
||||
int ethernet_mac_address(char *mac);
|
||||
|
||||
unsigned int ethernet_check_ready(void);
|
||||
|
||||
unsigned int ethernet_intf(void);
|
||||
|
||||
int smsc9220_check_id(void);
|
||||
|
||||
int smsc9220_check_macaddress(void);
|
||||
|
||||
void smsc9220_print_mac_registers(void);
|
||||
void smsc9220_print_phy_registers(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,166 +0,0 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2018 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <string.h>
|
||||
|
||||
#include "ethernet_api.h"
|
||||
#include "mps2_ethernet_api.h"
|
||||
#include "cmsis.h"
|
||||
#include "mbed_interface.h"
|
||||
#include "mbed_toolchain.h"
|
||||
#include "mbed_error.h"
|
||||
#include "ETH_MPS2.h"
|
||||
#include "mbed_wait_api.h"
|
||||
|
||||
#define TX_PKT_SIZE 256
|
||||
#define RX_PKT_SIZE 300
|
||||
|
||||
// Types
|
||||
#undef FALSE
|
||||
#undef TRUE
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Ethernet Device initialize
|
||||
*----------------------------------------------------------------------------*/
|
||||
int ethernet_init()
|
||||
{
|
||||
int error;
|
||||
error = 0;
|
||||
|
||||
if (smsc9220_check_id()) {
|
||||
error = TRUE;
|
||||
}
|
||||
|
||||
if (smsc9220_soft_reset()) {
|
||||
error = TRUE;
|
||||
}
|
||||
|
||||
smsc9220_set_txfifo(5);
|
||||
|
||||
// Sets automatic flow control thresholds, and backpressure
|
||||
// threshold to defaults specified.
|
||||
SMSC9220->AFC_CFG = 0x006E3740;
|
||||
|
||||
if (smsc9220_wait_eeprom()) {
|
||||
error = TRUE;
|
||||
}
|
||||
|
||||
// Configure GPIOs as LED outputs.
|
||||
SMSC9220->GPIO_CFG = 0x70070000;
|
||||
|
||||
smsc9220_init_irqs();
|
||||
|
||||
/* Configure MAC addresses here if needed. */
|
||||
|
||||
if (smsc9220_check_phy()) {
|
||||
error = TRUE;
|
||||
}
|
||||
|
||||
if (smsc9220_reset_phy()) {
|
||||
error = TRUE;
|
||||
return error;
|
||||
}
|
||||
|
||||
wait_ms(100);
|
||||
// Checking whether phy reset completed successfully.
|
||||
{
|
||||
unsigned short phyreset;
|
||||
phyreset = 0;
|
||||
smsc9220_phy_regread(SMSC9220_PHY_BCONTROL, &phyreset);
|
||||
if (phyreset & (1 << 15)) {
|
||||
error = TRUE;
|
||||
return error;
|
||||
}
|
||||
}
|
||||
|
||||
/* Advertise capabilities */
|
||||
smsc9220_advertise_cap();
|
||||
|
||||
|
||||
/* Begin to establish link */
|
||||
smsc9220_establish_link(); // bit [12] of BCONTROL seems self-clearing.
|
||||
// Although it's not so in the manual.
|
||||
|
||||
/* Interrupt threshold */
|
||||
SMSC9220->FIFO_INT = 0xFF000000;
|
||||
|
||||
smsc9220_enable_mac_xmit();
|
||||
|
||||
smsc9220_enable_xmit();
|
||||
|
||||
SMSC9220->RX_CFG = 0;
|
||||
|
||||
smsc9220_enable_mac_recv();
|
||||
|
||||
// Rx status FIFO level irq threshold
|
||||
SMSC9220->FIFO_INT &= ~(0xFF); // Clear 2 bottom nibbles
|
||||
|
||||
// This sleep is compulsory otherwise txmit/receive will fail.
|
||||
wait_ms(2000);
|
||||
return error;
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Ethernet Device Uninitialize
|
||||
*----------------------------------------------------------------------------*/
|
||||
void ethernet_free()
|
||||
{
|
||||
}
|
||||
|
||||
int ethernet_write(const char *data, int size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ethernet_send()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ethernet_receive()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Read from an recevied ethernet packet.
|
||||
// After receive returnd a number bigger than 0 it is
|
||||
// possible to read bytes from this packet.
|
||||
// Read will write up to size bytes into data.
|
||||
// It is possible to use read multible times.
|
||||
// Each time read will start reading after the last read byte before.
|
||||
|
||||
int ethernet_read(char *data, int dlen)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ethernet_address(char *mac)
|
||||
{
|
||||
mbed_mac_address(mac);
|
||||
}
|
||||
|
||||
int ethernet_link(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ethernet_set_link(int speed, int duplex)
|
||||
{
|
||||
smsc9220_establish_link();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue