Convert USB library from em_int to em_core

pull/5584/head
Steven Cooreman 2017-11-25 13:03:40 +01:00
parent e900d5a04d
commit 2becfbe2e4
5 changed files with 68 additions and 51 deletions

View File

@ -45,8 +45,6 @@
#define EFM32_WEAK SL_WEAK
#define EFM32_ATTRIBUTE_SECTION(X) SL_ATTRIBUTE_SECTION(X)
#include "em_int.h"
#if defined( USB_USE_PRINTF )
#include <stdio.h>
#endif

View File

@ -27,6 +27,7 @@
#if defined( USB_DEVICE )
#include "em_cmu.h"
#include "em_core.h"
#include "em_usbtypes.h"
#include "em_usbhal.h"
#include "em_usbd.h"
@ -69,9 +70,10 @@ static const char *stateNames[] =
******************************************************************************/
void USBD_AbortAllTransfers( void )
{
INT_Disable();
CORE_DECLARE_IRQ_STATE;
CORE_ENTER_CRITICAL();
USBDHAL_AbortAllTransfers( USB_STATUS_EP_ABORTED );
INT_Enable();
CORE_EXIT_CRITICAL();
}
/***************************************************************************//**
@ -85,6 +87,7 @@ int USBD_AbortTransfer( int epAddr )
{
USB_XferCompleteCb_TypeDef callback;
USBD_Ep_TypeDef *ep = USBD_GetEpFromAddr( epAddr );
CORE_DECLARE_IRQ_STATE;
if ( ep == NULL )
{
@ -100,10 +103,10 @@ int USBD_AbortTransfer( int epAddr )
return USB_STATUS_ILLEGAL;
}
INT_Disable();
CORE_ENTER_CRITICAL();
if ( ep->state == D_EP_IDLE )
{
INT_Enable();
CORE_EXIT_CRITICAL();
return USB_STATUS_OK;
}
@ -125,7 +128,7 @@ int USBD_AbortTransfer( int epAddr )
callback( USB_STATUS_EP_ABORTED, ep->xferred, ep->remaining );
}
INT_Enable();
CORE_EXIT_CRITICAL();
return USB_STATUS_OK;
}
@ -139,9 +142,10 @@ int USBD_AbortTransfer( int epAddr )
******************************************************************************/
void USBD_Connect( void )
{
INT_Disable();
CORE_DECLARE_IRQ_STATE;
CORE_ENTER_CRITICAL();
USBDHAL_Connect();
INT_Enable();
CORE_EXIT_CRITICAL();
}
/***************************************************************************//**
@ -154,9 +158,10 @@ void USBD_Connect( void )
******************************************************************************/
void USBD_Disconnect( void )
{
INT_Disable();
CORE_DECLARE_IRQ_STATE;
CORE_ENTER_CRITICAL();
USBDHAL_Disconnect();
INT_Enable();
CORE_EXIT_CRITICAL();
}
/***************************************************************************//**
@ -239,6 +244,7 @@ const char *USBD_GetUsbStateName( USBD_State_TypeDef state )
int USBD_Init( const USBD_Init_TypeDef *p )
{
USBD_Ep_TypeDef *ep;
CORE_DECLARE_IRQ_STATE;
#if !defined( USB_CORECLK_HFRCO ) || !defined( CMU_OSCENCMD_USHFRCOEN )
/* Devices supporting crystal-less USB can use HFRCO or HFXO as core clock. */
@ -308,7 +314,7 @@ int USBD_Init( const USBD_Init_TypeDef *p )
*/
totalRxFifoSize += 10 + 1 + ( 2 * (MAX_NUM_OUT_EPS + 1) );
INT_Disable();
CORE_ENTER_CRITICAL();
/* Enable USB clock */
CMU->HFCORECLKEN0 |= CMU_HFCORECLKEN0_USB | CMU_HFCORECLKEN0_USBC;
@ -339,7 +345,7 @@ int USBD_Init( const USBD_Init_TypeDef *p )
}
else
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Init(), FIFO setup error" );
EFM_ASSERT( false );
return USB_STATUS_ILLEGAL;
@ -356,7 +362,7 @@ int USBD_Init( const USBD_Init_TypeDef *p )
USBD_SetUsbState( USBD_STATE_NONE );
}
INT_Enable();
CORE_EXIT_CRITICAL();
return USB_STATUS_OK;
}
@ -389,6 +395,7 @@ int USBD_Init( const USBD_Init_TypeDef *p )
int USBD_Read( int epAddr, void *data, int byteCount,
USB_XferCompleteCb_TypeDef callback )
{
CORE_DECLARE_IRQ_STATE;
USBD_Ep_TypeDef *ep = USBD_GetEpFromAddr( epAddr );
USB_PRINTF("USBD: Read addr %x, data %p, size %d, cb 0x%lx\n",
@ -416,24 +423,25 @@ int USBD_Read( int epAddr, void *data, int byteCount,
return USB_STATUS_ILLEGAL;
}
INT_Disable();
CORE_ENTER_CRITICAL();
if ( USBDHAL_EpIsStalled( ep ) )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Read(), Endpoint is halted" );
return USB_STATUS_EP_STALLED;
}
if ( ep->state != D_EP_IDLE )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Read(), Endpoint is busy" );
return USB_STATUS_EP_BUSY;
}
if ( ( ep->num > 0 ) && ( USBD_GetUsbState() != USBD_STATE_CONFIGURED ) )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Read(), Device not configured" );
return USB_STATUS_DEVICE_UNCONFIGURED;
}
@ -448,7 +456,7 @@ int USBD_Read( int epAddr, void *data, int byteCount,
}
else if ( ep->in != false )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Read(), Illegal EP direction" );
EFM_ASSERT( false );
return USB_STATUS_ILLEGAL;
@ -458,7 +466,7 @@ int USBD_Read( int epAddr, void *data, int byteCount,
ep->xferCompleteCb = callback;
USBD_ArmEp( ep );
INT_Enable();
CORE_EXIT_CRITICAL();
return USB_STATUS_OK;
}
@ -477,22 +485,26 @@ int USBD_Read( int epAddr, void *data, int byteCount,
******************************************************************************/
int USBD_RemoteWakeup( void )
{
INT_Disable();
CORE_DECLARE_IRQ_STATE;
CORE_ENTER_CRITICAL();
if ( ( dev->state != USBD_STATE_SUSPENDED ) ||
( dev->remoteWakeupEnabled == false ) )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_RemoteWakeup(), Illegal remote wakeup" );
return USB_STATUS_ILLEGAL;
}
USBDHAL_SetRemoteWakeup();
INT_Enable();
CORE_EXIT_CRITICAL();
USBTIMER_DelayMs( 10 );
INT_Disable();
CORE_ENTER_CRITICAL();
USBDHAL_ClearRemoteWakeup();
INT_Enable();
CORE_EXIT_CRITICAL();
return USB_STATUS_OK;
}
@ -565,6 +577,7 @@ void USBD_SetUsbState( USBD_State_TypeDef newState )
int USBD_StallEp( int epAddr )
{
USB_Status_TypeDef retVal;
CORE_DECLARE_IRQ_STATE;
USBD_Ep_TypeDef *ep = USBD_GetEpFromAddr( epAddr );
if ( ep == NULL )
@ -581,9 +594,9 @@ int USBD_StallEp( int epAddr )
return USB_STATUS_ILLEGAL;
}
INT_Disable();
CORE_ENTER_CRITICAL();
retVal = USBDHAL_StallEp( ep );
INT_Enable();
CORE_EXIT_CRITICAL();
if ( retVal != USB_STATUS_OK )
{
@ -626,6 +639,7 @@ void USBD_Stop( void )
int USBD_UnStallEp( int epAddr )
{
USB_Status_TypeDef retVal;
CORE_DECLARE_IRQ_STATE;
USBD_Ep_TypeDef *ep = USBD_GetEpFromAddr( epAddr );
if ( ep == NULL )
@ -642,9 +656,9 @@ int USBD_UnStallEp( int epAddr )
return USB_STATUS_ILLEGAL;
}
INT_Disable();
CORE_ENTER_CRITICAL();
retVal = USBDHAL_UnStallEp( ep );
INT_Enable();
CORE_EXIT_CRITICAL();
if ( retVal != USB_STATUS_OK )
{
@ -678,6 +692,7 @@ int USBD_Write( int epAddr, void *data, int byteCount,
USB_XferCompleteCb_TypeDef callback )
{
USBD_Ep_TypeDef *ep = USBD_GetEpFromAddr( epAddr );
CORE_DECLARE_IRQ_STATE;
USB_PRINTF("USBD: Write addr %x, data %p, size %d, cb 0x%lx\n",
epAddr, data, byteCount, (uint32_t)callback);
@ -704,24 +719,25 @@ int USBD_Write( int epAddr, void *data, int byteCount,
return USB_STATUS_ILLEGAL;
}
INT_Disable();
CORE_ENTER_CRITICAL();
if ( USBDHAL_EpIsStalled( ep ) )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Write(), Endpoint is halted" );
return USB_STATUS_EP_STALLED;
}
if ( ep->state != D_EP_IDLE )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Write(), Endpoint is busy" );
return USB_STATUS_EP_BUSY;
}
if ( ( ep->num > 0 ) && ( USBD_GetUsbState() != USBD_STATE_CONFIGURED ) )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Write(), Device not configured" );
return USB_STATUS_DEVICE_UNCONFIGURED;
}
@ -736,7 +752,7 @@ int USBD_Write( int epAddr, void *data, int byteCount,
}
else if ( ep->in != true )
{
INT_Enable();
CORE_EXIT_CRITICAL();
DEBUG_USB_API_PUTS( "\nUSBD_Write(), Illegal EP direction" );
EFM_ASSERT( false );
return USB_STATUS_ILLEGAL;
@ -746,7 +762,7 @@ int USBD_Write( int epAddr, void *data, int byteCount,
ep->xferCompleteCb = callback;
USBD_ArmEp( ep );
INT_Enable();
CORE_EXIT_CRITICAL();
return USB_STATUS_OK;
}
@ -841,6 +857,7 @@ static void USBD_ResetEndpoints(void)
int USBD_AddEndpoint(int epAddr, int transferType,
int maxPacketSize, int bufferMult)
{
CORE_DECLARE_IRQ_STATE;
USBD_Ep_TypeDef *ep;
numEps++;
@ -890,7 +907,7 @@ int USBD_AddEndpoint(int epAddr, int transferType,
ep->num, numEps, ep->in, ep->addr, ep->type, ep->packetSize, ep->fifoSize,
totalTxFifoSize, totalRxFifoSize);
INT_Disable();
CORE_ENTER_CRITICAL();
#if defined( CMU_OSCENCMD_USHFRCOEN )
/* Happy Gecko workaround: disable LEM GATE mode if using ISOC endpoints. */
if ( transferType == USB_EPTYPE_ISOC )
@ -900,7 +917,7 @@ int USBD_AddEndpoint(int epAddr, int transferType,
#endif
int ret = USBDHAL_ReconfigureFifos(totalRxFifoSize, totalTxFifoSize);
INT_Enable();
CORE_EXIT_CRITICAL();
if( ret != USB_STATUS_OK ) {
return ret;

View File

@ -27,6 +27,7 @@
#if defined( USB_DEVICE )
#include "em_cmu.h"
#include "em_core.h"
#include "em_usbtypes.h"
#include "em_usbhal.h"
#include "em_usbd.h"
@ -106,8 +107,9 @@ void USB_IRQHandler( void )
{
uint32_t status;
bool servedVbusInterrupt = false;
CORE_DECLARE_IRQ_STATE;
INT_Disable();
CORE_ENTER_CRITICAL();
#if ( USB_PWRSAVE_MODE )
if ( USBD_poweredDown )
@ -192,7 +194,7 @@ void USB_IRQHandler( void )
status = USBHAL_GetCoreInts();
if ( status == 0 )
{
INT_Enable();
CORE_EXIT_CRITICAL();
if ( !servedVbusInterrupt )
{
DEBUG_USB_INT_LO_PUTS( "\nSinT" );
@ -209,7 +211,7 @@ void USB_IRQHandler( void )
HANDLE_INT( USB_GINTSTS_IEPINT )
HANDLE_INT( USB_GINTSTS_OEPINT )
INT_Enable();
CORE_EXIT_CRITICAL();
if ( status != 0 )
{

View File

@ -199,9 +199,7 @@ USB_Status_TypeDef USBDHAL_CoreInit( uint32_t totalRxFifoSize,
USB_GUSBCFG_FORCEDEVMODE;
#endif
INT_Enable();
USBTIMER_DelayMs( 50 );
INT_Disable();
/* Set device speed */
USB->DCFG = ( USB->DCFG & ~_USB_DCFG_DEVSPD_MASK ) | 3; /* Full speed PHY */
@ -649,9 +647,7 @@ USB_Status_TypeDef USBHHAL_CoreInit( uint32_t rxFifoSize,
~(GUSBCFG_WO_BITMASK | USB_GUSBCFG_FORCEDEVMODE ) ) |
USB_GUSBCFG_FORCEHSTMODE;
INT_Enable();
USBTIMER_DelayMs( 100 );
INT_Disable();
/* Set 48 MHz PHY clock, FS/LS mode */
USB->HCFG = ( USB->HCFG & ~_USB_HCFG_FSLSPCLKSEL_MASK ) |

View File

@ -25,6 +25,7 @@
#include "em_usb.h"
#if defined( USB_DEVICE ) || defined( USB_HOST )
#include "em_cmu.h"
#include "em_core.h"
#include "em_timer.h"
#include "em_usbtypes.h"
#include "em_usbhal.h"
@ -244,8 +245,9 @@ void USBTIMER_Start( uint32_t id, uint32_t timeout,
{
uint32_t accumulated;
USBTIMER_Timer_TypeDef *this, **last;
CORE_DECLARE_IRQ_STATE;
INT_Disable();
CORE_ENTER_CRITICAL();
if ( timers[ id ].running )
{
@ -255,7 +257,7 @@ void USBTIMER_Start( uint32_t id, uint32_t timeout,
if ( timeout == 0 )
{
callback();
INT_Enable();
CORE_EXIT_CRITICAL();
return;
}
@ -297,7 +299,7 @@ void USBTIMER_Start( uint32_t id, uint32_t timeout,
}
}
INT_Enable();
CORE_EXIT_CRITICAL();
}
/***************************************************************************//**
@ -310,8 +312,9 @@ void USBTIMER_Start( uint32_t id, uint32_t timeout,
void USBTIMER_Stop( uint32_t id )
{
USBTIMER_Timer_TypeDef *this, **last;
CORE_DECLARE_IRQ_STATE;
INT_Disable();
CORE_ENTER_CRITICAL();
if ( head ) /* Queue empty ? */
{
@ -335,7 +338,7 @@ void USBTIMER_Stop( uint32_t id )
}
}
INT_Enable();
CORE_EXIT_CRITICAL();
}
#endif /* ( NUM_QTIMERS > 0 ) */
@ -347,8 +350,9 @@ void USBTIMER_Stop( uint32_t id )
static void TimerTick( void )
{
USBTIMER_Callback_TypeDef cb;
CORE_DECLARE_IRQ_STATE;
INT_Disable();
CORE_ENTER_CRITICAL();
if ( head )
{
@ -372,7 +376,7 @@ static void TimerTick( void )
}
}
INT_Enable();
CORE_EXIT_CRITICAL();
}
/** @endcond */
#endif /* ( NUM_QTIMERS > 0 ) */