mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #1032 from toyowata/master
LPC824, SSCI824 - Add GCC_ARM exporter supportpull/1047/head
Martin Kojtal
commit
29ab478a78
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|
@ -98,16 +98,28 @@ __isr_vector:
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/* LPC824 interrupts */
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.long SPI0_IRQHandler // SPI0 controller
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.long SPI1_IRQHandler // SPI1 controller
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.long 0 // Reserved
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.long UART0_IRQHandler // UART0
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.long UART1_IRQHandler // UART1
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.long UART2_IRQHandler // UART2
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.long I2C_IRQHandler // I2C controller
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.long 0 // Reserved
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.long I2C1_IRQHandler // I2C ch1 controller
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.long I2C0_IRQHandler // I2C ch0 controller
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.long SCT_IRQHandler // Smart Counter Timer
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.long MRT_IRQHandler // Multi-Rate Timer
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.long CMP_IRQHandler // Comparator
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.long WDT_IRQHandler // PIO1 (0:11)
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.long BOD_IRQHandler // Brown Out Detect
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.long Flash_IRQHandler // Flash interrupt
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.long WKT_IRQHandler // Wakeup timer
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.long ADC_SEQA_IRQHandler // ADC sequence A completion
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.long ADC_SEQB_IRQHandler // ADC sequence B completion
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.long ADC_THCMP_IRQHandler // ADC threshold compare
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.long ADC_OVR_IRQHandler // ADC overrun
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.long DMA_IRQHandler // DMA interrupt
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.long I2C2_IRQHandler // I2C2 controller
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.long I2C3_IRQHandler // I2C3 controller
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.long 0 // Reserved
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.long PININT0_IRQHandler // PIO INT0
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.long PININT1_IRQHandler // PIO INT1
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.long PININT2_IRQHandler // PIO INT2
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@ -181,18 +193,28 @@ Reset_Handler:
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_default_handler SPI0_IRQHandler
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def_irq_default_handler SPI1_IRQHandler
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def_irq_default_handler UART0_IRQHandler
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def_irq_default_handler UART1_IRQHandler
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def_irq_default_handler UART2_IRQHandler
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def_irq_default_handler I2C_IRQHandler
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def_irq_default_handler I2C0_IRQHandler
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def_irq_default_handler I2C1_IRQHandler
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def_irq_default_handler I2C2_IRQHandler
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def_irq_default_handler I2C3_IRQHandler
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def_irq_default_handler SCT_IRQHandler
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def_irq_default_handler MRT_IRQHandler
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def_irq_default_handler CMP_IRQHandler
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def_irq_default_handler WDT_IRQHandler
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def_irq_default_handler BOD_IRQHandler
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def_irq_default_handler Flash_IRQHandler
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def_irq_default_handler WKT_IRQHandler
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def_irq_default_handler ADC_SEQA_IRQHandler
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def_irq_default_handler ADC_SEQB_IRQHandler
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def_irq_default_handler ADC_THCMP_IRQHandler
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def_irq_default_handler ADC_OVR_IRQHandler
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def_irq_default_handler DMA_IRQHandler
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def_irq_default_handler PININT0_IRQHandler
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def_irq_default_handler PININT1_IRQHandler
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def_irq_default_handler PININT2_IRQHandler
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@ -0,0 +1,152 @@
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/* Linker script for mbed LPC824-GCC-ARM based on LPC1114-GCC-ARM-LPC1114.ld */
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/* Linker script to configure memory regions. */
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MEMORY
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{
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/* Define each memory region */
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FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x8000 /* 32K bytes */
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RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x2000-0xC0 /* 8K bytes */
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.isr_vector))
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*(.text.Reset_Handler)
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*(.text.SystemInit)
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. = 0x200;
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM
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.bss :
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{
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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__bss_end__ = .;
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} > RAM
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.heap :
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy :
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{
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*(.stack)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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}
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@ -0,0 +1,228 @@
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/* File: startup_ARMCM0.S
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* Purpose: startup file for Cortex-M0 devices. Should use with
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* GCC for ARM Embedded Processors
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* Version: V1.2
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* Date: 15 Nov 2011
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*
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* Copyright (c) 2011, ARM Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
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||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
* Neither the name of the ARM Limited nor the
|
||||
names of its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
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.syntax unified
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.arch armv6-m
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/* Memory Model
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The HEAP starts at the end of the DATA section and grows upward.
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The STACK starts at the end of the RAM and grows downward.
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The HEAP and stack STACK are only checked at compile time:
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(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
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This is just a check for the bare minimum for the Heap+Stack area before
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aborting compilation, it is not the run time limit:
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Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
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*/
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0x80
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0x80
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.space Heap_Size
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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|
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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||||
.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long SVC_Handler /* SVCall Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long PendSV_Handler /* PendSV Handler */
|
||||
.long SysTick_Handler /* SysTick Handler */
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||||
|
||||
/* LPC824 interrupts */
|
||||
.long SPI0_IRQHandler // SPI0 controller
|
||||
.long SPI1_IRQHandler // SPI1 controller
|
||||
.long 0 // Reserved
|
||||
.long UART0_IRQHandler // UART0
|
||||
.long UART1_IRQHandler // UART1
|
||||
.long UART2_IRQHandler // UART2
|
||||
.long 0 // Reserved
|
||||
.long I2C1_IRQHandler // I2C ch1 controller
|
||||
.long I2C0_IRQHandler // I2C ch0 controller
|
||||
.long SCT_IRQHandler // Smart Counter Timer
|
||||
.long MRT_IRQHandler // Multi-Rate Timer
|
||||
.long CMP_IRQHandler // Comparator
|
||||
.long WDT_IRQHandler // PIO1 (0:11)
|
||||
.long BOD_IRQHandler // Brown Out Detect
|
||||
.long Flash_IRQHandler // Flash interrupt
|
||||
.long WKT_IRQHandler // Wakeup timer
|
||||
.long ADC_SEQA_IRQHandler // ADC sequence A completion
|
||||
.long ADC_SEQB_IRQHandler // ADC sequence B completion
|
||||
.long ADC_THCMP_IRQHandler // ADC threshold compare
|
||||
.long ADC_OVR_IRQHandler // ADC overrun
|
||||
.long DMA_IRQHandler // DMA interrupt
|
||||
.long I2C2_IRQHandler // I2C2 controller
|
||||
.long I2C3_IRQHandler // I2C3 controller
|
||||
.long 0 // Reserved
|
||||
.long PININT0_IRQHandler // PIO INT0
|
||||
.long PININT1_IRQHandler // PIO INT1
|
||||
.long PININT2_IRQHandler // PIO INT2
|
||||
.long PININT3_IRQHandler // PIO INT3
|
||||
.long PININT4_IRQHandler // PIO INT4
|
||||
.long PININT5_IRQHandler // PIO INT5
|
||||
.long PININT6_IRQHandler // PIO INT6
|
||||
.long PININT7_IRQHandler // PIO INT7
|
||||
|
||||
.size __isr_vector, . - __isr_vector
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.thumb
|
||||
.thumb_func
|
||||
.align 2
|
||||
.globl Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
/* Loop to copy data from read only memory to RAM. The ranges
|
||||
* of copy from/to are specified by following symbols evaluated in
|
||||
* linker script.
|
||||
* __etext: End of code section, i.e., begin of data sections to copy from.
|
||||
* __data_start__/__data_end__: RAM address range that data should be
|
||||
* copied to. Both must be aligned to 4 bytes boundary. */
|
||||
|
||||
ldr r1, =__etext
|
||||
ldr r2, =__data_start__
|
||||
ldr r3, =__data_end__
|
||||
|
||||
subs r3, r2
|
||||
ble .Lflash_to_ram_loop_end
|
||||
|
||||
movs r4, 0
|
||||
.Lflash_to_ram_loop:
|
||||
ldr r0, [r1,r4]
|
||||
str r0, [r2,r4]
|
||||
adds r4, 4
|
||||
cmp r4, r3
|
||||
blt .Lflash_to_ram_loop
|
||||
.Lflash_to_ram_loop_end:
|
||||
|
||||
ldr r0, =SystemInit
|
||||
blx r0
|
||||
ldr r0, =_start
|
||||
bx r0
|
||||
.pool
|
||||
.size Reset_Handler, . - Reset_Handler
|
||||
|
||||
.text
|
||||
/* Macro to define default handlers. Default handler
|
||||
* will be weak symbol and just dead loops. They can be
|
||||
* overwritten by other handlers */
|
||||
.macro def_default_handler handler_name
|
||||
.align 1
|
||||
.thumb_func
|
||||
.weak \handler_name
|
||||
.type \handler_name, %function
|
||||
\handler_name :
|
||||
b .
|
||||
.size \handler_name, . - \handler_name
|
||||
.endm
|
||||
|
||||
def_default_handler NMI_Handler
|
||||
def_default_handler HardFault_Handler
|
||||
def_default_handler SVC_Handler
|
||||
def_default_handler PendSV_Handler
|
||||
def_default_handler SysTick_Handler
|
||||
def_default_handler Default_Handler
|
||||
|
||||
.macro def_irq_default_handler handler_name
|
||||
.weak \handler_name
|
||||
.set \handler_name, Default_Handler
|
||||
.endm
|
||||
|
||||
def_irq_default_handler SPI0_IRQHandler
|
||||
def_irq_default_handler SPI1_IRQHandler
|
||||
def_irq_default_handler UART0_IRQHandler
|
||||
def_irq_default_handler UART1_IRQHandler
|
||||
def_irq_default_handler UART2_IRQHandler
|
||||
def_irq_default_handler I2C0_IRQHandler
|
||||
def_irq_default_handler I2C1_IRQHandler
|
||||
def_irq_default_handler I2C2_IRQHandler
|
||||
def_irq_default_handler I2C3_IRQHandler
|
||||
def_irq_default_handler SCT_IRQHandler
|
||||
def_irq_default_handler MRT_IRQHandler
|
||||
def_irq_default_handler CMP_IRQHandler
|
||||
def_irq_default_handler WDT_IRQHandler
|
||||
def_irq_default_handler BOD_IRQHandler
|
||||
def_irq_default_handler Flash_IRQHandler
|
||||
def_irq_default_handler WKT_IRQHandler
|
||||
def_irq_default_handler ADC_SEQA_IRQHandler
|
||||
def_irq_default_handler ADC_SEQB_IRQHandler
|
||||
def_irq_default_handler ADC_THCMP_IRQHandler
|
||||
def_irq_default_handler ADC_OVR_IRQHandler
|
||||
def_irq_default_handler DMA_IRQHandler
|
||||
def_irq_default_handler PININT0_IRQHandler
|
||||
def_irq_default_handler PININT1_IRQHandler
|
||||
def_irq_default_handler PININT2_IRQHandler
|
||||
def_irq_default_handler PININT3_IRQHandler
|
||||
def_irq_default_handler PININT4_IRQHandler
|
||||
def_irq_default_handler PININT5_IRQHandler
|
||||
def_irq_default_handler PININT6_IRQHandler
|
||||
def_irq_default_handler PININT7_IRQHandler
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -33,8 +33,8 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
|
|||
('ARCH_PRO', ('ARM', 'GCC_ARM', 'GCC_CR', 'GCC_CS', 'IAR')),
|
||||
('LPC2368', ('ARM', 'GCC_ARM')),
|
||||
('LPC812', ('uARM','IAR')),
|
||||
('LPC824', ('uARM', 'IAR', 'GCC_CR')),
|
||||
('SSCI824', ('uARM',)),
|
||||
('LPC824', ('uARM', 'GCC_ARM', 'IAR', 'GCC_CR')),
|
||||
('SSCI824', ('uARM','GCC_ARM')),
|
||||
('LPC1347', ('ARM','IAR')),
|
||||
('LPC4088', ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
|
||||
('LPC4088_DM', ('ARM', 'GCC_ARM', 'GCC_CR', 'IAR')),
|
||||
|
|
|
|||
|
|
@ -0,0 +1,77 @@
|
|||
# This file was automagically generated by mbed.org. For more information,
|
||||
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
|
||||
|
||||
GCC_BIN =
|
||||
PROJECT = {{name}}
|
||||
OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
|
||||
SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
|
||||
INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
|
||||
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
|
||||
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
|
||||
LINKER_SCRIPT = {{linker_script}}
|
||||
|
||||
###############################################################################
|
||||
AS = $(GCC_BIN)arm-none-eabi-as
|
||||
CC = $(GCC_BIN)arm-none-eabi-gcc
|
||||
CPP = $(GCC_BIN)arm-none-eabi-g++
|
||||
LD = $(GCC_BIN)arm-none-eabi-gcc
|
||||
OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
|
||||
OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
|
||||
SIZE = $(GCC_BIN)arm-none-eabi-size
|
||||
|
||||
CPU = -mcpu=cortex-m0plus -mthumb
|
||||
CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
|
||||
CC_FLAGS += -MMD -MP
|
||||
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
|
||||
|
||||
LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -Wl,--wrap,main
|
||||
LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
|
||||
LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CC_FLAGS += -DDEBUG -O0
|
||||
else
|
||||
CC_FLAGS += -DNDEBUG -Os
|
||||
endif
|
||||
|
||||
all: $(PROJECT).bin $(PROJECT).hex
|
||||
|
||||
clean:
|
||||
rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
|
||||
|
||||
.s.o:
|
||||
$(AS) $(CPU) -o $@ $<
|
||||
|
||||
.c.o:
|
||||
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
|
||||
|
||||
.cpp.o:
|
||||
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
|
||||
|
||||
|
||||
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
|
||||
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
|
||||
@echo ""
|
||||
@echo "*****"
|
||||
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
|
||||
@echo "*****"
|
||||
@echo ""
|
||||
$(SIZE) $@
|
||||
|
||||
$(PROJECT).bin: $(PROJECT).elf
|
||||
@$(OBJCOPY) -O binary $< $@
|
||||
|
||||
$(PROJECT).hex: $(PROJECT).elf
|
||||
@$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
$(PROJECT).lst: $(PROJECT).elf
|
||||
@$(OBJDUMP) -Sdh $< > $@
|
||||
|
||||
lst: $(PROJECT).lst
|
||||
|
||||
size:
|
||||
$(SIZE) $(PROJECT).elf
|
||||
|
||||
DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
|
||||
-include $(DEPS)
|
||||
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
# This file was automagically generated by mbed.org. For more information,
|
||||
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
|
||||
|
||||
GCC_BIN =
|
||||
PROJECT = {{name}}
|
||||
OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
|
||||
SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
|
||||
INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
|
||||
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
|
||||
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
|
||||
LINKER_SCRIPT = {{linker_script}}
|
||||
|
||||
###############################################################################
|
||||
AS = $(GCC_BIN)arm-none-eabi-as
|
||||
CC = $(GCC_BIN)arm-none-eabi-gcc
|
||||
CPP = $(GCC_BIN)arm-none-eabi-g++
|
||||
LD = $(GCC_BIN)arm-none-eabi-gcc
|
||||
OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
|
||||
OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
|
||||
SIZE = $(GCC_BIN)arm-none-eabi-size
|
||||
|
||||
CPU = -mcpu=cortex-m0plus -mthumb
|
||||
CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer
|
||||
CC_FLAGS += -MMD -MP
|
||||
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
|
||||
|
||||
LD_FLAGS = $(CPU) -Wl,--gc-sections --specs=nano.specs -Wl,--wrap,main
|
||||
LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref
|
||||
LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CC_FLAGS += -DDEBUG -O0
|
||||
else
|
||||
CC_FLAGS += -DNDEBUG -Os
|
||||
endif
|
||||
|
||||
all: $(PROJECT).bin $(PROJECT).hex
|
||||
|
||||
clean:
|
||||
rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS)
|
||||
|
||||
.s.o:
|
||||
$(AS) $(CPU) -o $@ $<
|
||||
|
||||
.c.o:
|
||||
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
|
||||
|
||||
.cpp.o:
|
||||
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $<
|
||||
|
||||
|
||||
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
|
||||
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
|
||||
@echo ""
|
||||
@echo "*****"
|
||||
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
|
||||
@echo "*****"
|
||||
@echo ""
|
||||
$(SIZE) $@
|
||||
|
||||
$(PROJECT).bin: $(PROJECT).elf
|
||||
@$(OBJCOPY) -O binary $< $@
|
||||
|
||||
$(PROJECT).hex: $(PROJECT).elf
|
||||
@$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
$(PROJECT).lst: $(PROJECT).elf
|
||||
@$(OBJDUMP) -Sdh $< > $@
|
||||
|
||||
lst: $(PROJECT).lst
|
||||
|
||||
size:
|
||||
$(SIZE) $(PROJECT).elf
|
||||
|
||||
DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
|
||||
-include $(DEPS)
|
||||
|
||||
|
|
@ -40,6 +40,8 @@ class GccArm(Exporter):
|
|||
'LPC11U35_401',
|
||||
'LPC11U35_501',
|
||||
'LPC11U37H_401',
|
||||
'LPC824',
|
||||
'SSCI824',
|
||||
'STM32F407',
|
||||
'DISCO_F100RB',
|
||||
'DISCO_F051R8',
|
||||
|
|
|
|||
|
|
@ -156,6 +156,8 @@ if __name__ == '__main__':
|
|||
('gcc_arm', 'LPC11U35_501'),
|
||||
('gcc_arm', 'LPCCAPPUCCINO'),
|
||||
('gcc_arm', 'LPC2368'),
|
||||
('gcc_arm', 'LPC824'),
|
||||
('gcc_arm', 'SSCI824'),
|
||||
|
||||
('gcc_arm', 'STM32F407'),
|
||||
('gcc_arm', 'DISCO_F100RB'),
|
||||
|
|
@ -195,8 +197,8 @@ if __name__ == '__main__':
|
|||
('iar', 'MTS_MDOT_F405RG'),
|
||||
('iar', 'MTS_MDOT_F411RE'),
|
||||
|
||||
|
||||
(None, None),
|
||||
# Removed following item to avoid script error
|
||||
#(None, None),
|
||||
]:
|
||||
print '\n=== Exporting to "%s::%s" ===' % (toolchain, target)
|
||||
test_export(toolchain, target)
|
||||
|
|
|
|||
|
|
@ -280,7 +280,7 @@ class SSCI824(LPCTarget):
|
|||
LPCTarget.__init__(self)
|
||||
self.core = "Cortex-M0+"
|
||||
self.extra_labels = ['NXP', 'LPC82X']
|
||||
self.supported_toolchains = ["uARM"]
|
||||
self.supported_toolchains = ["uARM", "GCC_ARM"]
|
||||
self.default_toolchain = "uARM"
|
||||
self.is_disk_virtual = True
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue