mirror of https://github.com/ARMmbed/mbed-os.git
CMSIS/RTX: Pre-processor defines used for assembly
CMSIS repo does not support pre-processor defines, hence multiple assembly files are added for secure/non-secure and floating point tools. Mbed OS tools support assembly file pre-processing, but the build system does not support multiple assembly files for each target, hence updating the assembly files.pull/6273/head
parent
b88254809e
commit
287121ffdc
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@ -23,8 +23,8 @@
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; */
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; */
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#ifndef MBED_FAULT_HANDLER_DISABLED
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#ifndef MBED_FAULT_HANDLER_DISABLED
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#ifndef __DOMAIN_NS
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#ifndef DOMAIN_NS
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#define __DOMAIN_NS 1
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#define DOMAIN_NS 1
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#endif
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#endif
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FAULT_TYPE_HARD_FAULT EQU 0x10
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FAULT_TYPE_HARD_FAULT EQU 0x10
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@ -67,7 +67,7 @@ UsageFault_Handler\
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Fault_Handler PROC
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Fault_Handler PROC
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EXPORT Fault_Handler
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EXPORT Fault_Handler
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#if (__DOMAIN_NS == 1)
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#if (DOMAIN_NS == 1)
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IMPORT osRtxInfo
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IMPORT osRtxInfo
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IMPORT mbed_fault_handler
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IMPORT mbed_fault_handler
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IMPORT mbed_fault_context
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IMPORT mbed_fault_context
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@ -26,8 +26,8 @@
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.file "except.S"
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.file "except.S"
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.syntax unified
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.syntax unified
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#ifndef __DOMAIN_NS
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#ifndef DOMAIN_NS
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#define __DOMAIN_NS 1
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#define DOMAIN_NS 1
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#endif
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#endif
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.equ FAULT_TYPE_HARD_FAULT, 0x10
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.equ FAULT_TYPE_HARD_FAULT, 0x10
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@ -103,7 +103,7 @@ UsageFault_Handler:
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.cantunwind
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.cantunwind
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Fault_Handler:
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Fault_Handler:
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#if (__DOMAIN_NS == 1)
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#if (DOMAIN_NS == 1)
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MRS R0,MSP
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MRS R0,MSP
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LDR R1,=0x4
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LDR R1,=0x4
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MOV R2,LR
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MOV R2,LR
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@ -31,8 +31,8 @@ FAULT_TYPE_USAGE_FAULT EQU 0x40
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#ifndef MBED_FAULT_HANDLER_DISABLED
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#ifndef MBED_FAULT_HANDLER_DISABLED
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#ifndef __DOMAIN_NS
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#ifndef DOMAIN_NS
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#define __DOMAIN_NS 1
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#define DOMAIN_NS 1
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#endif
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#endif
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PRESERVE8
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PRESERVE8
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SECTION .rodata:DATA:NOROOT(2)
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SECTION .rodata:DATA:NOROOT(2)
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@ -62,7 +62,7 @@ UsageFault_Handler
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Fault_Handler
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Fault_Handler
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EXPORT Fault_Handler
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EXPORT Fault_Handler
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#if (__DOMAIN_NS == 1)
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#if (DOMAIN_NS == 1)
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IMPORT osRtxInfo
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IMPORT osRtxInfo
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IMPORT mbed_fault_context
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IMPORT mbed_fault_context
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IMPORT mbed_fault_handler
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IMPORT mbed_fault_handler
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@ -24,9 +24,9 @@
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; */
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; */
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IF :LNOT::DEF:DOMAIN_NS
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#ifndef DOMAIN_NS
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DOMAIN_NS EQU 0
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DOMAIN_NS EQU 0
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ENDIF
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#endif
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I_T_RUN_OFS EQU 20 ; osRtxInfo.thread.run offset
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I_T_RUN_OFS EQU 20 ; osRtxInfo.thread.run offset
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TCB_SM_OFS EQU 48 ; TCB.stack_mem offset
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TCB_SM_OFS EQU 48 ; TCB.stack_mem offset
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@ -24,15 +24,13 @@
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; */
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; */
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IF :LNOT::DEF:DOMAIN_NS
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#ifndef DOMAIN_NS
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DOMAIN_NS EQU 0
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DOMAIN_NS EQU 0
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ENDIF
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#endif
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IF ({FPU}="FPv5-SP") || ({FPU}="FPv5_D16")
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#ifndef __FPU_USED
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__FPU_USED EQU 1
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ELSE
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__FPU_USED EQU 0
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__FPU_USED EQU 0
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ENDIF
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#endif
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I_T_RUN_OFS EQU 20 ; osRtxInfo.thread.run offset
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I_T_RUN_OFS EQU 20 ; osRtxInfo.thread.run offset
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TCB_SM_OFS EQU 48 ; TCB.stack_mem offset
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TCB_SM_OFS EQU 48 ; TCB.stack_mem offset
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@ -27,9 +27,9 @@
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.file "irq_armv8mbl.S"
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.file "irq_armv8mbl.S"
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.syntax unified
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.syntax unified
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.ifndef DOMAIN_NS
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#ifndef DOMAIN_NS
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.equ DOMAIN_NS, 0
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.equ DOMAIN_NS, 0
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.endif
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#endif
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.equ I_T_RUN_OFS, 20 // osRtxInfo.thread.run offset
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.equ I_T_RUN_OFS, 20 // osRtxInfo.thread.run offset
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.equ TCB_SM_OFS, 48 // TCB.stack_mem offset
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.equ TCB_SM_OFS, 48 // TCB.stack_mem offset
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@ -27,13 +27,13 @@
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.file "irq_armv8mml.S"
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.file "irq_armv8mml.S"
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.syntax unified
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.syntax unified
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.ifndef DOMAIN_NS
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#ifndef DOMAIN_NS
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.equ DOMAIN_NS, 0
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.equ DOMAIN_NS, 0
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.endif
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#endif
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.ifndef __FPU_USED
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#ifndef __FPU_USED
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.equ __FPU_USED, 0
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.equ __FPU_USED, 0
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.endif
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#endif
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.equ I_T_RUN_OFS, 20 // osRtxInfo.thread.run offset
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.equ I_T_RUN_OFS, 20 // osRtxInfo.thread.run offset
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.equ TCB_SM_OFS, 48 // TCB.stack_mem offset
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.equ TCB_SM_OFS, 48 // TCB.stack_mem offset
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