diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h
index 6f19f105b2..1b5791ecb0 100644
--- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h
+++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/drivers/include/nrfx_qspi.h
@@ -106,7 +106,9 @@ typedef struct
     .io2_level = false,                    \
     .io3_level = false,                    \
     .wipwait   = false,                    \
-    .wren      = false                     \
+    .wren      = false,                    \
+    .lfen      = false,                    \
+    .lfstop    = false                     \
 }
 
 /**
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h
index c6970e4a42..a5c39d1b2c 100644
--- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h
+++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_SDK_15_0/modules/nrfx/hal/nrf_qspi.h
@@ -228,6 +228,8 @@ typedef struct
     bool                  io3_level; /**< I/O line level during transmission. */
     bool                  wipwait;   /**< Wait if a Wait in Progress bit is set in the memory status byte. */
     bool                  wren;      /**< Send write enable before instruction. */
+    bool                  lfen;      /**< Enable long frame mode. */
+    bool                  lfstop;    /**< Stop long frame mode. */
 } nrf_qspi_cinstr_conf_t;
 
 /**
@@ -764,7 +766,9 @@ __STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type *
                          ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) |
                          ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) |
                          ((uint32_t)p_config->wipwait   << QSPI_CINSTRCONF_WIPWAIT_Pos) |
-                         ((uint32_t)p_config->wren      << QSPI_CINSTRCONF_WREN_Pos));
+                         ((uint32_t)p_config->wren      << QSPI_CINSTRCONF_WREN_Pos) |
+                         ((uint32_t)p_config->lfen      << QSPI_CINSTRCONF_LFEN_Pos) |
+                         ((uint32_t)p_config->lfstop    << QSPI_CINSTRCONF_LFSTOP_Pos) );
 }
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION