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IAR exporter: extended debugger settings template with modifiable options needed for Nordic targets.

pull/4134/head
Głąbek, Andrzej 2017-03-08 11:06:35 +01:00 committed by Anna Bridge
parent 85db457b9e
commit 2658bdb113
3 changed files with 14 additions and 5 deletions
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3
tools/export/iar/__init__.py
View File

@ -78,6 +78,9 @@ class IAR(Exporter):
"FPU2": 0, "FPU2": 0,
"NrRegs": 0, "NrRegs": 0,
"NEON": '', "NEON": '',
"CExtraOptionsCheck": 0,
"CExtraOptions": "",
"CMSISDAPJtagSpeedList": 0,
} }
iar_defaults.update(device_info) iar_defaults.update(device_info)

6
tools/export/iar/ewd.tmpl
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@ -57,11 +57,11 @@
</option> </option>
<option> <option>
<name>CExtraOptionsCheck</name> <name>CExtraOptionsCheck</name>
<state>0</state> <state>{{device.CExtraOptionsCheck}}</state>
</option> </option>
<option> <option>
<name>CExtraOptions</name> <name>CExtraOptions</name>
<state></state> <state>{{device.CExtraOptions}}</state>
</option> </option>
<option> <option>
<name>CFpuProcessor</name> <name>CFpuProcessor</name>
@ -365,7 +365,7 @@
<option> <option>
<name>CMSISDAPJtagSpeedList</name> <name>CMSISDAPJtagSpeedList</name>
<version>0</version> <version>0</version>
<state>0</state> <state>{{device.CMSISDAPJtagSpeedList}}</state>
</option> </option>
<option> <option>
<name>CMSISDAPBreakpointRadio</name> <name>CMSISDAPBreakpointRadio</name>

10
tools/export/iar/iar_definitions.json
View File

@ -42,7 +42,10 @@
"OGChipSelectEditMenu": "STM32F072RB\tST STM32F072RB" "OGChipSelectEditMenu": "STM32F072RB\tST STM32F072RB"
}, },
"nRF51822_xxAA": { "nRF51822_xxAA": {
"OGChipSelectEditMenu": "nRF51822-QFAA\tNordicSemi nRF51822-QFAA" "OGChipSelectEditMenu": "nRF51822-QFAA\tNordicSemi nRF51822-QFAA",
"CExtraOptionsCheck": 1,
"CExtraOptions": "--drv_vector_table_base=0x0",
"CMSISDAPJtagSpeedList": 10
}, },
"EFM32GG990F1024": { "EFM32GG990F1024": {
"OGChipSelectEditMenu": "EFM32GG990F1024\tSiliconLaboratories EFM32GG990F1024" "OGChipSelectEditMenu": "EFM32GG990F1024\tSiliconLaboratories EFM32GG990F1024"
@ -163,7 +166,10 @@
"OGChipSelectEditMenu": "STM32F407VG\tST STM32F407VG" "OGChipSelectEditMenu": "STM32F407VG\tST STM32F407VG"
}, },
"nRF52832_xxAA":{ "nRF52832_xxAA":{
"OGChipSelectEditMenu": "nRF52832-xxAA\tNordicSemi nRF52832-xxAA" "OGChipSelectEditMenu": "nRF52832-xxAA\tNordicSemi nRF52832-xxAA",
"CExtraOptionsCheck": 1,
"CExtraOptions": "--drv_vector_table_base=0x0",
"CMSISDAPJtagSpeedList": 10
}, },
"NCS36510":{ "NCS36510":{
"OGChipSelectEditMenu": "NCS36510\tONSemiconductor NCS36510" "OGChipSelectEditMenu": "NCS36510\tONSemiconductor NCS36510"