Refactor CYW43xxx wi-fi driver to better work with CMake and move code out of the Portenta target folder (#292)

* Refactor Cypress WHD wifi & bluetooth drivers to work better with CMake and be vendor agnostic

* Fix some missed changes that belong in the other branch

* Fix build of Cypress targets that use the RTOS adapter.  Make it possible to build Cypress targets in baremetal mode via CMake.

* Try and fix check failures

* Fix a couple unintentional changes
pull/15530/head
Jamie Smith 2024-07-05 01:12:21 -07:00 committed by GitHub
parent de882e6e09
commit 25dbf7c5fd
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
107 changed files with 855 additions and 3072 deletions

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@ -86,9 +86,6 @@
"NUVOTON": {
"idle-thread-stack-size-debug-extra": 512
},
"MCU_PSOC6_M4": {
"target.macros_add": ["CY_RTOS_AWARE"]
},
"ARM_MUSCA_B1": {
"mutex-num": 4
},

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@ -5,6 +5,10 @@ if("PSOC6" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(TARGET_PSOC6)
endif()
if("STM32H747_ARDUINO" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(TARGET_STM32H747_ARDUINO)
endif()
add_subdirectory(firmware)
target_include_directories(mbed-ble

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@ -1,4 +1,7 @@
# Copyright (c) 2020 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_subdirectory(firmware)
target_sources(mbed-ble
PRIVATE
cy_bt_cordio_cfg.cpp
)

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@ -13,6 +13,10 @@ if("4343W" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(COMPONENT_4343W)
endif()
if("4343W_FS" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(COMPONENT_4343W_FS)
endif()
if("CYW9P62S1_43012EVB_01" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(TARGET_CYW9P62S1_43012EVB_01)
endif()

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@ -31,10 +31,6 @@ elseif("Silicon_Labs" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(TARGET_Silicon_Labs)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(COMPONENT_WHD)
endif()
target_link_libraries(mbed-emac
PUBLIC
mbed-netsocket-api

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@ -1,144 +1,11 @@
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_subdirectory(whd-bsp-integration EXCLUDE_FROM_ALL)
# If not running on a Cypress chip, we need to build the CyHAL support library.
if(NOT "Cypress" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(minimal-cyhal)
endif()
add_library(mbed-cy-psoc6-whd-43012 STATIC EXCLUDE_FROM_ALL)
target_include_directories(mbed-cy-psoc6-whd-43012
PUBLIC
wifi-host-driver/resources/firmware/COMPONENT_43012
)
target_sources(mbed-cy-psoc6-whd-43012
PRIVATE
wifi-host-driver/resources/firmware/COMPONENT_43012/43012C0-mfgtest_bin.c
wifi-host-driver/resources/firmware/COMPONENT_43012/43012C0-mfgtest_clm_blob.c
wifi-host-driver/resources/firmware/COMPONENT_43012/43012C0_bin.c
wifi-host-driver/resources/firmware/COMPONENT_43012/43012C0_clm_blob.c
)
add_library(mbed-cy-psoc6-whd-43438 STATIC EXCLUDE_FROM_ALL)
target_include_directories(mbed-cy-psoc6-whd-43438
PUBLIC
wifi-host-driver/resources/firmware/COMPONENT_43438
)
target_sources(mbed-cy-psoc6-whd-43438
PRIVATE
wifi-host-driver/resources/firmware/COMPONENT_43438/43438A1-mfgtest_bin.c
wifi-host-driver/resources/firmware/COMPONENT_43438/43438A1-mfgtest_clm_blob.c
wifi-host-driver/resources/firmware/COMPONENT_43438/43438A1_bin.c
wifi-host-driver/resources/firmware/COMPONENT_43438/43438A1_clm_blob.c
)
add_library(mbed-cy-psoc6-whd-4343w STATIC EXCLUDE_FROM_ALL)
target_include_directories(mbed-cy-psoc6-whd-4343w
PUBLIC
wifi-host-driver/resources/firmware/COMPONENT_4343W
)
target_sources(mbed-cy-psoc6-whd-4343w
PRIVATE
wifi-host-driver/resources/firmware/COMPONENT_4343W/4343WA1-mfgtest_bin.c
wifi-host-driver/resources/firmware/COMPONENT_4343W/4343WA1-mfgtest_clm_blob.c
wifi-host-driver/resources/firmware/COMPONENT_4343W/4343WA1_bin.c
wifi-host-driver/resources/firmware/COMPONENT_4343W/4343WA1_clm_blob.c
)
add_library(mbed-cy8ckit-062s2-43012-whd INTERFACE)
target_include_directories(mbed-cy8ckit-062s2-43012-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_062S2_43012)
add_library(mbed-cy8ckit-062s2-4343w-whd INTERFACE)
target_include_directories(mbed-cy8ckit-062s2-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_062S2_4343W)
add_library(mbed-cy8ckit-062-4343w-whd INTERFACE)
target_include_directories(mbed-cy8ckit-062-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_062_4343W)
add_library(mbed-cy8ckit-062-wifi-bt-whd INTERFACE)
target_include_directories(mbed-cy8ckit-062-wifi-bt-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_062_WIFI_BT)
add_library(mbed-cy8ckit-064s1-4343w-whd INTERFACE)
target_include_directories(mbed-cy8ckit-064s1-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_064S1_4343W)
add_library(mbed-cy8ckit-064s2-4343w-whd INTERFACE)
target_include_directories(mbed-cy8ckit-064s2-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_064S2_4343W)
add_library(mbed-cy8cmod-062s2-43012-whd INTERFACE)
target_include_directories(mbed-cy8cmod-062s2-43012-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CMOD_062S2_43012)
add_library(mbed-cy8cmod-062s3-4343w-whd INTERFACE)
target_include_directories(mbed-cy8cmod-062s3-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CMOD_062S3_4343W)
add_library(mbed-cy8cmod-062-4343w-whd INTERFACE)
target_include_directories(mbed-cy8cmod-062-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CMOD_062_4343W)
add_library(mbed-cy8cproto-062s3-4343w-whd INTERFACE)
target_include_directories(mbed-cy8cproto-062s3-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CPROTO_062S3_4343W)
add_library(mbed-cy8cproto-062-4343w-whd INTERFACE)
target_include_directories(mbed-cy8cproto-062-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CPROTO_062_4343W)
add_library(mbed-cytfm-064b0s2-4343w-whd INTERFACE)
target_include_directories(mbed-cytfm-064b0s2-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CYTFM_064B0S2_4343W)
add_library(mbed-cyw943012p6evb-01-whd INTERFACE)
target_include_directories(mbed-cyw943012p6evb-01-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CYW943012P6EVB_01)
add_library(mbed-cyw943012wcd2-whd INTERFACE)
target_include_directories(mbed-cyw943012wcd2-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CYW943012WCD2)
add_library(mbed-cyw9p62s1-43012car-01-whd INTERFACE)
target_include_directories(mbed-cyw9p62s1-43012car-01-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CYW9P62S1_43012CAR_01)
add_library(mbed-cyw9p62s1-43012evb-01-whd INTERFACE)
target_include_directories(mbed-cyw9p62s1-43012evb-01-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CYW9P62S1_43012EVB_01)
add_library(mbed-cyw9p62s1-43438evb-01-whd INTERFACE)
target_include_directories(mbed-cyw9p62s1-43438evb-01-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CYW9P62S1_43438EVB_01)
add_library(mbed-cy8ckit-064b0s2-4343w-whd INTERFACE)
target_include_directories(mbed-cy8ckit-064b0s2-4343w-whd INTERFACE wifi-host-driver/resources/nvram/TARGET_CY8CKIT_064B0S2_4343W)
add_library(mbed-cy-psoc6-whd STATIC EXCLUDE_FROM_ALL)
target_include_directories(mbed-cy-psoc6-whd
PUBLIC
wifi-host-driver
wifi-host-driver/inc
wifi-host-driver/resources/resource_imp
wifi-host-driver/src
wifi-host-driver/src/include
wifi-host-driver/src/bus_protocols
)
target_sources(mbed-cy-psoc6-whd
PRIVATE
wifi-host-driver/resources/resource_imp/whd_resources.c
wifi-host-driver/src/whd_ap.c
wifi-host-driver/src/whd_buffer_api.c
wifi-host-driver/src/whd_cdc_bdc.c
wifi-host-driver/src/whd_chip.c
wifi-host-driver/src/whd_chip_constants.c
wifi-host-driver/src/whd_clm.c
wifi-host-driver/src/whd_debug.c
wifi-host-driver/src/whd_events.c
wifi-host-driver/src/whd_logging.c
wifi-host-driver/src/whd_management.c
wifi-host-driver/src/whd_network_if.c
wifi-host-driver/src/whd_resource_if.c
wifi-host-driver/src/whd_sdpcm.c
wifi-host-driver/src/whd_thread.c
wifi-host-driver/src/whd_utils.c
wifi-host-driver/src/whd_wifi.c
wifi-host-driver/src/whd_wifi_api.c
wifi-host-driver/src/whd_wifi_p2p.c
wifi-host-driver/src/bus_protocols/whd_bus.c
wifi-host-driver/src/bus_protocols/whd_bus_common.c
wifi-host-driver/src/bus_protocols/whd_bus_sdio_protocol.c
wifi-host-driver/src/bus_protocols/whd_bus_spi_protocol.c
)
target_compile_definitions(mbed-cy-psoc6-whd
PUBLIC
MBED_CONF_CY_PSOC6_WHD_PRESENT=1
)
add_subdirectory(whd-bsp-integration)
add_subdirectory(wifi-host-driver)
add_subdirectory(whd_mac)

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@ -1,6 +1,6 @@
{
"name": "cy_psoc6_whd",
"config": {
"present": 1
"present": 1
}
}

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@ -0,0 +1,41 @@
# Copyright (c) 2024 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
# In order to use the Cypress WHD driver, we need some level of Cypress HAL functionality available.
# However, for non-Cypress chips, these functions aren't available from the target code.
# This directory contains a minimal implementation of Cypress HAL designed to work on generic chips.
# Note that currently some of this has to be implemented on a per-target level, as Mbed
# does not have an SDIO HAL API. Hopefully this can be fixed someday...
add_library(mbed-minimal-cyhal STATIC
cy_hal.c
cyhal_spi.c
cyhal_system.c
cyhal_gpio.cpp
wiced_filesystem.cpp)
target_include_directories(mbed-minimal-cyhal PUBLIC .)
target_link_libraries(mbed-minimal-cyhal PUBLIC
mbed-core-flags
mbed-cy-rtos-abstraction)
# This is needed in order to make cybsp_wifi.h include cycfg.h
target_compile_definitions(mbed-minimal-cyhal PUBLIC COMPONENT_CUSTOM_DESIGN_MODUS)
# This is needed in order to make cyabs_rtos_internal.h include cyhal.h
target_compile_definitions(mbed-minimal-cyhal PUBLIC CY_USING_HAL)
if(STM32H7 IN_LIST MBED_TARGET_LABELS)
target_sources(mbed-minimal-cyhal PRIVATE
TARGET_STM32H7/cyhal_sdio.c)
target_include_directories(mbed-minimal-cyhal PUBLIC TARGET_STM32H7)
if(STM32H747_ARDUINO IN_LIST MBED_TARGET_LABELS)
target_include_directories(mbed-minimal-cyhal PUBLIC TARGET_STM32H7/TARGET_STM32H747_ARDUINO)
target_sources(mbed-minimal-cyhal PRIVATE
TARGET_STM32H7/TARGET_STM32H747_ARDUINO/wiced_filesystem_setup.cpp)
target_link_libraries(mbed-minimal-cyhal PRIVATE
mbed-storage-qspif
mbed-storage-blockdevice
mbed-storage-fat)
endif()
endif()

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@ -22,7 +22,6 @@
#ifndef __WHD_CONFIG__
#define __WHD_CONFIG__
#include "whd_types.h"
#include "stm32h7xx_hal.h"
#include <stdint.h>
@ -39,12 +38,12 @@
#define CYBSP_WIFI_HOST_WAKE_IRQ_EVENT CYHAL_GPIO_IRQ_FALL
#define CYBSP_WIFI_HOST_WAKE CYBSP_SDIO_OOB_IRQ
#define BSP_LED1 {GPIOK,{.Pin= GPIO_PIN_5 , .Mode = GPIO_MODE_OUTPUT_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_LOW}}
#define BSP_LED2 {GPIOK,{.Pin= GPIO_PIN_6 , .Mode = GPIO_MODE_OUTPUT_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_LOW}}
#define BSP_LED3 {GPIOK,{.Pin= GPIO_PIN_7 , .Mode = GPIO_MODE_OUTPUT_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_LOW}}
// Wifi firmware settings
#define WIFI_DEFAULT_FIRMWARE_PATH "/wlan/4343WA1.BIN"
#define WIFI_DEFAULT_MOUNT_NAME "wlan"
#define WIFI_DEFAULT_PARTITION 1
#define WIFI_DEFAULT_FS 0
/* power pin */
#define WIFI_WL_REG_ON {GPIOJ,{.Pin= GPIO_PIN_1, .Mode = GPIO_MODE_OUTPUT_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_LOW}}
//#define WIFI_32K_CLK {GPIOA,{.Pin= GPIO_PIN_8, .Mode = GPIO_MODE_AF_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_LOW , .Alternate = GPIO_AF0_MCO}}
#define WIFI_SDIO_CMD {GPIOD,{.Pin= GPIO_PIN_2 , .Mode = GPIO_MODE_AF_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_VERY_HIGH, .Alternate = GPIO_AF12_SDIO1}}
@ -53,6 +52,19 @@
#define WIFI_SDIO_D1 {GPIOC,{.Pin= GPIO_PIN_9 , .Mode = GPIO_MODE_AF_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_VERY_HIGH, .Alternate = GPIO_AF12_SDIO1}}
#define WIFI_SDIO_D2 {GPIOC,{.Pin= GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_VERY_HIGH, .Alternate = GPIO_AF12_SDIO1}}
#define WIFI_SDIO_D3 {GPIOC,{.Pin= GPIO_PIN_11, .Mode = GPIO_MODE_AF_PP , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_VERY_HIGH, .Alternate = GPIO_AF12_SDIO1}}
#define WIFI_SDIO_OOB_IRQ {GPIOJ,{.Pin= GPIO_PIN_5, .Mode = GPIO_MODE_IT_FALLING , .Pull = GPIO_NOPULL , .Speed= GPIO_SPEED_FREQ_VERY_HIGH}}
#ifdef TARGET_ARDUINO_GIGA
#define WIFI_SDIO_OOB_IRQ PI_8
#define WIFI_WL_REG_ON PB_10
#define BSP_LED1 PI_12
#define BSP_LED2 PE_3
#define BSP_LED3 PJ_13
#elif TARGET_ARDUINO_PORTENTA
#define WIFI_SDIO_OOB_IRQ PJ_5
#define WIFI_WL_REG_ON PJ_1
#define BSP_LED1 PK_5
#define BSP_LED2 PK_6
#define BSP_LED3 PK_7
#endif
#endif

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@ -0,0 +1,107 @@
/*
* Copyright 2024 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <wiced_filesystem.h>
#include <minimal_cyhal_config.h>
#include <mbed-target-config.h>
#include <mbed_error.h>
#include <QSPIFBlockDevice.h>
#include <MBRBlockDevice.h>
#include <FATFileSystem.h>
MBED_WEAK void wiced_filesystem_mount_error(void)
{
error("Failed to mount the filesystem containing the WiFi firmware.\n\r");
}
MBED_WEAK void wiced_filesystem_firmware_error(void)
{
error("WICED wifi module firmware not found at path " WIFI_DEFAULT_FIRMWARE_PATH " on the external block device. Perhaps it needs to be installed via your board's instructions?\n\r");
}
MBED_WEAK wiced_result_t whd_firmware_check_hook(const char *mounted_name, int mount_err)
{
DIR *dir;
struct dirent *ent;
std::string dir_name(mounted_name);
if (mount_err) {
wiced_filesystem_mount_error();
} else {
if ((dir = opendir(mounted_name)) != NULL) {
// print all the files and directories within directory
while ((ent = readdir(dir)) != NULL) {
std::string fullname = "/" + dir_name + "/" + std::string(ent->d_name);
if (fullname == WIFI_DEFAULT_FIRMWARE_PATH) {
closedir(dir);
return WICED_SUCCESS;
}
}
closedir(dir);
}
wiced_filesystem_firmware_error();
}
return WICED_ERROR;
}
wiced_result_t wiced_filesystem_setup()
{
static QSPIFBlockDevice *qspi_bd = nullptr;
static mbed::MBRBlockDevice *mbr_bd = nullptr;
static mbed::FATFileSystem *wifi_fs = nullptr;
// First initialize QSPI flash
if(qspi_bd == nullptr)
{
qspi_bd = new QSPIFBlockDevice(); // default settings OK thanks to JSON configuration
if(qspi_bd->init() != mbed::BD_ERROR_OK)
{
delete qspi_bd;
qspi_bd = nullptr;
return WICED_ERROR;
}
}
// Then initialize MBR block device on it
if(mbr_bd == nullptr)
{
mbr_bd = new mbed::MBRBlockDevice(qspi_bd, WIFI_DEFAULT_PARTITION);
if(mbr_bd->init() != mbed::BD_ERROR_OK)
{
delete mbr_bd;
mbr_bd = nullptr;
return WICED_ERROR;
}
}
// Finally initialize FAT file system on MBR partition
if(wifi_fs == nullptr)
{
wifi_fs = new mbed::FATFileSystem(WIFI_DEFAULT_MOUNT_NAME);
if(wifi_fs->mount(mbr_bd) != mbed::BD_ERROR_OK)
{
whd_firmware_check_hook(WIFI_DEFAULT_MOUNT_NAME, true);
delete mbr_bd;
mbr_bd = nullptr;
return WICED_ERROR;
}
}
whd_firmware_check_hook(WIFI_DEFAULT_MOUNT_NAME, false);
return WICED_SUCCESS;
}

View File

@ -21,10 +21,20 @@
#include <stdio.h>
#include <string.h>
#include "whd_thread.h"
#include "bus_protocols/whd_bus_sdio_protocol.h"
#include <inttypes.h>
#include "cyabs_rtos.h"
#include "cyhal_sdio.h"
#include <cyhal.h>
#include <minimal_cyhal_config.h>
// Debug print control
#define SDIO_DEBUG 0
#if SDIO_DEBUG
#define SDIO_PRINT_DEBUG(...) printf(__VA_ARGS__)
#else
#define SDIO_PRINT_DEBUG(...)
#endif
#define SDIO_RESPONSE_SHORT SDMMC_RESPONSE_SHORT
#define SDIO_WAIT_NO SDMMC_WAIT_NO
@ -63,18 +73,69 @@
#define LINK_MTU 1024
#define MAX(a,b) (a>b)?a:b
extern pinconfig_t PinConfig[];
/* D-cache maintenance for DMA buffers */
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
#define _CYHAL_DCACHE_MAINTENANCE
#define _CYHAL_DMA_BUFFER_ALIGN_BYTES (32u)
#else
#define _CYHAL_DMA_BUFFER_ALIGN_BYTES (4u)
#endif /* defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) */
/* Macro to ALIGN */
#if defined (__ARMCC_VERSION) /* ARM Compiler */
#define ALIGN_HAL_COMMON(buf, x) __align(x) buf
#elif defined (__GNUC__) /* GNU Compiler */
#define ALIGN_HAL_COMMON(buf, x) buf __attribute__ ((aligned (x)))
#elif defined (__ICCARM__) /* IAR Compiler */
#define ALIGN_HAL_COMMON(buf, x) __ALIGNED(x) buf
#endif
/* Macro to get variable aligned for cache maintenance purpose */
#define CYHAL_ALIGN_DMA_BUFFER(arg) ALIGN_HAL_COMMON(arg, _CYHAL_DMA_BUFFER_ALIGN_BYTES)
/* Pin configuration */
typedef struct
{
GPIO_TypeDef *port;
GPIO_InitTypeDef config;
} sdio_pinconfig_t;
sdio_pinconfig_t SDIOPinConfig[] = {
[CYBSP_WIFI_SDIO_CMD] = WIFI_SDIO_CMD,
[CYBSP_WIFI_SDIO_CLK] = WIFI_SDIO_CLK,
[CYBSP_WIFI_SDIO_D0 ] = WIFI_SDIO_D0,
[CYBSP_WIFI_SDIO_D1 ] = WIFI_SDIO_D1,
[CYBSP_WIFI_SDIO_D2 ] = WIFI_SDIO_D2,
[CYBSP_WIFI_SDIO_D3 ] = WIFI_SDIO_D3,
};
extern SD_HandleTypeDef hsd;
// Copied from whd_bus_sdio_protocol.h
typedef struct
{
unsigned int count : 9; /* 0-8 */
unsigned int register_address : 17; /* 9-25 */
unsigned int op_code : 1; /* 26 */
unsigned int block_mode : 1; /* 27 */
unsigned int function_number : 3; /* 28-30 */
unsigned int rw_flag : 1; /* 31 */
} whd_bus_sdio_cmd53_argument_t;
typedef union
{
uint32_t value;
whd_bus_sdio_cmd53_argument_t cmd53;
} sdio_cmd_argument_t;
/* for debug prints only */
//static int num = 0;
static uint32_t dctrl;
static whd_driver_t whd_handler;
static void* irq_handler_arg;
static cyhal_sdio_irq_handler_t sdio_irq_handler;
static uint8_t temp_dma_buffer[2048] __attribute__((aligned(8)));
CYHAL_ALIGN_DMA_BUFFER(static uint8_t temp_dma_buffer[2048]);
static uint8_t *user_data;
static uint32_t user_data_size;
static uint8_t *dma_data_source;
@ -86,7 +147,7 @@ static volatile uint32_t sdio_transfer_failed = 0;
static volatile uint32_t irqstatus = 0;
static int current_command = 0;
static cy_rslt_t sdio_enable_high_speed(void)
cy_rslt_t sdio_enable_high_speed(void)
{
SDMMC_InitTypeDef sdio_init_structure;
@ -150,27 +211,29 @@ static void sdio_prepare_data_transfer(cyhal_transfer_t direction, uint32_t bloc
dma_transfer_size = (uint32_t)(((data_size + (uint16_t) block_size - 1) / (uint16_t) block_size) * (uint16_t) block_size);
if (direction == CYHAL_WRITE) {
#if !(defined(DUAL_CORE) && defined(CORE_CM4))
SCB_CleanDCache_by_Addr((uint32_t *)dma_data_source, data_size + 32);
#endif
memcpy(temp_dma_buffer, data, data_size);
dma_data_source = temp_dma_buffer;
} else {
dma_data_source = (uint8_t *)temp_dma_buffer;
//VIKR
//memset(dma_data_source,0x12,data_size);
#if !(defined(DUAL_CORE) && defined(CORE_CM4))
/* Cache-Invalidate the output from DMA */
SCB_CleanDCache_by_Addr((uint32_t *)dma_data_source, data_size + 32);
#endif
dma_data_source = (uint8_t *) temp_dma_buffer;
}
SDIO->DTIMER = (uint32_t) 0xFFFFFFFF;
SDIO->DLEN = dma_transfer_size;
#ifdef _CYHAL_DCACHE_MAINTENANCE
if (direction == CYHAL_WRITE)
{
SCB_CleanDCache_by_Addr((uint32_t*)dma_data_source, block_size * dma_transfer_size);
}
else
{
/* Cache-Invalidate the output from DMA */
SCB_InvalidateDCache_by_Addr((uint32_t*)dma_data_source,
data_size + __SCB_DCACHE_LINE_SIZE);
}
#endif
SDMMC1->DTIMER = (uint32_t) 0xFFFFFFFF;
SDMMC1->DLEN = dma_transfer_size;
dctrl = sdio_get_blocksize(block_size) | ((direction == CYHAL_READ) ? SDIO_TRANSFER_DIR_TO_SDIO : SDIO_TRANSFER_DIR_TO_CARD) | SDIO_TRANSFER_MODE_BLOCK | SDIO_DPSM_DISABLE | SDIO_DCTRL_SDIOEN;
SDIO->DCTRL = dctrl;
SDMMC1->DCTRL = dctrl;
SDMMC1->IDMACTRL = SDMMC_ENABLE_IDMA_SINGLE_BUFF;
SDMMC1->IDMABASE0 = (uint32_t) dma_data_source;
@ -178,46 +241,50 @@ static void sdio_prepare_data_transfer(cyhal_transfer_t direction, uint32_t bloc
static void sdio_enable_bus_irq(void)
{
SDMMC1->MASK = SDMMC_IT_RXOVERR | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND | SDMMC_IT_CMDREND | SDMMC_IT_CMDSENT;
SDMMC1->MASK = SDIO_ERROR_MASK | SDMMC_IT_DATAEND | SDMMC_IT_CMDREND | SDMMC_IT_CMDSENT;
}
static void sdio_disable_bus_irq(void)
{
SDMMC1->MASK = 0;
}
void SDMMC1_IRQHandler(void)
{
uint32_t intstatus = SDIO->STA;
/* Check whether the external interrupt was triggered */
if (intstatus & SDMMC_STA_SDIOIT) {
/* Clear the interrupt */
SDMMC1->ICR = SDMMC_STA_SDIOIT;
/* Inform WICED WWD thread */
sdio_irq_handler(irq_handler_arg, CYHAL_SDIO_CARD_INTERRUPT);
}
irqstatus = intstatus;
//VIKR | SDIO_STA_STBITERR )
if ((intstatus & (SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR)) != 0) {
WPRINT_WHD_DEBUG(("sdio error flagged\n"));
sdio_transfer_failed = intstatus;
if ((intstatus & SDIO_ERROR_MASK) != 0) {
sdio_transfer_failed = true;
SDIO->ICR = (uint32_t) 0xffffffff;
cy_rtos_set_semaphore(&sdio_transfer_finished_semaphore, WHD_TRUE);
cy_rtos_set_semaphore(&sdio_transfer_finished_semaphore, true);
} else {
if ((intstatus & (SDMMC_STA_CMDREND | SDMMC_STA_CMDSENT)) != 0) {
if ((SDMMC1->RESP1 & 0x800) != 0) {
sdio_transfer_failed = irqstatus;
cy_rtos_set_semaphore(&sdio_transfer_finished_semaphore, WHD_TRUE);
sdio_transfer_failed = true;
cy_rtos_set_semaphore(&sdio_transfer_finished_semaphore, true);
}
/* Clear all command/response interrupts */
SDMMC1->ICR = (SDMMC_STA_CMDREND | SDMMC_STA_CMDSENT);
}
/* Check whether the external interrupt was triggered */
if (intstatus & SDMMC_STA_SDIOIT) {
/* Clear the interrupt */
SDMMC1->ICR = SDMMC_STA_SDIOIT;
/* Inform WICED WWD thread */
sdio_irq_handler(whd_handler, CYHAL_SDIO_CARD_INTERRUPT);
}
if (intstatus & SDMMC_STA_DATAEND) {
SDMMC1->ICR = SDMMC_STA_DATAEND;
SDMMC1->DLEN = 0;
SDMMC1->DCTRL = SDMMC_DCTRL_SDIOEN;
SDMMC1->IDMACTRL = SDMMC_DISABLE_IDMA;
SDMMC1->CMD = 0;
cy_rtos_set_semaphore(&sdio_transfer_finished_semaphore, WHD_TRUE);
sdio_transfer_failed = false;
cy_rtos_set_semaphore(&sdio_transfer_finished_semaphore, true);
}
}
}
@ -237,12 +304,12 @@ cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk,
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_SDMMC1_CLK_ENABLE();
HAL_GPIO_Init(PinConfig[cmd].port, &PinConfig[cmd].config);
HAL_GPIO_Init(PinConfig[clk].port, &PinConfig[clk].config);
HAL_GPIO_Init(PinConfig[data0].port, &PinConfig[data0].config);
HAL_GPIO_Init(PinConfig[data1].port, &PinConfig[data1].config);
HAL_GPIO_Init(PinConfig[data2].port, &PinConfig[data2].config);
HAL_GPIO_Init(PinConfig[data3].port, &PinConfig[data3].config);
HAL_GPIO_Init(SDIOPinConfig[cmd].port, &SDIOPinConfig[cmd].config);
HAL_GPIO_Init(SDIOPinConfig[clk].port, &SDIOPinConfig[clk].config);
HAL_GPIO_Init(SDIOPinConfig[data0].port, &SDIOPinConfig[data0].config);
HAL_GPIO_Init(SDIOPinConfig[data1].port, &SDIOPinConfig[data1].config);
HAL_GPIO_Init(SDIOPinConfig[data2].port, &SDIOPinConfig[data2].config);
HAL_GPIO_Init(SDIOPinConfig[data3].port, &SDIOPinConfig[data3].config);
/* Reset SDIO Block */
SDMMC_PowerState_OFF(SDMMC1);
@ -252,14 +319,6 @@ cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk,
/* Enable the SDIO Clock */
__HAL_RCC_SDMMC1_CLK_ENABLE();
#if !(defined(DUAL_CORE) && defined(CORE_CM4))
/* Disable DCache for STM32H7 family */
SCB_CleanDCache();
SCB_DisableDCache();
#endif
WPRINT_WHD_DEBUG(("in init: %p\n", sdio_transfer_finished_semaphore));
// Lower speed configuration
SDMMC_InitTypeDef sdio_init_structure;
@ -286,14 +345,12 @@ cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk,
HAL_NVIC_EnableIRQ((IRQn_Type) SDMMC1_IRQn);
HAL_NVIC_SetPriority(SDMMC1_IRQn, 5, 0);
WPRINT_WHD_DEBUG(("after enable sdio: %p\n", sdio_transfer_finished_semaphore));
if (cy_rtos_init_semaphore(&sdio_transfer_finished_semaphore, 1, 0) != WHD_SUCCESS) {
if (cy_rtos_init_semaphore(&sdio_transfer_finished_semaphore, 1, 0) != CY_RSLT_SUCCESS) {
cy_rtos_deinit_semaphore(&sdio_transfer_finished_semaphore);
return -1;
}
WPRINT_WHD_DEBUG(("cy_rtos_init_semaphore: %p\n", sdio_transfer_finished_semaphore));
SDIO_PRINT_DEBUG("cy_rtos_init_semaphore: %p\n", sdio_transfer_finished_semaphore);
return ret;
}
@ -312,62 +369,59 @@ cy_rslt_t cyhal_sdio_send_cmd(const cyhal_sdio_t *obj, cyhal_transfer_t directio
{
uint32_t loop_count = 0;
cy_rslt_t result;
uint16_t attempts = 0;
uint32_t temp_sta;
uint32_t sta_value;
if (response != NULL) {
*response = 0;
}
current_command = 0;
restart:
SDIO->ICR = (uint32_t) 0xFFFFFFFF;
++attempts;
/* Check if we've tried too many times */
if (attempts >= (uint16_t) BUS_LEVEL_MAX_RETRIES) {
/* WWD_SDIO_RETRIES_EXCEEDED */
result = -1;
goto exit;
}
/* Send the command */
SDIO->ARG = argument;
SDIO->CMD = (uint32_t)(command | SDIO_RESPONSE_SHORT | SDIO_WAIT_NO | SDIO_CPSM_ENABLE);
loop_count = (uint32_t) COMMAND_FINISHED_CMD52_TIMEOUT_LOOPS;
do {
temp_sta = SDIO->STA;
sta_value = SDIO->STA;
loop_count--;
if (loop_count == 0 /*|| ((response != NULL) && ((temp_sta & SDIO_ERROR_MASK) != 0))*/) {
WPRINT_WHD_DEBUG(("Restart single access loop count %ld stat %lx\n", loop_count, temp_sta));
if (loop_count == 0 || (sta_value & SDIO_ERROR_MASK) != 0) {
HAL_Delay(10U);
goto restart;
}
} while ((temp_sta & SDIO_FLAG_CMDACT) != 0);
} while ((sta_value & SDIO_FLAG_CMDACT) != 0);
if(command == CYHAL_SDIO_CMD_GO_IDLE_STATE && (sta_value & SDMMC_STA_CTIMEOUT_Msk))
{
// OK, CMD0 always seems to generate a timeout on STM32
}
else if(command == CYHAL_SDIO_CMD_IO_SEND_OP_COND && (sta_value & SDMMC_STA_CCRCFAIL))
{
// OK, CMD5 always generates a CRC error on STM32
}
else if((sta_value & SDIO_ERROR_MASK) != 0)
{
printf("Warning: SDIO CMD%d failed with STA register 0x%" PRIx32 ".\n", command, sta_value);
}
if (response != NULL) {
*response = SDIO->RESP1;
result = CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, 2);
}
result = CY_RSLT_SUCCESS;
exit:
if (result) {
WPRINT_WHD_ERROR(("SDIO->POWER %lx \n", SDIO->POWER));
WPRINT_WHD_ERROR(("SDIO->CLKCR %lx \n", SDIO->CLKCR));
WPRINT_WHD_ERROR(("result %lx \n", result));
WPRINT_WHD_ERROR(("cyhal_sdio_send_cmd %s\n", (result == 0) ? "Passed" : "Failed"));
while (1);
}
SDMMC1->CMD = 0;
//WPRINT_WHD_DEBUG(("%d %s cmd 0x%x arg 0x%x resp 0x%x\n",num++,(direction!=CYHAL_READ)?"Write":"Read",command,argument,(response)?*response:0));
SDIO_PRINT_DEBUG("%s cmd%d arg 0x%" PRIx32 " resp 0x%" PRIx32"\n",
(direction!=CYHAL_READ)?"Write":"Read",
command,
argument,
(response)?*response:0);
return result;
}
cy_rslt_t cyhal_sdio_bulk_transfer(cyhal_sdio_t *obj, cyhal_transfer_t direction, uint32_t argument, const uint32_t *data, uint16_t length, uint32_t *response)
{
cy_rslt_t result;
uint16_t attempts = 0;
uint32_t block_size = 64;
sdio_cmd_argument_t arg;
uint32_t cmd;
@ -375,28 +429,17 @@ cy_rslt_t cyhal_sdio_bulk_transfer(cyhal_sdio_t *obj, cyhal_transfer_t direction
current_transfer_direction = direction;
arg.value = argument;
sdio_enable_bus_irq();
if (response != NULL) {
*response = 0;
}
restart:
sdio_transfer_failed = 0;
SDMMC1->ICR = (uint32_t) 0xFFFFFFFF;
++attempts;
/* Check if we've tried too many times */
if (attempts >= (uint16_t) BUS_LEVEL_MAX_RETRIES) {
/* WWD_SDIO_RETRIES_EXCEEDED */
WPRINT_WHD_ERROR(("Too much attempt\n"));
result = -1;
goto exit;
}
/* Dodgy STM32 hack to set the CMD53 byte mode size to be the same as the block size */
if (arg.cmd53.block_mode == 0) {
block_size = find_optimal_block_size(arg.cmd53.count);
if (block_size < SDIO_512B_BLOCK) {
if (block_size < 512) {
arg.cmd53.count = block_size;
} else {
arg.cmd53.count = 0;
@ -409,48 +452,60 @@ restart:
/* Prepare the SDIO for a data transfer */
sdio_prepare_data_transfer(direction, block_size, (uint8_t *) data, (uint32_t) length);
// Once the transfer is set up, enable IRQs, as the STAR.CMDREND flag could still have been
// set from an earlier transfer, but it appears to clear by this point.
sdio_enable_bus_irq();
/* Send the command */
//WPRINT_WHD_DEBUG(("%d bs=%d argument=%x\n",num++,block_size,argument));
SDMMC1->ARG = argument;
cmd = (uint32_t)(SDIO_CMD_53 | SDMMC_RESPONSE_SHORT | SDMMC_WAIT_NO | SDMMC_CPSM_ENABLE | SDMMC_CMD_CMDTRANS);
SDMMC1->CMD = cmd;
/* Wait for the whole transfer to complete */
//WPRINT_WHD_DEBUG(("cy_rtos_get_semaphore: %d\n", sdio_transfer_finished_semaphore));
result = cy_rtos_get_semaphore(&sdio_transfer_finished_semaphore, 50, WHD_FALSE);
result = cy_rtos_get_semaphore(&sdio_transfer_finished_semaphore, 50, false);
if (result != CY_RSLT_SUCCESS) {
WPRINT_WHD_ERROR(("failed getting semaphore\n"));
goto exit;
if(result == CY_RTOS_TIMEOUT) {
printf("Warning: SDIO bulk transfer timed out, STA register is 0x%" PRIx32 ".\n", SDMMC1->STA);
} else {
printf("Warning: SDIO bulk transfer semaphore acquire failure, error 0x%" PRIx32 ".\n", result);
}
result = CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, 3);
}
if (sdio_transfer_failed) {
WPRINT_WHD_DEBUG(("try again sdio_transfer_failed %"PRIu32" irq %"PRIu32"\n", sdio_transfer_failed, irqstatus));
goto restart;
}
/* Check if there were any SDIO errors */
if ((SDIO->STA & (SDIO_STA_DTIMEOUT | SDIO_STA_CTIMEOUT)) != 0) {
WPRINT_WHD_DEBUG(("sdio errors SDIO_STA_DTIMEOUT | SDIO_STA_CTIMEOUT\n"));
goto restart;
} else if (((SDIO->STA & (SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR)) != 0)) {
WPRINT_WHD_DEBUG(("sdio errors SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | SDIO_STA_TXUNDERR | SDIO_STA_RXOVER \n"));
goto restart;
printf("Warning: SDIO bulk transfer failed with STA register 0x%" PRIx32 ".\n", irqstatus);
result = CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, 2);
}
if (direction == CYHAL_READ) {
#ifdef _CYHAL_DCACHE_MAINTENANCE
SCB_CleanInvalidateDCache_by_Addr(
(uint32_t*)((uint32_t)dma_data_source & ~(__SCB_DCACHE_LINE_SIZE - 1U)),
user_data_size + __SCB_DCACHE_LINE_SIZE);
#endif /* if defined(_CYHAL_DCACHE_MAINTENANCE) */
memcpy(user_data, dma_data_source, (size_t) user_data_size);
}
if (response != NULL) {
*response = SDIO->RESP1;
}
result = CY_RSLT_SUCCESS;
exit:
SDMMC1->CMD = 0;
sdio_disable_bus_irq();
//WPRINT_WHD_DEBUG(("%d %s cmd 53 argument %lx datasize %d blocknumber 0x%x cmdis %lx %lu dctrl = %x\n", num++, (direction != CYHAL_READ) ? "Write" : "Read", argument, length, arg.cmd53.count, cmd, cmd, dctrl));
SDIO_PRINT_DEBUG("%s cmd53 arg 0x%" PRIx32 " datasize 0x%" PRIx16" blocknumber 0x%x resp 0x%" PRIx32"\n",
(direction!=CYHAL_READ)?"Write":"Read",
argument,
length,
arg.cmd53.count,
(response)?*response:0);
return result;
// TODO driver is NOT happy if I remove this sleep
osDelay(1);
return CY_RSLT_SUCCESS;
}
cy_rslt_t cyhal_sdio_transfer_async(cyhal_sdio_t *obj, cyhal_transfer_t direction, uint32_t argument, const uint32_t *data, uint16_t length)
@ -472,7 +527,7 @@ cy_rslt_t cyhal_sdio_abort_async(const cyhal_sdio_t *obj)
void cyhal_sdio_register_callback(cyhal_sdio_t *obj, cyhal_sdio_irq_handler_t handler, void *handler_arg)
{
whd_handler = (whd_driver_t)handler_arg;
irq_handler_arg = handler_arg;
sdio_irq_handler = handler;
}

View File

@ -22,26 +22,10 @@
#include "mbed_thread.h"
#include "mbed_wait_api.h"
#include <minimal_cyhal_config.h>
static cyhal_sdio_t sdio_obj;
/* Edit Pin configuration */
const pinconfig_t PinConfig[] = {
[CYBSP_WIFI_WL_REG_ON] = WIFI_WL_REG_ON,
#ifdef CYBSP_WIFI_32K_CLK
[CYBSP_WIFI_32K_CLK] = WIFI_32K_CLK,
#endif /* CYBSP_WIFI_32K_CLK */
[CYBSP_LED1 ] = BSP_LED1,
[CYBSP_LED2 ] = BSP_LED2,
[CYBSP_WIFI_SDIO_CMD] = WIFI_SDIO_CMD,
[CYBSP_WIFI_SDIO_CLK] = WIFI_SDIO_CLK,
[CYBSP_WIFI_SDIO_D0 ] = WIFI_SDIO_D0,
[CYBSP_WIFI_SDIO_D1 ] = WIFI_SDIO_D1,
[CYBSP_WIFI_SDIO_D2 ] = WIFI_SDIO_D2,
[CYBSP_WIFI_SDIO_D3 ] = WIFI_SDIO_D3,
[CYBSP_SDIO_OOB_IRQ ] = WIFI_SDIO_OOB_IRQ //VIKR
};
void Cy_SysLib_Delay(uint32_t milliseconds)
{
thread_sleep_for(milliseconds);

View File

@ -15,6 +15,4 @@
* limitations under the License.
*/
/** @file
* Empty file to be compliant with Cypress COMPONENT_WHD
*/
#include "minimal_cyhal_config.h"

View File

@ -15,10 +15,11 @@
* limitations under the License.
*/
#pragma once
/** @file
* Provides cyhal porting to generic mbed APIs
*/
#include "whd_config.h"
#include "cyhal_hw_types.h"
#include "cyhal_gpio.h"
#include "cyhal_sdio.h"
@ -40,7 +41,7 @@ typedef enum
CYBSP_WIFI_SDIO_D2,
CYBSP_WIFI_SDIO_D3,
CYBSP_SDIO_OOB_IRQ,
CYBSP_WIFI_MAX,
MINIMAL_CYHAL_NUM_PINS,
} wwd_sdio_pin_t;
void cyhal_system_delay_ms(uint32_t milliseconds);

View File

@ -22,15 +22,18 @@
#include <stdio.h>
#include "cyhal.h"
#include "cybsp.h"
#include "mbed.h"
#include "wiced_filesystem.h"
#include "drivers/DigitalIn.h"
#include "drivers/InterruptIn.h"
extern pinconfig_t PinConfig[];
#include <minimal_cyhal_config.h>
/*******************************************************************************
* Internal
*******************************************************************************/
static mbed::InterruptIn *oob_irq;
static mbed::InterruptIn * interruptIns[MINIMAL_CYHAL_NUM_PINS] = {};
static mbed::DigitalOut * digitalOuts[MINIMAL_CYHAL_NUM_PINS] = {};
static cyhal_gpio_event_t oob_event = CYHAL_GPIO_IRQ_FALL;
static cyhal_gpio_event_callback_t oob_handler;
static void *oob_handler_arg;
@ -46,21 +49,43 @@ static void cb()
/*******************************************************************************
* HAL Implementation
*******************************************************************************/
cy_rslt_t cyhal_gpio_init(cyhal_gpio_t pin, cyhal_gpio_direction_t direction, cyhal_gpio_drive_mode_t drvMode, bool initVal)
{
cy_rslt_t ret = CY_RSLT_SUCCESS;
// Workaround to enable GPIOJ clock
if (pin == CYBSP_WIFI_WL_REG_ON) {
__HAL_RCC_GPIOJ_CLK_ENABLE();
// Ensure FS and BlockDevice are initialized on time if needed
wiced_filesystem_init();
// Find pin name
PinName pinName;
switch(pin)
{
case CYBSP_WIFI_WL_REG_ON:
pinName = WIFI_WL_REG_ON;
break;
case CYBSP_LED1:
pinName = BSP_LED1;
break;
case CYBSP_LED2:
pinName = BSP_LED2;
break;
case CYBSP_SDIO_OOB_IRQ:
pinName = WIFI_SDIO_OOB_IRQ;
break;
default:
return CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, 1);
}
// Ignore the parameter and take the pin config directly from a static array defintions
HAL_GPIO_Init(PinConfig[pin].port, &PinConfig[pin].config);
if (direction == CYHAL_GPIO_DIR_OUTPUT) {
HAL_GPIO_WritePin(PinConfig[pin].port, PinConfig[pin].config.Pin, (initVal) ? GPIO_PIN_SET : GPIO_PIN_RESET);
// Ignore the parameter and take the pin config directly from a static array definitions.
// For the purposes of the wifi driver, pins are only initialized as digital out or interrupt in,
// so we just need to handle those two use cases.
if(direction == CYHAL_GPIO_DIR_OUTPUT)
{
digitalOuts[pin] = new mbed::DigitalOut(pinName, initVal);
}
else
{
interruptIns[pin] = new mbed::InterruptIn(pinName);
}
// Workaround to initialize sdio interface without cypress bsp init
if (pin == CYBSP_WIFI_WL_REG_ON) {
cyhal_sdio_t *sdio_p = cybsp_get_wifi_sdio_obj();
@ -71,13 +96,12 @@ cy_rslt_t cyhal_gpio_init(cyhal_gpio_t pin, cyhal_gpio_direction_t direction, cy
void cyhal_gpio_write(cyhal_gpio_t pin, bool value)
{
HAL_GPIO_WritePin(PinConfig[pin].port, PinConfig[pin].config.Pin, (value) ? GPIO_PIN_SET : GPIO_PIN_RESET);
digitalOuts[pin]->write(value);
}
void cyhal_gpio_register_callback(cyhal_gpio_t pin, cyhal_gpio_event_callback_t handler, void *handler_arg)
{
if (handler && handler_arg && (oob_irq == NULL)) {
oob_irq = new mbed::InterruptIn(PJ_5);
if (handler && handler_arg) {
oob_handler = handler;
oob_handler_arg = handler_arg;
}
@ -88,17 +112,22 @@ void cyhal_gpio_enable_event(cyhal_gpio_t pin, cyhal_gpio_event_t event, uint8_t
oob_event = event;
if (enable) {
if (event == CYHAL_GPIO_IRQ_RISE) {
oob_irq->rise(cb);
interruptIns[pin]->rise(cb);
}
if (event == CYHAL_GPIO_IRQ_FALL) {
oob_irq->fall(cb);
interruptIns[pin]->fall(cb);
}
} else if (oob_irq != NULL) {
delete oob_irq;
interruptIns[pin]->enable_irq();
} else {
interruptIns[pin]->disable_irq();
}
}
void cyhal_gpio_free(cyhal_gpio_t pin)
{
// Do nothing
// Delete any objects associated with the pins
delete interruptIns[pin];
interruptIns[pin] = nullptr;
delete digitalOuts[pin];
digitalOuts[pin] = nullptr;
}

View File

@ -85,6 +85,7 @@
#include <stdbool.h>
#include "cy_result.h"
#include "cyhal_hw_types.h"
#include <PinNames.h>
#if defined(__cplusplus)
extern "C" {

View File

@ -40,8 +40,9 @@
#pragma once
#include <stdbool.h>
#include "stm32h7xx_hal.h"
#include "PinNames.h"
#include <stdint.h>
#include "minimal_cyhal_config.h"
/*
#include "TODO: Port specific header file"
@ -66,13 +67,6 @@ extern "C" {
typedef int32_t cyhal_gpio_t;
/** GPIO object */
typedef struct
{
GPIO_TypeDef *port;
GPIO_InitTypeDef config;
} pinconfig_t;
/** Clock divider object */
typedef struct
{
@ -103,19 +97,6 @@ typedef struct
} cyhal_spi_t;
#include "whd_debug.h"
#if defined(WPRINT_ENABLE_WHD_ERROR) || defined(WPRINT_ENABLE_WHD_INFO) || defined(WPRINT_ENABLE_WHD_DEBUG)
/** \} group_hal_hw_types_data_structures */
#define PRINTF(...) do { \
(void) printf(__VA_ARGS__); \
} while (0)
#else
#define PRINTF(...)
#endif
#include "whd_config.h"
#if defined(__cplusplus)
}
#endif /* __cplusplus */

View File

@ -26,4 +26,5 @@
cy_rslt_t cyhal_spi_transfer(cyhal_spi_t *obj, const uint8_t *tx, size_t tx_length, uint8_t *rx, size_t rx_length, uint8_t write_fill)
{
// Do nothing
return CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_HAL, 1);
}

View File

@ -1,5 +1,5 @@
/*
* Copyright 2020 Arduino SA
* Copyright 2024 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@ -15,6 +15,21 @@
* limitations under the License.
*/
/** @file
* Empty file to be compliant with Cypress COMPONENT_WHD
*/
#include "cyhal_system.h"
#include "mbed_critical.h"
uint32_t cyhal_system_critical_section_enter(void)
{
bool were_interrupts_enabled = !core_util_in_critical_section();
core_util_critical_section_enter();
return were_interrupts_enabled;
}
void cyhal_system_critical_section_exit(uint32_t old_state)
{
(void)old_state;
core_util_critical_section_exit();
}

View File

@ -0,0 +1,54 @@
/*
* Copyright 2020 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#pragma once
#include <stdint.h>
#include "cyhal.h"
#if defined(__cplusplus)
extern "C" {
#endif
/** Enter a critical section
*
* Disables interrupts and returns a value indicating whether the interrupts were previously
* enabled.
*
* @return Returns the state before entering the critical section. This value must be provided
* to \ref cyhal_system_critical_section_exit() to properly restore the state
*
* See \ref subsection_system_snippet1 for code snippet on critical section
*/
uint32_t cyhal_system_critical_section_enter(void);
/** Exit a critical section
*
* Re-enables the interrupts if they were enabled before
* cyhal_system_critical_section_enter() was called. The argument should be the value
* returned from \ref cyhal_system_critical_section_enter().
*
* @param[in] old_state The state of interrupts from cyhal_system_critical_section_enter()
*
* See \ref subsection_system_snippet1 for code snippet on critical section
*/
void cyhal_system_critical_section_exit(uint32_t old_state);
#if defined(__cplusplus)
}
#endif

View File

@ -0,0 +1,62 @@
/*
* Copyright 2024 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "wiced_filesystem.h"
#include <minimal_cyhal_config.h>
#include <unistd.h>
#include <fcntl.h>
wiced_result_t wiced_filesystem_file_open(wiced_filesystem_t *fs_handle, wiced_file_t *file_handle_out, const char *filename, wiced_filesystem_open_mode_t mode)
{
if (wiced_filesystem_setup() != WICED_SUCCESS) {
return WICED_ERROR;
}
*file_handle_out = open(filename, mode);
if (*file_handle_out == -1) {
return WICED_ERROR;
}
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_file_seek(wiced_file_t *file_handle, int64_t offset, wiced_filesystem_seek_type_t whence)
{
if (*file_handle == -1) {
return WICED_ERROR;
}
lseek(*file_handle, offset, whence);
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_file_read(wiced_file_t *file_handle, void *data, uint64_t bytes_to_read, uint64_t *returned_bytes_count)
{
if (*file_handle == -1) {
return WICED_ERROR;
}
*returned_bytes_count = read(*file_handle, data, bytes_to_read);
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_file_close(wiced_file_t *file_handle)
{
if (*file_handle == -1) {
return WICED_ERROR;
}
close(*file_handle);
return WICED_SUCCESS;
}

View File

@ -1,5 +1,5 @@
/*
* Copyright 2020 Arduino SA
* Copyright 2024 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@ -16,12 +16,16 @@
*/
/** @file
* Provides wiced fs porting to generic mbed APIs
* Provides wiced fs porting to generic mbed APIs.
* The WHD driver uses this API to load resources out of an "external" filesystem.
* We provide an implementation that sends these requests through to an external block device.
*/
#pragma once
#include "whd_config.h"
#include <mbed_toolchain.h>
#include <stdio.h>
#include <inttypes.h>
#ifdef __cplusplus
extern "C" {
@ -72,14 +76,22 @@ typedef int wiced_file_t;
*/
typedef int wiced_filesystem_handle_type_t;
// Global "FS handle" object. Just here to match the WHD driver's expectations, we have one global
// filesystem object.
static wiced_filesystem_t resource_fs_handle = 0;
/**
* Initialise the BlockDevice and filesystem module
* @brief Sets up the file system where the wifi module resources will be loaded from.
*
* Initialises the BlockDevice and filesystem module before mounting a physical device.
* The file system must be mounted at WIFI_DEFAULT_PARTITION (e.g. "/wlan")
* Applications can override this function if needed to set up and use different block devices.
*
* @return WICED_SUCCESS on success
* This function is lazily called the first time the wi-fi FS is accessed, or it can be
* called by user code if you wish to access the wi-fi firmware block device.
*
* @return Error code or success
*/
wiced_result_t wiced_filesystem_init(void);
wiced_result_t wiced_filesystem_setup();
/**
* Open a file for reading or writing

View File

@ -1,26 +1,30 @@
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_library(mbed-cy-psoc6-common-network STATIC EXCLUDE_FROM_ALL)
target_include_directories(mbed-cy-psoc6-common-network
target_include_directories(mbed-wifi
PUBLIC
.
)
target_sources(mbed-cy-psoc6-common-network
target_sources(mbed-wifi
PRIVATE
cy_network_buffer.c
cybsp_wifi.c
)
target_link_libraries(mbed-cy-psoc6-common-network
target_link_libraries(mbed-wifi
PUBLIC
mbed-lwipstack
mbed-emac
mbed-rtos-flags
)
target_compile_definitions(mbed-cy-psoc6-common-network
PUBLIC
MBED_CONF_cy-psoc6-common-network_PRESENT=1
)
if("DEVICE_EMAC=1" IN_LIST MBED_TARGET_DEFINITIONS)
target_link_libraries(mbed-wifi
PUBLIC
mbed-emac
)
endif()
if(NOT "Cypress" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-wifi PUBLIC mbed-minimal-cyhal)
endif()

View File

@ -163,6 +163,7 @@ static cy_rslt_t cybsp_sdio_enumerate(const cyhal_sdio_t* sdio_object)
result = sdio_try_send_cmd(sdio_object, CYHAL_WRITE, CYHAL_SDIO_CMD_SELECT_CARD, rel_addr,
&response_ignored);
}
return result;
}

View File

@ -34,6 +34,7 @@
#include "cy_result.h"
#include "whd_wifi_api.h"
#include <stddef.h>
#if defined(__cplusplus)
extern "C" {

View File

@ -1,7 +1,7 @@
# Copyright (c) 2020 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
target_include_directories(mbed-emac
target_include_directories(mbed-wifi
INTERFACE
.
./interface
@ -9,7 +9,7 @@ target_include_directories(mbed-emac
./utils
)
target_sources(mbed-emac
target_sources(mbed-wifi
INTERFACE
interface/CyDhcpServer.cpp
interface/WhdAccessPoint.cpp

View File

@ -255,7 +255,7 @@ nsapi_error_t WhdSTAInterface::set_credentials(const char *ssid, const char *pas
nsapi_error_t WhdSTAInterface::connect()
{
ScopedMutexLock lock(_iface_shared.mutex);
rtos::ScopedMutexLock lock(_iface_shared.mutex);
#define MAX_RETRY_COUNT ( 5 )
int i;
@ -293,8 +293,7 @@ nsapi_error_t WhdSTAInterface::connect()
_olm->init_ols(_whd_emac.ifp, this);
}
if ((_ssid == NULL) ||
(strlen(_ssid) == 0)) {
if ((strlen(_ssid) == 0)) {
return NSAPI_ERROR_PARAMETER;
}
@ -375,7 +374,7 @@ void WhdSTAInterface::wifi_on()
nsapi_error_t WhdSTAInterface::disconnect()
{
ScopedMutexLock lock(_iface_shared.mutex);
rtos::ScopedMutexLock lock(_iface_shared.mutex);
if (!_interface) {
return NSAPI_STATUS_DISCONNECTED;
@ -508,7 +507,7 @@ static void whd_scan_handler(whd_scan_result_t **result_ptr,
int WhdSTAInterface::internal_scan(WiFiAccessPoint *aps, unsigned count, scan_result_type sres_type)
{
ScopedMutexLock lock(_iface_shared.mutex);
rtos::ScopedMutexLock lock(_iface_shared.mutex);
// initialize wiced, this is noop if already init
if (!_whd_emac.powered_up) {
@ -517,7 +516,7 @@ int WhdSTAInterface::internal_scan(WiFiAccessPoint *aps, unsigned count, scan_re
}
}
interal_scan_data.sema = new Semaphore();
interal_scan_data.sema = new rtos::Semaphore();
interal_scan_data.sres_type = sres_type;
interal_scan_data.aps = aps;
interal_scan_data.count = count;

View File

@ -70,7 +70,7 @@ WhdSoftAPInterface::WhdSoftAPInterface(WHD_EMAC &emac, OnboardNetworkStack &stac
int WhdSoftAPInterface::start(const char *ssid, const char *pass, nsapi_security_t security, uint8_t channel,
bool start_dhcp_server, const whd_custom_ie_info_t *ie_info, bool ap_sta_concur)
{
ScopedMutexLock lock(_iface_shared.mutex);
rtos::ScopedMutexLock lock(_iface_shared.mutex);
nsapi_error_t err;
// power up primary emac interface first
@ -178,7 +178,7 @@ int WhdSoftAPInterface::start(const char *ssid, const char *pass, nsapi_security
int WhdSoftAPInterface::stop(void)
{
ScopedMutexLock lock(_iface_shared.mutex);
rtos::ScopedMutexLock lock(_iface_shared.mutex);
if (_dhcp_server && CY_RSLT_SUCCESS != _dhcp_server->stop()) {
return NSAPI_ERROR_DHCP_FAILURE;

View File

@ -1,3 +1,20 @@
/*
* Copyright (c) 2018-2019 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "CyDhcpServer.h"
#if defined(__cplusplus)

View File

@ -47,9 +47,6 @@ void ipv4_to_string(char buffer[16], uint32_t ipv4_address)
{
uint8_t *ip = (uint8_t *)&ipv4_address;
/* unsigned_to_decimal_string() null-terminates the string
* Save the original last character and replace it */
char last_char = buffer[16];
unsigned_to_decimal_string(ip[0], &buffer[0], 3, 3);
buffer[3] = '.';
unsigned_to_decimal_string(ip[1], &buffer[4], 3, 3);
@ -57,7 +54,6 @@ void ipv4_to_string(char buffer[16], uint32_t ipv4_address)
unsigned_to_decimal_string(ip[2], &buffer[8], 3, 3);
buffer[11] = '.';
unsigned_to_decimal_string(ip[3], &buffer[12], 3, 3);
buffer[16] = last_char;
}
uint32_t string_to_ipv4(const char *buffer)

View File

@ -0,0 +1,125 @@
if("COMPONENT_43012=1" IN_LIST MBED_TARGET_DEFINITIONS)
target_include_directories(mbed-wifi
PUBLIC
resources/firmware/COMPONENT_43012
)
target_sources(mbed-wifi
PRIVATE
resources/firmware/COMPONENT_43012/43012C0-mfgtest_bin.c
resources/firmware/COMPONENT_43012/43012C0-mfgtest_clm_blob.c
resources/firmware/COMPONENT_43012/43012C0_bin.c
resources/firmware/COMPONENT_43012/43012C0_clm_blob.c
)
endif()
if("COMPONENT_43438=1" IN_LIST MBED_TARGET_DEFINITIONS)
target_include_directories(mbed-wifi
PUBLIC
resources/firmware/COMPONENT_43438
)
target_sources(mbed-wifi
PRIVATE
resources/firmware/COMPONENT_43438/43438A1-mfgtest_bin.c
resources/firmware/COMPONENT_43438/43438A1-mfgtest_clm_blob.c
resources/firmware/COMPONENT_43438/43438A1_bin.c
resources/firmware/COMPONENT_43438/43438A1_clm_blob.c
)
endif()
if("COMPONENT_4343W=1" IN_LIST MBED_TARGET_DEFINITIONS)
target_include_directories(mbed-wifi
PUBLIC
resources/firmware/COMPONENT_4343W
)
target_sources(mbed-wifi
PRIVATE
resources/firmware/COMPONENT_4343W/4343WA1-mfgtest_bin.c
resources/firmware/COMPONENT_4343W/4343WA1-mfgtest_clm_blob.c
resources/firmware/COMPONENT_4343W/4343WA1_bin.c
resources/firmware/COMPONENT_4343W/4343WA1_clm_blob.c
)
endif()
if("COMPONENT_4343W_FS=1" IN_LIST MBED_TARGET_DEFINITIONS)
target_include_directories(mbed-wifi
PUBLIC
resources/firmware/COMPONENT_4343W_FS
)
target_sources(mbed-wifi
PRIVATE
resources/firmware/COMPONENT_4343W_FS/4343WA1_bin.c
resources/firmware/COMPONENT_4343W_FS/4343WA1_clm_blob.c
)
endif()
# Grab wifi_nvram_image.h and generated_mac_address.txt from the correct folder
set(TARGETS_WITH_NVRAM_IMAGE
CY8CKIT_062S2_43012
CY8CKIT_062S2_4343W
CY8CKIT_062_4343W
CY8CKIT_062_WIFI_BT
CY8CKIT_064S1_4343W
CY8CKIT_064S2_4343W
CY8CMOD_062S3_4343W
CY8CMOD_062_4343W
CY8CPROTO_062S3_4343W
CY8CPROTO_062_4343W
CYTFM_064B0S2_4343W
CYW943012P6EVB_01
CYW943012WCD2
CYW9P62S1_43012CAR_01
CYW9P62S1_43012EVB_01
CYW9P62S1_43438EVB_01
CY8CKIT_064B0S2_4343W
Cypress
STM32H747_ARDUINO)
foreach(TARGET ${TARGETS_WITH_NVRAM_IMAGE})
if("${TARGET}" IN_LIST MBED_TARGET_LABELS)
target_include_directories(mbed-wifi PUBLIC resources/nvram/TARGET_${TARGET})
endif()
endforeach()
target_include_directories(mbed-wifi
PUBLIC
wifi-host-driver
inc
resources/resource_imp
src
src/include
src/bus_protocols
)
target_sources(mbed-wifi
PRIVATE
resources/resource_imp/whd_resources.c
src/whd_ap.c
src/whd_buffer_api.c
src/whd_cdc_bdc.c
src/whd_chip.c
src/whd_chip_constants.c
src/whd_clm.c
src/whd_debug.c
src/whd_events.c
src/whd_logging.c
src/whd_management.c
src/whd_network_if.c
src/whd_resource_if.c
src/whd_sdpcm.c
src/whd_thread.c
src/whd_utils.c
src/whd_wifi.c
src/whd_wifi_api.c
src/whd_wifi_p2p.c
src/bus_protocols/whd_bus.c
src/bus_protocols/whd_bus_common.c
src/bus_protocols/whd_bus_sdio_protocol.c
src/bus_protocols/whd_bus_spi_protocol.c
)
target_compile_definitions(mbed-wifi
PUBLIC
MBED_CONF_CY_PSOC6_WHD_PRESENT=1
)

View File

@ -18,9 +18,6 @@
#ifndef INCLUDED_RESOURCES_H_
#define INCLUDED_RESOURCES_H_
#include "wiced_resource.h"
#include "wiced_filesystem.h"
extern wiced_filesystem_t resource_fs_handle;
extern const resource_hnd_t wifi_firmware_image;
extern const unsigned char wifi_firmware_image_data[421098];

View File

@ -1,90 +0,0 @@
/*
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
* SPDX-License-Identifier: LicenseRef-PBL
*
* This file and the related binary are licensed under the
* Permissive Binary License, Version 1.0 (the "License");
* you may not use these files except in compliance with the License.
*
* You may obtain a copy of the License here:
* LICENSE-permissive-binary-license-1.0.txt and at
* https://www.mbed.com/licenses/PBL-1.0
*
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "wiced_resource.h"
#if defined(CY_STORAGE_WIFI_DATA)
CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used))
#endif
const unsigned char wifi_firmware_clm_blob_data[1292] = {
66, 76, 79, 66, 60, 0, 0, 0, 171, 42, 60, 232, 1, 0, 0, 0, 2, 0, 0,
0, 0, 0, 0, 0, 60, 0, 0, 0, 204, 4, 0, 0, 238, 118, 95, 156, 0, 0, 0,
0, 0, 0, 0, 0, 8, 5, 0, 0, 4, 0, 0, 0, 247, 227, 18, 42, 0, 0, 0, 0,
67, 76, 77, 32, 68, 65, 84, 65, 0, 0, 12, 0, 2, 0, 76, 97, 105, 114,
100, 46, 76, 87, 66, 53, 43, 68, 105, 118, 101, 114, 115, 105, 116,
121, 49, 46, 51, 53, 46, 48, 0, 0, 0, 0, 0, 0, 0, 0, 244, 2, 0, 0, 67,
108, 109, 73, 109, 112, 111, 114, 116, 58, 32, 49, 46, 51, 57, 46, 49,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 118, 49, 32, 50, 48, 47, 48,
57, 47, 48, 50, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 11, 4, 8,
9, 9, 38, 38, 38, 110, 38, 134, 46, 54, 62, 62, 102, 102, 110, 110,
110, 159, 134, 134, 134, 159, 151, 159, 3, 2, 2, 1, 1, 1, 1, 0, 6, 2,
5, 5, 1, 1, 4, 2, 4, 1, 1, 1, 2, 5, 4, 2, 2, 1, 1, 1, 6, 2, 2, 1, 1,
1, 1, 10, 4, 2, 2, 5, 1, 1, 2, 0, 255, 1, 36, 2, 0, 2, 62, 2, 2, 66,
2, 3, 2, 0, 255, 1, 20, 2, 0, 2, 62, 2, 2, 66, 2, 3, 0, 0, 255, 0, 0,
0, 2, 0, 255, 1, 23, 2, 0, 1, 70, 2, 1, 1, 0, 255, 1, 30, 1, 0, 6, 64,
0, 2, 50, 0, 3, 70, 3, 2, 68, 3, 3, 62, 4, 2, 56, 4, 3, 0, 3, 0, 0,
0, 206, 2, 0, 0, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 12, 0,
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 4, 0, 1, 2, 3, 8, 4, 5, 6, 7, 8,
9, 10, 11, 1, 1, 1, 11, 1, 13, 2, 10, 11, 11, 36, 36, 36, 64, 36, 116,
36, 136, 36, 140, 36, 144, 36, 165, 40, 40, 44, 44, 48, 48, 52, 60,
64, 64, 100, 100, 100, 116, 100, 140, 104, 116, 104, 136, 132, 136,
132, 140, 132, 144, 132, 165, 140, 140, 144, 165, 149, 165, 0, 1, 1,
1, 2, 4, 6, 18, 23, 28, 3, 6, 19, 28, 2, 7, 25, 1, 9, 1, 11, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 18, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 0, 1, 0, 0, 0, 134, 0, 0, 0, 5, 0, 0, 0, 141,
0, 0, 0, 50, 48, 50, 48, 45, 48, 57, 45, 48, 50, 32, 48, 56, 58, 52,
49, 58, 50, 48, 0, 4, 4, 66, 7, 0, 66, 22, 0, 64, 26, 0, 66, 28, 0,
5, 3, 50, 5, 0, 50, 12, 0, 50, 14, 0, 8, 2, 46, 1, 0, 46, 9, 0, 4, 3,
66, 8, 0, 64, 26, 0, 34, 28, 0, 5, 2, 50, 6, 0, 34, 14, 0, 8, 2, 46,
2, 0, 34, 9, 0, 4, 1, 66, 9, 0, 5, 1, 50, 6, 0, 8, 1, 46, 2, 0, 4, 10,
50, 5, 0, 58, 12, 0, 66, 13, 0, 62, 14, 0, 66, 15, 0, 50, 16, 0, 44,
17, 0, 66, 21, 0, 44, 26, 0, 66, 27, 0, 5, 5, 44, 4, 0, 50, 7, 0, 48,
8, 0, 36, 9, 0, 50, 11, 0, 8, 4, 40, 0, 0, 46, 4, 0, 40, 5, 0, 46, 7,
0, 4, 11, 50, 5, 0, 58, 12, 0, 66, 13, 0, 62, 14, 0, 66, 15, 0, 50,
16, 0, 44, 17, 0, 66, 20, 0, 66, 22, 0, 44, 26, 0, 66, 27, 0, 5, 6,
44, 4, 0, 50, 7, 0, 48, 8, 0, 36, 9, 0, 50, 10, 0, 50, 13, 0, 8, 4,
40, 0, 0, 46, 4, 0, 40, 5, 0, 46, 8, 0, 18, 4, 5, 6, 7, 8, 9, 10, 11,
12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 4, 1, 60, 2, 0, 1, 1, 44, 1,
0, 4, 1, 66, 2, 0, 1, 1, 44, 1, 0, 4, 1, 60, 2, 0, 1, 1, 44, 1, 0, 4,
3, 46, 0, 0, 60, 3, 0, 50, 4, 0, 1, 3, 38, 0, 0, 44, 2, 0, 38, 3, 0,
36, 64, 4, 100, 144, 4, 149, 165, 4, 0, 2, 0, 0, 0, 148, 1, 0, 0, 10,
12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 8, 4, 5, 6, 7, 8, 9, 10, 11,
196, 4, 0, 0, 248, 0, 0, 0, 38, 1, 0, 0, 0, 0, 0, 0, 96, 1, 0, 0, 224,
2, 0, 0, 176, 0, 0, 0, 10, 4, 0, 0, 154, 2, 0, 0, 184, 1, 0, 0, 204,
3, 0, 0, 120, 1, 0, 0, 164, 4, 0, 0, 127, 80, 0, 1, 216, 2, 0, 0, 0,
0, 0, 0, 104, 0, 0, 0, 180, 3, 0, 0, 0, 0, 0, 0, 172, 4, 0, 0, 135,
2, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 128, 1, 0, 0, 164, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 42, 42,
42, 106, 42, 122, 42, 171, 58, 58, 106, 106, 122, 138, 122, 155, 138,
155, 155, 155, 155, 171, 0, 0, 6, 0, 0, 0, 212, 3, 0, 0, 35, 110, 0,
2, 0, 255, 255, 240, 0, 65, 85, 0, 0, 1, 0, 0, 0, 2, 67, 65, 0, 4, 5,
3, 4, 0, 2, 68, 69, 0, 1, 2, 1, 1, 0, 33, 74, 80, 0, 3, 3, 2, 2, 0,
2, 85, 83, 0, 4, 4, 3, 3, 0, 2, 0, 0, 255, 0, 0, 0, 3, 1, 255, 4, 23,
6, 30, 18, 30, 23, 36, 28, 0, 4, 66, 6, 1, 64, 18, 1, 64, 23, 1, 66,
28, 1, 4, 1, 255, 3, 23, 6, 30, 19, 14, 28, 0, 3, 66, 6, 1, 64, 19,
1, 34, 28, 1, 6, 2, 255, 2, 23, 6, 30, 19, 0, 1, 66, 9, 1, 7, 2, 255,
2, 24, 10, 30, 28, 0, 10, 52, 5, 1, 60, 12, 1, 66, 13, 1, 62, 14, 1,
66, 15, 1, 54, 16, 1, 46, 17, 1, 66, 21, 1, 50, 26, 1, 66, 27, 1, 5,
2, 255, 3, 24, 7, 24, 24, 30, 28, 0, 11, 52, 5, 1, 60, 12, 1, 66, 13,
1, 62, 14, 1, 66, 15, 1, 54, 16, 1, 46, 17, 1, 66, 20, 1, 66, 22, 1,
50, 26, 1, 66, 27, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 18, 4, 5, 6,
7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 1, 13, 1, 0,
0, 1, 0, 0, 0, 191, 4, 0, 0, 115, 67, 0, 0
};
const resource_hnd_t wifi_firmware_clm_blob = { RESOURCE_IN_MEMORY, 1292, {.mem = { (const char *) wifi_firmware_clm_blob_data }}};

View File

@ -1,31 +0,0 @@
/*
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
* SPDX-License-Identifier: LicenseRef-PBL
*
* This file and the related binary are licensed under the
* Permissive Binary License, Version 1.0 (the "License");
* you may not use these files except in compliance with the License.
*
* You may obtain a copy of the License here:
* LICENSE-permissive-binary-license-1.0.txt and at
* https://www.mbed.com/licenses/PBL-1.0
*
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* Automatically generated file - this comment ensures resources.h file creation */
/* Auto-generated header file. Do not edit */
#ifndef INCLUDED_RESOURCES_H_
#define INCLUDED_RESOURCES_H_
#include "wiced_resource.h"
extern const resource_hnd_t wifi_firmware_image;
extern const unsigned char wifi_firmware_image_data[559663];
extern const resource_hnd_t wifi_firmware_clm_blob;
extern const unsigned char wifi_firmware_clm_blob_data[1292];
extern const resource_hnd_t wifi_mfg_firmware_image;
extern const unsigned char wifi_mfg_firmware_image_data[563767];
extern const resource_hnd_t wifi_mfg_firmware_clm_blob;
extern const unsigned char wifi_mfg_firmware_clm_blob_data[7341];
#endif /* ifndef INCLUDED_RESOURCES_H_ */

View File

@ -1,146 +0,0 @@
/*
* Copyright (c) 2019, Cypress Semiconductor Corporation, All Rights Reserved
* SPDX-License-Identifier: LicenseRef-PBL
*
* This file and the related binary are licensed under the
* Permissive Binary License, Version 1.0 (the "License")
* you may not use these files except in compliance with the License.
*
* You may obtain a copy of the License here:
* LICENSE-permissive-binary-license-1.0.txt and at
* https://www.mbed.com/licenses/PBL-1.0
*
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef INCLUDED_NVRAM_IMAGE_H_
#define INCLUDED_NVRAM_IMAGE_H_
#include <string.h>
#include <stdint.h>
#include "generated_mac_address.txt"
#ifdef __cplusplus
extern "C" {
#endif
/**
* Character array of NVRAM image (LAIRD Conntectivity's Sterling-LWB5+ with SDIO/UART (M.2) module. Part Number: 453-00048)
* Generated from brcmfmac4373-div-fcc_20200921.txt
*/
static const char wifi_nvram_image[] =
"NVRAMRev=$Rev$" "\x00"
"sromrev=11" "\x00"
"vendid=0x14e4" "\x00"
"devid=0x4418" "\x00"
"manfid=0x2d0" "\x00"
"prodid=0x070f" "\x00"
NVRAM_GENERATED_MAC_ADDRESS "\x00"
"nocrc=1" "\x00"
"boardtype=0x83d" "\x00"
"boardrev=0x1306" "\x00"
"xtalfreq=37400" "\x00"
"boardflags=0x00000001" "\x00"
"boardflags2=0x00800000" "\x00"
"boardflags3=0x48202100" "\x00"
"tempthresh=105" "\x00"
"temps_hysteresis=20" "\x00"
"temps_txduty_lowlimit=0" "\x00"
"temps_period=1" "\x00"
"phycal_tempdelta=15" "\x00"
"rxgains2gelnagaina0=0" "\x00"
"rxgains2gtrisoa0=0" "\x00"
"rxgains2gtrelnabypa0=0" "\x00"
"rxgains5gelnagaina0=0" "\x00"
"rxgains5gtrisoa0=0" "\x00"
"rxgains5gtrelnabypa0=0" "\x00"
"pdgain5g=3" "\x00"
"pdgain2g=3" "\x00"
"antswitch=0x6" "\x00"
"rxchain=1" "\x00"
"txchain=1" "\x00"
"aa2g=3" "\x00"
"aa5g=3" "\x00"
"tssipos5g=1" "\x00"
"tssipos2g=1" "\x00"
"femctrl=0" "\x00"
"pa2ga0=-214,4762,-584" "\x00"
"pa5ga0=-153,5528,-664,-153,5528,-664,-155,5563,-666,-167,5492,-668" "\x00"
"pdoffsetcckma0=0xf" "\x00"
"pdoffset2g40ma0=0xc" "\x00"
"pdoffset40ma0=0xffff" "\x00"
"pdoffset80ma0=0xeeee" "\x00"
"extpagain5g=2" "\x00"
"extpagain2g=2" "\x00"
"AvVmid_c0=1,130,0,160,0,160,0,160,0,160" "\x00"
"maxp2ga0=72" "\x00"
"maxp5ga0=70,70,70,70" "\x00"
"cckbw202gpo=0x1111" "\x00"
"dot11agofdmhrbw202gpo=0x4422" "\x00"
"ofdmlrbw202gpo=0x0022" "\x00"
"mcsbw202gpo=0xAA666666" "\x00"
"mcsbw402gpo=0xFFEEEEEE" "\x00"
"mcsbw205glpo=0xDD662222" "\x00"
"mcsbw205gmpo=0xDD662222" "\x00"
"mcsbw205ghpo=0xDD662222" "\x00"
"mcsbw405glpo=0xDDAAAAAA" "\x00"
"mcsbw405gmpo=0xDDAAAAAA" "\x00"
"mcsbw405ghpo=0xDDAAAAAA" "\x00"
"mcsbw805glpo=0xEECCCCCC" "\x00"
"mcsbw805gmpo=0xEECCCCCC" "\x00"
"mcsbw805ghpo=0xEECCCCCC" "\x00"
"swctrlmap_2g=0x00001131,0x00001131,0x00001131,0x313131,0x1ff" "\x00"
"swctrlmap_5g=0x00201131,0x40405171,0x00001131,0x313131,0x1ff" "\x00"
"swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000" "\x00"
"swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000" "\x00"
"fem_table_init_val=0x1131,0x1131" "\x00"
"nb_papdcalidx=0x280f" "\x00"
"nb_txattn=0x0303" "\x00"
"nb_rxattn=0x0303" "\x00"
"nb_bbmult=0x3948" "\x00"
"nb_eps_offset=0x01e601ea" "\x00"
"papdmode=1" "\x00"
"rssi_delta_2g_c0=-2,-2,-2,-2" "\x00"
"rssi_delta_5gl_c0=-2,-2,-3,-3,-1,-1" "\x00"
"rssi_delta_5gml_c0=-2,-2,-3,-3,-1,-1" "\x00"
"rssi_delta_5gmu_c0=0,0,-1,-1,0,0" "\x00"
"rssi_delta_5gh_c0=-1,-1,-2,-2,0,0" "\x00"
"ATErcalmode=0" "\x00"
"swdiv_en=1" "\x00"
"swdiv_gpio=0" "\x00"
"swdiv_swctrl_en=2" "\x00"
"swdiv_swctrl_ant0=0" "\x00"
"swdiv_swctrl_ant1=1" "\x00"
"swdiv_antmap2g_main=1" "\x00"
"swdiv_antmap5g_main=1" "\x00"
"swdiv_snrlim=290" "\x00"
"swdiv_thresh=2000" "\x00"
"swdiv_snrthresh=24" "\x00"
"swdiv_timeon=10" "\x00"
"swdiv_timeoff=1" "\x00"
"swdiv_snr2g20=232" "\x00"
"swdiv_snr2g40=257" "\x00"
"swdiv_snr5g20=296" "\x00"
"swdiv_snr5g40=312" "\x00"
"swdiv_snr5g80=296" "\x00"
"swdiv_ap_dead_check=1" "\x00"
"swdiv_ap_div=1" "\x00"
"idac_main_mode=1" "\x00"
"paldo3p3_voltage=4" "\x00"
"fdss_level_2g=4" "\x00"
"fdss_level_5g=4" "\x00"
"fdss_interp_en=1" "\x00"
"ccode=US" "\x00"
"regrev=0" "\x00"
"\x00\x00";
#ifdef __cplusplus
} /*extern "C" */
#endif
#else /* ifndef INCLUDED_NVRAM_IMAGE_H_ */
#error Wi-Fi NVRAM image included twice
#endif /* ifndef INCLUDED_NVRAM_IMAGE_H_ */

View File

@ -1,8 +0,0 @@
The following list is for specific board from customer
COMPONENT_LAIRD_LWB5PM2 folder is for Laird's 4373 board and includes nvram,clm and resources.h.
When using LAIRD_LWB5PM2 component, you need to rename the duplicate files in resources/firmware/COMPONENT_4373,
or adding them into cyignore or adding CY_IGNORE variable as part of the BSP's makefile.
1.4373A0_clm_blob.c
2.resources.h
3.wifi_nvram_image.h

View File

@ -24,6 +24,10 @@
#include "whd_debug.h"
#include "whd.h"
#ifdef USES_RESOURCE_GENERIC_FILESYSTEM
#include <wiced_filesystem.h>
#endif
/******************************************************
* Macros
******************************************************/
@ -100,6 +104,7 @@ resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset,
if (resource->location == RESOURCE_IN_MEMORY)
{
memcpy(buffer, &resource->val.mem.data[offset], *size);
return RESOURCE_SUCCESS;
}
#ifdef USES_RESOURCES_IN_EXTERNAL_STORAGE
else if (resource->location == RESOURCE_IN_EXTERNAL_STORAGE)
@ -130,6 +135,8 @@ resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset,
}
*size = (uint32_t)size64;
wiced_filesystem_file_close (&file_handle);
return RESOURCE_SUCCESS;
}
#else
#ifdef USES_RESOURCE_FILESYSTEM
@ -155,10 +162,11 @@ resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset,
}
wicedfs_fclose(&file_hnd);
return RESOURCE_SUCCESS;
}
#endif /* ifdef USES_RESOURCE_FILESYSTEM */
#endif
#endif /* USES_RESOURCE_GENERIC_FILESYSTEM */
return RESOURCE_SUCCESS;
return RESOURCE_UNSUPPORTED;
}
uint32_t host_platform_resource_size(whd_driver_t whd_drv, whd_resource_type_t resource, uint32_t *size_out)

View File

@ -567,8 +567,10 @@ void whd_send_to_bus(whd_driver_t whd_driver, whd_buffer_t buffer,
/* Fatal error */
result = whd_buffer_release(whd_driver, buffer, WHD_NETWORK_TX);
if (result != WHD_SUCCESS)
WPRINT_WHD_ERROR( ("buffer release failed in %s at %d \n", __func__, __LINE__) )
return;
{
WPRINT_WHD_ERROR(("buffer release failed in %s at %d \n", __func__, __LINE__))
}
return;
}
whd_sdpcm_set_next_buffer_in_queue(whd_driver, NULL, buffer);

View File

@ -91,7 +91,7 @@ whd_result_t whd_thread_init(whd_driver_t whd_driver)
return retval;
}
retval = cy_rtos_create_thread(&whd_driver->thread_info.whd_thread, (cy_thread_entry_fn_t)whd_thread_func,
retval = cy_rtos_create_thread(&whd_driver->thread_info.whd_thread, (cy_thread_entry_fn_t)(void*)whd_thread_func,
"WHD", whd_driver->thread_info.thread_stack_start,
whd_driver->thread_info.thread_stack_size,
whd_driver->thread_info.thread_priority, (cy_thread_arg_t)whd_driver);

View File

@ -53,6 +53,7 @@ target_link_libraries(mbed-netsocket-api
PUBLIC
mbed-core-flags
mbed-mbedtls
mbed-nanostack-libservice
)
# Currently, netsocket-api needs to link to whichever library is providing an implementation

View File

@ -12,3 +12,4 @@ add_subdirectory(frameworks/mbed-client-cli)
add_subdirectory(frameworks/unity)
add_subdirectory(frameworks/utest)
add_subdirectory(frameworks/mbed-greentea-io)
add_subdirectory(frameworks/cy_rtos_rtx_adapter)

View File

@ -0,0 +1,24 @@
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
set(CY_RTOS_RTX_ADAPTER_SOURCES
source/COMPONENT_RTX/cyabs_rtos_rtxv5.c
source/cy_worker_thread.c)
set(CY_RTOS_RTX_ADAPTER_INCLUDE_DIRS
include
include/COMPONENT_RTX)
if("Cypress" IN_LIST MBED_TARGET_LABELS)
# Set up the RTOS abstraction so it's included as part of the base Mbed RTOS.
# We pretty much have to add the sources like this because the HAL needs to use this
# code, so there's a circular dependency.
target_sources(mbed-rtos-sources INTERFACE ${CY_RTOS_RTX_ADAPTER_SOURCES})
target_include_directories(mbed-rtos-flags INTERFACE ${CY_RTOS_RTX_ADAPTER_INCLUDE_DIRS})
else()
# Build as part of the minimal CyHAL if it's enabled
if(TARGET mbed-minimal-cyhal)
target_sources(mbed-minimal-cyhal PRIVATE ${CY_RTOS_RTX_ADAPTER_SOURCES})
target_include_directories(mbed-minimal-cyhal INTERFACE ${CY_RTOS_RTX_ADAPTER_INCLUDE_DIRS})
endif()
endif()

View File

@ -0,0 +1,2 @@
# Cypress RTOS RTX Adapter
The code in this directory is a shim to allow things that expect a Cypress RTOS API (e.g. the Cypress BSP and the Cypress WHD wifi driver) to interoperate with Mbed's RTX RTOS.

View File

@ -21,8 +21,6 @@ add_subdirectory(TARGET_CYTFM_064B0S2_4343W EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_CYW9P62S1_43012EVB_01 EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_CYW9P62S1_43438EVB_01 EXCLUDE_FROM_ALL)
add_subdirectory(abstraction-rtos EXCLUDE_FROM_ALL)
add_library(mbed-cm0p-bless INTERFACE)
target_sources(mbed-cm0p-bless
INTERFACE
@ -287,7 +285,6 @@ target_sources(mbed-psoc6
target_link_libraries(mbed-psoc6 INTERFACE mbed-cmsis-cortex-m)
# TODO: Include only if mbed-baremetal is not used
if("CY_RTOS_AWARE" IN_LIST MBED_CONFIG_DEFINITIONS)
target_link_libraries(mbed-psoc6 INTERFACE mbed-cy-rtos mbed-cy-rtx)
endif()
# When linking in the RTOS, make sure CY_RTOS_AWARE gets defined so that the HAL code
# becomes RTOS aware
target_compile_definitions(mbed-rtos-flags INTERFACE CY_RTOS_AWARE)

View File

@ -69,15 +69,6 @@ target_link_libraries(mbed-cy8ckit064b0s2-4343w
mbed-psoc6
)
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cy8ckit064b0s2-4343w
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-4343w
mbed-cy8ckit-064b0s2-4343w-whd
)
endif()
target_compile_definitions(mbed-cy8ckit064b0s2-4343w
INTERFACE
"CYB0644ABZI_S2D44"

View File

@ -73,15 +73,6 @@ if("CM0P_SLEEP" IN_LIST MBED_TARGET_LABELS)
)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cy8ckit-062s2-43012
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-43012
mbed-cy8ckit-062s2-43012-whd
)
endif()
target_compile_definitions(mbed-cy8ckit-062s2-43012
INTERFACE
"CY8C624ABZI_D44"

View File

@ -74,15 +74,6 @@ if("CM0P_SLEEP" IN_LIST MBED_TARGET_LABELS)
)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cy8ckit-062-wifi-bt
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-4343w
mbed-cy8ckit-062-wifi-bt-whd
)
endif()
target_compile_definitions(mbed-cy8ckit-062-wifi-bt
INTERFACE
"CY8C6247BZI_D54"

View File

@ -75,15 +75,6 @@ if("CM0P_SLEEP" IN_LIST MBED_TARGET_LABELS)
)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cy8cproto-062s3-4343w
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-4343w
mbed-cy8cproto-062s3-4343w-whd
)
endif()
target_compile_definitions(mbed-cy8cproto-062s3-4343w
INTERFACE
"CY8C6245LQI_S3D72"

View File

@ -74,15 +74,6 @@ if("CM0P_SLEEP" IN_LIST MBED_TARGET_LABELS)
)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cy8cproto-062-4343w
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-4343w
mbed-cy8cproto-062-4343w-whd
)
endif()
target_compile_definitions(mbed-cy8cproto-062-4343w
INTERFACE
"CY8C624ABZI_D44"

View File

@ -60,15 +60,6 @@ target_link_libraries(mbed-cytfm-064b0s2-4343w
mbed-psoc6
)
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cytfm-064b0s2-4343w
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-4343w
mbed-cytfm-064b0s2-4343w-whd
)
endif()
target_compile_definitions(mbed-cytfm-064b0s2-4343w
INTERFACE
"CYB0644ABZI_S2D44"

View File

@ -76,15 +76,6 @@ if("CM0P_SLEEP" IN_LIST MBED_TARGET_LABELS)
)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cyw9p62s1-43012evb-01
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-43012
mbed-cyw9p62s1-43012evb-01-whd
)
endif()
target_compile_definitions(mbed-cyw9p62s1-43012evb-01
INTERFACE
"CY8C6247FDI_D52"

View File

@ -75,15 +75,6 @@ if("CM0P_SLEEP" IN_LIST MBED_TARGET_LABELS)
)
endif()
if("WHD" IN_LIST MBED_TARGET_LABELS)
target_link_libraries(mbed-cyw9p62s1-43438evb-01
INTERFACE
mbed-cy-psoc6-whd
mbed-cy-psoc6-whd-43438
mbed-cyw9p62s1-43438evb-01-whd
)
endif()
target_compile_definitions(mbed-cyw9p62s1-43438evb-01
INTERFACE
"CY8C6247BZI_D54"

View File

@ -1,22 +0,0 @@
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_library(mbed-cy-rtx INTERFACE)
target_include_directories(mbed-cy-rtx
INTERFACE
include/COMPONENT_RTX
)
target_sources(mbed-cy-rtx
INTERFACE
source/COMPONENT_RTX/cyabs_rtos_rtxv5.c
)
add_library(mbed-cy-rtos INTERFACE)
target_include_directories(mbed-cy-rtos
INTERFACE
include
)
target_sources(mbed-cy-rtos
INTERFACE
source/cy_worker_thread.c
)

View File

@ -4,7 +4,7 @@
add_subdirectory(TARGET_STM32H747xI_CM4 EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_STM32H747xI_CM7 EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_DISCO_H747I EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_PORTENTA_H7 EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_STM32H747_ARDUINO EXCLUDE_FROM_ALL)
add_library(mbed-stm32h747xi INTERFACE)

View File

@ -1,37 +0,0 @@
# Copyright (c) 2020 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_subdirectory(COMPONENT_WHD EXCLUDE_FROM_ALL)
add_library(mbed-portenta-h7-m4 INTERFACE)
target_sources(mbed-portenta-h7-m4
INTERFACE
PeripheralPins.c
system_clock_override.c
portenta_power.cpp
)
target_include_directories(mbed-portenta-h7-m4
INTERFACE
.
)
target_link_libraries(mbed-portenta-h7-m4 INTERFACE mbed-stm32h747xi-cm4)
add_library(mbed-portenta-h7-m7 INTERFACE)
target_sources(mbed-portenta-h7-m7
INTERFACE
PeripheralPins.c
system_clock_override.c
portenta_power.cpp
)
target_include_directories(mbed-portenta-h7-m7
INTERFACE
.
)
target_link_libraries(mbed-portenta-h7-m7 INTERFACE mbed-stm32h747xi-cm7)

View File

@ -1,6 +0,0 @@
# Copyright (c) 2020 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
if("4343W_FS" IN_LIST MBED_TARGET_LABELS)
add_subdirectory(COMPONENT_4343W)
endif()

View File

@ -1,34 +0,0 @@
# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
add_library(mbed-portenta-whd-4343w-fw INTERFACE)
target_include_directories(mbed-portenta-whd-4343w-fw
INTERFACE
resources/firmware/COMPONENT_4343W_FS
)
target_sources(mbed-portenta-whd-4343w-fw
INTERFACE
resources/firmware/COMPONENT_4343W_FS/4343WA1_bin.c
resources/firmware/COMPONENT_4343W_FS/4343WA1_clm_blob.c
)
add_library(mbed-portenta-whd-4343w-nvram INTERFACE)
target_include_directories(mbed-portenta-whd-4343w-nvram INTERFACE resources/nvram)
add_library(mbed-portenta-whd INTERFACE)
target_include_directories(mbed-portenta-whd
INTERFACE
.
port
interface
)
target_sources(mbed-portenta-whd
INTERFACE
port/cyhal.c
port/cyhalgpio.cpp
port/cyhalsdio.c
port/wiced_filesystem.cpp
interface/cyabs_rtos_rtxv5.c
)

View File

@ -1,711 +0,0 @@
/***************************************************************************//**
* \file cyabs_rtos.h
*
* \brief
* Defines the Cypress RTOS Interface. Provides prototypes for functions that
* allow Cypress libraries to use RTOS resources such as threads, mutexes &
* timing functions in an abstract way. The APIs are implemented in the Port
* Layer RTOS interface which is specific to the RTOS in use.
*
********************************************************************************
* \copyright
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#ifndef INCLUDED_CY_RTOS_INTERFACE_H_
#define INCLUDED_CY_RTOS_INTERFACE_H_
#include "cyabs_rtos_impl.h"
#include "cy_result.h"
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
/**
* \defgroup group_abstraction_rtos_common Common
* General types and defines for working with the RTOS abstraction layer.
* \defgroup group_abstraction_rtos_mutex Mutex
* APIs for acquiring and working with Mutexes.
* \defgroup group_abstraction_rtos_queue Queue
* APIs for creating and working with Queues.
* \defgroup group_abstraction_rtos_semaphore Semaphore
* APIs for acquiring and working with Semaphores.
* \defgroup group_abstraction_rtos_threads Threads
* APIs for creating and working with Threads.
* \defgroup group_abstraction_rtos_time Time
* APIs for getting the current time and waiting.
* \defgroup group_abstraction_rtos_timer Timer
* APIs for creating and working with Timers.
*/
#ifdef __cplusplus
extern "C"
{
#endif
/*********************************************** CONSTANTS **********************************************/
/**
* \ingroup group_abstraction_rtos_common
* \{
*/
#if defined(DOXYGEN)
//#include "Template/cyabs_rtos_impl.h"
/** Return value indicating success */
#define CY_RSLT_SUCCESS ((cy_rslt_t)0x00000000U)
#endif
/** Used with RTOS calls that require a timeout. This implies the call will never timeout. */
#define CY_RTOS_NEVER_TIMEOUT ( (uint32_t)0xffffffffUL )
//
// Note on error strategy. If the error is a normal part of operation (timeouts, full queues, empty
// queues), the these errors are listed here and the abstraction layer implementation must map from the
// underlying errors to these. If the errors are special cases, the the error \ref CY_RTOS_GENERAL_ERROR
// will be returned and \ref cy_rtos_last_error() can be used to retrieve the RTOS specific error message.
//
/** Requested operation did not complete in the specified time */
#define CY_RTOS_TIMEOUT CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 0)
/** The RTOS could not allocate memory for the specified operation */
#define CY_RTOS_NO_MEMORY CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 1)
/** An error occured in the RTOS */
#define CY_RTOS_GENERAL_ERROR CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 2)
/** A bad argument was passed into the APIs */
#define CY_RTOS_BAD_PARAM CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 5)
/** A memory alignment issue was detected. Ensure memory provided is aligned per \ref CY_RTOS_ALIGNMENT_MASK */
#define CY_RTOS_ALIGNMENT_ERROR CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 6)
/** \} group_abstraction_rtos_common */
/**
* \ingroup group_abstraction_rtos_queue
* \{
*/
/** The Queue is already full and can't accept any more items at this time */
#define CY_RTOS_QUEUE_FULL CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 3)
/** The Queue is empty and has nothing to remove */
#define CY_RTOS_QUEUE_EMPTY CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_OS, 4)
/** \} group_abstraction_rtos_queue */
/*********************************************** TYPES **********************************************/
/**
* The state a thread can be in
*
* \ingroup group_abstraction_rtos_threads
*/
typedef enum cy_thread_state
{
CY_THREAD_STATE_INACTIVE, /**< thread has not started or was terminated but not yet joined */
CY_THREAD_STATE_READY, /**< thread can run, but is not currently */
CY_THREAD_STATE_RUNNING, /**< thread is currently running */
CY_THREAD_STATE_BLOCKED, /**< thread is blocked waiting for something */
CY_THREAD_STATE_TERMINATED, /**< thread has terminated but not freed */
CY_THREAD_STATE_UNKNOWN, /**< thread is in an unknown state */
} cy_thread_state_t;
/**
* The type of timer
*
* \ingroup group_abstraction_rtos_timer
*/
typedef enum cy_timer_trigger_type
{
CY_TIMER_TYPE_PERIODIC, /**< called periodically until stopped */
CY_TIMER_TYPE_ONCE, /**< called once only */
cy_timer_type_periodic = CY_TIMER_TYPE_PERIODIC, /**< \deprecated replaced by \ref CY_TIMER_TYPE_PERIODIC */
cy_timer_type_once = CY_TIMER_TYPE_ONCE, /**< \deprecated replaced by \ref CY_TIMER_TYPE_ONCE */
} cy_timer_trigger_type_t;
/**
* The type of a function that is the entry point for a thread
*
* @param[in] arg the argument passed from the thread create call to the entry function
*
* \ingroup group_abstraction_rtos_threads
*/
typedef void (*cy_thread_entry_fn_t)(cy_thread_arg_t arg);
/**
* The callback function to be called by a timer
*
* \ingroup group_abstraction_rtos_timer
*/
typedef void (*cy_timer_callback_t)(cy_timer_callback_arg_t arg);
/**
* Return the last error from the RTOS.
*
* The functions in the RTOS abstraction layer adhere to the Cypress return
* results calling convention. The underlying RTOS implementations will not but rather
* will have their own error code conventions. This function is provided as a service
* to the developer, mostly for debugging, and returns the underlying RTOS error code
* from the last RTOS abstraction layer that returned \ref CY_RTOS_GENERAL_ERROR.
*
* @return RTOS specific error code.
*
* \ingroup group_abstraction_rtos_common
*/
cy_rtos_error_t cy_rtos_last_error();
/*********************************************** Threads **********************************************/
/**
* \ingroup group_abstraction_rtos_threads
* \{
*/
/** Create a thread with specific thread argument.
*
* This function is called to startup a new thread. If the thread can exit, it must call
* \ref cy_rtos_exit_thread() just before doing so. All created threads that can terminate, either
* by themselves or forcefully by another thread MUST have \ref cy_rtos_join_thread() called on them
* by another thread in order to cleanup any resources that might have been allocated for them.
*
* @param[out] thread Pointer to a variable which will receive the new thread handle
* @param[in] entry_function Function pointer which points to the main function for the new thread
* @param[in] name String thread name used for a debugger
* @param[in] stack The buffer to use for the thread stack. This must be aligned to
* \ref CY_RTOS_ALIGNMENT_MASK with a size of at least \ref CY_RTOS_MIN_STACK_SIZE.
* If stack is null, cy_rtos_create_thread will allocate a stack from the heap.
* @param[in] stack_size The size of the thread stack in bytes
* @param[in] priority The priority of the thread. Values are operating system specific, but some
* common priority levels are defined:
* CY_THREAD_PRIORITY_LOW
* CY_THREAD_PRIORITY_NORMAL
* CY_THREAD_PRIORITY_HIGH
* @param[in] arg The argument to pass to the new thread
*
* @return The status of thread create request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_create_thread(cy_thread_t *thread, cy_thread_entry_fn_t entry_function,
const char *name, void *stack, uint32_t stack_size, cy_thread_priority_t priority, cy_thread_arg_t arg);
/** Exit the current thread.
*
* This function is called just before a thread exits. In some cases it is sufficient
* for a thread to just return to exit, but in other cases, the RTOS must be explicitly
* signaled. In cases where a return is sufficient, this should be a null funcition.
* where the RTOS must be signaled, this function should perform that In cases operation.
* In code using RTOS services, this function should be placed at any at any location
* where the main thread function will return, exiting the thread. Threads that can
* exit must still be joined (\ref cy_rtos_join_thread) to ensure their resources are
* fully cleaned up.
*
* @return The status of thread exit request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_exit_thread();
/** Terminates another thread.
*
* This function is called to terminate another thread and reap the resources claimed
* by the thread. This should be called both when forcibly terminating another thread
* as well as any time a thread can exit on its own. For some RTOS implementations
* this is not required as the thread resources are claimed as soon as it exits. In
* other cases, this must be called to reclaim resources. Threads that are terminated
* must still be joined (\ref cy_rtos_join_thread) to ensure their resources are fully
* cleaned up.
*
* @param[in] thread Handle of the thread to terminate
*
* @returns The status of the thread terminate. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_terminate_thread(cy_thread_t *thread);
/** Waits for a thread to complete.
*
* This must be called on any thread that can complete to ensure that any resources that
* were allocated for it are cleaned up.
*
* @param[in] thread Handle of the thread to wait for
*
* @returns The status of thread join request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_join_thread(cy_thread_t *thread);
/** Checks if the thread is running
*
* This function is called to determine if a thread is actively running or not. For information on
* the thread state, use the \ref cy_rtos_get_thread_state() function.
*
* @param[in] thread Handle of the terminated thread to delete
* @param[out] running Returns true if the thread is running, otherwise false
*
* @returns The status of the thread running check. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_is_thread_running(cy_thread_t *thread, bool *running);
/** Gets the state the thread is currently in
*
* This function is called to determine if a thread is running/blocked/inactive/ready etc.
*
* @param[in] thread Handle of the terminated thread to delete
* @param[out] state Returns the state the thread is currently in
*
* @returns The status of the thread state check. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_get_thread_state(cy_thread_t *thread, cy_thread_state_t *state);
/** Get current thread handle
*
* Returns the unique thread handle of the current running thread.
*
* @param[out] thread Handle of the current running thread
*
* @returns The status of thread join request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_get_thread_handle(cy_thread_t *thread);
/** \} group_abstraction_rtos_threads */
/*********************************************** Mutexes **********************************************/
/**
* \ingroup group_abstraction_rtos_mutex
* \{
*/
/** Create a recursive mutex.
*
* Creates a binary mutex which can be used to synchronize between threads
* and between threads and ISRs. Created mutexes are recursive and support priority inheritance.
*
* This function has been replaced by \ref cy_rtos_init_mutex2 which allow for specifying
* whether or not the mutex supports recursion or not.
*
* @param[out] mutex Pointer to the mutex handle to be initialized
*
* @return The status of mutex creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
#define cy_rtos_init_mutex(mutex) cy_rtos_init_mutex2(mutex, true)
/** Create a mutex which can support recursion or not.
*
* Creates a binary mutex which can be used to synchronize between threads and between threads and
* ISRs. Created mutexes can support priority inheritance if recursive.
*
* \note Not all RTOS implementations support non-recursive mutexes. In this case a recursive
* mutex will be created.
*
* @param[out] mutex Pointer to the mutex handle to be initialized
* @param[in] recursive Should the created mutex support recursion or not
*
* @return The status of mutex creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_init_mutex2(cy_mutex_t *mutex, bool recursive);
/** Get a mutex.
*
* If the mutex is available, it is acquired and this function returned.
* If the mutex is not available, the thread waits until the mutex is available
* or until the timeout occurs.
*
* @note This function must not be called from an interrupt context as it may block.
*
* @param[in] mutex Pointer to the mutex handle
* @param[in] timeout_ms Maximum number of milliseconds to wait while attempting to get
* the mutex. Use the \ref CY_RTOS_NEVER_TIMEOUT constant to wait forever.
* Must be zero if in_isr is true.
*
* @return The status of the get mutex. Returns timeout if mutex was not acquired
* before timeout_ms period. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_TIMEOUT, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_get_mutex(cy_mutex_t *mutex, cy_time_t timeout_ms);
/** Set a mutex.
*
* The mutex is released allowing any other threads waiting on the mutex to
* obtain the semaphore.
*
* @param[in] mutex Pointer to the mutex handle
*
* @return The status of the set mutex request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*
*/
cy_rslt_t cy_rtos_set_mutex(cy_mutex_t *mutex);
/** Deletes a mutex.
*
* This function frees the resources associated with a sempahore.
*
* @param[in] mutex Pointer to the mutex handle
*
* @return The status to the delete request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_deinit_mutex(cy_mutex_t *mutex);
/** \} group_abstraction_rtos_mutex */
/*********************************************** Semaphores **********************************************/
/**
* \ingroup group_abstraction_rtos_semaphore
* \{
*/
/**
* Create a semaphore
*
* This is basically a counting semaphore.
*
* @param[in,out] semaphore Pointer to the semaphore handle to be initialized
* @param[in] maxcount The maximum count for this semaphore
* @param[in] initcount The initial count for this semaphore
*
* @return The status of the semaphore creation. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_init_semaphore(cy_semaphore_t *semaphore, uint32_t maxcount, uint32_t initcount);
/**
* Get/Acquire a semaphore
*
* If the semaphore count is zero, waits until the semaphore count is greater than zero.
* Once the semaphore count is greater than zero, this function decrements
* the count and return. It may also return if the timeout is exceeded.
*
* @param[in] semaphore Pointer to the semaphore handle
* @param[in] timeout_ms Maximum number of milliseconds to wait while attempting to get
* the semaphore. Use the \ref CY_RTOS_NEVER_TIMEOUT constant to wait forever. Must
* be zero is in_isr is true
* @param[in] in_isr true if we are trying to get the semaphore from with an ISR
* @return The status of get semaphore operation [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_TIMEOUT, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_get_semaphore(cy_semaphore_t *semaphore, cy_time_t timeout_ms, bool in_isr);
/**
* Set/Release a semaphore
*
* Increments the semaphore count, up to the maximum count for this semaphore.
*
* @param[in] semaphore Pointer to the semaphore handle
* @param[in] in_isr Value of true indicates calling from interrupt context
* Value of false indicates calling from normal thread context
* @return The status of set semaphore operation [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_set_semaphore(cy_semaphore_t *semaphore, bool in_isr);
/**
* Get the count of a semaphore.
*
* Gets the number of available tokens on the semaphore.
*
* @param[in] semaphore Pointer to the semaphore handle
* @param[out] count Pointer to the return count
* @return The status of get semaphore count operation [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_get_count_semaphore(cy_semaphore_t *semaphore, size_t *count);
/**
* Deletes a semaphore
*
* This function frees the resources associated with a semaphore.
*
* @param[in] semaphore Pointer to the semaphore handle
*
* @return The status of semaphore deletion [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_deinit_semaphore(cy_semaphore_t *semaphore);
/** \} group_abstraction_rtos_semaphore */
/*********************************************** Events **********************************************/
/**
* \ingroup group_abstraction_rtos_event
* \{
*/
/** Create an event.
*
* This is an event which can be used to signal a set of threads
* with a 32 bit data element.
*
* @param[in,out] event Pointer to the event handle to be initialized
*
* @return The status of the event initialization request.
* [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_init_event(cy_event_t *event);
/** Set the event flag bits.
*
* This is an event which can be used to signal a set of threads
* with a 32 bit data element. Any threads waiting on this event are released
*
* @param[in] event Pointer to the event handle
* @param[in] bits The value of the 32 bit flags
* @param[in] in_isr If true, this is called from an ISR, otherwise from a thread
*
* @return The status of the set request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_setbits_event(cy_event_t *event, uint32_t bits, bool in_isr) ;
/**
* Clear the event flag bits
*
* This function clears bits in the event.
*
* @param[in] event Pointer to the event handle
* @param[in] bits Any bits set in this value, will be cleared in the event.
* @param[in] in_isr if true, this is called from an ISR, otherwise from a thread
*
* @return The status of the clear flags request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_clearbits_event(cy_event_t *event, uint32_t bits, bool in_isr) ;
/** Get the event bits.
*
* Returns the current bits for the event.
*
* @param[in] event Pointer to the event handle
* @param[out] bits pointer to receive the value of the event flags
*
* @return The status of the get request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_getbits_event(cy_event_t *event, uint32_t *bits);
/** Wait for the event and return bits.
*
* Waits for the event to be set and then returns the bits associated
* with the event, or waits for the given timeout period.
* @note This function returns if any bit in the set is set.
*
* @param[in] event Pointer to the event handle
* @param[in,out] bits pointer to receive the value of the event flags
* @param[in] clear if true, clear any bits set that cause the wait to return
* if false, do not clear bits
* @param[in] all if true, all bits in the initial bits value must be set to return
* if false, any one bit in the initial bits value must be set to return
* @param[in] timeout The amount of time to wait in milliseconds
*
* @return The status of the wait for event request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_waitbits_event(cy_event_t *event, uint32_t *bits, bool clear, bool all, cy_time_t timeout);
/** Deinitialize a event.
*
* This function frees the resources associated with an event.
*
* @param[in] event Pointer to the event handle
*
* @return The status of the deletion request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_deinit_event(cy_event_t *event);
/** \} group_abstraction_rtos_event */
/*********************************************** Queues **********************************************/
/**
* \ingroup group_abstraction_rtos_queue
* \{
*/
/** Create a queue.
*
* This is a queue of data where entries are placed on the back of the queue
* and removed from the front of the queue.
*
* @param[out] queue Pointer to the queue handle
* @param[in] length The maximum length of the queue in items
* @param[in] itemsize The size of each item in the queue.
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_init_queue(cy_queue_t *queue, size_t length, size_t itemsize);
/** Put an item in a queue.
*
* This function puts an item in the queue. The item is copied
* into the queue using a memory copy and the data pointed to by item_ptr
* is no longer referenced once the call returns.
*
* @note If in_isr is true, timeout_ms must be zero.
*
* @param[in] queue Pointer to the queue handle
* @param[in] item_ptr Pointer to the item to place in the queue
* @param[in] timeout_ms The time to wait to place the item in the queue
* @param[in] in_isr If true this is being called from within and ISR
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR, \ref CY_RTOS_QUEUE_FULL]
*/
cy_rslt_t cy_rtos_put_queue(cy_queue_t *queue, const void *item_ptr, cy_time_t timeout_ms, bool in_isr);
/** Gets an item in a queue.
*
* This function gets an item from the queue. The item is copied
* out of the queue into the memory provide by item_ptr. This space must be
* large enough to hold a queue entry as defined when the queue was initialized.
*
* @note If in_isr is true, timeout_ms must be zero.
*
* @param[in] queue Pointer to the queue handle
* @param[in] item_ptr Pointer to the memory for the item from the queue
* @param[in] timeout_ms The time to wait to get an item from the queue
* @param[in] in_isr If true this is being called from within an ISR
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_NO_MEMORY, \ref CY_RTOS_GENERAL_ERROR, \ref CY_RTOS_QUEUE_EMPTY]
*/
cy_rslt_t cy_rtos_get_queue(cy_queue_t *queue, void *item_ptr, cy_time_t timeout_ms, bool in_isr);
/** Return the number of items in the queue.
*
* This function returns the number of items currently in the queue.
*
* @param[in] queue Pointer to the queue handle
* @param[out] num_waiting Pointer to the return count
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_count_queue(cy_queue_t *queue, size_t *num_waiting);
/** Return the amount of empty space in the queue.
*
* This function returns the amount of empty space in the
* queue. For instance, if the queue was created with 10 entries max and there
* are currently 2 entries in the queue, this will return 8.
*
* @param[in] queue Pointer to the queue handle
* @param[out] num_spaces Pointer to the return count.
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_space_queue(cy_queue_t *queue, size_t *num_spaces);
/** Reset the queue.
*
* This function sets the queue to empty.
*
* @param[in] queue pointer to the queue handle
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_reset_queue(cy_queue_t *queue);
/** Deinitialize the queue handle.
*
* This function de-initializes the queue and returns all
* resources used by the queue.
*
* @param[in] queue Pointer to the queue handle
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_deinit_queue(cy_queue_t *queue);
/** \} group_abstraction_rtos_queue */
/*********************************************** Timers **********************************************/
/**
* \ingroup group_abstraction_rtos_timer
* \{
*/
/** Create a new timer.
*
* This function initializes a timer object.
* @note The timer is not active until start is called.
* @note The callback may be (likely will be) called from a different thread.
*
* @param[out] timer Pointer to the timer handle to initialize
* @param[in] type Type of timer (periodic or once)
* @param[in] fun The function
* @param[in] arg Argument to pass along to the callback function
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_init_timer(cy_timer_t *timer, cy_timer_trigger_type_t type,
cy_timer_callback_t fun, cy_timer_callback_arg_t arg);
/** Start a timer.
*
* @param[in] timer Pointer to the timer handle
* @param[in] num_ms The number of milliseconds to wait before the timer fires
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_start_timer(cy_timer_t *timer, cy_time_t num_ms);
/** Stop a timer.
*
* @param[in] timer Pointer to the timer handle
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_stop_timer(cy_timer_t *timer);
/** Returns state of a timer.
*
* @param[in] timer Pointer to the timer handle
* @param[out] state Return value for state, true if running, false otherwise
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_is_running_timer(cy_timer_t *timer, bool *state);
/** Deinit the timer.
*
* This function deinitializes the timer and frees all consumed resources.
*
* @param[in] timer Pointer to the timer handle
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_deinit_timer(cy_timer_t *timer);
/** \} group_abstraction_rtos_timer */
/*********************************************** Time **********************************************/
/**
* \ingroup group_abstraction_rtos_time
* \{
*/
/** Gets time in milliseconds since RTOS start.
*
* @note Since this is only 32 bits, it will roll over every 49 days, 17 hours, 2 mins, 47.296 seconds
*
* @param[out] tval Pointer to the struct to populate with the RTOS time
*
* @returns Time in milliseconds since the RTOS started.
*/
cy_rslt_t cy_rtos_get_time(cy_time_t *tval);
/** Delay for a number of milliseconds.
*
* Processing of this function depends on the minimum sleep
* time resolution of the RTOS. The current thread should sleep for
* the longest period possible which is less than the delay required,
* then makes up the difference with a tight loop.
*
* @param[in] num_ms The number of milliseconds to delay for
*
* @return The status of the creation request. [\ref CY_RSLT_SUCCESS, \ref CY_RTOS_GENERAL_ERROR]
*/
cy_rslt_t cy_rtos_delay_milliseconds(cy_time_t num_ms);
/** \} group_abstraction_rtos_time */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* ifndef INCLUDED_CY_RTOS_INTERFACE_H_ */

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@ -1,77 +0,0 @@
/***************************************************************************//**
* \file cyabs_rtos_impl.h
*
* \brief
* Internal definitions for RTOS abstraction layer
*
********************************************************************************
* \copyright
* Copyright 2019-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef INCLUDED_CYABS_RTOS_IMPL_H_
#define INCLUDED_CYABS_RTOS_IMPL_H_
#include "cmsis_os2.h"
#include "rtx_os.h"
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************
* Constants
******************************************************/
#define CY_RTOS_MIN_STACK_SIZE 300 /** Minimum stack size in bytes */
#define CY_RTOS_ALIGNMENT 0x00000008UL /** Minimum alignment for RTOS objects */
#define CY_RTOS_ALIGNMENT_MASK 0x00000007UL /** Mask for checking the alignment of created RTOS objects */
/******************************************************
* Type Definitions
******************************************************/
/* RTOS thread priority */
typedef enum
{
CY_RTOS_PRIORITY_MIN = osPriorityNone,
CY_RTOS_PRIORITY_LOW = osPriorityLow,
CY_RTOS_PRIORITY_BELOWNORMAL = osPriorityBelowNormal,
CY_RTOS_PRIORITY_NORMAL = osPriorityNormal,
CY_RTOS_PRIORITY_ABOVENORMAL = osPriorityAboveNormal,
CY_RTOS_PRIORITY_HIGH = osPriorityHigh,
CY_RTOS_PRIORITY_REALTIME = osPriorityRealtime,
CY_RTOS_PRIORITY_MAX = osPriorityRealtime7
} cy_thread_priority_t ;
typedef osThreadId_t cy_thread_t; /** CMSIS definition of a thread handle */
typedef void * cy_thread_arg_t; /** Argument passed to the entry function of a thread */
typedef osMutexId_t cy_mutex_t; /** CMSIS definition of a mutex */
typedef osSemaphoreId_t cy_semaphore_t; /** CMSIS definition of a semaphore */
typedef osEventFlagsId_t cy_event_t; /** CMSIS definition of an event */
typedef osMessageQueueId_t cy_queue_t; /** CMSIS definition of a message queue */
typedef osTimerId_t cy_timer_t; /** CMSIS definition of a timer */
typedef void * cy_timer_callback_arg_t; /** Argument passed to the timer callback function */
typedef uint32_t cy_time_t; /** Time in milliseconds */
typedef osStatus_t cy_rtos_error_t; /** CMSIS definition of a error status */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* ifndef INCLUDED_CYABS_RTOS_IMPL_H_ */

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@ -1,863 +0,0 @@
/***************************************************************************//**
* \file cyabs_rtos.c
*
* \brief
* Implementation for CMSIS RTOS v2 abstraction
*
********************************************************************************
* \copyright
* Copyright 2018-2020 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#include <stdlib.h>
#include <cy_utils.h>
#include <cyabs_rtos.h>
#if defined(__cplusplus)
extern "C" {
#endif
/******************************************************
* Error Converter
******************************************************/
/* Last received error status */
static cy_rtos_error_t dbgErr;
cy_rtos_error_t cy_rtos_last_error() { return dbgErr; }
/* Converts internal error type to external error type */
static cy_rslt_t error_converter(cy_rtos_error_t internalError)
{
cy_rslt_t value;
switch (internalError)
{
case osOK:
value = CY_RSLT_SUCCESS;
break;
case osErrorTimeout:
value = CY_RTOS_TIMEOUT;
break;
case osErrorParameter:
value = CY_RTOS_BAD_PARAM;
break;
case osErrorNoMemory:
value = CY_RTOS_NO_MEMORY;
break;
case osError:
case osErrorResource:
case osErrorISR:
default:
value = CY_RTOS_GENERAL_ERROR;
break;
}
/* Update the last known error status */
dbgErr = internalError;
return value;
}
/******************************************************
* Threads
******************************************************/
cy_rslt_t cy_rtos_create_thread(cy_thread_t *thread, cy_thread_entry_fn_t entry_function,
const char *name, void *stack, uint32_t stack_size, cy_thread_priority_t priority, cy_thread_arg_t arg)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
osThreadAttr_t attr;
if (thread == NULL || stack_size < CY_RTOS_MIN_STACK_SIZE)
status = CY_RTOS_BAD_PARAM;
else if (stack != NULL && (0 != (((uint32_t)stack) & CY_RTOS_ALIGNMENT_MASK)))
status = CY_RTOS_ALIGNMENT_ERROR;
else
{
attr.name = name;
attr.attr_bits = osThreadJoinable;
attr.cb_size = osRtxThreadCbSize;
attr.stack_size = stack_size;
attr.priority = (osPriority_t)priority;
attr.tz_module = 0;
attr.reserved = 0;
/* Allocate stack if NULL was passed */
if ((uint32_t *)stack == NULL)
{
/* Note: 1 malloc so that it can be freed with 1 call when terminating */
uint32_t cb_mem_pad = (~osRtxThreadCbSize + 1) & CY_RTOS_ALIGNMENT_MASK;
attr.cb_mem = malloc(osRtxThreadCbSize + cb_mem_pad + stack_size);
if (attr.cb_mem != NULL)
attr.stack_mem = (uint32_t *)((uint32_t)attr.cb_mem + osRtxThreadCbSize + cb_mem_pad);
}
else
{
attr.cb_mem = malloc(osRtxThreadCbSize);
attr.stack_mem = stack;
}
if (attr.cb_mem == NULL)
status = CY_RTOS_NO_MEMORY;
else
{
CY_ASSERT(((uint32_t)attr.cb_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
CY_ASSERT(((uint32_t)attr.stack_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
*thread = osThreadNew((osThreadFunc_t)entry_function, arg, &attr);
CY_ASSERT((*thread == attr.cb_mem) || (*thread == NULL));
status = (*thread == NULL) ? CY_RTOS_GENERAL_ERROR : CY_RSLT_SUCCESS;
}
}
return status;
}
cy_rslt_t cy_rtos_exit_thread()
{
/* This does not have a return statement because the osThreadExit() function
* does not return so the return statement would be unreachable and causes a
* warning for IAR compiler.
*/
osThreadExit();
}
cy_rslt_t cy_rtos_terminate_thread(cy_thread_t *thread)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (thread == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osThreadTerminate(*thread);
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_is_thread_running(cy_thread_t *thread, bool *running)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if ((thread == NULL) || (running == NULL))
status = CY_RTOS_BAD_PARAM;
else
{
*running = (osThreadGetState(*thread) == osThreadRunning) ? true : false;
}
return status;
}
cy_rslt_t cy_rtos_get_thread_state(cy_thread_t *thread, cy_thread_state_t *state)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if ((thread == NULL) || (state == NULL))
status = CY_RTOS_BAD_PARAM;
else
{
switch (osThreadGetState(*thread))
{
case osThreadInactive:
*state = CY_THREAD_STATE_INACTIVE;
break;
case osThreadReady:
*state = CY_THREAD_STATE_READY;
break;
case osThreadRunning:
*state = CY_THREAD_STATE_RUNNING;
break;
case osThreadBlocked:
*state = CY_THREAD_STATE_BLOCKED;
break;
case osThreadTerminated:
*state = CY_THREAD_STATE_TERMINATED;
break;
case osThreadError:
case osThreadReserved:
default:
*state = CY_THREAD_STATE_UNKNOWN;
break;
}
}
return status;
}
cy_rslt_t cy_rtos_join_thread(cy_thread_t *thread)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (thread == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osThreadJoin(*thread);
status = error_converter(statusInternal);
if (status == CY_RSLT_SUCCESS)
{
free(*thread);
*thread = NULL;
}
}
return status;
}
cy_rslt_t cy_rtos_get_thread_handle(cy_thread_t *thread)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if (thread == NULL)
status = CY_RTOS_BAD_PARAM;
else
*thread = osThreadGetId();
return status;
}
/******************************************************
* Mutexes
******************************************************/
cy_rslt_t cy_rtos_init_mutex2(cy_mutex_t *mutex, bool recursive)
{
cy_rslt_t status;
osMutexAttr_t attr;
if (mutex == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
attr.name = NULL;
attr.attr_bits = osMutexPrioInherit;
if (recursive)
{
attr.attr_bits |= osMutexRecursive;
}
attr.cb_mem = malloc(osRtxMutexCbSize);
attr.cb_size = osRtxMutexCbSize;
if (attr.cb_mem == NULL)
status = CY_RTOS_NO_MEMORY;
else
{
CY_ASSERT(((uint32_t)attr.cb_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
*mutex = osMutexNew(&attr);
CY_ASSERT((*mutex == attr.cb_mem) || (*mutex == NULL));
status = (*mutex == NULL) ? CY_RTOS_GENERAL_ERROR : CY_RSLT_SUCCESS;
}
}
return status;
}
cy_rslt_t cy_rtos_get_mutex(cy_mutex_t *mutex, cy_time_t timeout_ms)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (mutex == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osMutexAcquire(*mutex, timeout_ms);
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_set_mutex(cy_mutex_t *mutex)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (mutex == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osMutexRelease(*mutex);
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_deinit_mutex(cy_mutex_t *mutex)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (mutex == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osMutexDelete(*mutex);
status = error_converter(statusInternal);
if (status == CY_RSLT_SUCCESS)
{
free(*mutex);
*mutex = NULL;
}
}
return status;
}
/******************************************************
* Semaphores
******************************************************/
cy_rslt_t cy_rtos_init_semaphore(cy_semaphore_t *semaphore, uint32_t maxcount, uint32_t initcount)
{
cy_rslt_t status;
osSemaphoreAttr_t attr;
if (semaphore == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
attr.name = NULL;
attr.attr_bits = 0U;
attr.cb_mem = malloc(osRtxSemaphoreCbSize);
attr.cb_size = osRtxSemaphoreCbSize;
if (attr.cb_mem == NULL)
status = CY_RTOS_NO_MEMORY;
else
{
CY_ASSERT(((uint32_t)attr.cb_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
*semaphore = osSemaphoreNew(maxcount, initcount, &attr);
CY_ASSERT((*semaphore == attr.cb_mem) || (*semaphore == NULL));
status = (*semaphore == NULL) ? CY_RTOS_GENERAL_ERROR : CY_RSLT_SUCCESS;
}
}
return status;
}
cy_rslt_t cy_rtos_get_semaphore(cy_semaphore_t *semaphore, cy_time_t timeout_ms, bool in_isr)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
cy_rtos_error_t statusInternal;
if (semaphore == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
/* Not allowed to be called in ISR if timeout != 0 */
if ((!in_isr) || (in_isr && (timeout_ms == 0U)))
statusInternal = osSemaphoreAcquire(*semaphore, timeout_ms);
else
statusInternal = osErrorISR;
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_set_semaphore(cy_semaphore_t *semaphore, bool in_isr)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
cy_rtos_error_t statusInternal;
(void)in_isr; // Unused parameter in this implementation
if (semaphore == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osSemaphoreRelease(*semaphore);
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_get_count_semaphore(cy_semaphore_t *semaphore, size_t *count)
{
cy_rslt_t status;
if (semaphore == NULL || count == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
*count = osSemaphoreGetCount(*semaphore);
status = CY_RSLT_SUCCESS;
}
return status;
}
cy_rslt_t cy_rtos_deinit_semaphore(cy_semaphore_t *semaphore)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (semaphore == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osSemaphoreDelete(*semaphore);
status = error_converter(statusInternal);
if (status == CY_RSLT_SUCCESS)
{
free(*semaphore);
*semaphore = NULL;
}
}
return status;
}
/******************************************************
* Events
******************************************************/
#define CY_RTOS_EVENT_ERRORFLAG 0x80000000UL
#define CY_RTOS_EVENT_FLAGS 0x7FFFFFFFUL
cy_rslt_t cy_rtos_init_event(cy_event_t *event)
{
cy_rslt_t status;
osEventFlagsAttr_t attr;
if (event == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
attr.name = NULL;
attr.attr_bits = 0U;
attr.cb_mem = malloc(osRtxEventFlagsCbSize);
attr.cb_size = osRtxEventFlagsCbSize;
if (attr.cb_mem == NULL)
status = CY_RTOS_NO_MEMORY;
else
{
CY_ASSERT(((uint32_t)attr.cb_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
*event = osEventFlagsNew(&attr);
CY_ASSERT((*event == attr.cb_mem) || (*event == NULL));
status = (*event == NULL) ? CY_RTOS_GENERAL_ERROR : CY_RSLT_SUCCESS;
}
}
return status;
}
cy_rslt_t cy_rtos_setbits_event(cy_event_t *event, uint32_t bits, bool in_isr)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
cy_rtos_error_t statusInternal;
(void)in_isr; // Unused parameter in this implementation
if (event == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = (osStatus_t)osEventFlagsSet(*event, bits);
if ((statusInternal & CY_RTOS_EVENT_ERRORFLAG) != 0UL)
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_clearbits_event(cy_event_t *event, uint32_t bits, bool in_isr)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
cy_rtos_error_t statusInternal;
(void)in_isr; // Unused parameter in this implementation
if (event == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = (osStatus_t)osEventFlagsClear(*event, bits);
if ((statusInternal & CY_RTOS_EVENT_ERRORFLAG) != 0UL)
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_getbits_event(cy_event_t *event, uint32_t *bits)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if ((event == NULL) || (bits == NULL))
status = CY_RTOS_BAD_PARAM;
else
*bits = osEventFlagsGet(*event);
return status;
}
cy_rslt_t cy_rtos_waitbits_event(cy_event_t *event, uint32_t *bits, bool clear, bool all, cy_time_t timeout)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
cy_rtos_error_t statusInternal;
uint32_t flagOption;
if ((event == NULL) || (bits == NULL))
status = CY_RTOS_BAD_PARAM;
else
{
flagOption = (all) ? osFlagsWaitAll : osFlagsWaitAny;
if (!clear)
flagOption |= osFlagsNoClear;
statusInternal = (osStatus_t)osEventFlagsWait(*event, *bits, flagOption, timeout);
if ((statusInternal & CY_RTOS_EVENT_ERRORFLAG) == 0UL)
*bits = statusInternal;
else
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_deinit_event(cy_event_t *event)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (event == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osEventFlagsDelete(*event);
status = error_converter(statusInternal);
if (status == CY_RSLT_SUCCESS)
{
free(*event);
*event = NULL;
}
}
return status;
}
/******************************************************
* Queues
******************************************************/
cy_rslt_t cy_rtos_init_queue(cy_queue_t *queue, size_t length, size_t itemsize)
{
cy_rslt_t status;
osMessageQueueAttr_t attr;
if (queue == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
attr.name = NULL;
attr.attr_bits = 0U;
attr.cb_size = osRtxMessageQueueCbSize;
uint32_t blockSize = ((itemsize + 3U) & ~3UL) + sizeof(osRtxMessage_t);
attr.mq_size = blockSize * length;
/* Note: 1 malloc for both so that they can be freed with 1 call */
uint32_t cb_mem_pad = (8 - (osRtxMessageQueueCbSize & 0x07)) & 0x07;
attr.cb_mem = malloc(osRtxMessageQueueCbSize + cb_mem_pad + attr.mq_size);
if (attr.cb_mem != NULL)
attr.mq_mem = (uint32_t *)((uint32_t)attr.cb_mem + osRtxMessageQueueCbSize + cb_mem_pad);
if (attr.cb_mem == NULL)
status = CY_RTOS_NO_MEMORY;
else
{
CY_ASSERT(((uint32_t)attr.cb_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
CY_ASSERT(((uint32_t)attr.mq_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
*queue = osMessageQueueNew(length, itemsize, &attr);
CY_ASSERT((*queue == attr.cb_mem) || (*queue == NULL));
status = (*queue == NULL) ? CY_RTOS_GENERAL_ERROR : CY_RSLT_SUCCESS;
}
}
return status;
}
cy_rslt_t cy_rtos_put_queue(cy_queue_t *queue, const void *item_ptr, cy_time_t timeout_ms, bool in_isr)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if ((queue == NULL) || (item_ptr == NULL))
status = CY_RTOS_BAD_PARAM;
else
{
/* Not allowed to be called in ISR if timeout != 0 */
if ((!in_isr) || (in_isr && (timeout_ms == 0U)))
statusInternal = osMessageQueuePut(*queue, (uint8_t *)item_ptr, 0u, timeout_ms);
else
statusInternal = osErrorISR;
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_get_queue(cy_queue_t *queue, void *item_ptr, cy_time_t timeout_ms, bool in_isr)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if ((queue == NULL) || (item_ptr == NULL))
status = CY_RTOS_BAD_PARAM;
else
{
/* Not allowed to be called in ISR if timeout != 0 */
if ((!in_isr) || (in_isr && (timeout_ms == 0U)))
statusInternal = osMessageQueueGet(*queue, (uint8_t *)item_ptr, 0u, timeout_ms);
else
statusInternal = osErrorISR;
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_count_queue(cy_queue_t *queue, size_t *num_waiting)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if ((queue == NULL) || (num_waiting == NULL))
status = CY_RTOS_BAD_PARAM;
else
*num_waiting = osMessageQueueGetCount(*queue);
return status;
}
cy_rslt_t cy_rtos_space_queue(cy_queue_t *queue, size_t *num_spaces)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if ((queue == NULL) || (num_spaces == NULL))
status = CY_RTOS_BAD_PARAM;
else
*num_spaces = osMessageQueueGetSpace(*queue);
return status;
}
cy_rslt_t cy_rtos_reset_queue(cy_queue_t *queue)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (queue == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osMessageQueueReset(*queue);
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_deinit_queue(cy_queue_t *queue)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (queue == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osMessageQueueDelete(*queue);
status = error_converter(statusInternal);
if (status == CY_RSLT_SUCCESS)
{
free(*queue);
*queue = NULL;
}
}
return status;
}
/******************************************************
* Timers
******************************************************/
cy_rslt_t cy_rtos_init_timer(cy_timer_t *timer, cy_timer_trigger_type_t type,
cy_timer_callback_t fun, cy_timer_callback_arg_t arg)
{
cy_rslt_t status;
osTimerAttr_t attr;
if (timer == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
attr.name = NULL;
attr.attr_bits = 0U;
attr.cb_mem = malloc(osRtxTimerCbSize);
attr.cb_size = osRtxTimerCbSize;
if (attr.cb_mem == NULL)
status = CY_RTOS_NO_MEMORY;
else
{
osTimerType_t osTriggerType = (CY_TIMER_TYPE_PERIODIC == type)
? osTimerPeriodic
: osTimerOnce;
CY_ASSERT(((uint32_t)attr.cb_mem & CY_RTOS_ALIGNMENT_MASK) == 0UL);
*timer = osTimerNew( (osTimerFunc_t)fun, osTriggerType, (void *)arg, &attr );
CY_ASSERT((*timer == attr.cb_mem) || (*timer == NULL));
status = (*timer == NULL) ? CY_RTOS_GENERAL_ERROR : CY_RSLT_SUCCESS;
}
}
return status;
}
cy_rslt_t cy_rtos_start_timer(cy_timer_t *timer, cy_time_t num_ms)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (timer == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
/* Get Number of ticks per second */
uint32_t tick_freq = osKernelGetTickFreq();
/* Convert ticks count to time in milliseconds */
if (tick_freq != 0)
{
uint32_t ticks = ((num_ms * tick_freq) / 1000);
statusInternal = osTimerStart(*timer, ticks);
status = error_converter(statusInternal);
}
else
status = CY_RTOS_GENERAL_ERROR;
}
return status;
}
cy_rslt_t cy_rtos_stop_timer(cy_timer_t *timer)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (timer == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osTimerStop(*timer);
status = error_converter(statusInternal);
}
return status;
}
cy_rslt_t cy_rtos_is_running_timer(cy_timer_t *timer, bool *state)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
if ((timer == NULL) || (state == NULL))
status = CY_RTOS_BAD_PARAM;
else
*state = osTimerIsRunning(*timer);
return status;
}
cy_rslt_t cy_rtos_deinit_timer(cy_timer_t *timer)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
if (timer == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
statusInternal = osTimerDelete(*timer);
status = error_converter(statusInternal);
if (status == CY_RSLT_SUCCESS)
{
free(*timer);
*timer = NULL;
}
}
return status;
}
/******************************************************
* Time
******************************************************/
cy_rslt_t cy_rtos_get_time(cy_time_t *tval)
{
cy_rslt_t status = CY_RSLT_SUCCESS;
uint32_t tick_freq;
if (tval == NULL)
status = CY_RTOS_BAD_PARAM;
else
{
/* Get Number of ticks per second */
tick_freq = osKernelGetTickFreq();
/* Convert ticks count to time in milliseconds */
if (tick_freq != 0)
*tval = (cy_time_t)((osKernelGetTickCount() * 1000LL) / tick_freq);
else
status = CY_RTOS_GENERAL_ERROR;
}
return status;
}
cy_rslt_t cy_rtos_delay_milliseconds(cy_time_t num_ms)
{
cy_rslt_t status;
cy_rtos_error_t statusInternal;
statusInternal = osDelay(num_ms);
status = error_converter(statusInternal);
return status;
}
#if defined(__cplusplus)
}
#endif

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@ -1,49 +0,0 @@
/*
* Copyright 2020 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/** @file
* Provides wiced fs porting to generic mbed APIs
*/
#pragma once
#include "whd_config.h"
#include "BlockDevice.h"
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************
* Type Definitions
******************************************************/
/**
* Mount the physical device
*
* This assumes that the device is ready to read/write immediately.
*
* @param[in] device - physical media to init
* @param[out] fs_handle_out - Receives the filesystem handle.
*
* @return WICED_SUCCESS on success
*/
wiced_result_t wiced_filesystem_mount(mbed::BlockDevice *device, wiced_filesystem_handle_type_t fs_type, wiced_filesystem_t *fs_handle_out, const char *mounted_name);
#ifdef __cplusplus
} /*extern "C" */
#endif

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@ -1,214 +0,0 @@
/*
* Copyright 2020 Arduino SA
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/** @file
* Provides wiced fs porting to generic mbed APIs
*/
#include <stddef.h>
#include <stdio.h>
#include <stdbool.h>
#include <string>
#include "sockets.h"
#include "resources.h"
#include "wiced_filesystem.h"
#include "wiced_bd.h"
#include "QSPIFBlockDevice.h"
#include "MBRBlockDevice.h"
#include "FATFileSystem.h"
#define WIFI_DEFAULT_FIRMWARE_PATH "/wlan/4343WA1.BIN"
#define WIFI_DEFAULT_MOUNT_NAME "wlan"
#define WIFI_DEFAULT_PARTITION 1
#define WIFI_DEFAULT_FS 0
QSPIFBlockDevice *qspi_bd = NULL;
MBRBlockDevice *mbr_bd = NULL;
FATFileSystem *wifi_fs = NULL;
wiced_filesystem_t resource_fs_handle;
MBED_WEAK void wiced_filesystem_mount_error(void)
{
WPRINT_WHD_ERROR(("Failed to mount the filesystem containing the WiFi firmware.\n\r"));
whd_print_logbuffer();
while (1) {}
}
MBED_WEAK void wiced_filesystem_firmware_error(void)
{
WPRINT_WHD_ERROR(("Please run the \"PortentaWiFiFirmwareUpdater\" sketch once to install the WiFi firmware.\n\r"));
whd_print_logbuffer();
while (1) {}
}
MBED_WEAK wiced_result_t whd_firmware_check_hook(const char *mounted_name, int mount_err)
{
DIR *dir;
struct dirent *ent;
std::string dir_name(mounted_name);
if (mount_err) {
wiced_filesystem_mount_error();
} else {
if ((dir = opendir(mounted_name)) != NULL) {
// print all the files and directories within directory
while ((ent = readdir(dir)) != NULL) {
std::string fullname = "/" + dir_name + "/" + std::string(ent->d_name);
if (fullname == WIFI_DEFAULT_FIRMWARE_PATH) {
closedir(dir);
return WICED_SUCCESS;
}
}
closedir(dir);
}
wiced_filesystem_firmware_error();
}
return WICED_ERROR;
}
static wiced_result_t whd_default_firmware_restore(void)
{
#if MBED_CONF_APP_WIFI_FIRMWARE_RESTORE
size_t ret;
FILE *fp;
//This should only happen the firs time or if the partition table has been overwritten i.e QSPI tests
WPRINT_WHD_DEBUG(("MBRBlockDevice init failed, repatitioning\n\r"));
if (mbr_bd->partition(qspi_bd, 1, 0x0B, 0, 1024 * 1024) != BD_ERROR_OK) {
return WICED_ERROR;
}
WPRINT_WHD_DEBUG(("MBRBockDevice repatitioning OK, reinit\n\r"));
if (mbr_bd->init() != BD_ERROR_OK) {
return WICED_ERROR;
}
WPRINT_WHD_DEBUG(("MBRBockDevice init OK\n\r"));
wifi_fs = new FATFileSystem(WIFI_DEFAULT_MOUNT_NAME);
if (wifi_fs->reformat(mbr_bd) != 0) {
return WICED_ERROR;
}
WPRINT_WHD_DEBUG(("FATFileSystem reformat and mount OK\n\r"));
fp = fopen(WIFI_DEFAULT_FIRMWARE_PATH, "wb");
if (fp == NULL) {
return WICED_ERROR;
}
ret = fwrite(wifi_firmware_image_data, wifi_firmware_image.size, 1, fp);
if (ret != wifi_firmware_image.size) {
return WICED_ERROR;
}
fclose(fp);
if (mbr_bd->sync() != 0) {
return WICED_ERROR;
}
WPRINT_WHD_DEBUG(("Sync BlockDevice OK\n\r"));
if (wifi_fs->unmount() != 0) {
return WICED_ERROR;
}
WPRINT_WHD_DEBUG(("Unmount FS\n\r"));
wifi_fs = NULL;
#endif
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_init(void)
{
if (mbr_bd == NULL && wifi_fs == NULL) {
WPRINT_WHD_DEBUG(("Initialize FileSystem with Mbed default settings\n\r"));
qspi_bd = new QSPIFBlockDevice(PD_11, PD_12, PF_7, PD_13, PF_10, PG_6, QSPIF_POLARITY_MODE_1, 40000000);
if (qspi_bd->init() == BD_ERROR_OK) {
mbr_bd = new MBRBlockDevice(qspi_bd, WIFI_DEFAULT_PARTITION);
if (mbr_bd->init() == BD_ERROR_OK) {
return WICED_SUCCESS;
} else {
return whd_default_firmware_restore();
}
}
return WICED_ERROR;
} else {
WPRINT_WHD_DEBUG(("FileSystem initialized with user settings\n\r"));
return WICED_SUCCESS;
}
}
wiced_result_t wiced_filesystem_mount(BlockDevice *device, wiced_filesystem_handle_type_t fs_type, wiced_filesystem_t *fs_handle_out, const char *mounted_name)
{
wifi_fs = new FATFileSystem(mounted_name);
int err = wifi_fs->mount(device);
whd_firmware_check_hook(mounted_name, err);
if (!err) {
//fs_handle_out = wifi_fs
return WICED_SUCCESS;
}
return WICED_ERROR;
}
wiced_result_t wiced_filesystem_file_open(wiced_filesystem_t *fs_handle, wiced_file_t *file_handle_out, const char *filename, wiced_filesystem_open_mode_t mode)
{
/* This is called by mbed test system */
//if (mbr_bd == NULL && wifi_fs == NULL) {
// wiced_filesystem_init();
//}
//This can be called from user sketch to provide custom block device and mount point before WiFi.beginAP or WiFi.begin
if (wifi_fs == NULL) {
wiced_filesystem_mount(mbr_bd, WIFI_DEFAULT_FS, fs_handle, WIFI_DEFAULT_MOUNT_NAME);
}
if (wifi_fs == NULL) {
return WICED_ERROR;
}
*file_handle_out = open(filename, mode);
if (*file_handle_out == -1) {
return WICED_ERROR;
}
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_file_seek(wiced_file_t *file_handle, int64_t offset, wiced_filesystem_seek_type_t whence)
{
if (*file_handle == -1) {
return WICED_ERROR;
}
lseek(*file_handle, offset, whence);
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_file_read(wiced_file_t *file_handle, void *data, uint64_t bytes_to_read, uint64_t *returned_bytes_count)
{
if (*file_handle == -1) {
return WICED_ERROR;
}
*returned_bytes_count = read(*file_handle, data, bytes_to_read);
return WICED_SUCCESS;
}
wiced_result_t wiced_filesystem_file_close(wiced_file_t *file_handle)
{
if (*file_handle == -1) {
return WICED_ERROR;
}
close(*file_handle);
return WICED_SUCCESS;
}

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@ -1,309 +0,0 @@
/*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* <h2><center>&copy; Copyright (c) 2020 Arduino SA.
* All rights reserved.</center></h2>
*
* SPDX-License-Identifier: BSD-3-Clause
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/**
* This file configures the system clock as follows:
*--------------------------------------------------------------------
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
* | 3- USE_PLL_HSI (internal 64 MHz clock)
*--------------------------------------------------------------------
* SYSCLK(MHz) | 480
* AHBCLK (MHz) | 240
* APB1CLK (MHz) | 120
* APB2CLK (MHz) | 120
* APB3CLK (MHz) | 120
* APB4CLK (MHz) | 120
* USB capable (48 MHz) | YES
*--------------------------------------------------------------------
**/
#include "stm32h7xx.h"
#include "nvic_addr.h"
#include "mbed_error.h"
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
#define USE_PLL_HSI 0x2 // Use HSI internal clock
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
uint8_t SetSysClock_PLL_HSE(uint8_t bypass, bool lowspeed);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
uint8_t SetSysClock_PLL_HSI(void);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
/**
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
* AHB/APBx prescalers and Flash settings
* @note This function should be called only once the RCC clock configuration
* is reset to the default reset state (done in SystemInit() function).
* @param None
* @retval None
*/
void SetSysClock(void)
{
bool lowspeed = false;
#if defined(LOWSPEED) && (LOWSPEED == 1)
lowspeed = true;
#endif
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
/* 1- Try to start with HSE and external clock (MCO from STLink PCB part) */
if (SetSysClock_PLL_HSE(1, lowspeed) == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
/* 2- If fail try to start with HSE and external xtal */
if (SetSysClock_PLL_HSE(0, lowspeed) == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/* 3- If fail start with HSI clock */
if (SetSysClock_PLL_HSI() == 0)
#endif
{
error("SetSysClock failed\n");
}
}
}
}
static const uint32_t _keep;
bool isBootloader()
{
return ((uint32_t)&_keep < 0x8040000);
}
bool isBetaBoard()
{
uint8_t *bootloader_data = (uint8_t *)(0x801F000);
if (bootloader_data[0] != 0xA0 || bootloader_data[1] < 14) {
return true;
} else {
return (bootloader_data[10] == 27);
}
}
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSE(uint8_t bypass, bool lowspeed)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
// If we are reconfiguring the clock, select CSI as system clock source to allow modification of the PLL configuration
if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) {
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_CSI;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
return 0;
}
}
/* Enable oscillator pin */
__HAL_RCC_GPIOH_CLK_ENABLE();
GPIO_InitTypeDef gpio_osc_init_structure;
gpio_osc_init_structure.Pin = GPIO_PIN_1;
gpio_osc_init_structure.Mode = GPIO_MODE_OUTPUT_PP;
gpio_osc_init_structure.Pull = GPIO_PULLUP;
gpio_osc_init_structure.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOH, &gpio_osc_init_structure);
HAL_Delay(10);
HAL_GPIO_WritePin(GPIOH, GPIO_PIN_1, 1);
/* Supply configuration update enable */
#if HSE_VALUE == 27000000
HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_EXT);
#else
HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_LDO);
#endif
/* Configure the main internal regulator output voltage */
if (lowspeed) {
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
} else {
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
}
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
if (bypass) {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
}
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 5;
if (lowspeed) {
RCC_OscInitStruct.PLL.PLLN = 40;
} else {
RCC_OscInitStruct.PLL.PLLN = 160;
}
#if HSE_VALUE == 27000000
RCC_OscInitStruct.PLL.PLLM = 9;
if (lowspeed) {
RCC_OscInitStruct.PLL.PLLN = 80;
} else {
RCC_OscInitStruct.PLL.PLLN = 300;
}
#endif
RCC_OscInitStruct.PLL.PLLFRACN = 0;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLQ = 10;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
/* Select PLL as system clock source and configure bus clocks dividers */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (lowspeed) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
return 0; // FAIL
}
} else {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
}
}
// HAL_RCCEx_EnableBootCore(RCC_BOOT_C2);
#if DEVICE_USBDEVICE
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
return 0; // FAIL
}
HAL_PWREx_EnableUSBVoltageDetector();
#endif /* DEVICE_USBDEVICE */
__HAL_RCC_CSI_ENABLE() ;
__HAL_RCC_SYSCFG_CLK_ENABLE() ;
HAL_EnableCompensationCell();
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/******************************************************************************/
/* PLL (clocked by HSI) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSI(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
/* Supply configuration update enable */
#if HSE_VALUE == 27000000
HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_EXT);
#else
HAL_PWREx_ConfigSupply(PWR_SMPS_1V8_SUPPLIES_LDO);
#endif
/* The voltage scaling allows optimizing the power consumption when the device is
clocked below the maximum system frequency, to update the voltage scaling value
regarding system frequency refer to product datasheet. */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
// Enable HSI oscillator and activate PLL with HSI as source
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_CSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 100;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 10;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
/* Select PLL as system clock source and configure bus clocks dividers */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \
RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
}
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
#if defined (CORE_CM4)
void HSEM2_IRQHandler(void)
{
HAL_HSEM_IRQHandler();
}
#endif
#if defined (CORE_CM7)
void HSEM1_IRQHandler(void)
{
HAL_HSEM_IRQHandler();
}
#endif

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