mirror of https://github.com/ARMmbed/mbed-os.git
[B96B_ASYNC] some fixes to pass serial_asynch.cpp test
Flush errors and current data register at reading start Allow separate serial obj for TX and RX (= do not initialize [TX/RX]_DMA when not needed. Char_match: make it work with long buffers and return the correct position of the char_match.pull/1493/head
parent
016976b79d
commit
2582578e6b
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@ -106,32 +106,32 @@ static void init_uart(serial_t *obj)
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hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
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hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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HAL_DMA_Init(&hdma_tx);
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HAL_DMA_Init(&hdma_tx);
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/* Associate the initialized DMA handle to the UART handle */
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__HAL_LINKDMA(&UartHandle, hdmatx, hdma_tx);
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/* Associate the initialized DMA handle to the UART handle */
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__HAL_LINKDMA(&UartHandle, hdmatx, hdma_tx);
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}
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if (SERIAL_OBJ(pin_rx) != NC) {
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/* Configure the DMA handler for reception process */
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hdma_rx.Instance = (DMA_Stream_TypeDef *)DMA_UartRx_Stream[SERIAL_OBJ(index)];
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hdma_rx.Init.Channel = DMA_UartRx_Channel[SERIAL_OBJ(index)];
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hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_rx.Init.Mode = DMA_NORMAL;
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hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
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hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
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hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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/* Configure the DMA handler for reception process */
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hdma_rx.Instance = (DMA_Stream_TypeDef *)DMA_UartRx_Stream[SERIAL_OBJ(index)];
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hdma_rx.Init.Channel = DMA_UartRx_Channel[SERIAL_OBJ(index)];
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hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_rx.Init.Mode = DMA_NORMAL;
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hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
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hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
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hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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HAL_DMA_Init(&hdma_rx);
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HAL_DMA_Init(&hdma_rx);
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/* Associate the initialized DMA handle to the UART handle */
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__HAL_LINKDMA(&UartHandle, hdmarx, hdma_rx);
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/* Associate the initialized DMA handle to the UART handle */
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__HAL_LINKDMA(&UartHandle, hdmarx, hdma_rx);
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}
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#endif
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@ -1027,6 +1027,8 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
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NVIC_EnableIRQ(irqn);
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UartHandle.Instance = (USART_TypeDef *)SERIAL_OBJ(uart);
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// flush current data + error flags
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__HAL_UART_CLEAR_PEFLAG(&UartHandle);
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#if DEVICE_SERIAL_ASYNCH_DMA
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// Enable DMA interrupt
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irqn = h_serial_rx_get_irqdma_index(obj);
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@ -1042,7 +1044,9 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
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// following HAL function will enable the RXNE interrupt + error interrupts
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HAL_UART_Receive_IT(&UartHandle, (uint8_t*)rx, rx_length);
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#endif
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/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
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__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_ERR);
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return;
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}
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@ -1078,8 +1082,9 @@ uint8_t serial_rx_active(serial_t *obj)
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*/
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int serial_irq_handler_asynch(serial_t *obj)
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{
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volatile int return_event = 0;
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uint8_t *buf = (uint8_t*)obj->rx_buff.buffer;
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volatile int return_event = 0;
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uint8_t *buf = (uint8_t*)obj->rx_buff.buffer;
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uint8_t i = 0;
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// Irq handler is common to Tx and Rx
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UartHandle.Instance = (USART_TypeDef *)(SERIAL_OBJ(uart));
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@ -1107,15 +1112,15 @@ int serial_irq_handler_asynch(serial_t *obj)
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__HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_PE);
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return_event |= SERIAL_EVENT_RX_PARITY_ERROR & obj->serial.events;
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}
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if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_NE)) {
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if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_NE)||(UartHandle.ErrorCode & HAL_UART_ERROR_NE)!=0) {
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__HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_NE);
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// not supported by mbed
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}
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if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_FE)) {
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if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_FE)||(UartHandle.ErrorCode & HAL_UART_ERROR_FE)!=0) {
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__HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_FE);
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return_event |= SERIAL_EVENT_RX_FRAMING_ERROR & obj->serial.events;
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}
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if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_ORE)) {
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if (__HAL_UART_GET_FLAG(&UartHandle, HAL_UART_ERROR_ORE)||(UartHandle.ErrorCode & HAL_UART_ERROR_ORE)!=0) {
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__HAL_UART_CLEAR_FLAG(&UartHandle, HAL_UART_ERROR_ORE);
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return_event |= SERIAL_EVENT_RX_OVERRUN_ERROR & obj->serial.events;
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}
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@ -1128,8 +1133,18 @@ int serial_irq_handler_asynch(serial_t *obj)
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if ((UartHandle.RxXferCount==0)&&(obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
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return_event |= SERIAL_EVENT_RX_COMPLETE & obj->serial.events;
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}
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if ((buf != NULL) && (buf[obj->rx_buff.pos-1] == obj->char_match) && (SERIAL_OBJ(events) & SERIAL_EVENT_RX_CHARACTER_MATCH)) {
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return_event |= SERIAL_EVENT_RX_CHARACTER_MATCH & obj->serial.events;
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// Chek if Char_match is present
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if (SERIAL_OBJ(events) & SERIAL_EVENT_RX_CHARACTER_MATCH) {
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if (buf != NULL){
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while((buf[i] != obj->char_match)&&(i<UartHandle.RxXferSize)){//for (i=0;i<UartHandle.RxXferSize;i++){
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i++;//if (buf[i] == obj->char_match{
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//}
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}
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if (i<UartHandle.RxXferSize){
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obj->rx_buff.pos = i;
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return_event |= SERIAL_EVENT_RX_CHARACTER_MATCH & obj->serial.events;
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}
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}
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}
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return return_event;
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}
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