mirror of https://github.com/ARMmbed/mbed-os.git
[TARGET_STM32F4] new structure for F407 and F429 targets - part4
Solves the problem NULL -> HAL_NULL for the additional hw blocks in the larger mcus. For F401 and F411 this was already solved in #596.pull/639/head
parent
fd835e6c93
commit
24e3754428
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@ -157,7 +157,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
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uint32_t tickstart = 0;
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uint32_t tickstart = 0;
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/* Check CAN handle */
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/* Check CAN handle */
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if(hcan == NULL)
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if(hcan == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -444,7 +444,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
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HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
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HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
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{
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{
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/* Check CAN handle */
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/* Check CAN handle */
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if(hcan == NULL)
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if(hcan == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -224,7 +224,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
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HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
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{
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{
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/* Check DAC handle */
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/* Check DAC handle */
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if(hdac == NULL)
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if(hdac == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -259,7 +259,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
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HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
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HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
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{
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{
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/* Check DAC handle */
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/* Check DAC handle */
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if(hdac == NULL)
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if(hdac == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -144,7 +144,7 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
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HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
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{
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{
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/* Check the DCMI peripheral state */
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/* Check the DCMI peripheral state */
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if(hdcmi == NULL)
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if(hdcmi == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -171,7 +171,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
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uint32_t tmp = 0;
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uint32_t tmp = 0;
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/* Check the DMA2D peripheral state */
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/* Check the DMA2D peripheral state */
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if(hdma2d == NULL)
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if(hdma2d == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -250,7 +250,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
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HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
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HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
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{
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{
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/* Check the DMA2D peripheral state */
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/* Check the DMA2D peripheral state */
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if(hdma2d == NULL)
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if(hdma2d == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -721,7 +721,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
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/* Process Unlocked */
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/* Process Unlocked */
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__HAL_UNLOCK(hdma2d);
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__HAL_UNLOCK(hdma2d);
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if(hdma2d->XferErrorCallback != NULL)
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if(hdma2d->XferErrorCallback != HAL_NULL)
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{
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{
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/* Transfer error Callback */
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/* Transfer error Callback */
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hdma2d->XferErrorCallback(hdma2d);
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hdma2d->XferErrorCallback(hdma2d);
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@ -748,7 +748,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
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/* Process Unlocked */
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/* Process Unlocked */
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__HAL_UNLOCK(hdma2d);
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__HAL_UNLOCK(hdma2d);
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if(hdma2d->XferErrorCallback != NULL)
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if(hdma2d->XferErrorCallback != HAL_NULL)
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{
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{
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/* Transfer error Callback */
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/* Transfer error Callback */
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hdma2d->XferErrorCallback(hdma2d);
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hdma2d->XferErrorCallback(hdma2d);
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@ -775,7 +775,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
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/* Process Unlocked */
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/* Process Unlocked */
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__HAL_UNLOCK(hdma2d);
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__HAL_UNLOCK(hdma2d);
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if(hdma2d->XferCpltCallback != NULL)
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if(hdma2d->XferCpltCallback != HAL_NULL)
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{
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{
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/* Transfer complete Callback */
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/* Transfer complete Callback */
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hdma2d->XferCpltCallback(hdma2d);
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hdma2d->XferCpltCallback(hdma2d);
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@ -167,7 +167,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
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uint32_t err = ETH_SUCCESS;
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uint32_t err = ETH_SUCCESS;
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/* Check the ETH peripheral state */
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/* Check the ETH peripheral state */
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if(heth == NULL)
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if(heth == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -792,7 +792,7 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
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else if((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET)
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else if((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET)
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{
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{
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(heth->RxFrameInfos).FSRxDesc = heth->RxDesc;
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(heth->RxFrameInfos).FSRxDesc = heth->RxDesc;
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(heth->RxFrameInfos).LSRxDesc = NULL;
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(heth->RxFrameInfos).LSRxDesc = HAL_NULL;
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(heth->RxFrameInfos).SegCount = 1;
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(heth->RxFrameInfos).SegCount = 1;
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/* Point to next descriptor */
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/* Point to next descriptor */
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heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr);
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heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr);
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@ -1268,7 +1268,7 @@ HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef
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assert_param(IS_ETH_SPEED(heth->Init.Speed));
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assert_param(IS_ETH_SPEED(heth->Init.Speed));
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assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode));
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assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode));
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if (macconf != NULL)
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if (macconf != HAL_NULL)
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{
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{
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_ETH_WATCHDOG(macconf->Watchdog));
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assert_param(IS_ETH_WATCHDOG(macconf->Watchdog));
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@ -150,7 +150,7 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
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uint32_t tmp = 0, tmp1 = 0;
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uint32_t tmp = 0, tmp1 = 0;
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/* Check the LTDC peripheral state */
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/* Check the LTDC peripheral state */
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if(hltdc == NULL)
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if(hltdc == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -134,7 +134,7 @@
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HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
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HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
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{
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{
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/* Check the NAND handle state */
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/* Check the NAND handle state */
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if(hnand == NULL)
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if(hnand == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -134,7 +134,7 @@
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HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
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HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
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{
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{
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/* Check the NOR handle parameter */
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/* Check the NOR handle parameter */
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if(hnor == NULL)
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if(hnor == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -126,7 +126,7 @@
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HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
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HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
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{
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{
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/* Check the PCCARD controller state */
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/* Check the PCCARD controller state */
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if(hpccard == NULL)
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if(hpccard == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -112,7 +112,7 @@
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HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
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HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
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{
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{
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/* Check the RNG handle allocation */
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/* Check the RNG handle allocation */
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if(hrng == NULL)
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if(hrng == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -238,7 +238,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai)
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uint32_t saiclocksource = 0;
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uint32_t saiclocksource = 0;
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/* Check the SAI handle allocation */
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/* Check the SAI handle allocation */
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if(hsai == NULL)
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if(hsai == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -462,7 +462,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai)
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HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai)
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HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai)
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{
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{
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/* Check the SAI handle allocation */
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/* Check the SAI handle allocation */
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if(hsai == NULL)
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if(hsai == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -572,7 +572,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint16_t* pData, uin
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{
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{
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uint32_t tickstart = 0;
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uint32_t tickstart = 0;
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if((pData == NULL ) || (Size == 0))
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if((pData == HAL_NULL ) || (Size == 0))
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -647,7 +647,7 @@ HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint16_t *pData, uint
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{
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{
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uint32_t tickstart = 0;
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uint32_t tickstart = 0;
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if((pData == NULL ) || (Size == 0))
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if((pData == HAL_NULL ) || (Size == 0))
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -723,7 +723,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint16_t *pData,
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{
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{
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if(hsai->State == HAL_SAI_STATE_READY)
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if(hsai->State == HAL_SAI_STATE_READY)
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{
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{
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if((pData == NULL) || (Size == 0))
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if((pData == HAL_NULL) || (Size == 0))
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -801,7 +801,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, u
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{
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{
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if(hsai->State == HAL_SAI_STATE_READY)
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if(hsai->State == HAL_SAI_STATE_READY)
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{
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{
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if((pData == NULL) || (Size == 0))
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if((pData == HAL_NULL) || (Size == 0))
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -925,12 +925,12 @@ HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai)
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hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN;
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hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN;
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/* Abort the SAI DMA Tx Stream */
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/* Abort the SAI DMA Tx Stream */
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if(hsai->hdmatx != NULL)
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if(hsai->hdmatx != HAL_NULL)
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{
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{
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HAL_DMA_Abort(hsai->hdmatx);
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HAL_DMA_Abort(hsai->hdmatx);
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}
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}
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/* Abort the SAI DMA Rx Stream */
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/* Abort the SAI DMA Rx Stream */
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if(hsai->hdmarx != NULL)
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if(hsai->hdmarx != HAL_NULL)
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{
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{
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HAL_DMA_Abort(hsai->hdmarx);
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HAL_DMA_Abort(hsai->hdmarx);
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}
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}
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@ -957,7 +957,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData,
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{
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{
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uint32_t *tmp;
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uint32_t *tmp;
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if((pData == NULL) || (Size == 0))
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if((pData == HAL_NULL) || (Size == 0))
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -1019,7 +1019,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData,
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{
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{
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uint32_t *tmp;
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uint32_t *tmp;
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if((pData == NULL) || (Size == 0))
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if((pData == HAL_NULL) || (Size == 0))
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -1086,7 +1086,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai)
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/* SAI in mode Receiver --------------------------------------------------*/
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/* SAI in mode Receiver --------------------------------------------------*/
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if((tmp1 != RESET) && (tmp2 != RESET))
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if((tmp1 != RESET) && (tmp2 != RESET))
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{
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{
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HAL_SAI_Receive_IT(hsai, NULL, 0);
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HAL_SAI_Receive_IT(hsai, HAL_NULL, 0);
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}
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}
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tmp1 = __HAL_SAI_GET_FLAG(hsai, SAI_FLAG_OVRUDR);
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tmp1 = __HAL_SAI_GET_FLAG(hsai, SAI_FLAG_OVRUDR);
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@ -1112,7 +1112,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai)
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/* SAI in mode Transmitter -----------------------------------------------*/
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/* SAI in mode Transmitter -----------------------------------------------*/
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if((tmp1 != RESET) && (tmp2 != RESET))
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if((tmp1 != RESET) && (tmp2 != RESET))
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{
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{
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HAL_SAI_Transmit_IT(hsai, NULL, 0);
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HAL_SAI_Transmit_IT(hsai, HAL_NULL, 0);
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}
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}
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tmp1 = __HAL_SAI_GET_FLAG(hsai, SAI_FLAG_OVRUDR);
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tmp1 = __HAL_SAI_GET_FLAG(hsai, SAI_FLAG_OVRUDR);
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@ -141,7 +141,7 @@
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HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
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HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
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{
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{
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/* Check the SDRAM handle parameter */
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/* Check the SDRAM handle parameter */
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if(hsdram == NULL)
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if(hsdram == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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@ -143,7 +143,7 @@
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HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
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HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
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{
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{
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/* Check the SRAM handle parameter */
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/* Check the SRAM handle parameter */
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if(hsram == NULL)
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if(hsram == HAL_NULL)
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{
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{
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return HAL_ERROR;
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return HAL_ERROR;
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}
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}
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