mirror of https://github.com/ARMmbed/mbed-os.git
Update IAR template and STM M7 part options
parent
c638d2cdcb
commit
2481c468ce
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@ -69,7 +69,9 @@ class IAR(Exporter):
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"CoreVariant": '',
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"CoreVariant": '',
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"GFPUCoreSlave": '',
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"GFPUCoreSlave": '',
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"GFPUCoreSlave2": 40,
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"GFPUCoreSlave2": 40,
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"GBECoreSlave": 35
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"GBECoreSlave": 35,
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"FPU2": 0,
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"NrRegs": 0,
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}
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}
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iar_defaults.update(device_info)
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iar_defaults.update(device_info)
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@ -11,7 +11,7 @@
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<name>General</name>
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<name>General</name>
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<archiveVersion>3</archiveVersion>
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<archiveVersion>3</archiveVersion>
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<data>
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<data>
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<version>22</version>
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<version>24</version>
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<wantNonLocal>1</wantNonLocal>
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<wantNonLocal>1</wantNonLocal>
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<debug>1</debug>
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<debug>1</debug>
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<option>
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<option>
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@ -30,11 +30,6 @@
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<name>ListPath</name>
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<name>ListPath</name>
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<state>$PROJ_DIR$\BUILD\List</state>
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<state>$PROJ_DIR$\BUILD\List</state>
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</option>
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</option>
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<option>
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<name>Variant</name>
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<version>20</version>
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<state>{{device.CoreVariant}}</state>
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</option>
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<option>
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<option>
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<name>GEndianMode</name>
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<name>GEndianMode</name>
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<state>0</state>
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<state>0</state>
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@ -61,11 +56,6 @@
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<name>GOutputBinary</name>
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<name>GOutputBinary</name>
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<state>0</state>
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<state>0</state>
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</option>
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</option>
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<option>
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<name>FPU</name>
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<version>2</version>
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<state>5</state>
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</option>
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<option>
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<option>
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<name>OGCoreOrChip</name>
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<name>OGCoreOrChip</name>
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<state>1</state>
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<state>1</state>
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@ -90,7 +80,7 @@
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</option>
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</option>
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<option>
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<option>
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<name>OGLastSavedByProductVersion</name>
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<name>OGLastSavedByProductVersion</name>
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<state>7.10.3.6927</state>
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<state>7.80.2.11970</state>
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</option>
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</option>
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<option>
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<option>
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<name>GeneralEnableMisra</name>
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<name>GeneralEnableMisra</name>
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@ -122,31 +112,26 @@
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</option>
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</option>
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<option>
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<option>
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<name>GeneralMisraRules98</name>
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<name>GeneralMisraRules98</name>
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<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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<version>0</version>
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<version>0</version>
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<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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</option>
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</option>
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<option>
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<option>
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<name>GeneralMisraVer</name>
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<name>GeneralMisraVer</name>
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<state>0</state>
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<state>0</state>
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</option>
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</option>
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<option>
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<option>
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<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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<version>0</version>
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<name>GeneralMisraRules04</name>
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<name>GeneralMisraRules04</name>
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<version>0</version>
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<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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</option>
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</option>
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<option>
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<option>
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<name>RTConfigPath2</name>
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<name>RTConfigPath2</name>
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<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
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<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
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</option>
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</option>
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<option>
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<name>GFPUCoreSlave</name>
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<version>20</version>
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<state>{{device.GFPUCoreSlave}}</state>
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</option>
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<option>
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<option>
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<name>GBECoreSlave</name>
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<name>GBECoreSlave</name>
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<version>20</version>
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<version>24</version>
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<state>{{device.GBECoreSlave}}</state>
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<state>{{GBECoreSlave}}</state>
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</option>
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</option>
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<option>
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<option>
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<name>OGUseCmsis</name>
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<name>OGUseCmsis</name>
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@ -156,6 +141,34 @@
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<name>OGUseCmsisDspLib</name>
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<name>OGUseCmsisDspLib</name>
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<state>0</state>
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<state>0</state>
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</option>
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</option>
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<option>
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<name>CoreVariant</name>
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<version>24</version>
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<state>{{device.CoreVariant}}</state>
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</option>
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<option>
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<name>GFPUDeviceSlave</name>
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<state></state>
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</option>
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<option>
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<name>FPU2</name>
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<version>0</version>
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<state>{{device.FPU2}}</state>
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</option>
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<option>
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<name>NrRegs</name>
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<version>0</version>
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<state>{{device.NrRegs}}</state>
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</option>
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<option>
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<name>NEON</name>
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<state>0</state>
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</option>
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<option>
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<name>GFPUCoreSlave2</name>
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<version>24</version>
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<state>{{device.GFPUCoreSlave2}}</state>
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</option>
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</data>
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</data>
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</settings>
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</settings>
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<settings>
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<settings>
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@ -73,9 +73,10 @@
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},
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},
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"STM32F746ZG": {
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"STM32F746ZG": {
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"OGChipSelectEditMenu": "STM32F746ZG\tST STM32F746ZG",
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"OGChipSelectEditMenu": "STM32F746ZG\tST STM32F746ZG",
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"GBECoreSlave": 41,
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"CoreVariant": 41,
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"CoreVariant": 41,
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"GFPUCoreSlave2": 41,
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"FPU2": 6,
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"GBECoreSlave": 41
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"NrRegs": 1
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},
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},
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"MKL43Z256xxx4": {
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"MKL43Z256xxx4": {
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"OGChipSelectEditMenu": "MKL43Z256xxx4\tFreescale MKL43Z256xxx4"
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"OGChipSelectEditMenu": "MKL43Z256xxx4\tFreescale MKL43Z256xxx4"
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@ -84,7 +85,11 @@
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"OGChipSelectEditMenu": "LPC812M101\tNXP LPC812M101"
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"OGChipSelectEditMenu": "LPC812M101\tNXP LPC812M101"
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},
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},
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"STM32F746NG": {
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"STM32F746NG": {
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"OGChipSelectEditMenu": "STM32F746NG\tST STM32F746NG"
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"OGChipSelectEditMenu": "STM32F746NG\tST STM32F746NG",
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"GBECoreSlave": 41,
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"CoreVariant": 41,
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"FPU2": 6,
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"NrRegs": 1
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},
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},
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"STM32F411RE": {
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"STM32F411RE": {
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"OGChipSelectEditMenu": "STM32F411RE\tST STM32F411RE"
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"OGChipSelectEditMenu": "STM32F411RE\tST STM32F411RE"
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