mirror of https://github.com/ARMmbed/mbed-os.git
Update Kinetis USB to match the USBPhy API
Copy the Kinetis USB driver files from mbed-os\features\unsupported\USBDevice\targets\TARGET_Freescale and update them to match the new USBPhy API.pull/9768/head
Russ Butler
parent
25fb3183cf
commit
23615a7769
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@ -1,20 +1,18 @@
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/* Copyright (c) 2010-2011 mbed.org, MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
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* and associated documentation files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/* mbed Microcontroller Library
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* Copyright (c) 2018-2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define NUMBER_OF_LOGICAL_ENDPOINTS (4)
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#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2)
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@ -23,14 +21,14 @@
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/* Endpoint No. */
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/* ---------------- */
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#define EP0OUT (0)
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#define EP0IN (1)
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#define EP1OUT (2)
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#define EP1IN (3)
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#define EP2OUT (4)
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#define EP2IN (5)
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#define EP3OUT (6)
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#define EP3IN (7)
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#define EP0OUT (0x00)
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#define EP0IN (0x80)
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#define EP1OUT (0x01)
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#define EP1IN (0x81)
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#define EP2OUT (0x02)
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#define EP2IN (0x82)
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#define EP3OUT (0x03)
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#define EP3IN (0x83)
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/* Maximum Packet sizes */
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@ -0,0 +1,66 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2018-2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef USBPHYHW_H
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#define USBPHYHW_H
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#include "mbed.h"
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#include "USBPhy.h"
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class USBPhyHw : public USBPhy {
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public:
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USBPhyHw();
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virtual ~USBPhyHw();
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virtual void init(USBPhyEvents *events);
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virtual void deinit();
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virtual bool powered();
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virtual void connect();
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virtual void disconnect();
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virtual void configure();
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virtual void unconfigure();
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virtual void sof_enable();
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virtual void sof_disable();
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virtual void set_address(uint8_t address);
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virtual void remote_wakeup();
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virtual const usb_ep_table_t* endpoint_table();
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virtual uint32_t ep0_set_max_packet(uint32_t max_packet);
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virtual void ep0_setup_read_result(uint8_t *buffer, uint32_t size);
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virtual void ep0_read();
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virtual uint32_t ep0_read_result(uint8_t *buffer, uint32_t size);
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virtual void ep0_write(uint8_t *buffer, uint32_t size);
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virtual void ep0_stall();
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virtual bool endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type);
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virtual void endpoint_remove(usb_ep_t endpoint);
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virtual void endpoint_stall(usb_ep_t endpoint);
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virtual void endpoint_unstall(usb_ep_t endpoint);
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virtual bool endpoint_read(usb_ep_t endpoint, uint32_t maximumSize);
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virtual bool endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytesRead);
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virtual bool endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size);
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virtual void endpoint_abort(usb_ep_t endpoint);
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virtual void process();
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private:
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USBPhyEvents *events;
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static void _usbisr(void);
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};
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#endif
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@ -1,42 +1,48 @@
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/* Copyright (c) 2010-2011 mbed.org, MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
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* and associated documentation files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify, merge, publish,
|
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* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/* mbed Microcontroller Library
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* Copyright (c) 2018-2018 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1)
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#if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \
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(defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | \
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defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | \
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defined(TARGET_K64F) | defined(TARGET_K22F) | \
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defined(TARGET_TEENSY3_1))
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#if defined(TARGET_KSDK2_MCUS)
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#include "fsl_common.h"
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#endif
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#include "USBHAL.h"
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#include "USBPhyHw.h"
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#include "USBEndpoints_Kinetis.h"
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#include "mbed_critical.h"
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USBHAL * USBHAL::instance;
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static USBPhyHw *instance;
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static volatile int epComplete = 0;
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// Convert physical endpoint number to register bit
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#define EP(endpoint) (1<<(endpoint))
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// Convert physical to logical
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// Conversion macros
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#define PHY_TO_LOG(endpoint) ((endpoint)>>1)
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#define DESC_TO_LOG(endpoint) ((endpoint) & 0xF)
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#define DESC_TO_PHY(endpoint) ((((endpoint)&0x0F)<<1) | (((endpoint) & 0x80) ? 1:0))
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#define PHY_TO_DESC(endpoint) (((endpoint)>>1)|(((endpoint)&1)?0x80:0))
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// Get endpoint direction
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#define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
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#define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
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#define DESC_EP_IN(endpoint) ((endpoint) & 0x80U ? true : false)
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#define DESC_EP_OUT(endpoint) ((endpoint) & 0x80U ? false : true)
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#define BD_OWN_MASK (1<<7)
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#define BD_DATA01_MASK (1<<6)
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@ -78,6 +84,10 @@ typedef enum {
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MBED_ALIGN(512) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2]; // 512 bytes aligned!
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uint8_t * endpoint_buffer[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
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uint8_t ep0_buffer[2][MAX_PACKET_SIZE_EP0];
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uint8_t ep1_buffer[2][MAX_PACKET_SIZE_EP1];
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uint8_t ep2_buffer[2][MAX_PACKET_SIZE_EP2];
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uint8_t ep3_buffer[2][MAX_PACKET_SIZE_EP3];
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static uint8_t set_addr = 0;
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static uint8_t addr = 0;
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@ -89,26 +99,31 @@ static uint32_t frameNumber() {
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return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
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}
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uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
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return 0;
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USBPhy *get_usb_phy()
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{
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static USBPhyHw usbphy;
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return &usbphy;
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}
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USBHAL::USBHAL(void) {
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USBPhyHw::USBPhyHw()
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{
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}
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USBPhyHw::~USBPhyHw()
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{
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}
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void USBPhyHw::init(USBPhyEvents *events)
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{
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this->events = events;
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// Disable IRQ
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NVIC_DisableIRQ(USB0_IRQn);
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#if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U))
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MPU->CESR=0;
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#endif
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// fill in callback array
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epCallback[0] = &USBHAL::EP1_OUT_callback;
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epCallback[1] = &USBHAL::EP1_IN_callback;
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epCallback[2] = &USBHAL::EP2_OUT_callback;
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epCallback[3] = &USBHAL::EP2_IN_callback;
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epCallback[4] = &USBHAL::EP3_OUT_callback;
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epCallback[5] = &USBHAL::EP3_IN_callback;
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epCallback[6] = &USBHAL::EP4_OUT_callback;
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epCallback[7] = &USBHAL::EP4_IN_callback;
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#if defined(TARGET_KL43Z) || defined(TARGET_K22F) || defined(TARGET_K64F)
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// enable USBFS clock
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@ -124,8 +139,6 @@ USBHAL::USBHAL(void) {
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// Attach IRQ
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instance = this;
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NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
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NVIC_EnableIRQ(USB0_IRQn);
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// USB Module Configuration
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// Set BDT Base Register
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@ -138,7 +151,6 @@ USBHAL::USBHAL(void) {
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// USB Interrupt Enablers
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USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
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USB_INTEN_SOFTOKEN_MASK |
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USB_INTEN_ERROREN_MASK |
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USB_INTEN_USBRSTEN_MASK;
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@ -148,50 +160,69 @@ USBHAL::USBHAL(void) {
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USB0->USBTRC0 |= 0x40;
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/* Allocate control endpoint buffers */
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endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0);
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endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = (uint8_t *)malloc(MAX_PACKET_SIZE_EP0);
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endpoint_buffer[EP_BDT_IDX(0, TX, ODD)] = ep0_buffer[TX];
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endpoint_buffer[EP_BDT_IDX(0, RX, ODD)] = ep0_buffer[RX];
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endpoint_buffer[EP_BDT_IDX(1, TX, ODD)] = ep1_buffer[TX];
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endpoint_buffer[EP_BDT_IDX(1, RX, ODD)] = ep1_buffer[RX];
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endpoint_buffer[EP_BDT_IDX(2, TX, ODD)] = ep2_buffer[TX];
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endpoint_buffer[EP_BDT_IDX(2, RX, ODD)] = ep2_buffer[RX];
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endpoint_buffer[EP_BDT_IDX(3, TX, ODD)] = ep3_buffer[TX];
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endpoint_buffer[EP_BDT_IDX(3, RX, ODD)] = ep3_buffer[RX];
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NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
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NVIC_EnableIRQ(USB0_IRQn);
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}
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USBHAL::~USBHAL(void) { }
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void USBPhyHw::deinit()
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{
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disconnect();
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NVIC_DisableIRQ(USB0_IRQn);
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USB0->INTEN = 0;
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}
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void USBHAL::connect(void) {
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bool USBPhyHw::powered()
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{
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return true;
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}
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void USBPhyHw::connect()
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{
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// enable USB
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USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
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// Pull up enable
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USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
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// Allocate endpoint buffers; do allocate control endpoint buffers
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for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) {
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if ((i == EPISO_OUT) || (i == EPISO_IN)) {
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endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPISO);
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} else {
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endpoint_buffer[i] = (uint8_t *)malloc(MAX_PACKET_SIZE_EPBULK);
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}
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}
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}
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void USBHAL::disconnect(void) {
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void USBPhyHw::disconnect()
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{
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// disable USB
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USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
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// Pull up disable
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USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
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//Free buffers if required; do not free the control endpoint buffers
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for (int i = 4; i < (NUMBER_OF_PHYSICAL_ENDPOINTS * 2); i++) {
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free(endpoint_buffer[i]);
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endpoint_buffer[i] = NULL;
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}
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}
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void USBHAL::configureDevice(void) {
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void USBPhyHw::configure()
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{
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// not needed
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}
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void USBHAL::unconfigureDevice(void) {
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void USBPhyHw::unconfigure()
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{
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// not needed
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}
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void USBHAL::setAddress(uint8_t address) {
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void USBPhyHw::sof_enable()
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{
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USB0->INTEN |= USB_INTEN_SOFTOKEN_MASK;
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}
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void USBPhyHw::sof_disable()
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{
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USB0->INTEN &= ~USB_INTEN_SOFTOKEN_MASK;
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}
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void USBPhyHw::set_address(uint8_t address)
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{
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// we don't set the address now otherwise the usb controller does not ack
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// we set a flag instead
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// see usbisr when an IN token is received
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@ -199,64 +230,54 @@ void USBHAL::setAddress(uint8_t address) {
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addr = address;
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}
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bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
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uint32_t handshake_flag = 0;
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uint8_t * buf;
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void USBPhyHw::remote_wakeup()
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{
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// TODO
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}
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if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
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return false;
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}
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#define ALLOW_BULK_OR_INT_ENDPOINTS (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT)
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#define ALLOW_NO_ENDPOINTS 0
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uint32_t log_endpoint = PHY_TO_LOG(endpoint);
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if ((flags & ISOCHRONOUS) == 0) {
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handshake_flag = USB_ENDPT_EPHSHK_MASK;
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}
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if (IN_EP(endpoint)) {
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buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
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} else {
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buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
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}
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// IN endpt -> device to host (TX)
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if (IN_EP(endpoint)) {
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USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
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USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
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bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
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bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
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}
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// OUT endpt -> host to device (RX)
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else {
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USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
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USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK;
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bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
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if (log_endpoint == 0) {
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// Prepare for setup packet
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bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK;
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const usb_ep_table_t* USBPhyHw::endpoint_table()
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{
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static const usb_ep_table_t endpoint_table = {
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1, // No cost per endpoint - everything allocated up front
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{
|
||||
{USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_BULK_OR_INT_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{USB_EP_ATTR_ALLOW_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0},
|
||||
{ALLOW_NO_ENDPOINTS | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}
|
||||
}
|
||||
}
|
||||
};
|
||||
return &endpoint_table;
|
||||
}
|
||||
|
||||
// First transfer will be a DATA0 packet
|
||||
Data1 &= ~(1 << endpoint);
|
||||
|
||||
return true;
|
||||
uint32_t USBPhyHw::ep0_set_max_packet(uint32_t max_packet)
|
||||
{
|
||||
return MAX_PACKET_SIZE_EP0;
|
||||
}
|
||||
|
||||
// read setup packet
|
||||
void USBHAL::EP0setup(uint8_t *buffer) {
|
||||
void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size)
|
||||
{
|
||||
uint32_t sz;
|
||||
endpointReadResult(EP0OUT, buffer, &sz);
|
||||
endpoint_read_result(EP0OUT, buffer, size, &sz);
|
||||
}
|
||||
|
||||
void USBHAL::EP0readStage(void) {
|
||||
// Not needed
|
||||
}
|
||||
|
||||
void USBHAL::EP0read(void) {
|
||||
void USBPhyHw::ep0_read()
|
||||
{
|
||||
if (ctrl_xfer == CTRL_XFER_READY) {
|
||||
// Transfer is done so ignore call
|
||||
return;
|
||||
|
|
@ -281,77 +302,142 @@ void USBHAL::EP0read(void) {
|
|||
// without any processor intervention.
|
||||
Data1 &= ~1UL; // set DATA0
|
||||
}
|
||||
endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
|
||||
endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0);
|
||||
}
|
||||
|
||||
uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
|
||||
uint32_t USBPhyHw::ep0_read_result(uint8_t *buffer, uint32_t size)
|
||||
{
|
||||
uint32_t sz;
|
||||
endpointReadResult(EP0OUT, buffer, &sz);
|
||||
endpoint_read_result(EP0OUT, buffer, size, &sz);
|
||||
return sz;
|
||||
}
|
||||
|
||||
void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
|
||||
void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size)
|
||||
{
|
||||
if (ctrl_xfer == CTRL_XFER_READY) {
|
||||
// Transfer is done so ignore call
|
||||
return;
|
||||
}
|
||||
if ((ctrl_xfer == CTRL_XFER_NONE) || (ctrl_xfer == CTRL_XFER_OUT)) {
|
||||
// Prepare for next setup packet
|
||||
endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
|
||||
endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0);
|
||||
ctrl_xfer = CTRL_XFER_READY;
|
||||
}
|
||||
endpointWrite(EP0IN, buffer, size);
|
||||
endpoint_write(EP0IN, buffer, size);
|
||||
}
|
||||
|
||||
void USBHAL::EP0getWriteResult(void) {
|
||||
}
|
||||
|
||||
void USBHAL::EP0stall(void) {
|
||||
void USBPhyHw::ep0_stall()
|
||||
{
|
||||
if (ctrl_xfer == CTRL_XFER_READY) {
|
||||
// Transfer is done so ignore call
|
||||
return;
|
||||
}
|
||||
ctrl_xfer = CTRL_XFER_READY;
|
||||
core_util_critical_section_enter();
|
||||
stallEndpoint(EP0OUT);
|
||||
endpoint_stall(EP0OUT);
|
||||
// Prepare for next setup packet
|
||||
// Note - time between stalling and setting up the endpoint
|
||||
// must be kept to a minimum to prevent a dropped SETUP
|
||||
// packet.
|
||||
endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
|
||||
endpoint_read(EP0OUT, MAX_PACKET_SIZE_EP0);
|
||||
core_util_critical_section_exit();
|
||||
}
|
||||
|
||||
EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
|
||||
uint8_t log_endpoint = PHY_TO_LOG(endpoint);
|
||||
bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type)
|
||||
{
|
||||
uint32_t handshake_flag = 0;
|
||||
uint8_t * buf;
|
||||
|
||||
if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
|
||||
return false;
|
||||
}
|
||||
|
||||
uint32_t log_endpoint = DESC_TO_LOG(endpoint);
|
||||
|
||||
if (type != USB_EP_TYPE_ISO) {
|
||||
handshake_flag = USB_ENDPT_EPHSHK_MASK;
|
||||
}
|
||||
|
||||
if (DESC_EP_IN(endpoint)) {
|
||||
buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
|
||||
} else {
|
||||
buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
|
||||
}
|
||||
|
||||
// IN endpt -> device to host (TX)
|
||||
if (DESC_EP_IN(endpoint)) {
|
||||
USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
|
||||
USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
|
||||
bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
|
||||
bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
|
||||
}
|
||||
// OUT endpt -> host to device (RX)
|
||||
else {
|
||||
USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
|
||||
USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
|
||||
bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = max_packet;
|
||||
bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
|
||||
bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_DTS_MASK;
|
||||
bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
|
||||
if (log_endpoint == 0) {
|
||||
// Prepare for setup packet
|
||||
bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info |= BD_OWN_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
// First transfer will be a DATA0 packet
|
||||
Data1 &= ~(1 << DESC_TO_PHY(endpoint));
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_remove(usb_ep_t endpoint)
|
||||
{
|
||||
USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT = 0;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_stall(usb_ep_t endpoint)
|
||||
{
|
||||
USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
|
||||
}
|
||||
|
||||
void USBPhyHw::endpoint_unstall(usb_ep_t endpoint)
|
||||
{
|
||||
USB0->ENDPOINT[DESC_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
|
||||
}
|
||||
|
||||
bool USBPhyHw:: endpoint_read(usb_ep_t endpoint, uint32_t max_packet)
|
||||
{
|
||||
uint8_t log_endpoint = DESC_TO_LOG(endpoint);
|
||||
|
||||
uint32_t idx = EP_BDT_IDX(log_endpoint, RX, 0);
|
||||
bdt[idx].byte_count = maximumSize;
|
||||
if ((Data1 >> endpoint) & 1) {
|
||||
bdt[idx].byte_count = max_packet;
|
||||
if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) {
|
||||
bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
|
||||
}
|
||||
else {
|
||||
bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
|
||||
}
|
||||
|
||||
Data1 ^= (1 << endpoint);
|
||||
return EP_PENDING;
|
||||
Data1 ^= (1 << DESC_TO_PHY(endpoint));
|
||||
return true;
|
||||
}
|
||||
|
||||
EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
|
||||
bool USBPhyHw::endpoint_read_result(usb_ep_t endpoint, uint8_t *data, uint32_t size, uint32_t *bytes_read)
|
||||
{
|
||||
uint32_t n, sz, idx, setup = 0;
|
||||
uint8_t not_iso;
|
||||
uint8_t * ep_buf;
|
||||
|
||||
uint32_t log_endpoint = PHY_TO_LOG(endpoint);
|
||||
uint32_t log_endpoint = DESC_TO_LOG(endpoint);
|
||||
|
||||
if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
|
||||
return EP_INVALID;
|
||||
if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
|
||||
return false;
|
||||
}
|
||||
|
||||
// if read on a IN endpoint -> error
|
||||
if (IN_EP(endpoint)) {
|
||||
return EP_INVALID;
|
||||
if (DESC_EP_IN(endpoint)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
idx = EP_BDT_IDX(log_endpoint, RX, 0);
|
||||
|
|
@ -359,8 +445,8 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_
|
|||
not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
|
||||
|
||||
//for isochronous endpoint, we don't wait an interrupt
|
||||
if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
|
||||
return EP_PENDING;
|
||||
if ((log_endpoint != 0) && not_iso && !(epComplete & EP(DESC_TO_PHY(endpoint)))) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
|
||||
|
|
@ -370,40 +456,41 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_
|
|||
ep_buf = endpoint_buffer[idx];
|
||||
|
||||
for (n = 0; n < sz; n++) {
|
||||
buffer[n] = ep_buf[n];
|
||||
data[n] = ep_buf[n];
|
||||
}
|
||||
|
||||
if (setup) {
|
||||
// Record the setup type
|
||||
if (buffer[6] == 0) {
|
||||
if (data[6] == 0) {
|
||||
ctrl_xfer = CTRL_XFER_NONE;
|
||||
} else {
|
||||
uint8_t in_xfer = (buffer[0] >> 7) & 1;
|
||||
uint8_t in_xfer = (data[0] >> 7) & 1;
|
||||
ctrl_xfer = in_xfer ? CTRL_XFER_IN : CTRL_XFER_OUT;
|
||||
}
|
||||
}
|
||||
|
||||
USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
|
||||
*bytesRead = sz;
|
||||
*bytes_read = sz;
|
||||
|
||||
epComplete &= ~EP(endpoint);
|
||||
return EP_COMPLETED;
|
||||
epComplete &= ~EP(DESC_TO_PHY(endpoint));
|
||||
return true;
|
||||
}
|
||||
|
||||
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
|
||||
bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size)
|
||||
{
|
||||
uint32_t idx, n;
|
||||
uint8_t * ep_buf;
|
||||
|
||||
if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
|
||||
return EP_INVALID;
|
||||
if (DESC_TO_PHY(endpoint) > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
|
||||
return false;
|
||||
}
|
||||
|
||||
// if write on a OUT endpoint -> error
|
||||
if (OUT_EP(endpoint)) {
|
||||
return EP_INVALID;
|
||||
if (DESC_EP_OUT(endpoint)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
|
||||
idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), TX, 0);
|
||||
bdt[idx].byte_count = size;
|
||||
|
||||
ep_buf = endpoint_buffer[idx];
|
||||
|
|
@ -412,52 +499,28 @@ EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
|
|||
ep_buf[n] = data[n];
|
||||
}
|
||||
|
||||
if ((Data1 >> endpoint) & 1) {
|
||||
if ((Data1 >> DESC_TO_PHY(endpoint)) & 1) {
|
||||
bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
|
||||
} else {
|
||||
bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
|
||||
}
|
||||
|
||||
Data1 ^= (1 << endpoint);
|
||||
Data1 ^= (1 << DESC_TO_PHY(endpoint));
|
||||
|
||||
return EP_PENDING;
|
||||
return true;
|
||||
}
|
||||
|
||||
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
|
||||
if (epComplete & EP(endpoint)) {
|
||||
epComplete &= ~EP(endpoint);
|
||||
return EP_COMPLETED;
|
||||
}
|
||||
|
||||
return EP_PENDING;
|
||||
void USBPhyHw::endpoint_abort(usb_ep_t endpoint)
|
||||
{
|
||||
uint8_t dir = DESC_EP_IN(endpoint) ? TX : RX;
|
||||
uint32_t idx = EP_BDT_IDX(DESC_TO_LOG(endpoint), dir, 0);
|
||||
bdt[idx].info &= ~BD_OWN_MASK;
|
||||
}
|
||||
|
||||
void USBHAL::stallEndpoint(uint8_t endpoint) {
|
||||
USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
|
||||
}
|
||||
|
||||
void USBHAL::unstallEndpoint(uint8_t endpoint) {
|
||||
USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
|
||||
}
|
||||
|
||||
bool USBHAL::getEndpointStallState(uint8_t endpoint) {
|
||||
uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
|
||||
return (stall) ? true : false;
|
||||
}
|
||||
|
||||
void USBHAL::remoteWakeup(void) {
|
||||
// [TODO]
|
||||
}
|
||||
|
||||
|
||||
void USBHAL::_usbisr(void) {
|
||||
instance->usbisr();
|
||||
}
|
||||
|
||||
|
||||
void USBHAL::usbisr(void) {
|
||||
void USBPhyHw::process()
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t istat = USB0->ISTAT;
|
||||
uint8_t istat = USB0->ISTAT & USB0->INTEN;
|
||||
|
||||
// reset interrupt
|
||||
if (istat & USB_ISTAT_USBRST_MASK) {
|
||||
|
|
@ -467,8 +530,8 @@ void USBHAL::usbisr(void) {
|
|||
}
|
||||
|
||||
// enable control endpoint
|
||||
realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
|
||||
realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
|
||||
endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL);
|
||||
endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL);
|
||||
|
||||
Data1 = 0x55555555;
|
||||
USB0->CTL |= USB_CTL_ODDRST_MASK;
|
||||
|
|
@ -479,21 +542,24 @@ void USBHAL::usbisr(void) {
|
|||
USB0->ADDR = 0x00; // set default address
|
||||
|
||||
// reset bus for USBDevice layer
|
||||
busReset();
|
||||
events->reset();
|
||||
|
||||
NVIC_ClearPendingIRQ(USB0_IRQn);
|
||||
NVIC_EnableIRQ(USB0_IRQn);
|
||||
return;
|
||||
}
|
||||
|
||||
// resume interrupt
|
||||
if (istat & USB_ISTAT_RESUME_MASK) {
|
||||
USB0->ISTAT = USB_ISTAT_RESUME_MASK;
|
||||
events->suspend(false);
|
||||
}
|
||||
|
||||
// SOF interrupt
|
||||
if (istat & USB_ISTAT_SOFTOK_MASK) {
|
||||
USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
|
||||
// SOF event, read frame number
|
||||
SOF(frameNumber());
|
||||
events->sof(frameNumber());
|
||||
}
|
||||
|
||||
// stall interrupt
|
||||
|
|
@ -508,7 +574,7 @@ void USBHAL::usbisr(void) {
|
|||
uint32_t num = (USB0->STAT >> 4) & 0x0F;
|
||||
uint32_t dir = (USB0->STAT >> 3) & 0x01;
|
||||
uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
|
||||
int endpoint = (num << 1) | dir;
|
||||
int phy_ep = (num << 1) | dir;
|
||||
|
||||
// setup packet
|
||||
if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
|
||||
|
|
@ -517,35 +583,31 @@ void USBHAL::usbisr(void) {
|
|||
bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK;
|
||||
|
||||
// EP0 SETUP event (SETUP data received)
|
||||
EP0setupCallback();
|
||||
events->ep0_setup();
|
||||
|
||||
} else {
|
||||
// OUT packet
|
||||
if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
|
||||
if (num == 0)
|
||||
EP0out();
|
||||
events->ep0_out();
|
||||
else {
|
||||
epComplete |= EP(endpoint);
|
||||
if ((instance->*(epCallback[endpoint - 2]))()) {
|
||||
epComplete &= ~EP(endpoint);
|
||||
}
|
||||
epComplete |= EP(phy_ep);
|
||||
events->out(PHY_TO_DESC(phy_ep));
|
||||
}
|
||||
}
|
||||
|
||||
// IN packet
|
||||
if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
|
||||
if (num == 0) {
|
||||
EP0in();
|
||||
events->ep0_in();
|
||||
if (set_addr == 1) {
|
||||
USB0->ADDR = addr & 0x7F;
|
||||
set_addr = 0;
|
||||
}
|
||||
}
|
||||
else {
|
||||
epComplete |= EP(endpoint);
|
||||
if ((instance->*(epCallback[endpoint - 2]))()) {
|
||||
epComplete &= ~EP(endpoint);
|
||||
}
|
||||
epComplete |= EP(phy_ep);
|
||||
events->in(PHY_TO_DESC(phy_ep));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -556,6 +618,7 @@ void USBHAL::usbisr(void) {
|
|||
// sleep interrupt
|
||||
if (istat & 1<<4) {
|
||||
USB0->ISTAT = USB_ISTAT_SLEEP_MASK;
|
||||
events->suspend(true);
|
||||
}
|
||||
|
||||
// error interrupt
|
||||
|
|
@ -563,7 +626,14 @@ void USBHAL::usbisr(void) {
|
|||
USB0->ERRSTAT = 0xFF;
|
||||
USB0->ISTAT = USB_ISTAT_ERROR_MASK;
|
||||
}
|
||||
|
||||
NVIC_ClearPendingIRQ(USB0_IRQn);
|
||||
NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
void USBPhyHw::_usbisr(void) {
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
instance->events->start_process();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1491,7 +1491,8 @@
|
|||
"STDIO_MESSAGES",
|
||||
"STORAGE",
|
||||
"TRNG",
|
||||
"FLASH"
|
||||
"FLASH",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"features": ["STORAGE"],
|
||||
"release_versions": ["2", "5"],
|
||||
|
|
|
|||
Loading…
Reference in New Issue