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Merge pull request #7813 from MSiglreithmaierRB/os_sleep_stm32l4 

STM32L4: Fix sleep implementation
pull/8298/head
Martin Kojtal 2018-10-01 17:24:12 +02:00 committed by GitHub
parent 6f338f8915 ea6c886d22
commit 232543ac4b
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 19 additions and 1 deletions
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20
targets/TARGET_STM/sleep.c
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@ -52,7 +52,7 @@ static void wait_loop(uint32_t timeout)
// On L4 platforms we've seen unstable PLL CLK configuraiton // On L4 platforms we've seen unstable PLL CLK configuraiton
// when DEEP SLEEP exits just few µs after being entered // when DEEP SLEEP exits just few µs after being entered
// So we need to force MSI usage before setting clocks again // So we need to force MSI usage before setting clocks again
static void ForcePeriphOutofDeepSleep(void) static void ForcePeriphOutofDeepSleep(void)
{ {
@ -151,7 +151,25 @@ void hal_sleep(void)
core_util_critical_section_enter(); core_util_critical_section_enter();
// Request to enter SLEEP mode // Request to enter SLEEP mode
#if TARGET_STM32L4
// State Transitions (see 5.3 Low-power modes, Fig. 13):
// * (opt): Low Power Run (LPR) Mode -> Run Mode
// * Run Mode -> Sleep
// --- Wait for Interrupt --
// * Sleep -> Run Mode
// * (opt): Run Mode -> Low Power Run Mode
// [5.4.1 Power control register 1 (PWR_CR1)]
// LPR: When this bit is set, the regulator is switched from main mode (MR) to low-power mode (LPR).
int lowPowerMode = PWR->CR1 & PWR_CR1_LPR;
if (lowPowerMode) {
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
} else {
HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
}
#else
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
#endif
// Enable IRQs // Enable IRQs
core_util_critical_section_exit(); core_util_critical_section_exit();