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Merge pull request #12436 from mprse/fpga_remove_gpio_pinmaps 

Remove GPIO pin-maps used for FPGA testing
pull/12513/head
Martin Kojtal 2020-03-04 13:24:05 +00:00 committed by GitHub
parent 9ec6f5d8fa 32311b7ca5
commit 22f3bc4ae7
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 93 additions and 162 deletions
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6
TESTS/mbed_hal/pinmap/main.cpp
View File

@ -21,8 +21,6 @@
using namespace utest::v1;
#include "gpio_api.h"
#include "gpio_irq_api.h"
#include "analogin_api.h"
#include "analogout_api.h"
#include "can_api.h"
@ -41,10 +39,6 @@ typedef struct {
} pinmap_info_t;
const pinmap_info_t pinmap_functions[] = {
PINMAP_TEST_ENTRY(gpio_pinmap),
#if DEVICE_INTERRUPTIN
PINMAP_TEST_ENTRY(gpio_irq_pinmap),
#endif
#if DEVICE_ANALOGIN
PINMAP_TEST_ENTRY(analogin_pinmap),
#endif

3
TESTS/mbed_hal_fpga_ci_test_shield/uart/main.cpp
View File

@ -28,14 +28,15 @@
#include "greentea-client/test_env.h"
#include "platform/mbed_critical.h"
#include <stdlib.h>
#include "hal/serial_api.h"
#include "UARTTester.h"
#include "pinmap.h"
#include "test_utils.h"
#include "serial_api.h"
#include "us_ticker_api.h"
#include "uart_fpga_test.h"
#include "hal/static_pinmap.h"
using namespace utest::v1;
#define PUTC_REPS 16

22
components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/test_utils.h
View File

@ -111,18 +111,22 @@ void find_ports(std::list<PortType> &matched_ports, std::list<PortType> &not_mat
const char *pin_type = PortType::PinMap::pin_type_names[i];
// Loop through each pin of a given type
for (; map->pin != NC; map++) {
for (uint32_t j = 0; j < FormFactorType::pins()->count; j++) {
PortType port;
// Set pin being tested
port.pins[i] = map->pin;
port.peripheral = map->peripheral;
// Only form factor pins can be tested
if (!pinmap_list_has_pin(FormFactorType::pins(), port.pins[i])) {
if (FormFactorType::pins()->pins[j] == NC) {
utest_printf("Skipping (NC pin) %s pin %s (%i)\r\n", pin_type,
FormFactorType::pin_to_string(port.pins[i]), port.pins[i]);
continue;
}
// Set pin being tested
port.pins[i] = FormFactorType::pins()->pins[j];
port.peripheral = pinmap_find_peripheral(port.pins[i], map);
// Don't test restricted pins
if (pinmap_list_has_pin(FormFactorType::restricted_pins(), port.pins[i])) {
utest_printf("Skipping %s pin %s (%i)\r\n", pin_type,
utest_printf("Skipping (restricted pin) %s pin %s (%i)\r\n", pin_type,
FormFactorType::pin_to_string(port.pins[i]), port.pins[i]);
continue;
}
@ -130,7 +134,7 @@ void find_ports(std::list<PortType> &matched_ports, std::list<PortType> &not_mat
if (!strcmp(PortType::PinMap::name, GPIO_IRQ_NAME) || !strcmp(PortType::PinMap::name, GPIO_NAME)) {
// Don't test restricted gpio pins
if (pinmap_list_has_pin(pinmap_gpio_restricted_pins(), port.pins[i])) {
utest_printf("Skipping %s pin %s (%i)\r\n", pin_type,
utest_printf("Skipping (restricted gpio pin) %s pin %s (%i)\r\n", pin_type,
FormFactorType::pin_to_string(port.pins[i]), port.pins[i]);
continue;
}
@ -139,7 +143,7 @@ void find_ports(std::list<PortType> &matched_ports, std::list<PortType> &not_mat
#if DEVICE_SERIAL
if (!strcmp(PortType::PinMap::name, UART_NAME) || !strcmp(PortType::PinMap::name, UARTNOFC_NAME)) {
if (pinmap_list_has_peripheral(pinmap_uart_restricted_peripherals(), port.peripheral)) {
utest_printf("Skipping %s peripheral %i with pin %s (%i)\r\n", pin_type,
utest_printf("Skipping (restricted uart peripheral) %s peripheral %i with pin %s (%i)\r\n", pin_type,
port.peripheral, FormFactorType::pin_to_string(port.pins[i]), port.pins[i]);
continue;
}

41
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/TARGET_FRDM/PeripheralPins.c
View File

@ -16,47 +16,6 @@
#include "PeripheralPins.h"
/************GPIO***************/
const PinMap PinMap_GPIO[] = {
{PTA0, GPIO_X, 1},
{PTA1, GPIO_X, 1},
{PTA2, GPIO_X, 1},
{PTA3, GPIO_X, 1},
{PTA4, GPIO_X, 1},
{PTA18, GPIO_X, 1},
{PTA19, GPIO_X, 1},
{PTC4, GPIO_X, 1},
{PTC5, GPIO_X, 1},
{PTC6, GPIO_X, 1},
{PTC7, GPIO_X, 1},
{PTD1, GPIO_X, 1},
{PTD2, GPIO_X, 1},
{PTD3, GPIO_X, 1},
{PTD4, GPIO_X, 1},
{PTD5, GPIO_X, 1},
{PTD6, GPIO_X, 1},
{PTD7, GPIO_X, 1},
{PTE0, GPIO_X, 1},
{PTE1, GPIO_X, 1},
{PTE2, GPIO_X, 1},
{PTE3, GPIO_X, 1},
{PTE4, GPIO_X, 1},
{PTE16, GPIO_X, 1},
{PTE17, GPIO_X, 1},
{PTE18, GPIO_X, 1},
{PTE19, GPIO_X, 1},
{NC , NC , 0}
};
const PinMap *gpio_pinmap()
{
return PinMap_GPIO;
}
/************RTC***************/
const PinMap PinMap_RTC[] = {
{NC, OSC32KCLK, 0},

39
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/TARGET_FRDM/PeripheralPins.c
View File

@ -16,45 +16,6 @@
#include "PeripheralPins.h"
/************GPIO***************/
const PinMap PinMap_GPIO[] = {
{PTA0, GPIO_X, 1},
{PTA1, GPIO_X, 1},
{PTA2, GPIO_X, 1},
{PTA16, GPIO_X, 1},
{PTA17, GPIO_X, 1},
{PTA18, GPIO_X, 1},
{PTA19, GPIO_X, 1},
{PTB0, GPIO_X, 1},
{PTB1, GPIO_X, 1},
{PTB2, GPIO_X, 1},
{PTB3, GPIO_X, 1},
{PTB16, GPIO_X, 1},
{PTB17, GPIO_X, 1},
{PTB18, GPIO_X, 1},
// {PTC0, GPIO_X, 1}, // PTC0 is not available on the 48-pin Laminate QFN package.
{PTC1, GPIO_X, 1},
{PTC2, GPIO_X, 1},
{PTC3, GPIO_X, 1},
{PTC4, GPIO_X, 1},
{PTC5, GPIO_X, 1},
{PTC6, GPIO_X, 1},
{PTC7, GPIO_X, 1},
{PTC16, GPIO_X, 1},
{PTC17, GPIO_X, 1},
{PTC18, GPIO_X, 1},
{PTC19, GPIO_X, 1},
{NC , NC , 0}
};
const PinMap *gpio_pinmap()
{
return PinMap_GPIO;
}
/************RTC***************/
const PinMap PinMap_RTC[] = {
{NC, OSC32KCLK, 0},

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PeripheralPinMaps.h
View File

@ -67,7 +67,7 @@ MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_I2C_SDA[] = {
{PTB3, I2C_0, 2},
{PTC11, I2C_1, 2},
{PTA13, I2C_2, 5},
{PTD3, I2C_0, 7},
// {PTD3, I2C_0, 7}, // Fails FPGA testing
{PTE0, I2C_1, 6},
{NC, NC, 0}
};

20
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/i2c_api.c
View File

@ -59,6 +59,13 @@
#include "app_util_platform.h"
#include "prs/nrfx_prs.h"
#define TWI_PIN_INIT(_pin) nrf_gpio_cfg((_pin), \
NRF_GPIO_PIN_DIR_INPUT, \
NRF_GPIO_PIN_INPUT_CONNECT, \
NRF_GPIO_PIN_PULLUP, \
NRF_GPIO_PIN_S0D1, \
NRF_GPIO_PIN_NOSENSE)
#if 0
#define DEBUG_PRINTF(...) printf(__VA_ARGS__)
#else
@ -290,8 +297,7 @@ void i2c_configure_twi_instance(i2c_t *obj)
nrfx_prs_release(nordic_nrf5_twi_register[instance]);
if (nrfx_prs_acquire(nordic_nrf5_twi_register[instance],
irq_handlers[instance]) != NRFX_SUCCESS)
{
irq_handlers[instance]) != NRFX_SUCCESS) {
DEBUG_PRINTF("Function: %s, nrfx_prs_acquire error code: %s.",
__func__,
err_code);
@ -330,6 +336,13 @@ void i2c_configure_twi_instance(i2c_t *obj)
nrf_twi_frequency_set(nordic_nrf5_twi_register[instance],
config->frequency);
/* To secure correct signal levels on the pins used by the TWI
master when the system is in OFF mode, and when the TWI master is
disabled, these pins must be configured in the GPIO peripheral.
*/
TWI_PIN_INIT(config->scl);
TWI_PIN_INIT(config->sda);
/* Enable TWI peripheral with new settings. */
nrf_twi_enable(nordic_nrf5_twi_register[instance]);
}
@ -778,8 +791,7 @@ static void nordic_nrf5_twi_event_handler(nrfx_twi_evt_t const *p_event, void *p
struct i2c_s *config = &obj->i2c;
/* Translate event type from NRF driver values to mbed HAL values. */
switch (p_event->type)
{
switch (p_event->type) {
/* Transfer completed event. */
case NRFX_TWI_EVT_DONE:
config->event = I2C_EVENT_TRANSFER_COMPLETE;