STM32H7 alignment within family

- license header update
- STMOD+ connector pin addition
- update pin comment for Ethernet connector issue (DISCO_H747I)
- align files for each target
pull/11789/head
jeromecoutant 2019-10-31 14:38:37 +01:00
parent 0c740e7095
commit 21ff11c3d3
9 changed files with 133 additions and 92 deletions

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@ -1,17 +1,16 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2017 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
/*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/**
@ -101,7 +100,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
@ -136,7 +135,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
}

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@ -1,17 +1,16 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2017 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
/*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/**
@ -101,7 +100,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
@ -136,7 +135,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
}

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@ -1,32 +1,17 @@
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2016, STMicroelectronics
* All rights reserved.
/*
******************************************************************************
* @attention
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H

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@ -2,7 +2,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016-2019 STMicroelectronics.
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,

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@ -89,12 +89,12 @@ MBED_WEAK const PinMap PinMap_ADC[] = {
{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10 // Connected to ULPI_STP
{PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10 // Connected to ULPI_STP
{PC_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10 // Connected to ULPI_STP
{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10 // Connected to ETH_MDC/SAI4_D1
{PC_1_ALT0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 // Connected to ETH_MDC/SAI4_D1
{PC_1_ALT1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10 // Connected to ETH_MDC/SAI4_D1
{PC_1_ALT2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 // Connected to ETH_MDC/SAI4_D1
{PC_1_ALT3, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INN10 // Connected to ETH_MDC/SAI4_D1
{PC_1_ALT4, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 // Connected to ETH_MDC/SAI4_D1
{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10 // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
{PC_1_ALT0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
{PC_1_ALT1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10 // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
{PC_1_ALT2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
{PC_1_ALT3, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INN10 // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
{PC_1_ALT4, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
// {PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INN11 // Connected to PMOD\#3
// {PC_2_ALT0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_INP12 // Connected to PMOD\#3
// {PC_2_ALT1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INN11 // Connected to PMOD\#3
@ -416,7 +416,7 @@ MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
{PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SPI3)}, // Connected to ULPI_D7
{PB_5_ALT1, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)}, // Connected to ULPI_D7
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to PMOD\#8
{PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to ETH_MDC/SAI4_D1
{PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to SAI4_D1 (default: SB8 off/SB21 on), ETH_MDC (SB8 on/SB21 off)
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to PMOD\#2
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to SDIO1_CK
{PD_6, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI3)},
@ -463,7 +463,7 @@ MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to ULPI_D6
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to SDIO1_D2
{PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to PMOD\#18_DFSDM_CKOUT
{PE_2, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to ETH_nINT
{PE_2, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to SAI4_CK1 (default: R87 on/SB17 off), ETH_nINT (R87 off/SB17 on)
{PE_12, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // Connected to FMC_D9
{PF_7, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, // Connected to QSPI_BK1_IO2
{PG_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to ETH_TX_EN
@ -536,7 +536,7 @@ MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
};
MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 // Connected to ETH_nINT
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 // Connected to SAI4_CK1 (default: R87 on/SB17 off), ETH_nINT (R87 off/SB17 on)
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 // Connected to QSPI_BK1_IO2
{NC, NC, 0}
};

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@ -401,7 +401,7 @@ typedef enum {
ETH_CRS = PH_2,
ETH_CRS_ALT0 = PA_0,
ETH_CRS_DV = PA_7,
ETH_MDC = PC_1,
ETH_MDC = PC_1, /* not default HW - need SB8 on/SB21 off */
ETH_MDIO = PA_2,
ETH_PPS_OUT = PB_5,
ETH_PPS_OUT_ALT0 = PG_8,
@ -462,6 +462,49 @@ typedef enum {
PWR_WKUP4 = PI_11,
PWR_WKUP5 = PC_1,
/**** STMOD+ pins ****/
#ifdef STMOD_UART_SOLDERBRIDGE
STMOD_1 = PA_0,
STMOD_2 = PD_5,
STMOD_3 = PD_6,
STMOD_4 = PD_4,
#else /* default HW configuration */
STMOD_1 = PA_11,
STMOD_2 = PC_3,
STMOD_3 = PC_2,
STMOD_4 = PA_12,
#endif /* STMOD_UART_SOLDERBRIDGE */
// STMOD_5 is connected to GND
// STMOD_6 is connected to +5V
STMOD_7 = PD_12,
STMOD_8 = PB_15,
STMOD_9 = PB_14,
STMOD_10 = PD_13,
STMOD_11 = PC_6,
STMOD_12 = PJ_13,
STMOD_13 = PA_4,
STMOD_14 = PF_8,
// STMOD_15 is connected to +5V
// STMOD_16 is connected to GND
STMOD_17 = PC_7,
STMOD_18 = PD_3,
STMOD_19 = PB_9,
STMOD_20 = PB_8,
/**** PMOD pins ****/
PMOD_1 = STMOD_1,
PMOD_2 = STMOD_2,
PMOD_3 = STMOD_3,
PMOD_4 = STMOD_4,
// PMOD_5 is connected to GND
// PMOD_6 is connected to +3V3
PMOD_7 = STMOD_11,
PMOD_8 = STMOD_12,
// PMOD_9 is not connected
// PMOD_10 is not connected
// PMOD_11 is connected to GND
// PMOD_12 is connected to +3V3
// Not connected
NC = (int)0xFFFFFFFF
} PinName;

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@ -20,12 +20,12 @@
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
* | 3- USE_PLL_HSI (internal 64 MHz clock)
*--------------------------------------------------------------------
* SYSCLK(MHz) | 400
* AHBCLK (MHz) | 200
* APB1CLK (MHz) | 100
* APB2CLK (MHz) | 100
* APB3CLK (MHz) | 100
* APB4CLK (MHz) | 100
* SYSCLK(MHz) | 480
* AHBCLK (MHz) | 240
* APB1CLK (MHz) | 120
* APB2CLK (MHz) | 120
* APB3CLK (MHz) | 120
* APB4CLK (MHz) | 120
* USB capable (48 MHz) | YES
*--------------------------------------------------------------------
**/
@ -64,7 +64,6 @@ uint8_t SetSysClock_PLL_HSI(void);
void SetSysClock(void)
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
/* 1- Try to start with HSE and external clock (MCO from STLink PCB part) */
if (SetSysClock_PLL_HSE(1) == 0)
@ -96,16 +95,21 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/* Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
if (bypass) {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
}
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 5; // 5 MHz
@ -131,17 +135,20 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_USB;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
#if DEVICE_USBDEVICE
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
return 0; // FAIL
}
HAL_PWREx_EnableUSBVoltageDetector();
#endif /* DEVICE_USBDEVICE */
__HAL_RCC_CSI_ENABLE() ;
__HAL_RCC_SYSCFG_CLK_ENABLE() ;

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@ -2,7 +2,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,

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@ -3270,7 +3270,7 @@
],
"config": {
"d11_configuration": {
"help": "Value:",
"help": "Value: PB_5 for the default board configuration, PA_7 in case of solder bridge update (SB33 on/ SB35 off)",
"value": "PB_5",
"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
},
@ -3340,7 +3340,11 @@
"EXTRA_IDLE_STACK_REQUIRED"
],
"overrides": { "lpticker_delay_ticks": 0 },
"supported_form_factors": ["ARDUINO"],
"supported_form_factors": [
"ARDUINO",
"STMOD",
"PMOD"
],
"detect_code": ["0814"],
"device_has_add": [
"ANALOGOUT",
@ -3374,7 +3378,11 @@
"EXTRA_IDLE_STACK_REQUIRED"
],
"overrides": { "lpticker_delay_ticks": 0 },
"supported_form_factors": ["ARDUINO"],
"supported_form_factors": [
"ARDUINO",
"STMOD",
"PMOD"
],
"device_has_add": [
"ANALOGOUT",
"CAN",