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STM32: fix error with CAN_3 not defined

pull/5523/head
bcostm 2017-11-15 10:36:03 +01:00 committed by adbridge
parent b3406e3389
commit 21fcb756aa
3 changed files with 10 additions and 10 deletions
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2
targets/TARGET_STM/TARGET_STM32F4/can_device.h
View File

@ -25,7 +25,7 @@ extern "C" {
#ifdef DEVICE_CAN #ifdef DEVICE_CAN
#if defined(CAN3_BASE) #if defined(CAN3_BASE) && defined(CAN_3)
#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie #define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie

2
targets/TARGET_STM/TARGET_STM32F7/can_device.h
View File

@ -25,7 +25,7 @@ extern "C" {
#ifdef DEVICE_CAN #ifdef DEVICE_CAN
#if defined(CAN3_BASE) #if defined(CAN3_BASE) && defined(CAN_3)
#define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie #define CAN_NUM 3 // Number of CAN peripherals present in the STM32 serie

16
targets/TARGET_STM/can_api.c
View File

@ -57,14 +57,14 @@ void can_init_freq (can_t *obj, PinName rd, PinName td, int hz)
__HAL_RCC_CAN1_CLK_ENABLE(); __HAL_RCC_CAN1_CLK_ENABLE();
obj->index = 0; obj->index = 0;
} }
#if defined(CAN2_BASE) && (CAN_NUM > 1) #if defined(CAN2_BASE) && defined(CAN_2)
else if (can == CAN_2) { else if (can == CAN_2) {
__HAL_RCC_CAN1_CLK_ENABLE(); // needed to set filters __HAL_RCC_CAN1_CLK_ENABLE(); // needed to set filters
__HAL_RCC_CAN2_CLK_ENABLE(); __HAL_RCC_CAN2_CLK_ENABLE();
obj->index = 1; obj->index = 1;
} }
#endif #endif
#if defined(CAN3_BASE) && (CAN_NUM > 2) #if defined(CAN3_BASE) && defined(CAN_3)
else if (can == CAN_3) { else if (can == CAN_3) {
__HAL_RCC_CAN3_CLK_ENABLE(); __HAL_RCC_CAN3_CLK_ENABLE();
obj->index = 2; obj->index = 2;
@ -132,14 +132,14 @@ void can_free(can_t *obj)
__HAL_RCC_CAN1_RELEASE_RESET(); __HAL_RCC_CAN1_RELEASE_RESET();
__HAL_RCC_CAN1_CLK_DISABLE(); __HAL_RCC_CAN1_CLK_DISABLE();
} }
#if defined(CAN2_BASE) && (CAN_NUM > 1) #if defined(CAN2_BASE) && defined(CAN_2)
if (can == CAN_2) { if (can == CAN_2) {
__HAL_RCC_CAN2_FORCE_RESET(); __HAL_RCC_CAN2_FORCE_RESET();
__HAL_RCC_CAN2_RELEASE_RESET(); __HAL_RCC_CAN2_RELEASE_RESET();
__HAL_RCC_CAN2_CLK_DISABLE(); __HAL_RCC_CAN2_CLK_DISABLE();
} }
#endif #endif
#if defined(CAN3_BASE) && (CAN_NUM > 2) #if defined(CAN3_BASE) && defined(CAN_3)
if (can == CAN_3) { if (can == CAN_3) {
__HAL_RCC_CAN3_FORCE_RESET(); __HAL_RCC_CAN3_FORCE_RESET();
__HAL_RCC_CAN3_RELEASE_RESET(); __HAL_RCC_CAN3_RELEASE_RESET();
@ -562,7 +562,7 @@ void CAN1_SCE_IRQHandler(void)
{ {
can_irq(CAN_1, 0); can_irq(CAN_1, 0);
} }
#if defined(CAN2_BASE) && (CAN_NUM > 1) #if defined(CAN2_BASE) && defined(CAN_2)
void CAN2_RX0_IRQHandler(void) void CAN2_RX0_IRQHandler(void)
{ {
can_irq(CAN_2, 1); can_irq(CAN_2, 1);
@ -576,7 +576,7 @@ void CAN2_SCE_IRQHandler(void)
can_irq(CAN_2, 1); can_irq(CAN_2, 1);
} }
#endif #endif
#if defined(CAN3_BASE) && (CAN_NUM > 2) #if defined(CAN3_BASE) && defined(CAN_3)
void CAN3_RX0_IRQHandler(void) void CAN3_RX0_IRQHandler(void)
{ {
can_irq(CAN_3, 1); can_irq(CAN_3, 1);
@ -630,7 +630,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
return; return;
} }
} }
#if defined(CAN2_BASE) && (CAN_NUM > 1) #if defined(CAN2_BASE) && defined(CAN_2)
else if ((CANName) can == CAN_2) { else if ((CANName) can == CAN_2) {
switch (type) { switch (type) {
case IRQ_RX: case IRQ_RX:
@ -663,7 +663,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
} }
} }
#endif #endif
#if defined(CAN3_BASE) && (CAN_NUM > 2) #if defined(CAN3_BASE) && defined(CAN_3)
else if ((CANName) can == CAN_3) { else if ((CANName) can == CAN_3) {
switch (type) { switch (type) {
case IRQ_RX: case IRQ_RX: