mirror of https://github.com/ARMmbed/mbed-os.git
STM32 USBDevice: add more supported targets
parent
58c9f4b9bd
commit
211d2011eb
|
@ -132,17 +132,13 @@ USBHAL::USBHAL(void) {
|
|||
gpio_init_out(&HALPriv->usb_switch, PG_6);
|
||||
|
||||
#elif defined(TARGET_NUCLEO_F103RB)
|
||||
/* Configure DM DP Pins
|
||||
- USB-DP (D+ of the USB connector) <======> PA12 (Nucleo board)
|
||||
Make sure to connect a 1.5KOhm pull up to USB-DP PA12 pin (permanent pull-up)
|
||||
- USB-DM (D- of the USB connector) <======> PA11 (Nucleo board)
|
||||
*/
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_MODE_AF_INPUT)); // DM
|
||||
pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_MODE_AF_INPUT)); // DP
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
gpio_init_out(&HALPriv->usb_switch, PB_14);
|
||||
gpio_mode(&HALPriv->usb_switch, OpenDrain);
|
||||
// Make sure to connect a 1.5K pull-up to USB-DP PA12 pin (permanent pull-up)
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_MODE_AF_INPUT)); // DM
|
||||
pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_MODE_AF_INPUT)); // DP
|
||||
|
||||
#elif defined(TARGET_DISCO_L072CZ_LRWAN1) || \
|
||||
defined(TARGET_DISCO_L053C8)
|
||||
|
|
|
@ -18,7 +18,17 @@
|
|||
#ifndef USBHAL_IP_OTGFSHS_H
|
||||
#define USBHAL_IP_OTGFSHS_H
|
||||
|
||||
#if defined(TARGET_DISCO_F769NI)
|
||||
//==================================================================
|
||||
// This board has both USB OTG FS and HS connectors.
|
||||
// Select one line only.
|
||||
//==================================================================
|
||||
#if defined(TARGET_DISCO_F746NG)
|
||||
//#define TARGET_DISCO_F746NG_OTG_FS
|
||||
#define TARGET_DISCO_F746NG_OTG_HS
|
||||
#endif
|
||||
|
||||
#if defined(TARGET_DISCO_F769NI) || \
|
||||
defined(TARGET_DISCO_F746NG_OTG_HS)
|
||||
#define USBHAL_IRQn OTG_HS_IRQn
|
||||
#else
|
||||
#define USBHAL_IRQn OTG_FS_IRQn
|
||||
|
@ -85,7 +95,8 @@ USBHAL::USBHAL(void) {
|
|||
|
||||
memset(&hpcd.Init, 0, sizeof(hpcd.Init));
|
||||
|
||||
#if defined(TARGET_DISCO_F769NI)
|
||||
#if defined(TARGET_DISCO_F769NI) || \
|
||||
defined(TARGET_DISCO_F746NG_OTG_HS)
|
||||
hpcd.Instance = USB_OTG_HS;
|
||||
hpcd.Init.phy_itface = PCD_PHY_ULPI;
|
||||
hpcd.Init.Sof_enable = 0;
|
||||
|
@ -120,33 +131,45 @@ USBHAL::USBHAL(void) {
|
|||
|
||||
// Configure USB pins and other clocks
|
||||
|
||||
// NUCLEO_144 boards
|
||||
#if defined(TARGET_NUCLEO_F207ZG) || \
|
||||
defined(TARGET_NUCLEO_F401RE) || \
|
||||
defined(TARGET_NUCLEO_F411RE) || \
|
||||
defined(TARGET_NUCLEO_F412ZG) || \
|
||||
defined(TARGET_NUCLEO_F429ZI) || \
|
||||
defined(TARGET_NUCLEO_F446ZE) || \
|
||||
defined(TARGET_NUCLEO_F767ZI) || \
|
||||
defined(TARGET_NUCLEO_F746ZG)
|
||||
defined(TARGET_NUCLEO_F746ZG) || \
|
||||
defined(TARGET_DISCO_F469NI) || \
|
||||
defined(TARGET_DISCO_F746NG_OTG_FS)
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* OTG_FS_SOF */
|
||||
pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* OTG_FS_VBUS */
|
||||
pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); /* OTG_FS_ID */
|
||||
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* OTG_FS_DM */
|
||||
pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* OTG_FS_DP */
|
||||
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM
|
||||
pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP
|
||||
pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS
|
||||
pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID
|
||||
pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // SOF
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
|
||||
#elif defined(TARGET_DISCO_F429ZI)
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
pin_function(PB_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DM
|
||||
pin_function(PB_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DP
|
||||
pin_function(PB_13, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // VBUS
|
||||
pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)); // ID
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
|
||||
#elif defined(TARGET_DISCO_L475VG_IOT01A) || \
|
||||
defined(TARGET_DISCO_L476VG)
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* OTG_FS_DM */
|
||||
pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* OTG_FS_DP */
|
||||
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM
|
||||
pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); /* VBUS pin */
|
||||
pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
HAL_PWREx_EnableVddUSB();
|
||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||
|
||||
#elif defined(TARGET_DISCO_F769NI)
|
||||
#elif defined(TARGET_DISCO_F769NI) || \
|
||||
defined(TARGET_DISCO_F746NG_OTG_HS)
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
|
@ -163,9 +186,14 @@ USBHAL::USBHAL(void) {
|
|||
pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7
|
||||
pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP
|
||||
pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT
|
||||
#if defined(TARGET_DISCO_F769NI)
|
||||
pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR
|
||||
#else // TARGET_DISCO_F746NG
|
||||
pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR
|
||||
#endif
|
||||
__HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE();
|
||||
__HAL_RCC_USB_OTG_HS_CLK_ENABLE();
|
||||
|
||||
#else
|
||||
#error "USB pins are not configured !"
|
||||
#endif
|
||||
|
|
|
@ -16,21 +16,22 @@
|
|||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
// This file is for STM targets only
|
||||
/* TARGET NOT STM does not support this HAL */
|
||||
#ifndef TARGET_STM
|
||||
#define USBSTM_HAL_UNSUPPORTED
|
||||
#endif
|
||||
|
||||
// For STM32F4 devices, this file is used only if USB_STM_HAL is defined (in targets.json)
|
||||
#if defined(TARGET_STM32F4) && !defined(USB_STM_HAL)
|
||||
/* STM32F4 family without USB_STM_HAL use another HAL */
|
||||
#if defined(TARGET_STM) && defined(TARGET_STM32F4) && !defined(USB_STM_HAL)
|
||||
#define USBSTM_HAL_UNSUPPORTED
|
||||
#endif
|
||||
|
||||
#ifndef USBSTM_HAL_UNSUPPORTED
|
||||
|
||||
#include "USBHAL.h"
|
||||
#include "pinmap.h"
|
||||
|
||||
#include "USBHAL_STM32.h"
|
||||
|
||||
/* mbed endpoint definition to hal definition */
|
||||
#define EP_ADDR(ep) (((ep) >> 1)|((ep) & 1) << 7)
|
||||
|
||||
|
@ -38,8 +39,6 @@
|
|||
#define ADDR_EPIN(ep) (((ep) << 1) | 1)
|
||||
#define ADDR_EPOUT(ep) (((ep) << 1))
|
||||
|
||||
#include "USBHAL_STM32.h"
|
||||
|
||||
/* this call at device reception completion on a Out Enpoint */
|
||||
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
|
||||
{
|
||||
|
@ -321,15 +320,12 @@ bool USBHAL::getEndpointStallState(uint8_t endpoint) {
|
|||
void USBHAL::remoteWakeup(void) {
|
||||
}
|
||||
|
||||
|
||||
void USBHAL::_usbisr(void) {
|
||||
instance->usbisr();
|
||||
}
|
||||
|
||||
|
||||
void USBHAL::usbisr(void) {
|
||||
|
||||
HAL_PCD_IRQHandler(&instance->hpcd);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -19,20 +19,25 @@
|
|||
#define USBHAL_STM32_H
|
||||
|
||||
#if defined(TARGET_NUCLEO_F207ZG) || \
|
||||
defined(TARGET_NUCLEO_F401RE) || \
|
||||
defined(TARGET_NUCLEO_F411RE) || \
|
||||
defined(TARGET_NUCLEO_F412ZG) || \
|
||||
defined(TARGET_NUCLEO_F429ZI) || \
|
||||
defined(TARGET_NUCLEO_F446ZE) || \
|
||||
defined(TARGET_NUCLEO_F767ZI) || \
|
||||
defined(TARGET_NUCLEO_F746ZG) || \
|
||||
defined(TARGET_DISCO_L476VG) || \
|
||||
defined(TARGET_DISCO_F429ZI) || \
|
||||
defined(TARGET_DISCO_F469NI) || \
|
||||
defined(TARGET_DISCO_F746NG) || \
|
||||
defined(TARGET_DISCO_F769NI) || \
|
||||
defined(TARGET_DISCO_L475VG_IOT01A) || \
|
||||
defined(TARGET_DISCO_F769NI)
|
||||
defined(TARGET_DISCO_L476VG)
|
||||
#include "USBHAL_IP_OTGFSHS.h"
|
||||
|
||||
#elif defined(TARGET_NUCLEO_F303ZE) || \
|
||||
defined(TARGET_NUCLEO_F103RB) || \
|
||||
defined(TARGET_DISCO_L072CZ_LRWAN1) || \
|
||||
defined(TARGET_DISCO_L053C8)
|
||||
#elif defined(TARGET_NUCLEO_F103RB) || \
|
||||
defined(TARGET_NUCLEO_F303ZE) || \
|
||||
defined(TARGET_DISCO_L053C8) || \
|
||||
defined(TARGET_DISCO_L072CZ_LRWAN1)
|
||||
#include "USBHAL_IP_DEVICE.h"
|
||||
|
||||
#else
|
||||
|
|
Loading…
Reference in New Issue