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Serial printf and InterruptIn changes

pull/2938/head
Radhika 2016-10-13 16:32:26 +05:30
parent 1ba3499631
commit 20e6a05bb8
7 changed files with 74 additions and 43 deletions
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1
targets/TARGET_ONSEMI/TARGET_NCS36510/clock.h
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@ -82,6 +82,7 @@
#define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a) #define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a)
#define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a) #define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a)
#define CLOCK_IS_ENABLED(a) (((CLOCKREG->PDIS.WORD) >> a) & 1)?0:1
/************************************************************************************************* /*************************************************************************************************
* * * *

12
targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_api.c
View File

@ -143,7 +143,9 @@ void gpio_mode(gpio_t *obj, PinMode mode)
void gpio_dir(gpio_t *obj, PinDirection direction) void gpio_dir(gpio_t *obj, PinDirection direction)
{ {
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
if (direction == PIN_INPUT) { if (direction == PIN_INPUT) {
obj->GPIOMEMBASE->W_IN = obj->gpioMask; obj->GPIOMEMBASE->W_IN = obj->gpioMask;
@ -163,7 +165,9 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
void gpio_write(gpio_t *obj, int value) void gpio_write(gpio_t *obj, int value)
{ {
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
/* Set the GPIO based on value */ /* Set the GPIO based on value */
if (value) { if (value) {
@ -186,7 +190,9 @@ int gpio_read(gpio_t *obj)
int ret; int ret;
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0; ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0;

75
targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_irq_api.c
View File

@ -79,8 +79,8 @@ static uint32_t gpioIds[NUMBER_OF_GPIO] = {0};
/** Main GPIO IRQ handler called from vector table handler /** Main GPIO IRQ handler called from vector table handler
* *
* @param gpioBase The GPIO register base address * @param gpioBase The GPIO register base address
* @return void * @return void
*/ */
void fGpioHandler(void) void fGpioHandler(void)
{ {
@ -90,7 +90,9 @@ void fGpioHandler(void)
GpioReg_pt gpioBase; GpioReg_pt gpioBase;
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
gpioBase = GPIOREG; gpioBase = GPIOREG;
@ -114,7 +116,7 @@ void fGpioHandler(void)
event = IRQ_NONE; event = IRQ_NONE;
} }
} }
gpioBase->IRQ_CLEAR |= (0x1 << index); gpioBase->IRQ_CLEAR = (0x1 << index);
/* Call the handler registered to the pin */ /* Call the handler registered to the pin */
irq_handler(gpioIds[index], event); irq_handler(gpioIds[index], event);
@ -146,7 +148,9 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
gpioIds[pin] = id; gpioIds[pin] = id;
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
/* Initialize the GPIO membase */ /* Initialize the GPIO membase */
obj->GPIOMEMBASE = GPIOREG; obj->GPIOMEMBASE = GPIOREG;
@ -157,10 +161,8 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
* then change this setting to obj->GPIOMEMBASE->W_IN |= obj->pinMask. All parameter setting needs to change from = to |= * then change this setting to obj->GPIOMEMBASE->W_IN |= obj->pinMask. All parameter setting needs to change from = to |=
*/ */
obj->GPIOMEMBASE->W_IN = obj->pinMask; obj->GPIOMEMBASE->W_IN = obj->pinMask;
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask; obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask); obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
obj->GPIOMEMBASE->ANYEDGE_SET = IO_NONE;
/* Register the handler for this pin */ /* Register the handler for this pin */
irq_handler = handler; irq_handler = handler;
@ -179,9 +181,12 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
void gpio_irq_free(gpio_irq_t *obj) void gpio_irq_free(gpio_irq_t *obj)
{ {
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
obj->GPIOMEMBASE->W_IN = (IO_ALL ^ (obj->pinMask)); /* Make the pin as output in order to release it */
obj->GPIOMEMBASE->W_OUT = obj->pinMask;
gpioIds[obj->pin] = 0; gpioIds[obj->pin] = 0;
} }
@ -195,32 +200,40 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
{ {
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
switch(event) { switch(event) {
case IRQ_RISE: case IRQ_RISE:
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask); obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
/* Enable is an integer; hence checking for 1 or 0*/ /* Enable rising edge */
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
/* Enable the IRQ based on enable parameter */
if (enable == 1) { if (enable == 1) {
/* Enable rising edge */
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask); obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
} else if (enable == 0) { } else if (enable == 0) {
/* Disable rising edge */
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (IO_ALL ^ (obj->pinMask)); obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
} }
break; break;
case IRQ_FALL: case IRQ_FALL:
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask); obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
/* Enable is an integer; hence checking for 1 or 0*/ /* Enable falling edge */
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = obj->pinMask;
/* Enable the IRQ based on enable parameter */
if (enable == 1) { if (enable == 1) {
/* Enable falling edge */
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (obj->pinMask); obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
} else if (enable == 0) { } else if (enable == 0) {
/* Disable falling edge */
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (IO_ALL ^ (obj->pinMask)); obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
} }
break; break;
@ -239,9 +252,11 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
void gpio_irq_enable(gpio_irq_t *obj) void gpio_irq_enable(gpio_irq_t *obj)
{ {
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
obj->GPIOMEMBASE->IRQ_ENABLE_SET = (obj->pinMask); obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
} }
/** Disable GPIO IRQ /** Disable GPIO IRQ
@ -252,9 +267,11 @@ void gpio_irq_enable(gpio_irq_t *obj)
void gpio_irq_disable(gpio_irq_t *obj) void gpio_irq_disable(gpio_irq_t *obj)
{ {
/* Enable the GPIO clock */ /* Enable the GPIO clock */
CLOCK_ENABLE(CLOCK_GPIO); if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
CLOCK_ENABLE(CLOCK_GPIO);
}
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = (obj->pinMask); obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
} }
#endif //DEVICE_INTERRUPTIN #endif //DEVICE_INTERRUPTIN

16
targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510Init.c
View File

@ -83,6 +83,13 @@ boolean fTrim()
RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;; RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;;
RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;; RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;;
if ( TRIMREG->MAC_ADDR_LOW != 0xFFFFFFFF ) {
MACHWREG->LONG_ADDRESS_LOW = TRIMREG->MAC_ADDR_LOW;
}
if ( TRIMREG->MAC_ADDR_HIGH != 0xFFFFFFFF ) {
MACHWREG->LONG_ADDRESS_HIGH = TRIMREG->MAC_ADDR_HIGH;
}
return True; return True;
} else { } else {
@ -158,15 +165,16 @@ void fPmuInit()
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk; SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
/** Set regulator timings */ /** Set regulator timings */
PMUREG->FVDD_TSETTLE = 160; PMUREG->FVDD_TSETTLE = 160;
PMUREG->FVDD_TSTARTUP = 400; PMUREG->FVDD_TSTARTUP = 400;
/** Keep SRAMA & SRAMB powered in coma mode */ /** Keep SRAMA & SRAMB powered in coma mode */
PMUREG->CONTROL.BITS.SRAMA = False; PMUREG->CONTROL.BITS.SRAMA = False;
PMUREG->CONTROL.BITS.SRAMB = False; PMUREG->CONTROL.BITS.SRAMB = False;
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */ PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */ PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
/** Disable the clock for PMU peripheral device, all settings are done */ /** Disable the clock for PMU peripheral device, all settings are done */
CLOCK_DISABLE(CLOCK_PMU); CLOCK_DISABLE(CLOCK_PMU);

1
targets/TARGET_ONSEMI/TARGET_NCS36510/pinmap.c
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@ -75,7 +75,6 @@ void pin_mode(PinName pin, PinMode mode)
default: default:
break; break;
} }
/** - Disable the clock for PAD peripheral device */ /** - Disable the clock for PAD peripheral device */

4
targets/TARGET_ONSEMI/TARGET_NCS36510/serial_api.c
View File

@ -132,8 +132,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
PadRegOffset = (PadReg_t*)(PADREG_BASE + (rx * PAD_REG_ADRS_BYTE_SIZE)); PadRegOffset = (PadReg_t*)(PADREG_BASE + (rx * PAD_REG_ADRS_BYTE_SIZE));
PadRegOffset->PADIO0.WORD = PAD_UART_RX; /* Pad settings for UART Rx */ PadRegOffset->PADIO0.WORD = PAD_UART_RX; /* Pad settings for UART Rx */
GPIOREG->W_OUT |= (True << tx); /* tx as OUT direction */ GPIOREG->W_OUT = (0x1 << tx); /* tx as OUT direction */
GPIOREG->W_IN |= (True << rx); /* rx as IN directon */ GPIOREG->W_IN = (0x1 << rx); /* rx as IN directon */
CLOCK_DISABLE(CLOCK_PAD); CLOCK_DISABLE(CLOCK_PAD);
CLOCK_DISABLE(CLOCK_CROSSB); CLOCK_DISABLE(CLOCK_CROSSB);

8
targets/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h
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@ -50,10 +50,10 @@
**************************************************************************************************/ **************************************************************************************************/
/** trim register map */ /** trim register map */
typedef struct { /**< REV B REV D */ typedef struct { /**< REV B REV D */
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */ __I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
__I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */ __I uint32_t MAC_ADDR_LOW; /**< 0x1FA4 */
__I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */ __I uint32_t MAC_ADDR_HIGH; /**< 0x1FA8 */
#ifdef REVB #ifdef REVB
__I uint32_t TX_POWER; /**< 0x1FAC */ __I uint32_t TX_POWER; /**< 0x1FAC */
#endif #endif