mirror of https://github.com/ARMmbed/mbed-os.git
commit
1fdf21f6e3
|
@ -1,19 +1,26 @@
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|||
/* Copyright (c) 2010-2011 mbed.org, MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
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* and associated documentation files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
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* Permission is hereby granted, free of charge, to any person
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||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
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||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
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* KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
|
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* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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* PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#if defined(TARGET_RZ_A1H)
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@ -59,8 +66,9 @@ const struct PIPECFGREC {
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USB_FUNCTION_DIR_P_OUT |
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USB_FUNCTION_EP1,
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( ( ( 64) / 64 - 1 ) << 10 ) | 0x04u,
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64,
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DEVDRV_USBF_OFF | 0,
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MAX_PACKET_SIZE_EP1,
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DEVDRV_USBF_OFF |
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( 3 << USB_PIPEPERI_IITV_SHIFT ),
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},
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{
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EP1IN, /*EP1: Host <- Func, INT*/
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@ -73,8 +81,9 @@ const struct PIPECFGREC {
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USB_FUNCTION_DIR_P_IN |
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USB_FUNCTION_EP1,
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( ( ( 64) / 64 - 1 ) << 10 ) | 0x05u,
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64,
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DEVDRV_USBF_OFF | 0,
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MAX_PACKET_SIZE_EP1,
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DEVDRV_USBF_OFF |
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( 3 << USB_PIPEPERI_IITV_SHIFT ),
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},
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{
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EP2OUT, /*EP2: Host -> Func, BULK*/
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@ -87,8 +96,9 @@ const struct PIPECFGREC {
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USB_FUNCTION_DIR_P_OUT |
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USB_FUNCTION_EP2,
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( ( (2048) / 64 - 1 ) << 10 ) | 0x30u,
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512,
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DEVDRV_USBF_OFF | 0,
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MAX_PACKET_SIZE_EP2,
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DEVDRV_USBF_OFF |
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( 0 << USB_PIPEPERI_IITV_SHIFT ),
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},
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{
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EP2IN, /*EP2: Host <- Func, BULK*/
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@ -101,8 +111,9 @@ const struct PIPECFGREC {
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USB_FUNCTION_DIR_P_IN |
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USB_FUNCTION_EP2,
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( ( (2048) / 64 - 1 ) << 10 ) | 0x50u,
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512,
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DEVDRV_USBF_OFF | 0,
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MAX_PACKET_SIZE_EP2,
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DEVDRV_USBF_OFF |
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( 0 << USB_PIPEPERI_IITV_SHIFT ),
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},
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{
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EP3OUT, /*EP3: Host -> Func, ISO*/
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@ -110,13 +121,14 @@ const struct PIPECFGREC {
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USB_FUNCTION_ISO |
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USB_FUNCTION_BFREOFF |
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USB_FUNCTION_DBLBON |
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USB_FUNCTION_CNTMDON |
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USB_FUNCTION_CNTMDOFF |
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USB_FUNCTION_SHTNAKON |
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USB_FUNCTION_DIR_P_OUT |
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USB_FUNCTION_EP3,
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( ( (1024) / 64 - 1 ) << 10 ) | 0x10u,
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192,
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DEVDRV_USBF_OFF | 1,
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( ( ( 512) / 64 - 1 ) << 10 ) | 0x10u,
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MAX_PACKET_SIZE_EP3,
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DEVDRV_USBF_OFF |
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( 0 << USB_PIPEPERI_IITV_SHIFT ),
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},
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{
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EP3IN, /*EP3: Host <- Func, ISO*/
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@ -124,13 +136,14 @@ const struct PIPECFGREC {
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USB_FUNCTION_ISO |
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USB_FUNCTION_BFREOFF |
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USB_FUNCTION_DBLBON |
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USB_FUNCTION_CNTMDON |
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USB_FUNCTION_CNTMDOFF |
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USB_FUNCTION_SHTNAKOFF |
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USB_FUNCTION_DIR_P_IN |
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USB_FUNCTION_EP3,
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( ( (1024) / 64 - 1 ) << 10 ) | 0x20u,
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192,
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DEVDRV_USBF_OFF | 1,
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( ( ( 512) / 64 - 1 ) << 10 ) | 0x20u,
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MAX_PACKET_SIZE_EP3,
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DEVDRV_USBF_OFF |
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( 0 << USB_PIPEPERI_IITV_SHIFT ),
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},
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{ /*terminator*/
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0, 0, 0, 0, 0,
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@ -142,13 +155,12 @@ const struct PIPECFGREC {
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/* workareas */
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USBHAL * USBHAL::instance;
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static IRQn_Type int_id; /* interrupt ID */
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static uint16_t int_level; /* initerrupt level */
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static uint16_t clock_mode; /* input clock selector */
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static uint16_t mode; /* USB speed (HIGH/FULL) */
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static DigitalOut *usb0_en;
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//static DigitalOut *usb0_en;
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static uint16_t EP0_read_status;
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static uint16_t EPx_read_status;
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@ -160,17 +172,28 @@ static uint8_t recv_buffer[MAX_PACKET_SIZE_EPBULK];
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volatile static uint16_t recv_error;
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/*************************************************************************/
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/* prototypes for C */
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extern "C" {
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void usb0_function_BRDYInterruptPIPE0 (uint16_t status, uint16_t intenb,
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USBHAL *object, void (USBHAL::*EP0func)(void));
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void usb0_function_BRDYInterrupt (uint16_t status, uint16_t intenb,
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USBHAL *object, bool (USBHAL::*epCallback[])(void));
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void usb0_function_NRDYInterruptPIPE0(uint16_t status, uint16_t intenb,
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USBHAL *object, void (USBHAL::*EP0func)(void));
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void usb0_function_NRDYInterrupt (uint16_t status, uint16_t intenb,
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USBHAL *object, bool (USBHAL::*epCallback[])(void));
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void usb0_function_BEMPInterruptPIPE0(uint16_t status, uint16_t intenb,
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USBHAL *object, void (USBHAL::*EP0func)(void));
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void usb0_function_BEMPInterrupt (uint16_t status, uint16_t intenb,
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USBHAL *object, bool (USBHAL::*epCallback[])(void));
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}
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/* This C++ functions changed to macro functions.
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static uint32_t EP2PIPE(uint8_t endpoint);
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static void usb0_function_save_request(void);
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void usb0_function_BRDYInterrupt(uint16_t status, uint16_t intenb);
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void usb0_function_NRDYInterrupt (uint16_t status, uint16_t intenb);
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void usb0_function_BEMPInterrupt (uint16_t status, uint16_t intenb);
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*/
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/*************************************************************************/
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/* macros */
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@ -182,66 +205,72 @@ volatile static uint16_t recv_error;
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* : uint16_t intenb ; BRDYENB Register Value
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* Return Value : none
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*****************************************************************************/
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#define usb0_function_BRDYInterruptPIPE0(status, intenb) \
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{ \
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volatile uint16_t dumy_sts; \
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uint16_t read_status; \
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\
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USB200.BRDYSTS = \
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(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0]; \
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RZA_IO_RegWrite_16( \
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&USB200.CFIFOSEL, USB_FUNCTION_PIPE0, \
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USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE); \
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\
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g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] = \
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g_usb0_function_data_count[USB_FUNCTION_PIPE0]; \
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\
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read_status = usb0_function_read_buffer_c(USB_FUNCTION_PIPE0); \
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\
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g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] -= \
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g_usb0_function_data_count[USB_FUNCTION_PIPE0]; \
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\
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switch (read_status) { \
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case USB_FUNCTION_READING: /* Continue of data read */ \
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case USB_FUNCTION_READEND: /* End of data read */ \
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/* PID = BUF */ \
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usb0_function_set_pid_buf(USB_FUNCTION_PIPE0); \
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\
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/*callback*/ \
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EP0out(); \
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break; \
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\
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case USB_FUNCTION_READSHRT: /* End of data read */ \
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usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0); \
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/* PID = BUF */ \
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usb0_function_set_pid_buf(USB_FUNCTION_PIPE0); \
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\
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/*callback*/ \
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EP0out(); \
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break; \
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\
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case USB_FUNCTION_READOVER: /* FIFO access error */ \
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/* Buffer Clear */ \
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USB200.CFIFOCTR = USB_FUNCTION_BITBCLR; \
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usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0); \
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/* Req Error */ \
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usb0_function_set_pid_stall(USB_FUNCTION_PIPE0); \
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\
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/*callback*/ \
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EP0out(); \
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break; \
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\
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case DEVDRV_USBF_FIFOERROR: /* FIFO access error */ \
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default: \
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usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0); \
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/* Req Error */ \
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usb0_function_set_pid_stall(USB_FUNCTION_PIPE0); \
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break; \
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} \
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/* Three dummy reads for clearing interrupt requests */ \
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dumy_sts = USB200.BRDYSTS; \
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}
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extern "C" {
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void usb0_function_BRDYInterruptPIPE0 (
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uint16_t status,
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uint16_t intenb,
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USBHAL *object,
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void (USBHAL::*EP0func)(void)
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)
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{
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volatile uint16_t dumy_sts;
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uint16_t read_status;
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USB200.BRDYSTS =
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(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0];
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RZA_IO_RegWrite_16(
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&USB200.CFIFOSEL, USB_FUNCTION_PIPE0,
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USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE);
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g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] =
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g_usb0_function_data_count[USB_FUNCTION_PIPE0];
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read_status = usb0_function_read_buffer_c(USB_FUNCTION_PIPE0);
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g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] -=
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g_usb0_function_data_count[USB_FUNCTION_PIPE0];
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switch (read_status) {
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case USB_FUNCTION_READING: /* Continue of data read */
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case USB_FUNCTION_READEND: /* End of data read */
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/* PID = BUF */
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usb0_function_set_pid_buf(USB_FUNCTION_PIPE0);
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/*callback*/
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(object->*EP0func)();
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break;
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case USB_FUNCTION_READSHRT: /* End of data read */
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usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0);
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/* PID = BUF */
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usb0_function_set_pid_buf(USB_FUNCTION_PIPE0);
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/*callback*/
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(object->*EP0func)();
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break;
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case USB_FUNCTION_READOVER: /* FIFO access error */
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/* Buffer Clear */
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USB200.CFIFOCTR = USB_FUNCTION_BITBCLR;
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usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0);
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/* Req Error */
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usb0_function_set_pid_stall(USB_FUNCTION_PIPE0);
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/*callback*/
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(object->*EP0func)();
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break;
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case DEVDRV_USBF_FIFOERROR: /* FIFO access error */
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default:
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usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0);
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/* Req Error */
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usb0_function_set_pid_stall(USB_FUNCTION_PIPE0);
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break;
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}
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/* Three dummy reads for clearing interrupt requests */
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dumy_sts = USB200.BRDYSTS;
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}
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}
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/******************************************************************************
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|
@ -251,85 +280,100 @@ volatile static uint16_t recv_error;
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* : uint16_t intenb ; BRDYENB Register Value
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* Return Value : none
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*****************************************************************************/
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#define usb0_function_BRDYInterrupt(status, intenb) \
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{ \
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volatile uint16_t dumy_sts; \
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\
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/************************************************************** \
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* Function Name: usb0_function_brdy_int \
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* Description : Executes BRDY interrupt(USB_FUNCTION_PIPE1-9). \
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* : According to the pipe that interrupt is generated in, \
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* : reads/writes buffer allocated in the pipe. \
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* : This function is executed in the BRDY \
|
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* : interrupt handler. This function \
|
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* : clears BRDY interrupt status and BEMP \
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* : interrupt status. \
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* Arguments : uint16_t Status ; BRDYSTS Register Value \
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* : uint16_t Int_enbl ; BRDYENB Register Value \
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* Return Value : none \
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*************************************************************/ \
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/* copied from usb0_function_intrn.c */ \
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uint32_t int_sense = 0; \
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uint16_t pipe; \
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uint16_t pipebit; \
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uint16_t ep; \
|
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\
|
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for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) { \
|
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pipebit = g_usb0_function_bit_set[pipe]; \
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\
|
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if ((status & pipebit) && (intenb & pipebit)) { \
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USB200.BRDYSTS = (uint16_t)~pipebit; \
|
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USB200.BEMPSTS = (uint16_t)~pipebit; \
|
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\
|
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switch (g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) { \
|
||||
case USB_FUNCTION_D0FIFO_DMA: \
|
||||
if (g_usb0_function_DmaStatus[USB_FUNCTION_D0FIFO] != USB_FUNCTION_DMA_READY) { \
|
||||
/*now, DMA is not supported*/ \
|
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usb0_function_dma_interrupt_d0fifo(int_sense); \
|
||||
} \
|
||||
\
|
||||
if (RZA_IO_RegRead_16( \
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) { \
|
||||
/*now, DMA is not supported*/ \
|
||||
usb0_function_read_dma(pipe); \
|
||||
usb0_function_disable_brdy_int(pipe); \
|
||||
} else { \
|
||||
USB200.D0FIFOCTR = USB_FUNCTION_BITBCLR; \
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE; \
|
||||
} \
|
||||
break; \
|
||||
\
|
||||
case USB_FUNCTION_D1FIFO_DMA: \
|
||||
if (g_usb0_function_DmaStatus[USB_FUNCTION_D1FIFO] != USB_FUNCTION_DMA_READY) { \
|
||||
/*now, DMA is not supported*/ \
|
||||
usb0_function_dma_interrupt_d1fifo(int_sense); \
|
||||
} \
|
||||
\
|
||||
if (RZA_IO_RegRead_16( \
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) { \
|
||||
/*now, DMA is not supported*/ \
|
||||
usb0_function_read_dma(pipe); \
|
||||
usb0_function_disable_brdy_int(pipe); \
|
||||
} else { \
|
||||
USB200.D1FIFOCTR = USB_FUNCTION_BITBCLR; \
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE; \
|
||||
} \
|
||||
break; \
|
||||
\
|
||||
default: \
|
||||
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT; \
|
||||
ep <<= 1; \
|
||||
ep += (RZA_IO_RegRead_16(&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)? \
|
||||
(0): (1); \
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_WAIT; \
|
||||
(instance->*(epCallback[ep - 2])) (); \
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_DONE; \
|
||||
} \
|
||||
} \
|
||||
} \
|
||||
/* Three dummy reads for clearing interrupt requests */ \
|
||||
dumy_sts = USB200.BRDYSTS; \
|
||||
extern "C" {
|
||||
void usb0_function_BRDYInterrupt(
|
||||
uint16_t status,
|
||||
uint16_t intenb,
|
||||
USBHAL *object,
|
||||
bool (USBHAL::*epCallback[])(void)
|
||||
)
|
||||
{
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
/**************************************************************
|
||||
* Function Name: usb0_function_brdy_int
|
||||
* Description : Executes BRDY interrupt(USB_FUNCTION_PIPE1-9).
|
||||
* : According to the pipe that interrupt is generated in,
|
||||
* : reads/writes buffer allocated in the pipe.
|
||||
* : This function is executed in the BRDY
|
||||
* : interrupt handler. This function
|
||||
* : clears BRDY interrupt status and BEMP
|
||||
* : interrupt status.
|
||||
* Arguments : uint16_t Status ; BRDYSTS Register Value
|
||||
* : uint16_t Int_enbl ; BRDYENB Register Value
|
||||
* Return Value : none
|
||||
*************************************************************/
|
||||
/* copied from usb0_function_intrn.c */
|
||||
uint32_t int_sense = 0;
|
||||
uint16_t pipe;
|
||||
uint16_t pipebit;
|
||||
uint16_t ep;
|
||||
|
||||
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) {
|
||||
pipebit = g_usb0_function_bit_set[pipe];
|
||||
|
||||
if ((status & pipebit) && (intenb & pipebit)) {
|
||||
USB200.BRDYSTS = (uint16_t)~pipebit;
|
||||
USB200.BEMPSTS = (uint16_t)~pipebit;
|
||||
|
||||
switch (g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) {
|
||||
case USB_FUNCTION_D0FIFO_DMA:
|
||||
if (g_usb0_function_DmaStatus[USB_FUNCTION_D0FIFO] != USB_FUNCTION_DMA_READY) {
|
||||
/*now, DMA is not supported*/
|
||||
usb0_function_dma_interrupt_d0fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) {
|
||||
/*now, DMA is not supported*/
|
||||
usb0_function_read_dma(pipe);
|
||||
usb0_function_disable_brdy_int(pipe);
|
||||
} else {
|
||||
USB200.D0FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_D1FIFO_DMA:
|
||||
if (g_usb0_function_DmaStatus[USB_FUNCTION_D1FIFO] != USB_FUNCTION_DMA_READY) {
|
||||
/*now, DMA is not supported*/
|
||||
usb0_function_dma_interrupt_d1fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) {
|
||||
/*now, DMA is not supported*/
|
||||
usb0_function_read_dma(pipe);
|
||||
usb0_function_disable_brdy_int(pipe);
|
||||
} else {
|
||||
USB200.D1FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT;
|
||||
ep <<= 1;
|
||||
if (RZA_IO_RegRead_16(
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0) {
|
||||
/* read */
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_WAIT;
|
||||
(object->*(epCallback[ep - 2])) ();
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
|
||||
} else {
|
||||
/* write */
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_WAIT;
|
||||
(object->*(epCallback[ep - 2 + 1])) ();
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
|
||||
usb0_function_write_buffer(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.BRDYSTS;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
|
@ -339,16 +383,24 @@ volatile static uint16_t recv_error;
|
|||
* : uint16_t intenb ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*****************************************************************************/
|
||||
#define usb0_function_NRDYInterruptPIPE0(status, intenb) \
|
||||
{ \
|
||||
volatile uint16_t dumy_sts; \
|
||||
\
|
||||
USB200.NRDYSTS = \
|
||||
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0]; \
|
||||
\
|
||||
/* Three dummy reads for clearing interrupt requests */ \
|
||||
dumy_sts = USB200.NRDYSTS; \
|
||||
extern "C" {
|
||||
void usb0_function_NRDYInterruptPIPE0(
|
||||
uint16_t status,
|
||||
uint16_t intenb,
|
||||
USBHAL *object,
|
||||
void (USBHAL::*EP0func)(void)
|
||||
)
|
||||
{
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
USB200.NRDYSTS =
|
||||
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0];
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.NRDYSTS;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name: usb0_function_NRDYInterrupt
|
||||
|
@ -357,16 +409,124 @@ volatile static uint16_t recv_error;
|
|||
* : uint16_t intenb ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*****************************************************************************/
|
||||
#define usb0_function_NRDYInterrupt(status, intenb) \
|
||||
{ \
|
||||
volatile uint16_t dumy_sts; \
|
||||
\
|
||||
usb0_function_nrdy_int(status, intenb); \
|
||||
\
|
||||
/* Three dummy reads for clearing interrupt requests */ \
|
||||
dumy_sts = USB200.NRDYSTS; \
|
||||
}
|
||||
extern "C" {
|
||||
void usb0_function_NRDYInterrupt(
|
||||
uint16_t status,
|
||||
uint16_t intenb,
|
||||
USBHAL *object,
|
||||
bool (USBHAL::*epCallback[])(void)
|
||||
)
|
||||
{
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
/**************************************************************
|
||||
* Function Name: usb0_function_nrdy_int
|
||||
* Description : Executes NRDY interrupt(USB_FUNCTION_PIPE1-9).
|
||||
* : Checks NRDY interrupt cause by PID. When the cause if STALL,
|
||||
* : regards the pipe state as STALL and ends the processing.
|
||||
* : Then the cause is not STALL, increments the error count to
|
||||
* : communicate again. When the error count is 3, determines
|
||||
* : the pipe state as DEVDRV_USBF_PIPE_NORES and ends the processing.
|
||||
* : This function is executed in the NRDY interrupt handler.
|
||||
* : This function clears NRDY interrupt status.
|
||||
* Arguments : uint16_t status ; NRDYSTS Register Value
|
||||
* : uint16_t int_enb ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*************************************************************/
|
||||
/* copied from usb0_function_intrn.c */
|
||||
#if 0
|
||||
uint16_t usefifo;
|
||||
#endif
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
#if 0
|
||||
uint16_t mbw;
|
||||
uint32_t size;
|
||||
#endif
|
||||
uint16_t ep;
|
||||
|
||||
bitcheck = (uint16_t)(status & intenb);
|
||||
|
||||
USB200.NRDYSTS = (uint16_t)~status;
|
||||
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB200.SYSCFG0, USB_SYSCFG_DCFM_SHIFT, USB_SYSCFG_DCFM) == 1) {
|
||||
/* USB HOST */
|
||||
/* not support */
|
||||
|
||||
} else {
|
||||
/* USB Function */
|
||||
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) {
|
||||
if ((bitcheck&g_usb0_function_bit_set[pipe]) != g_usb0_function_bit_set[pipe]) {
|
||||
continue;
|
||||
}
|
||||
|
||||
if (g_usb0_function_pipe_status[pipe] != DEVDRV_USBF_PIPE_WAIT) {
|
||||
continue;
|
||||
}
|
||||
|
||||
#if 0
|
||||
usb0_function_set_pid_nak(pipe);
|
||||
|
||||
size = (uint32_t)g_usb0_function_data_count[pipe];
|
||||
mbw = usb0_function_get_mbw(
|
||||
size, (uint32_t)g_usb0_function_data_pointer[pipe]);
|
||||
|
||||
usefifo = (uint16_t)(g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE);
|
||||
switch (usefifo) {
|
||||
|
||||
case USB_FUNCTION_D0FIFO_USE:
|
||||
usb0_function_set_curpipe(
|
||||
pipe, USB_FUNCTION_D0USE, DEVDRV_USBF_NO, mbw);
|
||||
USB200.D0FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_D1FIFO_USE:
|
||||
usb0_function_set_curpipe(
|
||||
pipe, USB_FUNCTION_D1USE, DEVDRV_USBF_NO, mbw);
|
||||
USB200.D1FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
break;
|
||||
|
||||
default:
|
||||
usb0_function_set_curpipe(
|
||||
pipe, USB_FUNCTION_CUSE, USB_FUNCTION_CFIFO_READ, mbw);
|
||||
USB200.CFIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
break;
|
||||
}
|
||||
|
||||
usb0_function_aclrm(pipe);
|
||||
|
||||
usb0_function_enable_nrdy_int(pipe);
|
||||
usb0_function_enable_brdy_int(pipe);
|
||||
|
||||
usb0_function_set_pid_buf(pipe);
|
||||
#endif
|
||||
|
||||
pid = usb0_function_get_pid(pipe);
|
||||
if ((pid == DEVDRV_USBF_PID_STALL) || (pid == DEVDRV_USBF_PID_STALL2)) {
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_STALL;
|
||||
} else {
|
||||
usb0_function_set_pid_buf(pipe);
|
||||
}
|
||||
|
||||
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT;
|
||||
ep <<= 1;
|
||||
if (RZA_IO_RegRead_16(
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0) {
|
||||
/* read */
|
||||
__nop();
|
||||
} else {
|
||||
/* write */
|
||||
__nop();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.NRDYSTS;
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name: usb0_function_BEMPInterruptPIPE0
|
||||
|
@ -375,22 +535,29 @@ volatile static uint16_t recv_error;
|
|||
* : uint16_t intenb ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*****************************************************************************/
|
||||
#define usb0_function_BEMPInterruptPIPE0(status, intenb) \
|
||||
{ \
|
||||
volatile uint16_t dumy_sts; \
|
||||
\
|
||||
USB200.BEMPSTS = \
|
||||
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0]; \
|
||||
RZA_IO_RegWrite_16( \
|
||||
&USB200.CFIFOSEL, USB_FUNCTION_PIPE0, \
|
||||
USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE); \
|
||||
\
|
||||
/*usb0_function_write_buffer_c(USB_FUNCTION_PIPE0);*/ \
|
||||
EP0in(); \
|
||||
\
|
||||
/* Three dummy reads for clearing interrupt requests */ \
|
||||
dumy_sts = USB200.BEMPSTS; \
|
||||
extern "C" {
|
||||
void usb0_function_BEMPInterruptPIPE0(
|
||||
uint16_t status,
|
||||
uint16_t intenb,
|
||||
USBHAL *object,
|
||||
void (USBHAL::*EP0func)(void)
|
||||
)
|
||||
{
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
USB200.BEMPSTS =
|
||||
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0];
|
||||
RZA_IO_RegWrite_16(
|
||||
&USB200.CFIFOSEL, USB_FUNCTION_PIPE0,
|
||||
USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE);
|
||||
|
||||
/*usb0_function_write_buffer_c(USB_FUNCTION_PIPE0);*/
|
||||
(object->*EP0func)();
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.BEMPSTS;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
|
@ -400,16 +567,84 @@ volatile static uint16_t recv_error;
|
|||
* : uint16_t intenb ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*****************************************************************************/
|
||||
#define usb0_function_BEMPInterrupt(status, intenb) \
|
||||
{ \
|
||||
volatile uint16_t dumy_sts; \
|
||||
\
|
||||
usb0_function_bemp_int(status, intenb); \
|
||||
\
|
||||
/* Three dummy reads for clearing interrupt requests */ \
|
||||
dumy_sts = USB200.BEMPSTS; \
|
||||
}
|
||||
extern "C" {
|
||||
void usb0_function_BEMPInterrupt(
|
||||
uint16_t status,
|
||||
uint16_t intenb,
|
||||
USBHAL *object,
|
||||
bool (USBHAL::*epCallback[])(void)
|
||||
)
|
||||
{
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
/**************************************************************
|
||||
* Function Name: usb0_function_bemp_int
|
||||
* Description : Executes BEMP interrupt(USB_FUNCTION_PIPE1-9).
|
||||
* Arguments : uint16_t status ; BEMPSTS Register Value
|
||||
* : uint16_t intenb ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*************************************************************/
|
||||
/* copied from usb0_function_intrn.c */
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
uint16_t inbuf;
|
||||
uint16_t ep;
|
||||
|
||||
bitcheck = (uint16_t)(status & intenb);
|
||||
|
||||
USB200.BEMPSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) {
|
||||
if ((bitcheck&g_usb0_function_bit_set[pipe]) != g_usb0_function_bit_set[pipe]) {
|
||||
continue;
|
||||
}
|
||||
|
||||
pid = usb0_function_get_pid(pipe);
|
||||
|
||||
if ((pid == DEVDRV_USBF_PID_STALL) ||
|
||||
(pid == DEVDRV_USBF_PID_STALL2)) {
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_STALL;
|
||||
|
||||
} else {
|
||||
inbuf = usb0_function_get_inbuf(pipe);
|
||||
|
||||
if (inbuf == 0) {
|
||||
usb0_function_disable_bemp_int(pipe);
|
||||
usb0_function_set_pid_nak(pipe);
|
||||
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
|
||||
switch (g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) {
|
||||
case USB_FUNCTION_D0FIFO_DMA:
|
||||
/*now, DMA is not supported*/
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_D1FIFO_DMA:
|
||||
/*now, DMA is not supported*/
|
||||
break;
|
||||
|
||||
default:
|
||||
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT;
|
||||
ep <<= 1;
|
||||
if (RZA_IO_RegRead_16(
|
||||
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0) {
|
||||
/* read */
|
||||
__nop();
|
||||
} else {
|
||||
/* write */
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_WAIT;
|
||||
(object->*(epCallback[ep - 2 + 1])) ();
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.BEMPSTS;
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Function Name: EP2PIPE
|
||||
|
@ -440,7 +675,7 @@ volatile static uint16_t recv_error;
|
|||
*bufO++ = USB200.USBINDX; \
|
||||
/*data[6] data[6] <= wIndex*/ \
|
||||
*bufO++ = USB200.USBLENG; \
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*************************************************************************/
|
||||
|
@ -452,13 +687,17 @@ volatile static uint16_t recv_error;
|
|||
USBHAL::USBHAL(void)
|
||||
{
|
||||
/* ---- P4_1 : P4_1 (USB0_EN for GR-PEACH) ---- */
|
||||
usb0_en = new DigitalOut(P4_1, 1);
|
||||
//usb0_en = new DigitalOut(P4_1, 1);
|
||||
|
||||
/* some constants */
|
||||
int_id = USBI0_IRQn;
|
||||
int_level = ( 2 << 3 );
|
||||
clock_mode = USBFCLOCK_X1_48MHZ;
|
||||
#if 1
|
||||
mode = USB_FUNCTION_HIGH_SPEED;
|
||||
#else
|
||||
mode = USB_FUNCTION_FULL_SPEED;
|
||||
#endif
|
||||
EP0_read_status = DEVDRV_USBF_WRITEEND;
|
||||
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
|
||||
|
||||
|
@ -572,7 +811,7 @@ USBHAL::~USBHAL(void)
|
|||
/* Unregisters interrupt function and priority */
|
||||
InterruptHandlerRegister( int_id, (uint32_t)NULL );
|
||||
|
||||
usb0_en = NULL;
|
||||
//usb0_en = NULL;
|
||||
instance = NULL;
|
||||
}
|
||||
|
||||
|
@ -580,7 +819,7 @@ USBHAL::~USBHAL(void)
|
|||
void USBHAL::connect(void)
|
||||
{
|
||||
/* Activates USB0_EN */
|
||||
(*usb0_en) = 0;
|
||||
//(*usb0_en) = 0;
|
||||
}
|
||||
|
||||
|
||||
|
@ -588,7 +827,7 @@ void USBHAL::connect(void)
|
|||
void USBHAL::disconnect(void)
|
||||
{
|
||||
/* Deactivates USB0_EN */
|
||||
(*usb0_en) = 1;
|
||||
//(*usb0_en) = 1;
|
||||
}
|
||||
|
||||
|
||||
|
@ -790,15 +1029,19 @@ EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t max_size)
|
|||
EP_STATUS status = EP_COMPLETED;
|
||||
|
||||
pipe_status = usb0_api_function_check_pipe_status(pipe, &pipe_size);
|
||||
pipe_size = (max_size < pipe_size)? (max_size): (pipe_size);
|
||||
|
||||
if (pipe_status == DEVDRV_USBF_PIPE_IDLE) {
|
||||
usb0_api_function_set_pid_nak(pipe);
|
||||
usb0_api_function_clear_pipe_status(pipe);
|
||||
switch (pipe_status) {
|
||||
case DEVDRV_USBF_PIPE_IDLE:
|
||||
case DEVDRV_USBF_PIPE_WAIT:
|
||||
usb0_api_function_set_pid_nak(pipe);
|
||||
usb0_api_function_clear_pipe_status(pipe);
|
||||
|
||||
usb0_api_function_start_receive_transfer(pipe, pipe_size, recv_buffer);
|
||||
} else {
|
||||
status = EP_PENDING;
|
||||
usb0_api_function_start_receive_transfer(pipe, max_size, recv_buffer);
|
||||
break;
|
||||
|
||||
default:
|
||||
status = EP_PENDING;
|
||||
break;
|
||||
}
|
||||
|
||||
return status;
|
||||
|
@ -819,14 +1062,18 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *buffer, uint32_t
|
|||
}
|
||||
|
||||
pipe_status = usb0_api_function_check_pipe_status(pipe, bytes_read);
|
||||
if (pipe_status == DEVDRV_USBF_PIPE_IDLE) {
|
||||
return EP_COMPLETED;
|
||||
}
|
||||
if (pipe_status == DEVDRV_USBF_PIPE_DONE) {
|
||||
return EP_COMPLETED;
|
||||
}
|
||||
if (pipe_status != DEVDRV_USBF_PIPE_WAIT) {
|
||||
return status;
|
||||
switch (pipe_status) {
|
||||
case DEVDRV_USBF_PIPE_IDLE:
|
||||
return EP_COMPLETED;
|
||||
|
||||
case DEVDRV_USBF_PIPE_DONE:
|
||||
return EP_COMPLETED;
|
||||
|
||||
case DEVDRV_USBF_PIPE_WAIT:
|
||||
break;
|
||||
|
||||
default:
|
||||
return status;
|
||||
}
|
||||
|
||||
/* sets the output buffer and size */
|
||||
|
@ -835,10 +1082,30 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *buffer, uint32_t
|
|||
/* receives data from pipe */
|
||||
err = usb0_function_read_buffer(pipe);
|
||||
recv_error = err;
|
||||
switch (err) {
|
||||
case USB_FUNCTION_READEND:
|
||||
case USB_FUNCTION_READSHRT:
|
||||
case USB_FUNCTION_READOVER:
|
||||
*bytes_read = g_usb0_function_PipeDataSize[pipe];
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_READING:
|
||||
case DEVDRV_USBF_FIFOERROR:
|
||||
break;
|
||||
}
|
||||
|
||||
pipe_status = usb0_api_function_check_pipe_status(pipe, bytes_read);
|
||||
if (pipe_status == DEVDRV_USBF_PIPE_DONE) {
|
||||
status = EP_COMPLETED;
|
||||
switch (pipe_status) {
|
||||
case DEVDRV_USBF_PIPE_DONE:
|
||||
status = EP_COMPLETED;
|
||||
break;
|
||||
|
||||
case DEVDRV_USBF_PIPE_IDLE:
|
||||
case DEVDRV_USBF_PIPE_NORES:
|
||||
case DEVDRV_USBF_PIPE_STALL:
|
||||
case DEVDRV_USBF_FIFOERROR:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return status;
|
||||
|
@ -1112,19 +1379,19 @@ void USBHAL::usbisr(void)
|
|||
(int_enb0 & USB_FUNCTION_BITBEMP) &&
|
||||
((int_sts3 & int_enb4) & g_usb0_function_bit_set[USB_FUNCTION_PIPE0])) {
|
||||
/* ==== BEMP PIPE0 ==== */
|
||||
usb0_function_BEMPInterruptPIPE0(int_sts3, int_enb4);
|
||||
usb0_function_BEMPInterruptPIPE0(int_sts3, int_enb4, this, &USBHAL::EP0in);
|
||||
} else if (
|
||||
(int_sts0 & USB_FUNCTION_BITBRDY) &&
|
||||
(int_enb0 & USB_FUNCTION_BITBRDY) &&
|
||||
((int_sts1 & int_enb2) & g_usb0_function_bit_set[USB_FUNCTION_PIPE0])) {
|
||||
/* ==== BRDY PIPE0 ==== */
|
||||
usb0_function_BRDYInterruptPIPE0(int_sts1, int_enb2);
|
||||
usb0_function_BRDYInterruptPIPE0(int_sts1, int_enb2, this, &USBHAL::EP0out);
|
||||
} else if (
|
||||
(int_sts0 & USB_FUNCTION_BITNRDY) &&
|
||||
(int_enb0 & USB_FUNCTION_BITNRDY) &&
|
||||
((int_sts2 & int_enb3) & g_usb0_function_bit_set[USB_FUNCTION_PIPE0])) {
|
||||
/* ==== NRDY PIPE0 ==== */
|
||||
usb0_function_NRDYInterruptPIPE0(int_sts2, int_enb3);
|
||||
usb0_function_NRDYInterruptPIPE0(int_sts2, int_enb3, this, NULL);
|
||||
} else if (
|
||||
(int_sts0 & USB_FUNCTION_BITCTRT) && (int_enb0 & USB_FUNCTION_BITCTRE)) {
|
||||
int_sts0 = USB200.INTSTS0;
|
||||
|
@ -1198,19 +1465,19 @@ void USBHAL::usbisr(void)
|
|||
(int_enb0 & USB_FUNCTION_BITBEMP) &&
|
||||
(int_sts3 & int_enb4) ) {
|
||||
/* ==== BEMP PIPEx ==== */
|
||||
usb0_function_BEMPInterrupt(int_sts3, int_enb4);
|
||||
usb0_function_BEMPInterrupt(int_sts3, int_enb4, this, epCallback);
|
||||
} else if (
|
||||
(int_sts0 & USB_FUNCTION_BITBRDY) &&
|
||||
(int_enb0 & USB_FUNCTION_BITBRDY) &&
|
||||
(int_sts1 & int_enb2) ) {
|
||||
/* ==== BRDY PIPEx ==== */
|
||||
usb0_function_BRDYInterrupt(int_sts1, int_enb2);
|
||||
usb0_function_BRDYInterrupt(int_sts1, int_enb2, this, epCallback);
|
||||
} else if (
|
||||
(int_sts0 & USB_FUNCTION_BITNRDY) &&
|
||||
(int_enb0 & USB_FUNCTION_BITNRDY) &&
|
||||
(int_sts2 & int_enb3)) {
|
||||
/* ==== NRDY PIPEx ==== */
|
||||
usb0_function_NRDYInterrupt(int_sts2, int_enb3);
|
||||
usb0_function_NRDYInterrupt(int_sts2, int_enb3, this, epCallback);
|
||||
} else {
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
|
|
@ -0,0 +1,332 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : devdrv_usb_host_api.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB_HOST_API_H
|
||||
#define USB_HOST_API_H
|
||||
|
||||
#include "r_typedefs.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define USB_HOST_PORTNUM (2)
|
||||
|
||||
#define USB_HOST_ELT_INTERRUPT_LEVEL (9)
|
||||
|
||||
#define USBHCLOCK_X1_48MHZ (0x0000u) /* USB_X1_48MHz */
|
||||
#define USBHCLOCK_EXTAL_12MHZ (0x0004u) /* EXTAL_12MHz */
|
||||
|
||||
#define USB_HOST_MAX_DEVICE (10)
|
||||
|
||||
#define USB_HOST_ON (1)
|
||||
#define USB_HOST_OFF (0)
|
||||
#define USB_HOST_YES (1)
|
||||
#define USB_HOST_NO (0)
|
||||
|
||||
#define USB_HOST_NON_SPEED (0)
|
||||
#define USB_HOST_LOW_SPEED (1)
|
||||
#define USB_HOST_FULL_SPEED (2)
|
||||
#define USB_HOST_HIGH_SPEED (3)
|
||||
|
||||
/* DEVDRV_SUCCESS(0) & DEVDRV_ERROR(-1) is dev_drv.h */
|
||||
#define DEVDRV_USBH_STALL (-2)
|
||||
#define DEVDRV_USBH_TIMEOUT (-3)
|
||||
#define DEVDRV_USBH_NAK_TIMEOUT (-4)
|
||||
#define DEVDRV_USBH_DETACH_ERR (-5)
|
||||
#define DEVDRV_USBH_SETUP_ERR (-6)
|
||||
#define DEVDRV_USBH_CTRL_COM_ERR (-7)
|
||||
#define DEVDRV_USBH_COM_ERR (-8)
|
||||
#define DEVDRV_USBH_DEV_ADDR_ERR (-9)
|
||||
|
||||
#define USB_HOST_ATTACH (1)
|
||||
#define USB_HOST_DETACH (0)
|
||||
|
||||
#define USB_HOST_MAX_PIPE_NO (9u)
|
||||
#define USB_HOST_PIPE0 (0)
|
||||
#define USB_HOST_PIPE1 (1)
|
||||
#define USB_HOST_PIPE2 (2)
|
||||
#define USB_HOST_PIPE3 (3)
|
||||
#define USB_HOST_PIPE4 (4)
|
||||
#define USB_HOST_PIPE5 (5)
|
||||
#define USB_HOST_PIPE6 (6)
|
||||
#define USB_HOST_PIPE7 (7)
|
||||
#define USB_HOST_PIPE8 (8)
|
||||
#define USB_HOST_PIPE9 (9)
|
||||
|
||||
#define USB_HOST_ISO (0xc000u)
|
||||
#define USB_HOST_INTERRUPT (0x8000u)
|
||||
#define USB_HOST_BULK (0x4000u)
|
||||
|
||||
#define USB_HOST_PIPE_IDLE (0x00)
|
||||
#define USB_HOST_PIPE_WAIT (0x01)
|
||||
#define USB_HOST_PIPE_DONE (0x02)
|
||||
#define USB_HOST_PIPE_NORES (0x03)
|
||||
#define USB_HOST_PIPE_STALL (0x04)
|
||||
#define USB_HOST_PIPE_ERROR (0x05)
|
||||
|
||||
#define USB_HOST_NONE (0x0000u)
|
||||
#define USB_HOST_BFREFIELD (0x0400u)
|
||||
#define USB_HOST_BFREON (0x0400u)
|
||||
#define USB_HOST_BFREOFF (0x0000u)
|
||||
#define USB_HOST_DBLBFIELD (0x0200u)
|
||||
#define USB_HOST_DBLBON (0x0200u)
|
||||
#define USB_HOST_DBLBOFF (0x0000u)
|
||||
#define USB_HOST_CNTMDFIELD (0x0100u)
|
||||
#define USB_HOST_CNTMDON (0x0100u)
|
||||
#define USB_HOST_CNTMDOFF (0x0000u)
|
||||
#define USB_HOST_SHTNAKON (0x0080u)
|
||||
#define USB_HOST_SHTNAKOFF (0x0000u)
|
||||
#define USB_HOST_DIRFIELD (0x0010u)
|
||||
#define USB_HOST_DIR_H_OUT (0x0010u)
|
||||
#define USB_HOST_DIR_H_IN (0x0000u)
|
||||
#define USB_HOST_EPNUMFIELD (0x000fu)
|
||||
|
||||
#define USB_HOST_CUSE (0)
|
||||
#define USB_HOST_D0USE (1)
|
||||
#define USB_HOST_D0DMA (2)
|
||||
#define USB_HOST_D1USE (3)
|
||||
#define USB_HOST_D1DMA (4)
|
||||
|
||||
#define USB_HOST_CFIFO_USE (0x0000)
|
||||
#define USB_HOST_D0FIFO_USE (0x1000)
|
||||
#define USB_HOST_D1FIFO_USE (0x2000)
|
||||
#define USB_HOST_D0FIFO_DMA (0x5000)
|
||||
#define USB_HOST_D1FIFO_DMA (0x6000)
|
||||
|
||||
#define USB_HOST_BUF2FIFO (0)
|
||||
#define USB_HOST_FIFO2BUF (1)
|
||||
|
||||
#define USB_HOST_DRV_DETACHED (0x0000)
|
||||
#define USB_HOST_DRV_ATTACHED (0x0001)
|
||||
#define USB_HOST_DRV_GET_DEVICE_DESC_64 (0x0002)
|
||||
#define USB_HOST_DRV_POWERED (0x0003)
|
||||
#define USB_HOST_DRV_DEFAULT (0x0004)
|
||||
#define USB_HOST_DRV_SET_ADDRESS (0x0005)
|
||||
#define USB_HOST_DRV_ADDRESSED (0x0006)
|
||||
#define USB_HOST_DRV_GET_DEVICE_DESC_18 (0x0007)
|
||||
#define USB_HOST_DRV_GET_CONGIG_DESC_9 (0x0008)
|
||||
#define USB_HOST_DRV_GET_CONGIG_DESC (0x0009)
|
||||
#define USB_HOST_DRV_SET_CONFIG (0x000a)
|
||||
#define USB_HOST_DRV_CONFIGURED (0x000b)
|
||||
#define USB_HOST_DRV_SUSPEND (0x1000)
|
||||
#define USB_HOST_DRV_NORES (0x0100)
|
||||
#define USB_HOST_DRV_STALL (0x0200)
|
||||
|
||||
#define USB_HOST_TESTMODE_FORCE (0x000du)
|
||||
#define USB_HOST_TESTMODE_TESTPACKET (0x000cu)
|
||||
#define USB_HOST_TESTMODE_SE0_NAK (0x000bu)
|
||||
#define USB_HOST_TESTMODE_K (0x000au)
|
||||
#define USB_HOST_TESTMODE_J (0x0009u)
|
||||
#define USB_HOST_TESTMODE_NORMAL (0x0000u)
|
||||
|
||||
#define USB_HOST_DT_DEVICE (0x01)
|
||||
#define USB_HOST_DT_CONFIGURATION (0x02)
|
||||
#define USB_HOST_DT_STRING (0x03)
|
||||
#define USB_HOST_DT_INTERFACE (0x04)
|
||||
#define USB_HOST_DT_ENDPOINT (0x05)
|
||||
#define USB_HOST_DT_DEVICE_QUALIFIER (0x06)
|
||||
#define USB_HOST_DT_OTHER_SPEED_CONFIGURATION (0x07)
|
||||
#define USB_HOST_DT_INTERFACE_POWER (0x08)
|
||||
|
||||
#define USB_HOST_IF_CLS_NOT (0x00)
|
||||
#define USB_HOST_IF_CLS_AUDIO (0x01)
|
||||
#define USB_HOST_IF_CLS_CDC_CTRL (0x02)
|
||||
#define USB_HOST_IF_CLS_HID (0x03)
|
||||
#define USB_HOST_IF_CLS_PHYSICAL (0x05)
|
||||
#define USB_HOST_IF_CLS_IMAGE (0x06)
|
||||
#define USB_HOST_IF_CLS_PRINTER (0x07)
|
||||
#define USB_HOST_IF_CLS_MASS (0x08)
|
||||
#define USB_HOST_IF_CLS_HUB (0x09)
|
||||
#define USB_HOST_IF_CLS_CDC_DATA (0x0a)
|
||||
#define USB_HOST_IF_CLS_CRAD (0x0b)
|
||||
#define USB_HOST_IF_CLS_CONTENT (0x0d)
|
||||
#define USB_HOST_IF_CLS_VIDEO (0x0e)
|
||||
#define USB_HOST_IF_CLS_DIAG (0xdc)
|
||||
#define USB_HOST_IF_CLS_WIRELESS (0xe0)
|
||||
#define USB_HOST_IF_CLS_APL (0xfe)
|
||||
#define USB_HOST_IF_CLS_VENDOR (0xff)
|
||||
#define USB_HOST_IF_CLS_HELE (0xaa)
|
||||
|
||||
#define USB_HOST_EP_DIR_MASK (0x80)
|
||||
#define USB_HOST_EP_OUT (0x00)
|
||||
#define USB_HOST_EP_IN (0x80)
|
||||
#define USB_HOST_EP_TYPE (0x03)
|
||||
#define USB_HOST_EP_CNTRL (0x00)
|
||||
#define USB_HOST_EP_ISO (0x01)
|
||||
#define USB_HOST_EP_BULK (0x02)
|
||||
#define USB_HOST_EP_INT (0x03)
|
||||
#define USB_HOST_EP_NUM_MASK (0x0f)
|
||||
|
||||
#define USB_HOST_PIPE_IN (0)
|
||||
#define USB_HOST_PIPE_OUT (1)
|
||||
|
||||
#define USB_END_POINT_ERROR (0xffff)
|
||||
|
||||
#define USB_HOST_REQ_GET_STATUS (0x0000)
|
||||
#define USB_HOST_REQ_CLEAR_FEATURE (0x0100)
|
||||
#define USB_HOST_REQ_RESERVED2 (0x0200)
|
||||
#define USB_HOST_REQ_SET_FEATURE (0x0300)
|
||||
#define USB_HOST_REQ_RESERVED4 (0x0400)
|
||||
#define USB_HOST_REQ_SET_ADDRESS (0x0500)
|
||||
#define USB_HOST_REQ_GET_DESCRIPTOR (0x0600)
|
||||
#define USB_HOST_REQ_SET_DESCRIPTOR (0x0700)
|
||||
#define USB_HOST_REQ_GET_CONFIGURATION (0x0800)
|
||||
#define USB_HOST_REQ_SET_CONFIGURATION (0x0900)
|
||||
#define USB_HOST_REQ_GET_INTERFACE (0x0a00)
|
||||
#define USB_HOST_REQ_SET_INTERFACE (0x0b00)
|
||||
#define USB_HOST_REQ_SYNCH_FRAME (0x0c00)
|
||||
|
||||
#define USB_HOST_REQTYPE_HOST_TO_DEVICE (0x0000)
|
||||
#define USB_HOST_REQTYPE_DEVICE_TO_HOST (0x0080)
|
||||
#define USB_HOST_REQTYPE_STANDARD (0x0020)
|
||||
#define USB_HOST_REQTYPE_CLASS (0x0040)
|
||||
#define USB_HOST_REQTYPE_VENDOR (0x0060)
|
||||
#define USB_HOST_REQTYPE_DEVICE (0x0000)
|
||||
#define USB_HOST_REQTYPE_INTERFACE (0x0001)
|
||||
#define USB_HOST_REQTYPE_ENDPOINT (0x0002)
|
||||
#define USB_HOST_REQTYPE_OTHER (0x0003)
|
||||
|
||||
#define USB_HOST_DESCTYPE_DEVICE (0x0100)
|
||||
#define USB_HOST_DESCTYPE_CONFIGURATION (0x0200)
|
||||
#define USB_HOST_DESCTYPE_STRING (0x0300)
|
||||
#define USB_HOST_DESCTYPE_INTERFACE (0x0400)
|
||||
#define USB_HOST_DESCTYPE_ENDPOINT (0x0500)
|
||||
#define USB_HOST_DESCTYPE_DEVICE_QUALIFIER (0x0600)
|
||||
#define USB_HOST_DESCTYPE_OTHER_SPEED_CONFIGURATION (0x0700)
|
||||
#define USB_HOST_DESCTYPE_INTERFACE_POWER (0x0800)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Variable Externs
|
||||
*******************************************************************************/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t pipe_number;
|
||||
uint16_t pipe_cfg;
|
||||
uint16_t pipe_buf;
|
||||
uint16_t pipe_max_pktsize;
|
||||
uint16_t pipe_cycle;
|
||||
uint16_t fifo_port;
|
||||
} USB_HOST_CFG_PIPETBL_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t fifo;
|
||||
uint32_t buffer;
|
||||
uint32_t bytes;
|
||||
uint32_t dir;
|
||||
uint32_t size;
|
||||
} USB_HOST_DMA_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
uint16_t R_USB_api_host_init(uint16_t root, uint8_t int_level, uint16_t mode, uint16_t clockmode);
|
||||
int32_t R_USB_api_host_enumeration(uint16_t root, uint16_t devadr);
|
||||
int32_t R_USB_api_host_detach(uint16_t root);
|
||||
int32_t R_USB_api_host_data_in(uint16_t root, uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
|
||||
int32_t R_USB_api_host_data_in2(uint16_t root, uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf, uint32_t *bytes);
|
||||
int32_t R_USB_api_host_data_out(uint16_t root, uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
|
||||
int32_t R_USB_api_host_control_transfer(uint16_t root, uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
|
||||
int32_t R_USB_api_host_set_endpoint(uint16_t root, uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor);
|
||||
int32_t R_USB_api_host_clear_endpoint(uint16_t root, USB_HOST_CFG_PIPETBL_t *user_table);
|
||||
int32_t R_USB_api_host_clear_endpoint_pipe(uint16_t root, uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table);
|
||||
uint16_t R_USB_api_host_SetEndpointTable(uint16_t root, uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t* Table);
|
||||
|
||||
int32_t R_USB_api_host_GetDeviceDescriptor(uint16_t root, uint16_t devadr, uint16_t size, uint8_t *buf);
|
||||
int32_t R_USB_api_host_GetConfigDescriptor(uint16_t root, uint16_t devadr, uint16_t size, uint8_t *buf);
|
||||
int32_t R_USB_api_host_SetConfig(uint16_t root, uint16_t devadr, uint16_t confignum);
|
||||
int32_t R_USB_api_host_SetInterface(uint16_t root, uint16_t devadr, uint16_t interface_alt, uint16_t interface_index);
|
||||
int32_t R_USB_api_host_ClearStall(uint16_t root, uint16_t devadr, uint16_t ep_dir);
|
||||
uint16_t R_USB_api_host_GetUsbDeviceState(uint16_t root);
|
||||
|
||||
void R_USB_api_host_elt_clocksel(uint16_t clockmode);
|
||||
void R_USB_api_host_elt_4_4(uint16_t root);
|
||||
void R_USB_api_host_elt_4_5(uint16_t root);
|
||||
void R_USB_api_host_elt_4_6(uint16_t root);
|
||||
void R_USB_api_host_elt_4_7(uint16_t root);
|
||||
void R_USB_api_host_elt_4_8(uint16_t root);
|
||||
void R_USB_api_host_elt_4_9(uint16_t root);
|
||||
void R_USB_api_host_elt_get_desc(uint16_t root);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host_api.h"
|
||||
#if(1) /* ohci_wrapp */
|
||||
#else
|
||||
#include "usb1_host_api.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
#ifdef USB0_HOST_API_H
|
||||
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid(void);
|
||||
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid(void);
|
||||
void Userdef_USB_usb0_host_attach(void);
|
||||
void Userdef_USB_usb0_host_detach(void);
|
||||
void Userdef_USB_usb0_host_delay_1ms(void);
|
||||
void Userdef_USB_usb0_host_delay_xms(uint32_t msec);
|
||||
void Userdef_USB_usb0_host_delay_10us(uint32_t usec);
|
||||
void Userdef_USB_usb0_host_delay_500ns(void);
|
||||
void Userdef_USB_usb0_host_start_dma(USB_HOST_DMA_t * dma, uint16_t dfacc);
|
||||
uint32_t Userdef_USB_usb0_host_stop_dma0(void);
|
||||
uint32_t Userdef_USB_usb0_host_stop_dma1(void);
|
||||
void Userdef_USB_usb0_host_notice(const char * format);
|
||||
void Userdef_USB_usb0_host_user_rdy(const char * format, uint16_t data);
|
||||
#endif
|
||||
|
||||
#ifdef USB1_HOST_API_H
|
||||
uint16_t Userdef_USB_usb1_host_d0fifo_dmaintid(void);
|
||||
uint16_t Userdef_USB_usb1_host_d1fifo_dmaintid(void);
|
||||
void Userdef_USB_usb1_host_attach(void);
|
||||
void Userdef_USB_usb1_host_detach(void);
|
||||
void Userdef_USB_usb1_host_delay_1ms(void);
|
||||
void Userdef_USB_usb1_host_delay_xms(uint32_t msec);
|
||||
void Userdef_USB_usb1_host_delay_10us(uint32_t usec);
|
||||
void Userdef_USB_usb1_host_delay_500ns(void);
|
||||
void Userdef_USB_usb1_host_start_dma(USB_HOST_DMA_t * dma, uint16_t dfacc);
|
||||
uint32_t Userdef_USB_usb1_host_stop_dma0(void);
|
||||
uint32_t Userdef_USB_usb1_host_stop_dma1(void);
|
||||
void Userdef_USB_usb1_host_notice(const char * format);
|
||||
void Userdef_USB_usb1_host_user_rdy(const char * format, uint16_t data);
|
||||
#endif
|
||||
|
||||
#endif /* USB_HOST_API_H */
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,156 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB0_HOST_H
|
||||
#define USB0_HOST_H
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "devdrv_usb_host_api.h"
|
||||
#include "usb_host.h"
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern const uint16_t g_usb0_host_bit_set[];
|
||||
extern uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint8_t *g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
extern uint16_t g_usb0_host_PipeIgnore[];
|
||||
extern uint16_t g_usb0_host_PipeTbl[];
|
||||
extern uint16_t g_usb0_host_pipe_status[];
|
||||
extern uint32_t g_usb0_host_PipeDataSize[];
|
||||
|
||||
extern USB_HOST_DMA_t g_usb0_host_DmaInfo[];
|
||||
extern uint16_t g_usb0_host_DmaPipe[];
|
||||
extern uint16_t g_usb0_host_DmaBval[];
|
||||
extern uint16_t g_usb0_host_DmaStatus[];
|
||||
|
||||
extern uint16_t g_usb0_host_driver_state;
|
||||
extern uint16_t g_usb0_host_ConfigNum;
|
||||
extern uint16_t g_usb0_host_CmdStage;
|
||||
extern uint16_t g_usb0_host_bchg_flag;
|
||||
extern uint16_t g_usb0_host_detach_flag;
|
||||
extern uint16_t g_usb0_host_attach_flag;
|
||||
|
||||
extern uint16_t g_usb0_host_UsbAddress;
|
||||
extern uint16_t g_usb0_host_setUsbAddress;
|
||||
extern uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
|
||||
extern uint16_t g_usb0_host_UsbDeviceSpeed;
|
||||
extern uint16_t g_usb0_host_SupportUsbDeviceSpeed;
|
||||
|
||||
extern uint16_t g_usb0_host_SavReq;
|
||||
extern uint16_t g_usb0_host_SavVal;
|
||||
extern uint16_t g_usb0_host_SavIndx;
|
||||
extern uint16_t g_usb0_host_SavLen;
|
||||
|
||||
extern uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
/*******************************************************************************
|
||||
Functions Prototypes
|
||||
*******************************************************************************/
|
||||
/* ==== common ==== */
|
||||
void usb0_host_dma_stop_d0(uint16_t pipe, uint32_t remain);
|
||||
void usb0_host_dma_stop_d1(uint16_t pipe, uint32_t remain);
|
||||
uint16_t usb0_host_is_hispeed(void);
|
||||
uint16_t usb0_host_is_hispeed_enable(void);
|
||||
uint16_t usb0_host_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb0_host_write_buffer(uint16_t pipe);
|
||||
uint16_t usb0_host_write_buffer_c(uint16_t pipe);
|
||||
uint16_t usb0_host_write_buffer_d0(uint16_t pipe);
|
||||
uint16_t usb0_host_write_buffer_d1(uint16_t pipe);
|
||||
void usb0_host_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb0_host_read_buffer(uint16_t pipe);
|
||||
uint16_t usb0_host_read_buffer_c(uint16_t pipe);
|
||||
uint16_t usb0_host_read_buffer_d0(uint16_t pipe);
|
||||
uint16_t usb0_host_read_buffer_d1(uint16_t pipe);
|
||||
uint16_t usb0_host_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb0_host_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb0_host_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc);
|
||||
uint16_t usb0_host_get_mbw(uint32_t trncount, uint32_t dtptr);
|
||||
uint16_t usb0_host_read_dma(uint16_t pipe);
|
||||
void usb0_host_stop_transfer(uint16_t pipe);
|
||||
void usb0_host_brdy_int(uint16_t status, uint16_t int_enb);
|
||||
void usb0_host_nrdy_int(uint16_t status, uint16_t int_enb);
|
||||
void usb0_host_bemp_int(uint16_t status, uint16_t int_enb);
|
||||
void usb0_host_setting_interrupt(uint8_t level);
|
||||
void usb0_host_reset_module(uint16_t clockmode);
|
||||
uint16_t usb0_host_get_buf_size(uint16_t pipe);
|
||||
uint16_t usb0_host_get_mxps(uint16_t pipe);
|
||||
void usb0_host_enable_brdy_int(uint16_t pipe);
|
||||
void usb0_host_disable_brdy_int(uint16_t pipe);
|
||||
void usb0_host_clear_brdy_sts(uint16_t pipe);
|
||||
void usb0_host_enable_bemp_int(uint16_t pipe);
|
||||
void usb0_host_disable_bemp_int(uint16_t pipe);
|
||||
void usb0_host_clear_bemp_sts(uint16_t pipe);
|
||||
void usb0_host_enable_nrdy_int(uint16_t pipe);
|
||||
void usb0_host_disable_nrdy_int(uint16_t pipe);
|
||||
void usb0_host_clear_nrdy_sts(uint16_t pipe);
|
||||
void usb0_host_set_pid_buf(uint16_t pipe);
|
||||
void usb0_host_set_pid_nak(uint16_t pipe);
|
||||
void usb0_host_set_pid_stall(uint16_t pipe);
|
||||
void usb0_host_clear_pid_stall(uint16_t pipe);
|
||||
uint16_t usb0_host_get_pid(uint16_t pipe);
|
||||
void usb0_host_set_sqclr(uint16_t pipe);
|
||||
void usb0_host_set_sqset(uint16_t pipe);
|
||||
void usb0_host_set_csclr(uint16_t pipe);
|
||||
void usb0_host_aclrm(uint16_t pipe);
|
||||
void usb0_host_set_aclrm(uint16_t pipe);
|
||||
void usb0_host_clr_aclrm(uint16_t pipe);
|
||||
uint16_t usb0_host_get_sqmon(uint16_t pipe);
|
||||
uint16_t usb0_host_get_inbuf(uint16_t pipe);
|
||||
|
||||
/* ==== host ==== */
|
||||
void usb0_host_init_pipe_status(void);
|
||||
int32_t usb0_host_CtrlTransStart(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
|
||||
void usb0_host_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len);
|
||||
void usb0_host_CtrlReadStart(uint32_t Bsize, uint8_t *Table);
|
||||
uint16_t usb0_host_CtrlWriteStart(uint32_t Bsize, uint8_t *Table);
|
||||
void usb0_host_StatusStage(void);
|
||||
void usb0_host_get_devadd(uint16_t addr, uint16_t *devadd);
|
||||
void usb0_host_set_devadd(uint16_t addr, uint16_t *devadd);
|
||||
void usb0_host_InitModule(void);
|
||||
uint16_t usb0_host_CheckAttach(void);
|
||||
void usb0_host_UsbDetach(void);
|
||||
void usb0_host_UsbDetach2(void);
|
||||
void usb0_host_UsbAttach(void);
|
||||
uint16_t usb0_host_UsbBusReset(void);
|
||||
int32_t usb0_host_UsbResume(void);
|
||||
int32_t usb0_host_UsbSuspend(void);
|
||||
void usb0_host_Enable_DetachINT(void);
|
||||
void usb0_host_Disable_DetachINT(void);
|
||||
void usb0_host_UsbStateManager(void);
|
||||
|
||||
|
||||
#endif /* USB0_HOST_H */
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,112 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_api.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB0_HOST_API_H
|
||||
#define USB0_HOST_API_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Variable Externs
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Functions Prototypes
|
||||
*******************************************************************************/
|
||||
void usb0_host_interrupt(uint32_t int_sense);
|
||||
void usb0_host_dma_interrupt_d0fifo(uint32_t int_sense);
|
||||
void usb0_host_dma_interrupt_d1fifo(uint32_t int_sense);
|
||||
|
||||
uint16_t usb0_api_host_init(uint8_t int_level, uint16_t mode, uint16_t clockmode);
|
||||
int32_t usb0_api_host_enumeration(uint16_t devadr);
|
||||
int32_t usb0_api_host_detach(void);
|
||||
int32_t usb0_api_host_data_in(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
|
||||
int32_t usb0_api_host_data_out(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
|
||||
int32_t usb0_api_host_control_transfer(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
|
||||
int32_t usb0_api_host_set_endpoint(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor);
|
||||
int32_t usb0_api_host_clear_endpoint(USB_HOST_CFG_PIPETBL_t *user_table);
|
||||
int32_t usb0_api_host_clear_endpoint_pipe(uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table);
|
||||
uint16_t usb0_api_host_SetEndpointTable(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t* Table);
|
||||
int32_t usb0_api_host_data_count(uint16_t pipe, uint32_t *data_count);
|
||||
|
||||
int32_t usb0_api_host_GetDeviceDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf);
|
||||
int32_t usb0_api_host_GetConfigDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf);
|
||||
int32_t usb0_api_host_SetConfig(uint16_t devadr, uint16_t confignum);
|
||||
int32_t usb0_api_host_SetInterface(uint16_t devadr, uint16_t interface_alt, uint16_t interface_index);
|
||||
int32_t usb0_api_host_ClearStall(uint16_t devadr, uint16_t ep_dir);
|
||||
uint16_t usb0_api_host_GetUsbDeviceState(void);
|
||||
|
||||
void usb0_api_host_elt_4_4(void);
|
||||
void usb0_api_host_elt_4_5(void);
|
||||
void usb0_api_host_elt_4_6(void);
|
||||
void usb0_api_host_elt_4_7(void);
|
||||
void usb0_api_host_elt_4_8(void);
|
||||
void usb0_api_host_elt_4_9(void);
|
||||
void usb0_api_host_elt_get_desc(void);
|
||||
|
||||
void usb0_host_EL_ModeInit(void);
|
||||
void usb0_host_EL_SetUACT(void);
|
||||
void usb0_host_EL_ClearUACT(void);
|
||||
void usb0_host_EL_SetTESTMODE(uint16_t mode);
|
||||
void usb0_host_EL_ClearNRDYSTS(uint16_t pipe);
|
||||
uint16_t usb0_host_EL_GetINTSTS1(void);
|
||||
void usb0_host_EL_UsbBusReset(void);
|
||||
void usb0_host_EL_UsbAttach(void);
|
||||
void usb0_host_EL_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len);
|
||||
void usb0_host_EL_StatusStage(void);
|
||||
void usb0_host_EL_CtrlReadStart(uint32_t Bsize, uint8_t *Table);
|
||||
int32_t usb0_host_EL_UsbSuspend(void);
|
||||
int32_t usb0_host_EL_UsbResume(void);
|
||||
|
||||
#if 0 /* prototype in devdrv_usb_host_api.h */
|
||||
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid(void);
|
||||
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid(void);
|
||||
void Userdef_USB_usb0_host_attach(void);
|
||||
void Userdef_USB_usb0_host_detach(void);
|
||||
void Userdef_USB_usb0_host_delay_1ms(void);
|
||||
void Userdef_USB_usb0_host_delay_xms(uint32_t msec);
|
||||
void Userdef_USB_usb0_host_delay_10us(uint32_t usec);
|
||||
void Userdef_USB_usb0_host_delay_500ns(void);
|
||||
void Userdef_USB_usb0_host_start_dma(USB_HOST_DMA_t *dma, uint16_t dfacc);
|
||||
uint32_t Userdef_USB_usb0_host_stop_dma0(void);
|
||||
uint32_t Userdef_USB_usb0_host_stop_dma1(void);
|
||||
#endif
|
||||
|
||||
#endif /* USB0_HOST_API_H */
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,139 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_dmacdrv.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB0_HOST_DMACDRV_H
|
||||
#define USB0_HOST_DMACDRV_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
typedef struct dmac_transinfo
|
||||
{
|
||||
uint32_t src_addr; /* Transfer source address */
|
||||
uint32_t dst_addr; /* Transfer destination address */
|
||||
uint32_t count; /* Transfer byte count */
|
||||
uint32_t src_size; /* Transfer source data size */
|
||||
uint32_t dst_size; /* Transfer destination data size */
|
||||
uint32_t saddr_dir; /* Transfer source address direction */
|
||||
uint32_t daddr_dir; /* Transfer destination address direction */
|
||||
} dmac_transinfo_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
/* ==== Transfer specification of the sample program ==== */
|
||||
#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
|
||||
#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
|
||||
|
||||
/* ==== DMA modes ==== */
|
||||
#define DMAC_MODE_REGISTER (0) /* Register mode */
|
||||
#define DMAC_MODE_LINK (1) /* Link mode */
|
||||
|
||||
/* ==== Transfer requests ==== */
|
||||
#define DMAC_REQ_MODE_EXT (0) /* External request */
|
||||
#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
|
||||
#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
|
||||
|
||||
/* ==== DMAC transfer sizes ==== */
|
||||
#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
|
||||
#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
|
||||
#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
|
||||
#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
|
||||
#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
|
||||
#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
|
||||
#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
|
||||
#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
|
||||
|
||||
/* ==== Address increment for transferring ==== */
|
||||
#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
|
||||
#define DMAC_TRANS_ADR_INC (0) /* Increment */
|
||||
|
||||
/* ==== Method for detecting DMA request ==== */
|
||||
#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
|
||||
#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
|
||||
#define DMAC_REQ_DET_LOW (2) /* Low level detection */
|
||||
#define DMAC_REQ_DET_HIGH (3) /* High level detection */
|
||||
|
||||
/* ==== Request Direction ==== */
|
||||
#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
|
||||
#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
|
||||
|
||||
/* ==== Descriptors ==== */
|
||||
#define DMAC_DESC_HEADER (0) /* Header */
|
||||
#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
|
||||
#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
|
||||
#define DMAC_DESC_COUNT (3) /* Transaction Byte */
|
||||
#define DMAC_DESC_CHCFG (4) /* Channel Confg */
|
||||
#define DMAC_DESC_CHITVL (5) /* Channel Interval */
|
||||
#define DMAC_DESC_CHEXT (6) /* Channel Extension */
|
||||
#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
|
||||
|
||||
/* ==== On-chip peripheral module requests ===== */
|
||||
typedef enum dmac_request_factor
|
||||
{
|
||||
DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
|
||||
DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
|
||||
DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
|
||||
DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
|
||||
DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
|
||||
DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
|
||||
DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
|
||||
DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
|
||||
} dmac_request_factor_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Variable Externs
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Functions Prototypes
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC1_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction);
|
||||
int32_t usb0_host_DMAC1_Open(uint32_t req);
|
||||
void usb0_host_DMAC1_Close(uint32_t * remain);
|
||||
void usb0_host_DMAC1_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
|
||||
|
||||
void usb0_host_DMAC2_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction);
|
||||
int32_t usb0_host_DMAC2_Open(uint32_t req);
|
||||
void usb0_host_DMAC2_Close(uint32_t * remain);
|
||||
void usb0_host_DMAC2_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
|
||||
|
||||
#endif /* USB0_HOST_DMACDRV_H */
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,201 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb_host.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB_HOST_H
|
||||
#define USB_HOST_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "rza_io_regrw.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define USB_HOST_DEVICE_0 (0u)
|
||||
#define USB_HOST_DEVICE_1 (1u)
|
||||
#define USB_HOST_DEVICE_2 (2u)
|
||||
#define USB_HOST_DEVICE_3 (3u)
|
||||
#define USB_HOST_DEVICE_4 (4u)
|
||||
#define USB_HOST_DEVICE_5 (5u)
|
||||
#define USB_HOST_DEVICE_6 (6u)
|
||||
#define USB_HOST_DEVICE_7 (7u)
|
||||
#define USB_HOST_DEVICE_8 (8u)
|
||||
#define USB_HOST_DEVICE_9 (9u)
|
||||
#define USB_HOST_DEVICE_10 (10u)
|
||||
|
||||
#define USB_HOST_ENDPOINT_DESC (0x05)
|
||||
|
||||
#define USB_HOST_BITUPLLE (0x0002u)
|
||||
#define USB_HOST_BITUCKSEL (0x0004u)
|
||||
#define USB_HOST_BITBWAIT (0x003fu)
|
||||
|
||||
#define USB_HOST_BUSWAIT_02 (0x0000u)
|
||||
#define USB_HOST_BUSWAIT_03 (0x0001u)
|
||||
#define USB_HOST_BUSWAIT_04 (0x0002u)
|
||||
#define USB_HOST_BUSWAIT_05 (0x0003u)
|
||||
#define USB_HOST_BUSWAIT_06 (0x0004u)
|
||||
#define USB_HOST_BUSWAIT_07 (0x0005u)
|
||||
#define USB_HOST_BUSWAIT_08 (0x0006u)
|
||||
#define USB_HOST_BUSWAIT_09 (0x0007u)
|
||||
#define USB_HOST_BUSWAIT_10 (0x0008u)
|
||||
#define USB_HOST_BUSWAIT_11 (0x0009u)
|
||||
#define USB_HOST_BUSWAIT_12 (0x000au)
|
||||
#define USB_HOST_BUSWAIT_13 (0x000bu)
|
||||
#define USB_HOST_BUSWAIT_14 (0x000cu)
|
||||
#define USB_HOST_BUSWAIT_15 (0x000du)
|
||||
#define USB_HOST_BUSWAIT_16 (0x000eu)
|
||||
#define USB_HOST_BUSWAIT_17 (0x000fu)
|
||||
|
||||
#define USB_HOST_FS_JSTS (0x0001u)
|
||||
#define USB_HOST_LS_JSTS (0x0002u)
|
||||
|
||||
#define USB_HOST_BITRST (0x0040u)
|
||||
#define USB_HOST_BITRESUME (0x0020u)
|
||||
#define USB_HOST_BITUACT (0x0010u)
|
||||
#define USB_HOST_HSPROC (0x0004u)
|
||||
#define USB_HOST_HSMODE (0x0003u)
|
||||
#define USB_HOST_FSMODE (0x0002u)
|
||||
#define USB_HOST_LSMODE (0x0001u)
|
||||
#define USB_HOST_UNDECID (0x0000u)
|
||||
|
||||
#define USB_HOST_BITRCNT (0x8000u)
|
||||
#define USB_HOST_BITDREQE (0x1000u)
|
||||
#define USB_HOST_BITMBW (0x0c00u)
|
||||
#define USB_HOST_BITMBW_8 (0x0000u)
|
||||
#define USB_HOST_BITMBW_16 (0x0400u)
|
||||
#define USB_HOST_BITMBW_32 (0x0800u)
|
||||
#define USB_HOST_BITBYTE_LITTLE (0x0000u)
|
||||
#define USB_HOST_BITBYTE_BIG (0x0100u)
|
||||
#define USB_HOST_BITISEL (0x0020u)
|
||||
#define USB_HOST_BITCURPIPE (0x000fu)
|
||||
|
||||
#define USB_HOST_CFIFO_READ (0x0000u)
|
||||
#define USB_HOST_CFIFO_WRITE (0x0020u)
|
||||
|
||||
#define USB_HOST_BITBVAL (0x8000u)
|
||||
#define USB_HOST_BITBCLR (0x4000u)
|
||||
#define USB_HOST_BITFRDY (0x2000u)
|
||||
#define USB_HOST_BITDTLN (0x0fffu)
|
||||
|
||||
#define USB_HOST_BITBEMPE (0x0400u)
|
||||
#define USB_HOST_BITNRDYE (0x0200u)
|
||||
#define USB_HOST_BITBRDYE (0x0100u)
|
||||
#define USB_HOST_BITBEMP (0x0400u)
|
||||
#define USB_HOST_BITNRDY (0x0200u)
|
||||
#define USB_HOST_BITBRDY (0x0100u)
|
||||
|
||||
#define USB_HOST_BITBCHGE (0x4000u)
|
||||
#define USB_HOST_BITDTCHE (0x1000u)
|
||||
#define USB_HOST_BITATTCHE (0x0800u)
|
||||
#define USB_HOST_BITEOFERRE (0x0040u)
|
||||
#define USB_HOST_BITBCHG (0x4000u)
|
||||
#define USB_HOST_BITDTCH (0x1000u)
|
||||
#define USB_HOST_BITATTCH (0x0800u)
|
||||
#define USB_HOST_BITEOFERR (0x0040u)
|
||||
|
||||
#define USB_HOST_BITSIGNE (0x0020u)
|
||||
#define USB_HOST_BITSACKE (0x0010u)
|
||||
#define USB_HOST_BITSIGN (0x0020u)
|
||||
#define USB_HOST_BITSACK (0x0010u)
|
||||
|
||||
#define USB_HOST_BITSUREQ (0x4000u)
|
||||
#define USB_HOST_BITSQSET (0x0080u)
|
||||
#define USB_HOST_PID_STALL2 (0x0003u)
|
||||
#define USB_HOST_PID_STALL (0x0002u)
|
||||
#define USB_HOST_PID_BUF (0x0001u)
|
||||
#define USB_HOST_PID_NAK (0x0000u)
|
||||
|
||||
#define USB_HOST_PIPExBUF (64u)
|
||||
|
||||
#define USB_HOST_D0FIFO (0)
|
||||
#define USB_HOST_D1FIFO (1)
|
||||
#define USB_HOST_DMA_READY (0)
|
||||
#define USB_HOST_DMA_BUSY (1)
|
||||
#define USB_HOST_DMA_BUSYEND (2)
|
||||
|
||||
#define USB_HOST_FIFO_USE (0x7000)
|
||||
|
||||
#define USB_HOST_FIFOERROR (0xffff)
|
||||
#define USB_HOST_WRITEEND (0)
|
||||
#define USB_HOST_WRITESHRT (1)
|
||||
#define USB_HOST_WRITING (2)
|
||||
#define USB_HOST_WRITEDMA (3)
|
||||
#define USB_HOST_READEND (0)
|
||||
#define USB_HOST_READSHRT (1)
|
||||
#define USB_HOST_READING (2)
|
||||
#define USB_HOST_READOVER (3)
|
||||
#define USB_HOST_READZERO (4)
|
||||
|
||||
#define USB_HOST_CMD_IDLE (0x0000)
|
||||
#define USB_HOST_CMD_DOING (0x0001)
|
||||
#define USB_HOST_CMD_DONE (0x0002)
|
||||
#define USB_HOST_CMD_NORES (0x0003)
|
||||
#define USB_HOST_CMD_STALL (0x0004)
|
||||
#define USB_HOST_CMD_FIELD (0x000f)
|
||||
|
||||
#if 0
|
||||
#define USB_HOST_CHG_CMDFIELD( r, v ) do { r &= ( ~USB_HOST_CMD_FIELD ); \
|
||||
r |= v; } while(0)
|
||||
#endif
|
||||
|
||||
#define USB_HOST_MODE_WRITE (0x0100)
|
||||
#define USB_HOST_MODE_READ (0x0200)
|
||||
#define USB_HOST_MODE_NO_DATA (0x0300)
|
||||
#define USB_HOST_MODE_FIELD (0x0f00)
|
||||
|
||||
#define USB_HOST_STAGE_SETUP (0x0010)
|
||||
#define USB_HOST_STAGE_DATA (0x0020)
|
||||
#define USB_HOST_STAGE_STATUS (0x0030)
|
||||
#define USB_HOST_STAGE_FIELD (0x00f0)
|
||||
|
||||
#if 0
|
||||
#define USB_HOST_CHG_STAGEFIELD( r, v ) do { r &= ( ~USB_HOST_STAGE_FIELD ); \
|
||||
r |= v; } while(0)
|
||||
#endif
|
||||
|
||||
#define USB_HOST_DEVADD_MASK (0x7fc0)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern uint16_t g_usb_host_elt_clockmode;
|
||||
|
||||
#endif /* USB_HOST_H */
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,32 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb_host_version.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
|
||||
#define USB_HOST_LOCAL_Rev "VER080_140709"
|
||||
|
||||
/* End of File */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,60 @@
|
|||
/* Copyright (c) 2010-2011 mbed.org, MIT License
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
|
||||
* and associated documentation files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all copies or
|
||||
* substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
|
||||
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef OHCI_WRAPP_RZ_A1_H
|
||||
#define OHCI_WRAPP_RZ_A1_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define OHCI_REG_REVISION (0x00)
|
||||
#define OHCI_REG_CONTROL (0x04)
|
||||
#define OHCI_REG_COMMANDSTATUS (0x08)
|
||||
#define OHCI_REG_INTERRUPTSTATUS (0x0C)
|
||||
#define OHCI_REG_INTERRUPTENABLE (0x10)
|
||||
#define OHCI_REG_INTERRUPTDISABLE (0x14)
|
||||
#define OHCI_REG_HCCA (0x18)
|
||||
#define OHCI_REG_PERIODCURRENTED (0x1C)
|
||||
#define OHCI_REG_CONTROLHEADED (0x20)
|
||||
#define OHCI_REG_CONTROLCURRENTED (0x24)
|
||||
#define OHCI_REG_BULKHEADED (0x28)
|
||||
#define OHCI_REG_BULKCURRENTED (0x2C)
|
||||
#define OHCI_REG_DONEHEADED (0x30)
|
||||
#define OHCI_REG_FMINTERVAL (0x34)
|
||||
#define OHCI_REG_FMREMAINING (0x38)
|
||||
#define OHCI_REG_FMNUMBER (0x3C)
|
||||
#define OHCI_REG_PERIODICSTART (0x40)
|
||||
#define OHCI_REG_LSTHRESHOLD (0x44)
|
||||
#define OHCI_REG_RHDESCRIPTORA (0x48)
|
||||
#define OHCI_REG_RHDESCRIPTORB (0x4C)
|
||||
#define OHCI_REG_RHSTATUS (0x50)
|
||||
#define OHCI_REG_RHPORTSTATUS1 (0x54)
|
||||
|
||||
typedef void (usbisr_fnc_t)(void);
|
||||
|
||||
extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc, uint32_t hi_speed);
|
||||
extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs);
|
||||
extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data);
|
||||
extern void ohciwrapp_interrupt(uint32_t int_sense);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* OHCI_WRAPP_RZ_A1_H */
|
|
@ -0,0 +1,49 @@
|
|||
/* Copyright (c) 2010-2011 mbed.org, MIT License
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
|
||||
* and associated documentation files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all copies or
|
||||
* substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
|
||||
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef OHCI_WRAPP_RZ_A1_LOCAL_H
|
||||
#define OHCI_WRAPP_RZ_A1_LOCAL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* ConditionCode */
|
||||
#define TD_CC_NOERROR (0)
|
||||
#define TD_CC_CRC (1)
|
||||
#define TD_CC_BITSTUFFING (2)
|
||||
#define TD_CC_DATATOGGLEMISMATCH (3)
|
||||
#define TD_CC_STALL (4)
|
||||
#define TD_CC_DEVICENOTRESPONDING (5)
|
||||
#define TD_CC_PIDCHECKFAILURE (6)
|
||||
#define TD_CC_UNEXPECTEDPID (7)
|
||||
#define TD_CC_DATAOVERRUN (8)
|
||||
#define TD_CC_DATAUNDERRUN (9)
|
||||
#define TD_CC_BUFFEROVERRUN (12)
|
||||
#define TD_CC_BUFFERUNDERRUN (13)
|
||||
#define TD_CC_NOT_ACCESSED_1 (14)
|
||||
#define TD_CC_NOT_ACCESSED_2 (15)
|
||||
|
||||
extern void ohciwrapp_loc_Connect(uint32_t type);
|
||||
extern void ohciwrapp_loc_TransEnd(uint32_t pipe, uint32_t ConditionCode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* OHCI_WRAPP_RZ_A1_LOCAL_H */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,355 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_dma.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
/* #include "usb0_host_dmacdrv.h" */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
static void usb0_host_dmaint(uint16_t fifo);
|
||||
static void usb0_host_dmaint_buf2fifo(uint16_t pipe);
|
||||
static void usb0_host_dmaint_fifo2buf(uint16_t pipe);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dma_stop_d0
|
||||
* Description : D0FIFO DMA stop
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* : uint32_t remain : transfer byte
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_dma_stop_d0 (uint16_t pipe, uint32_t remain)
|
||||
{
|
||||
uint16_t dtln;
|
||||
uint16_t dfacc;
|
||||
uint16_t buffer;
|
||||
uint16_t sds_b = 1;
|
||||
|
||||
dfacc = RZA_IO_RegRead_16(&USB200.D0FBCFG,
|
||||
USB_DnFBCFG_DFACC_SHIFT,
|
||||
USB_DnFBCFG_DFACC);
|
||||
if (dfacc == 2)
|
||||
{
|
||||
sds_b = 32;
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
sds_b = 16;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 2)
|
||||
{
|
||||
sds_b = 4;
|
||||
}
|
||||
else if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 1)
|
||||
{
|
||||
sds_b = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
sds_b = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
|
||||
{
|
||||
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
|
||||
{
|
||||
buffer = USB200.D0FIFOCTR;
|
||||
dtln = (buffer & USB_HOST_BITDTLN);
|
||||
|
||||
if ((dtln % sds_b) != 0)
|
||||
{
|
||||
remain += (sds_b - (dtln % sds_b));
|
||||
}
|
||||
g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
|
||||
g_usb0_host_data_count[pipe] = remain;
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
|
||||
0,
|
||||
USB_DnFIFOSEL_DREQE_SHIFT,
|
||||
USB_DnFIFOSEL_DREQE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dma_stop_d1
|
||||
* Description : D1FIFO DMA stop
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* : uint32_t remain : transfer byte
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_dma_stop_d1 (uint16_t pipe, uint32_t remain)
|
||||
{
|
||||
uint16_t dtln;
|
||||
uint16_t dfacc;
|
||||
uint16_t buffer;
|
||||
uint16_t sds_b = 1;
|
||||
|
||||
dfacc = RZA_IO_RegRead_16(&USB200.D1FBCFG,
|
||||
USB_DnFBCFG_DFACC_SHIFT,
|
||||
USB_DnFBCFG_DFACC);
|
||||
if (dfacc == 2)
|
||||
{
|
||||
sds_b = 32;
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
sds_b = 16;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 2)
|
||||
{
|
||||
sds_b = 4;
|
||||
}
|
||||
else if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 1)
|
||||
{
|
||||
sds_b = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
sds_b = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
|
||||
{
|
||||
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
|
||||
{
|
||||
buffer = USB200.D1FIFOCTR;
|
||||
dtln = (buffer & USB_HOST_BITDTLN);
|
||||
|
||||
if ((dtln % sds_b) != 0)
|
||||
{
|
||||
remain += (sds_b - (dtln % sds_b));
|
||||
}
|
||||
g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
|
||||
g_usb0_host_data_count[pipe] = remain;
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
|
||||
0,
|
||||
USB_DnFIFOSEL_DREQE_SHIFT,
|
||||
USB_DnFIFOSEL_DREQE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dma_interrupt_d0fifo
|
||||
* Description : This function is DMA interrupt handler entry.
|
||||
* : Execute usb1_host_dmaint() after disabling DMA interrupt in this function.
|
||||
* : Disable DMA interrupt to DMAC executed when USB_HOST_D0FIFO_DMA is
|
||||
* : specified by dma->fifo.
|
||||
* : Register this function as DMA complete interrupt.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_dma_interrupt_d0fifo (uint32_t int_sense)
|
||||
{
|
||||
usb0_host_dmaint(USB_HOST_D0FIFO);
|
||||
g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dma_interrupt_d1fifo
|
||||
* Description : This function is DMA interrupt handler entry.
|
||||
* : Execute usb0_host_dmaint() after disabling DMA interrupt in this function.
|
||||
* : Disable DMA interrupt to DMAC executed when USB_HOST_D1FIFO_DMA is
|
||||
* : specified by dma->fifo.
|
||||
* : Register this function as DMA complete interrupt.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_dma_interrupt_d1fifo (uint32_t int_sense)
|
||||
{
|
||||
usb0_host_dmaint(USB_HOST_D1FIFO);
|
||||
g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dmaint
|
||||
* Description : This function is DMA transfer end interrupt
|
||||
* Arguments : uint16_t fifo ; fifo number
|
||||
* : ; USB_HOST_D0FIFO
|
||||
* : ; USB_HOST_D1FIFO
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb0_host_dmaint (uint16_t fifo)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
pipe = g_usb0_host_DmaPipe[fifo];
|
||||
|
||||
if (g_usb0_host_DmaInfo[fifo].dir == USB_HOST_BUF2FIFO)
|
||||
{
|
||||
usb0_host_dmaint_buf2fifo(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_dmaint_fifo2buf(pipe);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dmaint_fifo2buf
|
||||
* Description : Executes read completion from FIFO by DMAC.
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb0_host_dmaint_fifo2buf (uint16_t pipe)
|
||||
{
|
||||
uint32_t remain;
|
||||
uint16_t useport;
|
||||
|
||||
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
|
||||
{
|
||||
useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
|
||||
|
||||
if (useport == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
remain = Userdef_USB_usb0_host_stop_dma0();
|
||||
usb0_host_dma_stop_d0(pipe, remain);
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] == USB_HOST_DMA_BUSYEND)
|
||||
{
|
||||
USB200.D0FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_enable_brdy_int(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
remain = Userdef_USB_usb0_host_stop_dma1();
|
||||
usb0_host_dma_stop_d1(pipe, remain);
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] == USB_HOST_DMA_BUSYEND)
|
||||
{
|
||||
USB200.D1FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_enable_brdy_int(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_dmaint_buf2fifo
|
||||
* Description : Executes write completion in FIFO by DMAC.
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb0_host_dmaint_buf2fifo (uint16_t pipe)
|
||||
{
|
||||
uint16_t useport;
|
||||
uint32_t remain;
|
||||
|
||||
useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
|
||||
|
||||
if (useport == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
remain = Userdef_USB_usb0_host_stop_dma0();
|
||||
usb0_host_dma_stop_d0(pipe, remain);
|
||||
|
||||
if (g_usb0_host_DmaBval[USB_HOST_D0FIFO] != 0)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.D0FIFOCTR,
|
||||
1,
|
||||
USB_DnFIFOCTR_BVAL_SHIFT,
|
||||
USB_DnFIFOCTR_BVAL);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
remain = Userdef_USB_usb0_host_stop_dma1();
|
||||
usb0_host_dma_stop_d1(pipe, remain);
|
||||
|
||||
if (g_usb0_host_DmaBval[USB_HOST_D1FIFO] != 0)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.D1FIFOCTR,
|
||||
1,
|
||||
USB_DnFIFOCTR_BVAL_SHIFT,
|
||||
USB_DnFIFOCTR_BVAL);
|
||||
}
|
||||
}
|
||||
|
||||
usb0_host_enable_bemp_int(pipe);
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,285 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_intrn.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
#if(1) /* ohci_wrapp */
|
||||
#include "ohci_wrapp_RZ_A1_local.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_brdy_int
|
||||
* Description : Executes BRDY interrupt(USB_HOST_PIPE1-9).
|
||||
* : According to the pipe that interrupt is generated in,
|
||||
* : reads/writes buffer allocated in the pipe.
|
||||
* : This function is executed in the BRDY interrupt handler.
|
||||
* : This function clears BRDY interrupt status and BEMP interrupt
|
||||
* : status.
|
||||
* Arguments : uint16_t status ; BRDYSTS Register Value
|
||||
* : uint16_t int_enb ; BRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_brdy_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint32_t int_sense = 0;
|
||||
uint16_t pipe;
|
||||
uint16_t pipebit;
|
||||
|
||||
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
pipebit = g_usb0_host_bit_set[pipe];
|
||||
|
||||
if ((status & pipebit) && (int_enb & pipebit))
|
||||
{
|
||||
USB200.BRDYSTS = (uint16_t)~pipebit;
|
||||
USB200.BEMPSTS = (uint16_t)~pipebit;
|
||||
|
||||
if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] != USB_HOST_DMA_READY)
|
||||
{
|
||||
usb0_host_dma_interrupt_d0fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
usb0_host_read_dma(pipe);
|
||||
usb0_host_disable_brdy_int(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB200.D0FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_DMA)
|
||||
{
|
||||
if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] != USB_HOST_DMA_READY)
|
||||
{
|
||||
usb0_host_dma_interrupt_d1fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
usb0_host_read_dma(pipe);
|
||||
usb0_host_disable_brdy_int(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB200.D1FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
|
||||
{
|
||||
usb0_host_read_buffer(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_write_buffer(pipe);
|
||||
}
|
||||
}
|
||||
#if(1) /* ohci_wrapp */
|
||||
switch (g_usb0_host_pipe_status[pipe])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
|
||||
break;
|
||||
case USB_HOST_PIPE_NORES:
|
||||
case USB_HOST_PIPE_STALL:
|
||||
case USB_HOST_PIPE_ERROR:
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
break;
|
||||
default:
|
||||
/* Do Nothing */
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_nrdy_int
|
||||
* Description : Executes NRDY interrupt(USB_HOST_PIPE1-9).
|
||||
* : Checks NRDY interrupt cause by PID. When the cause if STALL,
|
||||
* : regards the pipe state as STALL and ends the processing.
|
||||
* : Then the cause is not STALL, increments the error count to
|
||||
* : communicate again. When the error count is 3, determines
|
||||
* : the pipe state as USB_HOST_PIPE_NORES and ends the processing.
|
||||
* : This function is executed in the NRDY interrupt handler.
|
||||
* : This function clears NRDY interrupt status.
|
||||
* Arguments : uint16_t status ; NRDYSTS Register Value
|
||||
* : uint16_t int_enb ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_nrdy_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
|
||||
bitcheck = (uint16_t)(status & int_enb);
|
||||
|
||||
USB200.NRDYSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
|
||||
{
|
||||
if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM) == 1)
|
||||
{
|
||||
if (g_usb0_host_pipe_status[pipe] == USB_HOST_PIPE_WAIT)
|
||||
{
|
||||
pid = usb0_host_get_pid(pipe);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
#else
|
||||
g_usb0_host_PipeIgnore[pipe]++;
|
||||
|
||||
if (g_usb0_host_PipeIgnore[pipe] == 3)
|
||||
{
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_set_pid_buf(pipe);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* USB Function */
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_bemp_int
|
||||
* Description : Executes BEMP interrupt(USB_HOST_PIPE1-9).
|
||||
* Arguments : uint16_t status ; BEMPSTS Register Value
|
||||
* : uint16_t int_enb ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_bemp_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
uint16_t inbuf;
|
||||
|
||||
bitcheck = (uint16_t)(status & int_enb);
|
||||
|
||||
USB200.BEMPSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
|
||||
{
|
||||
pid = usb0_host_get_pid(pipe);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
inbuf = usb0_host_get_inbuf(pipe);
|
||||
|
||||
if (inbuf == 0)
|
||||
{
|
||||
usb0_host_disable_bemp_int(pipe);
|
||||
usb0_host_set_pid_nak(pipe);
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,434 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_controlrw.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_CtrlTransStart
|
||||
* Description : Executes USB control transfer.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Req ; bmRequestType & bRequest
|
||||
* : uint16_t Val ; wValue
|
||||
* : uint16_t Indx ; wIndex
|
||||
* : uint16_t Len ; wLength
|
||||
* : uint8_t *Buf ; Data buffer
|
||||
* Return Value : DEVDRV_SUCCESS ; SUCCESS
|
||||
* : DEVDRV_ERROR ; ERROR
|
||||
*******************************************************************************/
|
||||
int32_t usb0_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
|
||||
uint16_t Indx, uint16_t Len, uint8_t * Buf)
|
||||
{
|
||||
if (g_usb0_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.SOFCFG,
|
||||
1,
|
||||
USB_SOFCFG_TRNENSEL_SHIFT,
|
||||
USB_SOFCFG_TRNENSEL);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.SOFCFG,
|
||||
0,
|
||||
USB_SOFCFG_TRNENSEL_SHIFT,
|
||||
USB_SOFCFG_TRNENSEL);
|
||||
}
|
||||
|
||||
USB200.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb0_host_default_max_packet[devadr]);
|
||||
|
||||
if (g_usb0_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
|
||||
g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
|
||||
g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
|
||||
|
||||
if (Len == 0)
|
||||
{
|
||||
g_usb0_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((Req & 0x0080) != 0)
|
||||
{
|
||||
g_usb0_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb0_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
|
||||
}
|
||||
}
|
||||
|
||||
g_usb0_host_SavReq = Req; /* save request */
|
||||
g_usb0_host_SavVal = Val;
|
||||
g_usb0_host_SavIndx = Indx;
|
||||
g_usb0_host_SavLen = Len;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((g_usb0_host_SavReq != Req) || (g_usb0_host_SavVal != Val)
|
||||
|| (g_usb0_host_SavIndx != Indx) || (g_usb0_host_SavLen != Len))
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
/* --------------- SETUP STAGE --------------- */
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
|
||||
usb0_host_SetupStage(Req, Val, Indx, Len);
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
|
||||
/* do nothing */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
|
||||
g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
|
||||
{
|
||||
case USB_HOST_MODE_WRITE:
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_READ:
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_NO_DATA:
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
|
||||
if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
|
||||
{
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
}
|
||||
break;
|
||||
|
||||
/* --------------- DATA STAGE --------------- */
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
|
||||
{
|
||||
case USB_HOST_MODE_WRITE:
|
||||
usb0_host_CtrlWriteStart((uint32_t)Len, Buf);
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_READ:
|
||||
usb0_host_CtrlReadStart((uint32_t)Len, Buf);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
/* do nothing */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
|
||||
g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
|
||||
if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
|
||||
{
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
usb0_host_set_pid_buf(USB_HOST_PIPE0);
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
|
||||
break;
|
||||
|
||||
/* --------------- STATUS STAGE --------------- */
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
|
||||
usb0_host_StatusStage();
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
/* do nothing */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
|
||||
usb0_host_set_pid_nak(USB_HOST_PIPE0);
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
|
||||
if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
|
||||
{
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
usb0_host_set_pid_buf(USB_HOST_PIPE0);
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.SOFCFG,
|
||||
0,
|
||||
USB_SOFCFG_TRNENSEL_SHIFT,
|
||||
USB_SOFCFG_TRNENSEL);
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_SetupStage
|
||||
* Description : Executes USB control transfer/set up stage.
|
||||
* Arguments : uint16_t Req ; bmRequestType & bRequest
|
||||
* : uint16_t Val ; wValue
|
||||
* : uint16_t Indx ; wIndex
|
||||
* : uint16_t Len ; wLength
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
|
||||
{
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
|
||||
USB200.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
|
||||
USB200.USBREQ = Req;
|
||||
USB200.USBVAL = Val;
|
||||
USB200.USBINDX = Indx;
|
||||
USB200.USBLENG = Len;
|
||||
USB200.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_StatusStage
|
||||
* Description : Executes USB control transfer/status stage.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_StatusStage (void)
|
||||
{
|
||||
uint8_t Buf1[16];
|
||||
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
|
||||
{
|
||||
case USB_HOST_MODE_READ:
|
||||
usb0_host_CtrlWriteStart((uint32_t)0, (uint8_t *)&Buf1);
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_WRITE:
|
||||
usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_NO_DATA:
|
||||
usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_CtrlWriteStart
|
||||
* Description : Executes USB control transfer/data stage(write).
|
||||
* Arguments : uint32_t Bsize ; Data Size
|
||||
* : uint8_t *Table ; Data Table Address
|
||||
* Return Value : USB_HOST_WRITESHRT ; End of data write
|
||||
* : USB_HOST_WRITEEND ; End of data write (not null)
|
||||
* : USB_HOST_WRITING ; Continue of data write
|
||||
* : USB_HOST_FIFOERROR ; FIFO access error
|
||||
*******************************************************************************/
|
||||
uint16_t usb0_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
|
||||
{
|
||||
uint16_t EndFlag_K;
|
||||
uint16_t mbw;
|
||||
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
|
||||
usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
|
||||
g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
|
||||
g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
|
||||
|
||||
USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
|
||||
#if(1) /* ohci_wrapp */
|
||||
Userdef_USB_usb0_host_delay_10us(3);
|
||||
#endif
|
||||
RZA_IO_RegWrite_16(&USB200.DCPCFG,
|
||||
1,
|
||||
USB_DCPCFG_DIR_SHIFT,
|
||||
USB_DCPCFG_DIR);
|
||||
|
||||
mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
|
||||
usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
|
||||
USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
|
||||
|
||||
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
EndFlag_K = usb0_host_write_buffer_c(USB_HOST_PIPE0);
|
||||
/* Host Control sequence */
|
||||
switch (EndFlag_K)
|
||||
{
|
||||
case USB_HOST_WRITESHRT: /* End of data write */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
|
||||
usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
|
||||
break;
|
||||
|
||||
case USB_HOST_WRITEEND: /* End of data write (not null) */
|
||||
case USB_HOST_WRITING: /* Continue of data write */
|
||||
usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
|
||||
usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
|
||||
return (EndFlag_K); /* End or Err or Continue */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_CtrlReadStart
|
||||
* Description : Executes USB control transfer/data stage(read).
|
||||
* Arguments : uint32_t Bsize ; Data Size
|
||||
* : uint8_t *Table ; Data Table Address
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
|
||||
{
|
||||
uint16_t mbw;
|
||||
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
|
||||
usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
|
||||
g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
|
||||
g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
|
||||
|
||||
USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
|
||||
#if(1) /* ohci_wrapp */
|
||||
Userdef_USB_usb0_host_delay_10us(3);
|
||||
#endif
|
||||
RZA_IO_RegWrite_16(&USB200.DCPCFG,
|
||||
0,
|
||||
USB_DCPCFG_DIR_SHIFT,
|
||||
USB_DCPCFG_DIR);
|
||||
|
||||
mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
|
||||
usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
|
||||
USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
|
||||
|
||||
usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
|
||||
usb0_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
|
||||
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,889 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_drv_api.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb0_host_resetEP(USB_HOST_CFG_PIPETBL_t *tbl);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_init
|
||||
* Description : Initializes USB module in the USB host mode.
|
||||
* : USB connection is executed when executing this function in
|
||||
* : the states that USB device isconnected to the USB port.
|
||||
* Arguments : uint8_t int_level : USB Module interrupt level
|
||||
* : USBU16 mode : USB_HOST_HIGH_SPEED
|
||||
* : USB_HOST_FULL_SPEED
|
||||
* : uint16_t clockmode : USB Clock mode
|
||||
* Return Value : USB detach or attach
|
||||
* : USB_HOST_ATTACH
|
||||
* : USB_HOST_DETACH
|
||||
*******************************************************************************/
|
||||
uint16_t usb0_api_host_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
|
||||
{
|
||||
uint16_t connect;
|
||||
volatile uint8_t dummy_buf;
|
||||
|
||||
CPG.STBCR7 &= 0xfd; /*The clock of USB0 modules is permitted */
|
||||
dummy_buf = CPG.STBCR7; /* (Dummy read) */
|
||||
|
||||
g_usb0_host_SupportUsbDeviceSpeed = mode;
|
||||
|
||||
usb0_host_setting_interrupt(int_level);
|
||||
usb0_host_reset_module(clockmode);
|
||||
|
||||
g_usb0_host_bchg_flag = USB_HOST_NO;
|
||||
g_usb0_host_detach_flag = USB_HOST_NO;
|
||||
g_usb0_host_attach_flag = USB_HOST_NO;
|
||||
|
||||
g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
|
||||
g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
|
||||
|
||||
usb0_host_InitModule();
|
||||
|
||||
connect = usb0_host_CheckAttach();
|
||||
|
||||
if (connect == USB_HOST_ATTACH)
|
||||
{
|
||||
g_usb0_host_attach_flag = USB_HOST_YES;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_UsbDetach2();
|
||||
}
|
||||
|
||||
return connect;
|
||||
}
|
||||
|
||||
#if(1) /* ohci_wrapp */
|
||||
#else
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_enumeration
|
||||
* Description : Initializes USB module in the USB host mode.
|
||||
* : USB connection is executed when executing this function in
|
||||
* : the states that USB device isconnected to the USB port.
|
||||
* Arguments : uint16_t devadr : device address
|
||||
* Return Value : DEVDRV_USBH_DETACH_ERR : device detach
|
||||
* : DEVDRV_SUCCESS : device enumeration success
|
||||
* : DEVDRV_ERROR : device enumeration error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_enumeration (uint16_t devadr)
|
||||
{
|
||||
int32_t ret;
|
||||
uint16_t driver_sts;
|
||||
|
||||
g_usb0_host_setUsbAddress = devadr;
|
||||
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb0_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
ret = DEVDRV_USBH_DETACH_ERR;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_CONFIGURED)
|
||||
{
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_STALL)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb0_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_detach
|
||||
* Description : USB detach routine
|
||||
* Arguments : none
|
||||
* Return Value : USB_HOST_DETACH : USB detach
|
||||
* : USB_HOST_ATTACH : USB attach
|
||||
* : DEVDRV_ERROR : error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_detach (void)
|
||||
{
|
||||
int32_t ret;
|
||||
uint16_t driver_sts;
|
||||
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb0_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
ret = USB_HOST_DETACH;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_CONFIGURED)
|
||||
{
|
||||
ret = USB_HOST_ATTACH;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_STALL)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb0_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_data_in
|
||||
* Description : Executes USB transfer as data-in in the argument specified pipe.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Pipe ; Pipe Number
|
||||
* : uint32_t Size ; Data Size
|
||||
* : uint8_t *data_buf ; Data data_buf Address
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_data_in (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Pipe == USB_HOST_PIPE0)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 1)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
usb0_host_start_receive_transfer(Pipe, Size, data_buf);
|
||||
}
|
||||
else
|
||||
{
|
||||
return DEVDRV_ERROR; /* Now pipe is busy */
|
||||
}
|
||||
|
||||
/* waiting for completing routine */
|
||||
do
|
||||
{
|
||||
if (g_usb0_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
} while (1);
|
||||
|
||||
if (g_usb0_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
return DEVDRV_USBH_DETACH_ERR;
|
||||
}
|
||||
|
||||
switch (g_usb0_host_pipe_status[Pipe])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_STALL:
|
||||
ret = DEVDRV_USBH_STALL;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_NORES:
|
||||
ret = DEVDRV_USBH_COM_ERR;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
usb0_host_stop_transfer(Pipe);
|
||||
|
||||
g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_data_out
|
||||
* Description : Executes USB transfer as data-out in the argument specified pipe.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Pipe ; Pipe Number
|
||||
* : uint32_t Size ; Data Size
|
||||
* : uint8_t *data_buf ; Data data_buf Address
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_data_out (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Pipe == USB_HOST_PIPE0)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
usb0_host_start_send_transfer(Pipe, Size, data_buf);
|
||||
}
|
||||
else
|
||||
{
|
||||
return DEVDRV_ERROR; /* Now pipe is busy */
|
||||
}
|
||||
|
||||
/* waiting for completing routine */
|
||||
do
|
||||
{
|
||||
if (g_usb0_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
} while (1);
|
||||
|
||||
if (g_usb0_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
return DEVDRV_USBH_DETACH_ERR;
|
||||
}
|
||||
|
||||
switch (g_usb0_host_pipe_status[Pipe])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_STALL:
|
||||
ret = DEVDRV_USBH_STALL;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_NORES:
|
||||
ret = DEVDRV_USBH_COM_ERR;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
usb0_host_stop_transfer(Pipe);
|
||||
|
||||
g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_control_transfer
|
||||
* Description : Executes USB control transfer.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Req ; bmRequestType & bRequest
|
||||
* : uint16_t Val ; wValue
|
||||
* : uint16_t Indx ; wIndex
|
||||
* : uint16_t Len ; wLength
|
||||
* : uint8_t *buf ; Buffer
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_USBH_DETACH_ERR ; device detach
|
||||
* : DEVDRV_USBH_CTRL_COM_ERR ; device no response
|
||||
* : DEVDRV_USBH_STALL ; STALL
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_control_transfer (uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx,
|
||||
uint16_t Len, uint8_t * Buf)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
do
|
||||
{
|
||||
ret = usb0_host_CtrlTransStart(devadr, Req, Val, Indx, Len, Buf);
|
||||
|
||||
if (ret == DEVDRV_SUCCESS)
|
||||
{
|
||||
if (g_usb0_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if ((g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_IDLE)
|
||||
&& (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
} while (1);
|
||||
|
||||
if (g_usb0_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
return DEVDRV_USBH_DETACH_ERR;
|
||||
}
|
||||
|
||||
switch (g_usb0_host_pipe_status[USB_HOST_PIPE0])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_STALL:
|
||||
ret = DEVDRV_USBH_STALL;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_NORES:
|
||||
ret = DEVDRV_USBH_CTRL_COM_ERR;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_set_endpoint
|
||||
* Description : Sets end point on the information specified in the argument.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint8_t *configdescriptor ; device configration descriptor
|
||||
* : USB_HOST_CFG_PIPETBL_t *user_table ; pipe table
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_set_endpoint (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * configdescriptor)
|
||||
{
|
||||
uint16_t ret;
|
||||
uint32_t end_point;
|
||||
uint32_t offset;
|
||||
uint32_t totalLength;
|
||||
USB_HOST_CFG_PIPETBL_t * pipe_table;
|
||||
|
||||
/* End Point Search */
|
||||
end_point = 0;
|
||||
offset = configdescriptor[0];
|
||||
totalLength = (uint16_t)(configdescriptor[2] + ((uint16_t)configdescriptor[3] << 8));
|
||||
|
||||
do
|
||||
{
|
||||
if (configdescriptor[offset + 1] == USB_HOST_ENDPOINT_DESC)
|
||||
{
|
||||
pipe_table = &user_table[end_point];
|
||||
|
||||
if (pipe_table->pipe_number == 0xffff)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
ret = usb0_api_host_SetEndpointTable(devadr, pipe_table, (uint8_t *)&configdescriptor[offset]);
|
||||
|
||||
if ((ret != USB_HOST_PIPE_IN) && (ret != USB_HOST_PIPE_OUT))
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
++end_point;
|
||||
}
|
||||
|
||||
/* Next End Point Search */
|
||||
offset += configdescriptor[offset];
|
||||
|
||||
} while (offset < totalLength);
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_clear_endpoint
|
||||
* Description : Clears the pipe definition table specified in the argument.
|
||||
* Arguments : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_clear_endpoint (USB_HOST_CFG_PIPETBL_t * user_table)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
|
||||
{
|
||||
if (user_table->pipe_number == 0xffff)
|
||||
{
|
||||
break;
|
||||
}
|
||||
user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
|
||||
user_table->pipe_max_pktsize = 0;
|
||||
user_table->pipe_cycle = 0;
|
||||
|
||||
user_table++;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_clear_endpoint_pipe
|
||||
* Description : Clears the pipe definition table specified in the argument.
|
||||
* Arguments : uint16_t pipe_sel : Pipe Number
|
||||
* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_clear_endpoint_pipe (uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t * user_table)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
|
||||
{
|
||||
if (user_table->pipe_number == 0xffff)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if (user_table->pipe_number == pipe_sel)
|
||||
{
|
||||
user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
|
||||
user_table->pipe_max_pktsize = 0;
|
||||
user_table->pipe_cycle = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
user_table++;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_SetEndpointTable
|
||||
* Description : Sets the end point on the information specified by the argument.
|
||||
* Arguments : uint16_t devadr : device address
|
||||
* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
|
||||
* : uint8_t *Table : Endpoint descriptor
|
||||
* Return Value : USB_HOST_DIR_H_IN ; IN endpoint
|
||||
* : USB_HOST_DIR_H_OUT ; OUT endpoint
|
||||
* : USB_END_POINT_ERROR ; error
|
||||
*******************************************************************************/
|
||||
uint16_t usb0_api_host_SetEndpointTable (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * Table)
|
||||
{
|
||||
uint16_t PipeCfg;
|
||||
uint16_t PipeMaxp;
|
||||
uint16_t pipe_number;
|
||||
uint16_t ret;
|
||||
uint16_t ret_flag = 0; // avoid warning.
|
||||
|
||||
pipe_number = user_table->pipe_number;
|
||||
|
||||
if (Table[1] != USB_HOST_ENDPOINT_DESC)
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
switch (Table[3] & USB_HOST_EP_TYPE)
|
||||
{
|
||||
case USB_HOST_EP_CNTRL:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
|
||||
case USB_HOST_EP_ISO:
|
||||
if ((pipe_number != USB_HOST_PIPE1) && (pipe_number != USB_HOST_PIPE2))
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
PipeCfg = USB_HOST_ISO;
|
||||
break;
|
||||
|
||||
case USB_HOST_EP_BULK:
|
||||
if ((pipe_number < USB_HOST_PIPE1) || (pipe_number > USB_HOST_PIPE5))
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
PipeCfg = USB_HOST_BULK;
|
||||
break;
|
||||
|
||||
case USB_HOST_EP_INT:
|
||||
if ((pipe_number < USB_HOST_PIPE6) || (pipe_number > USB_HOST_PIPE9))
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
PipeCfg = USB_HOST_INTERRUPT;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
|
||||
/* Set pipe configuration table */
|
||||
if ((Table[2] & USB_HOST_EP_DIR_MASK) == USB_HOST_EP_IN) /* IN(receive) */
|
||||
{
|
||||
if (PipeCfg == USB_HOST_ISO)
|
||||
{
|
||||
/* Transfer Type is ISO*/
|
||||
PipeCfg |= USB_HOST_DIR_H_IN;
|
||||
|
||||
switch (user_table->fifo_port)
|
||||
{
|
||||
case USB_HOST_CUSE:
|
||||
case USB_HOST_D0USE:
|
||||
case USB_HOST_D1USE:
|
||||
case USB_HOST_D0DMA:
|
||||
case USB_HOST_D1DMA:
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Transfer Type is BULK or INT */
|
||||
PipeCfg |= (USB_HOST_SHTNAKON | USB_HOST_DIR_H_IN); /* Compulsory SHTNAK */
|
||||
|
||||
switch (user_table->fifo_port)
|
||||
{
|
||||
case USB_HOST_CUSE:
|
||||
case USB_HOST_D0USE:
|
||||
case USB_HOST_D1USE:
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
|
||||
break;
|
||||
|
||||
case USB_HOST_D0DMA:
|
||||
case USB_HOST_D1DMA:
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
|
||||
#ifdef __USB_DMA_BFRE_ENABLE__
|
||||
/* this routine cannnot be perfomred if read operation is executed in buffer size */
|
||||
PipeCfg |= USB_HOST_BFREON;
|
||||
#endif
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
}
|
||||
ret = USB_HOST_PIPE_IN;
|
||||
}
|
||||
else /* OUT(send) */
|
||||
{
|
||||
if (PipeCfg == USB_HOST_ISO)
|
||||
{
|
||||
/* Transfer Type is ISO*/
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Transfer Type is BULK or INT */
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
|
||||
}
|
||||
PipeCfg |= USB_HOST_DIR_H_OUT;
|
||||
ret = USB_HOST_PIPE_OUT;
|
||||
}
|
||||
|
||||
switch (user_table->fifo_port)
|
||||
{
|
||||
case USB_HOST_CUSE:
|
||||
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_CFIFO_USE;
|
||||
break;
|
||||
|
||||
case USB_HOST_D0USE:
|
||||
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_USE;
|
||||
break;
|
||||
|
||||
case USB_HOST_D1USE:
|
||||
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_USE;
|
||||
break;
|
||||
|
||||
case USB_HOST_D0DMA:
|
||||
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_DMA;
|
||||
break;
|
||||
|
||||
case USB_HOST_D1DMA:
|
||||
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_DMA;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
|
||||
/* Endpoint number set */
|
||||
PipeCfg |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
|
||||
g_usb0_host_PipeTbl[pipe_number] |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
|
||||
|
||||
/* Max packet size set */
|
||||
PipeMaxp = (uint16_t)((uint16_t)Table[4] | (uint16_t)((uint16_t)Table[5] << 8));
|
||||
|
||||
if (PipeMaxp == 0u)
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
/* Set device address */
|
||||
PipeMaxp |= (uint16_t)(devadr << 12);
|
||||
|
||||
user_table->pipe_cfg = PipeCfg;
|
||||
user_table->pipe_max_pktsize = PipeMaxp;
|
||||
|
||||
usb0_host_resetEP(user_table);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_resetEP
|
||||
* Description : Sets the end point on the information specified by the argument.
|
||||
* Arguments : USB_HOST_CFG_PIPETBL_t *tbl : pipe table
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb0_host_resetEP (USB_HOST_CFG_PIPETBL_t * tbl)
|
||||
{
|
||||
|
||||
uint16_t pipe;
|
||||
|
||||
/* Host pipe */
|
||||
/* The pipe number of pipe definition table is obtained */
|
||||
pipe = (uint16_t)(tbl->pipe_number & USB_HOST_BITCURPIPE); /* Pipe Number */
|
||||
|
||||
/* FIFO port access pipe is set to initial value */
|
||||
/* The connection with FIFO should be cut before setting the pipe */
|
||||
if (RZA_IO_RegRead_16(&USB200.CFIFOSEL,
|
||||
USB_CFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_CFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, USB_HOST_BITMBW_16);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB200.D0FIFOSEL,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, USB_HOST_BITMBW_16);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB200.D1FIFOSEL,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, USB_HOST_BITMBW_16);
|
||||
}
|
||||
|
||||
/* Interrupt of pipe set is disabled */
|
||||
usb0_host_disable_brdy_int(pipe);
|
||||
usb0_host_disable_nrdy_int(pipe);
|
||||
usb0_host_disable_bemp_int(pipe);
|
||||
|
||||
/* Pipe to set is set to NAK */
|
||||
usb0_host_set_pid_nak(pipe);
|
||||
|
||||
/* Pipe is set */
|
||||
USB200.PIPESEL = pipe;
|
||||
|
||||
USB200.PIPECFG = tbl->pipe_cfg;
|
||||
USB200.PIPEBUF = tbl->pipe_buf;
|
||||
USB200.PIPEMAXP = tbl->pipe_max_pktsize;
|
||||
USB200.PIPEPERI = tbl->pipe_cycle;
|
||||
|
||||
g_usb0_host_pipecfg[pipe] = tbl->pipe_cfg;
|
||||
g_usb0_host_pipebuf[pipe] = tbl->pipe_buf;
|
||||
g_usb0_host_pipemaxp[pipe] = tbl->pipe_max_pktsize;
|
||||
g_usb0_host_pipeperi[pipe] = tbl->pipe_cycle;
|
||||
|
||||
/* Sequence bit clear */
|
||||
usb0_host_set_sqclr(pipe);
|
||||
|
||||
usb0_host_aclrm(pipe);
|
||||
usb0_host_set_csclr(pipe);
|
||||
|
||||
/* Pipe window selection is set to unused */
|
||||
USB200.PIPESEL = USB_HOST_PIPE0;
|
||||
|
||||
}
|
||||
|
||||
#if(1) /* ohci_wrapp */
|
||||
#else
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_api_host_data_count
|
||||
* Description : Get g_usb0_host_data_count[pipe]
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* : uint32_t *data_count ; return g_usb0_data_count[pipe]
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb0_api_host_data_count (uint16_t pipe, uint32_t * data_count)
|
||||
{
|
||||
if (pipe > USB_HOST_MAX_PIPE_NO)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
*data_count = g_usb0_host_PipeDataSize[pipe];
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,137 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_global.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
const uint16_t g_usb0_host_bit_set[16] =
|
||||
{
|
||||
0x0001, 0x0002, 0x0004, 0x0008,
|
||||
0x0010, 0x0020, 0x0040, 0x0080,
|
||||
0x0100, 0x0200, 0x0400, 0x0800,
|
||||
0x1000, 0x2000, 0x4000, 0x8000
|
||||
};
|
||||
|
||||
uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint8_t * g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
uint16_t g_usb0_host_PipeIgnore[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb0_host_PipeTbl[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb0_host_pipe_status[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint32_t g_usb0_host_PipeDataSize[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
USB_HOST_DMA_t g_usb0_host_DmaInfo[2];
|
||||
|
||||
uint16_t g_usb0_host_DmaPipe[2];
|
||||
uint16_t g_usb0_host_DmaBval[2];
|
||||
uint16_t g_usb0_host_DmaStatus[2];
|
||||
|
||||
uint16_t g_usb0_host_driver_state;
|
||||
uint16_t g_usb0_host_ConfigNum;
|
||||
uint16_t g_usb0_host_CmdStage;
|
||||
uint16_t g_usb0_host_bchg_flag;
|
||||
uint16_t g_usb0_host_detach_flag;
|
||||
uint16_t g_usb0_host_attach_flag;
|
||||
|
||||
uint16_t g_usb0_host_UsbAddress;
|
||||
uint16_t g_usb0_host_setUsbAddress;
|
||||
uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
|
||||
uint16_t g_usb0_host_UsbDeviceSpeed;
|
||||
uint16_t g_usb0_host_SupportUsbDeviceSpeed;
|
||||
|
||||
uint16_t g_usb0_host_SavReq;
|
||||
uint16_t g_usb0_host_SavVal;
|
||||
uint16_t g_usb0_host_SavIndx;
|
||||
uint16_t g_usb0_host_SavLen;
|
||||
|
||||
uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_init_pipe_status
|
||||
* Description : Initialize pipe status.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_init_pipe_status (void)
|
||||
{
|
||||
uint16_t loop;
|
||||
|
||||
g_usb0_host_ConfigNum = 0;
|
||||
|
||||
for (loop = 0; loop < (USB_HOST_MAX_PIPE_NO + 1); ++loop)
|
||||
{
|
||||
g_usb0_host_pipe_status[loop] = USB_HOST_PIPE_IDLE;
|
||||
g_usb0_host_PipeDataSize[loop] = 0;
|
||||
|
||||
/* pipe configuration in usb0_host_resetEP() */
|
||||
g_usb0_host_pipecfg[loop] = 0;
|
||||
g_usb0_host_pipebuf[loop] = 0;
|
||||
g_usb0_host_pipemaxp[loop] = 0;
|
||||
g_usb0_host_pipeperi[loop] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,496 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_usbint.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
#if(1) /* ohci_wrapp */
|
||||
#include "ohci_wrapp_RZ_A1_local.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb0_host_interrupt1(void);
|
||||
static void usb0_host_BRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
|
||||
static void usb0_host_NRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
|
||||
static void usb0_host_BEMPInterrupt(uint16_t Status, uint16_t Int_enbl);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_interrupt
|
||||
* Description : Executes USB interrupt.
|
||||
* : Register this function in the USB interrupt handler.
|
||||
* : Set CFIF0 in the pipe set before the interrupt after executing
|
||||
* : this function.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_interrupt (uint32_t int_sense)
|
||||
{
|
||||
uint16_t savepipe1;
|
||||
uint16_t savepipe2;
|
||||
uint16_t buffer;
|
||||
|
||||
savepipe1 = USB200.CFIFOSEL;
|
||||
savepipe2 = USB200.PIPESEL;
|
||||
usb0_host_interrupt1();
|
||||
|
||||
/* Control transmission changes ISEL within interruption processing. */
|
||||
/* For this reason, write return of ISEL cannot be performed. */
|
||||
buffer = USB200.CFIFOSEL;
|
||||
buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
|
||||
buffer |= (uint16_t)(savepipe1 & USB_HOST_BITCURPIPE);
|
||||
USB200.CFIFOSEL = buffer;
|
||||
USB200.PIPESEL = savepipe2;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_interrupt1
|
||||
* Description : Execue the USB interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_interrupt1 (void)
|
||||
{
|
||||
uint16_t intsts0;
|
||||
uint16_t intsts1;
|
||||
uint16_t intenb0;
|
||||
uint16_t intenb1;
|
||||
uint16_t brdysts;
|
||||
uint16_t nrdysts;
|
||||
uint16_t bempsts;
|
||||
uint16_t brdyenb;
|
||||
uint16_t nrdyenb;
|
||||
uint16_t bempenb;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
intsts0 = USB200.INTSTS0;
|
||||
intsts1 = USB200.INTSTS1;
|
||||
intenb0 = USB200.INTENB0;
|
||||
intenb1 = USB200.INTENB1;
|
||||
|
||||
if ((intsts1 & USB_HOST_BITBCHG) && (intenb1 & USB_HOST_BITBCHGE))
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITBCHG;
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_BCHGE_SHIFT,
|
||||
USB_INTENB1_BCHGE);
|
||||
g_usb0_host_bchg_flag = USB_HOST_YES;
|
||||
}
|
||||
else if ((intsts1 & USB_HOST_BITSACK) && (intenb1 & USB_HOST_BITSACKE))
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSACK;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
#else
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
#endif
|
||||
}
|
||||
else if ((intsts1 & USB_HOST_BITSIGN) && (intenb1 & USB_HOST_BITSIGNE))
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSIGN;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#else
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
|
||||
#endif
|
||||
}
|
||||
else if (((intsts1 & USB_HOST_BITDTCH) == USB_HOST_BITDTCH)
|
||||
&& ((intenb1 & USB_HOST_BITDTCHE) == USB_HOST_BITDTCHE))
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITDTCH;
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_DTCHE_SHIFT,
|
||||
USB_INTENB1_DTCHE);
|
||||
g_usb0_host_detach_flag = USB_HOST_YES;
|
||||
|
||||
Userdef_USB_usb0_host_detach();
|
||||
|
||||
usb0_host_UsbDetach2();
|
||||
}
|
||||
else if (((intsts1 & USB_HOST_BITATTCH) == USB_HOST_BITATTCH)
|
||||
&& ((intenb1 & USB_HOST_BITATTCHE) == USB_HOST_BITATTCHE))
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITATTCH;
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_ATTCHE_SHIFT,
|
||||
USB_INTENB1_ATTCHE);
|
||||
g_usb0_host_attach_flag = USB_HOST_YES;
|
||||
|
||||
Userdef_USB_usb0_host_attach();
|
||||
|
||||
usb0_host_UsbAttach();
|
||||
}
|
||||
else if ((intsts0 & intenb0 & (USB_HOST_BITBEMP | USB_HOST_BITNRDY | USB_HOST_BITBRDY)))
|
||||
{
|
||||
brdysts = USB200.BRDYSTS;
|
||||
nrdysts = USB200.NRDYSTS;
|
||||
bempsts = USB200.BEMPSTS;
|
||||
brdyenb = USB200.BRDYENB;
|
||||
nrdyenb = USB200.NRDYENB;
|
||||
bempenb = USB200.BEMPENB;
|
||||
|
||||
if ((intsts0 & USB_HOST_BITBRDY) && (intenb0 & USB_HOST_BITBRDYE) && (brdysts & brdyenb))
|
||||
{
|
||||
usb0_host_BRDYInterrupt(brdysts, brdyenb);
|
||||
}
|
||||
else if ((intsts0 & USB_HOST_BITBEMP) && (intenb0 & USB_HOST_BITBEMPE) && (bempsts & bempenb))
|
||||
{
|
||||
usb0_host_BEMPInterrupt(bempsts, bempenb);
|
||||
}
|
||||
else if ((intsts0 & USB_HOST_BITNRDY) && (intenb0 & USB_HOST_BITNRDYE) && (nrdysts & nrdyenb))
|
||||
{
|
||||
usb0_host_NRDYInterrupt(nrdysts, nrdyenb);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* Three dummy read for clearing interrupt requests */
|
||||
dumy_sts = USB200.INTSTS0;
|
||||
dumy_sts = USB200.INTSTS1;
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_BRDYInterrupt
|
||||
* Description : Executes USB BRDY interrupt.
|
||||
* Arguments : uint16_t Status ; BRDYSTS Register Value
|
||||
* : uint16_t Int_enbl ; BRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_BRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
|
||||
{
|
||||
uint16_t buffer;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
|
||||
{
|
||||
USB200.BRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
|
||||
|
||||
#if(1) /* ohci_wrapp */
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_READING: /* Continue of data read */
|
||||
break;
|
||||
|
||||
case USB_HOST_READEND: /* End of data read */
|
||||
case USB_HOST_READSHRT: /* End of data read */
|
||||
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case USB_HOST_READOVER: /* buffer over */
|
||||
USB200.CFIFOCTR = USB_HOST_BITBCLR;
|
||||
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#else
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
case (USB_HOST_MODE_NO_DATA | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_MODE_READ | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_READING: /* Continue of data read */
|
||||
break;
|
||||
|
||||
case USB_HOST_READEND: /* End of data read */
|
||||
case USB_HOST_READSHRT: /* End of data read */
|
||||
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case USB_HOST_READOVER: /* buffer over */
|
||||
USB200.CFIFOCTR = USB_HOST_BITBCLR;
|
||||
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_brdy_int(Status, Int_enbl);
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.BRDYSTS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_NRDYInterrupt
|
||||
* Description : Executes USB NRDY interrupt.
|
||||
* Arguments : uint16_t Status ; NRDYSTS Register Value
|
||||
* : uint16_t Int_enbl ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_NRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
|
||||
{
|
||||
uint16_t pid;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
|
||||
{
|
||||
USB200.NRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
|
||||
pid = usb0_host_get_pid(USB_HOST_PIPE0);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else if (pid == USB_HOST_PID_NAK)
|
||||
{
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_nrdy_int(Status, Int_enbl);
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.NRDYSTS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_BEMPInterrupt
|
||||
* Description : Executes USB BEMP interrupt.
|
||||
* Arguments : uint16_t Status ; BEMPSTS Register Value
|
||||
* : uint16_t Int_enbl ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_BEMPInterrupt (uint16_t Status, uint16_t Int_enbl)
|
||||
{
|
||||
uint16_t buffer;
|
||||
uint16_t pid;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
|
||||
{
|
||||
USB200.BEMPSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
|
||||
pid = usb0_host_get_pid(USB_HOST_PIPE0);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_WRITING: /* Continue of data write */
|
||||
case USB_HOST_WRITEEND: /* End of data write (zero-length) */
|
||||
break;
|
||||
|
||||
case USB_HOST_WRITESHRT: /* End of data write */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
/* do nothing */
|
||||
break;
|
||||
}
|
||||
#else
|
||||
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_MODE_READ | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_WRITING: /* Continue of data write */
|
||||
case USB_HOST_WRITEEND: /* End of data write (zero-length) */
|
||||
break;
|
||||
|
||||
case USB_HOST_WRITESHRT: /* End of data write */
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
break;
|
||||
|
||||
default:
|
||||
/* do nothing */
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_bemp_int(Status, Int_enbl);
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB200.BEMPSTS;
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,637 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_usbsig.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb0_host_EnableINT_Module(void);
|
||||
static void usb0_host_Enable_AttachINT(void);
|
||||
static void usb0_host_Disable_AttachINT(void);
|
||||
static void usb0_host_Disable_BchgINT(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_InitModule
|
||||
* Description : Initializes the USB module in USB host module.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_InitModule (void)
|
||||
{
|
||||
uint16_t buf1;
|
||||
uint16_t buf2;
|
||||
uint16_t buf3;
|
||||
|
||||
usb0_host_init_pipe_status();
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM); /* HOST mode */
|
||||
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_DRPD_SHIFT,
|
||||
USB_SYSCFG_DRPD); /* PORT0 D+, D- setting */
|
||||
|
||||
do
|
||||
{
|
||||
buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb0_host_delay_xms(50);
|
||||
buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb0_host_delay_xms(50);
|
||||
buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
|
||||
} while ((buf1 != buf2) || (buf1 != buf3));
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_USBE_SHIFT,
|
||||
USB_SYSCFG_USBE);
|
||||
|
||||
USB200.CFIFOSEL = (uint16_t)(USB_HOST_BITRCNT | USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
|
||||
USB200.D0FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
|
||||
USB200.D1FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_CheckAttach
|
||||
* Description : Returns the USB device connection state.
|
||||
* Arguments : none
|
||||
* Return Value : uint16_t ; USB_HOST_ATTACH : Attached
|
||||
* : ; USB_HOST_DETACH : not Attached
|
||||
*******************************************************************************/
|
||||
uint16_t usb0_host_CheckAttach (void)
|
||||
{
|
||||
uint16_t buf1;
|
||||
uint16_t buf2;
|
||||
uint16_t buf3;
|
||||
uint16_t rhst;
|
||||
|
||||
do
|
||||
{
|
||||
buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb0_host_delay_xms(50);
|
||||
buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb0_host_delay_xms(50);
|
||||
buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
|
||||
} while ((buf1 != buf2) || (buf1 != buf3));
|
||||
|
||||
rhst = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
|
||||
USB_DVSTCTR0_RHST_SHIFT,
|
||||
USB_DVSTCTR0_RHST);
|
||||
if (rhst == USB_HOST_UNDECID)
|
||||
{
|
||||
if (buf1 == USB_HOST_FS_JSTS)
|
||||
{
|
||||
if (g_usb0_host_SupportUsbDeviceSpeed == USB_HOST_HIGH_SPEED)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
}
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else if (buf1 == USB_HOST_LS_JSTS)
|
||||
{
|
||||
/* Low Speed Device */
|
||||
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
else if ((rhst == USB_HOST_HSMODE) || (rhst == USB_HOST_FSMODE))
|
||||
{
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else if (rhst == USB_HOST_LSMODE)
|
||||
{
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
return USB_HOST_DETACH;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_UsbAttach
|
||||
* Description : Connects the USB device.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_UsbAttach (void)
|
||||
{
|
||||
usb0_host_EnableINT_Module();
|
||||
usb0_host_Disable_BchgINT();
|
||||
usb0_host_Disable_AttachINT();
|
||||
usb0_host_Enable_DetachINT();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_UsbDetach
|
||||
* Description : Disconnects the USB device.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_UsbDetach (void)
|
||||
{
|
||||
uint16_t pipe;
|
||||
uint16_t devadr;
|
||||
|
||||
g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
|
||||
|
||||
/* Terminate all the pipes in which communications on port */
|
||||
/* are currently carried out */
|
||||
for (pipe = 0; pipe < (USB_HOST_MAX_PIPE_NO + 1); ++pipe)
|
||||
{
|
||||
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
if (pipe == USB_HOST_PIPE0)
|
||||
{
|
||||
devadr = RZA_IO_RegRead_16(&USB200.DCPMAXP,
|
||||
USB_DCPMAXP_DEVSEL_SHIFT,
|
||||
USB_DCPMAXP_DEVSEL);
|
||||
}
|
||||
else
|
||||
{
|
||||
devadr = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL);
|
||||
}
|
||||
|
||||
if (devadr == g_usb0_host_UsbAddress)
|
||||
{
|
||||
usb0_host_stop_transfer(pipe);
|
||||
}
|
||||
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_IDLE;
|
||||
}
|
||||
}
|
||||
|
||||
g_usb0_host_ConfigNum = 0;
|
||||
g_usb0_host_UsbAddress = 0;
|
||||
g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
|
||||
|
||||
usb0_host_UsbDetach2();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_UsbDetach2
|
||||
* Description : Disconnects the USB device.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_UsbDetach2 (void)
|
||||
{
|
||||
usb0_host_Disable_DetachINT();
|
||||
usb0_host_Disable_BchgINT();
|
||||
usb0_host_Enable_AttachINT();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_UsbBusReset
|
||||
* Description : Issues the USB bus reset signal.
|
||||
* Arguments : none
|
||||
* Return Value : uint16_t ; RHST
|
||||
*******************************************************************************/
|
||||
uint16_t usb0_host_UsbBusReset (void)
|
||||
{
|
||||
uint16_t buffer;
|
||||
uint16_t loop;
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
|
||||
1,
|
||||
USB_DVSTCTR0_USBRST_SHIFT,
|
||||
USB_DVSTCTR0_USBRST);
|
||||
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
|
||||
0,
|
||||
USB_DVSTCTR0_UACT_SHIFT,
|
||||
USB_DVSTCTR0_UACT);
|
||||
|
||||
Userdef_USB_usb0_host_delay_xms(50);
|
||||
|
||||
buffer = USB200.DVSTCTR0;
|
||||
buffer &= (uint16_t)(~(USB_HOST_BITRST));
|
||||
buffer |= USB_HOST_BITUACT;
|
||||
USB200.DVSTCTR0 = buffer;
|
||||
|
||||
Userdef_USB_usb0_host_delay_xms(20);
|
||||
|
||||
for (loop = 0, buffer = USB_HOST_HSPROC; loop < 3; ++loop)
|
||||
{
|
||||
buffer = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
|
||||
USB_DVSTCTR0_RHST_SHIFT,
|
||||
USB_DVSTCTR0_RHST);
|
||||
if (buffer == USB_HOST_HSPROC)
|
||||
{
|
||||
Userdef_USB_usb0_host_delay_xms(10);
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return buffer;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_UsbResume
|
||||
* Description : Issues the USB resume signal.
|
||||
* Arguments : none
|
||||
* Return Value : int32_t ; DEVDRV_SUCCESS
|
||||
* : ; DEVDRV_ERROR
|
||||
*******************************************************************************/
|
||||
int32_t usb0_host_UsbResume (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) == 0)
|
||||
{
|
||||
/* not SUSPEND */
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_BCHGE_SHIFT,
|
||||
USB_INTENB1_BCHGE);
|
||||
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
|
||||
1,
|
||||
USB_DVSTCTR0_RESUME_SHIFT,
|
||||
USB_DVSTCTR0_RESUME);
|
||||
Userdef_USB_usb0_host_delay_xms(20);
|
||||
|
||||
buf = USB200.DVSTCTR0;
|
||||
buf &= (uint16_t)(~(USB_HOST_BITRESUME));
|
||||
buf |= USB_HOST_BITUACT;
|
||||
USB200.DVSTCTR0 = buf;
|
||||
|
||||
g_usb0_host_driver_state &= (uint16_t)~USB_HOST_DRV_SUSPEND;
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_UsbSuspend
|
||||
* Description : Issues the USB suspend signal.
|
||||
* Arguments : none
|
||||
* Return Value : int32_t ; DEVDRV_SUCCESS :not SUSPEND
|
||||
* : ; DEVDRV_ERROR :SUSPEND
|
||||
*******************************************************************************/
|
||||
int32_t usb0_host_UsbSuspend (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) != 0)
|
||||
{
|
||||
/* SUSPEND */
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
|
||||
0,
|
||||
USB_DVSTCTR0_UACT_SHIFT,
|
||||
USB_DVSTCTR0_UACT);
|
||||
|
||||
Userdef_USB_usb0_host_delay_xms(5);
|
||||
|
||||
buf = RZA_IO_RegRead_16(&USB200.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
if ((buf != USB_HOST_FS_JSTS) && (buf != USB_HOST_LS_JSTS))
|
||||
{
|
||||
usb0_host_UsbDetach();
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb0_host_driver_state |= USB_HOST_DRV_SUSPEND;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_Enable_DetachINT
|
||||
* Description : Enables the USB disconnection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_Enable_DetachINT (void)
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
1,
|
||||
USB_INTENB1_DTCHE_SHIFT,
|
||||
USB_INTENB1_DTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_Disable_DetachINT
|
||||
* Description : Disables the USB disconnection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_Disable_DetachINT (void)
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_DTCHE_SHIFT,
|
||||
USB_INTENB1_DTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_Enable_AttachINT
|
||||
* Description : Enables the USB connection detection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_Enable_AttachINT (void)
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
1,
|
||||
USB_INTENB1_ATTCHE_SHIFT,
|
||||
USB_INTENB1_ATTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_Disable_AttachINT
|
||||
* Description : Disables the USB connection detection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_Disable_AttachINT (void)
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_ATTCHE_SHIFT,
|
||||
USB_INTENB1_ATTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_Disable_BchgINT
|
||||
* Description : Disables the USB bus change detection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_Disable_BchgINT (void)
|
||||
{
|
||||
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITBCHG));
|
||||
RZA_IO_RegWrite_16(&USB200.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_BCHGE_SHIFT,
|
||||
USB_INTENB1_BCHGE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_set_devadd
|
||||
* Description : DEVADDn register is set by specified value
|
||||
* Arguments : uint16_t addr : Device address
|
||||
* : uint16_t *devadd : Set value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_set_devadd (uint16_t addr, uint16_t * devadd)
|
||||
{
|
||||
uint16_t * ptr;
|
||||
uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case USB_HOST_DEVICE_0:
|
||||
ptr = (uint16_t *)&USB200.DEVADD0;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_1:
|
||||
ptr = (uint16_t *)&USB200.DEVADD1;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_2:
|
||||
ptr = (uint16_t *)&USB200.DEVADD2;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_3:
|
||||
ptr = (uint16_t *)&USB200.DEVADD3;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_4:
|
||||
ptr = (uint16_t *)&USB200.DEVADD4;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_5:
|
||||
ptr = (uint16_t *)&USB200.DEVADD5;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_6:
|
||||
ptr = (uint16_t *)&USB200.DEVADD6;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_7:
|
||||
ptr = (uint16_t *)&USB200.DEVADD7;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_8:
|
||||
ptr = (uint16_t *)&USB200.DEVADD8;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_9:
|
||||
ptr = (uint16_t *)&USB200.DEVADD9;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_10:
|
||||
ptr = (uint16_t *)&USB200.DEVADDA;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = DEVDRV_FLAG_OFF;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == DEVDRV_FLAG_ON)
|
||||
{
|
||||
*ptr = (uint16_t)(*devadd & USB_HOST_DEVADD_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_get_devadd
|
||||
* Description : DEVADDn register is obtained
|
||||
* Arguments : uint16_t addr : Device address
|
||||
* : uint16_t *devadd : USB_HOST_DEVADD register value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_get_devadd (uint16_t addr, uint16_t * devadd)
|
||||
{
|
||||
uint16_t * ptr;
|
||||
uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case USB_HOST_DEVICE_0:
|
||||
ptr = (uint16_t *)&USB200.DEVADD0;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_1:
|
||||
ptr = (uint16_t *)&USB200.DEVADD1;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_2:
|
||||
ptr = (uint16_t *)&USB200.DEVADD2;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_3:
|
||||
ptr = (uint16_t *)&USB200.DEVADD3;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_4:
|
||||
ptr = (uint16_t *)&USB200.DEVADD4;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_5:
|
||||
ptr = (uint16_t *)&USB200.DEVADD5;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_6:
|
||||
ptr = (uint16_t *)&USB200.DEVADD6;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_7:
|
||||
ptr = (uint16_t *)&USB200.DEVADD7;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_8:
|
||||
ptr = (uint16_t *)&USB200.DEVADD8;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_9:
|
||||
ptr = (uint16_t *)&USB200.DEVADD9;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_10:
|
||||
ptr = (uint16_t *)&USB200.DEVADDA;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = DEVDRV_FLAG_OFF;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == DEVDRV_FLAG_ON)
|
||||
{
|
||||
*devadd = *ptr;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_EnableINT_Module
|
||||
* Description : Enables BEMP/NRDY/BRDY interrupt and SIGN/SACK interrupt.
|
||||
* : Enables NRDY/BEMP interrupt in the pipe0.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_EnableINT_Module (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
buf = USB200.INTENB0;
|
||||
buf |= (USB_HOST_BITBEMPE | USB_HOST_BITNRDYE | USB_HOST_BITBRDYE);
|
||||
USB200.INTENB0 = buf;
|
||||
|
||||
buf = USB200.INTENB1;
|
||||
buf |= (USB_HOST_BITSIGNE | USB_HOST_BITSACKE);
|
||||
USB200.INTENB1 = buf;
|
||||
|
||||
usb0_host_enable_nrdy_int(USB_HOST_PIPE0);
|
||||
usb0_host_enable_bemp_int(USB_HOST_PIPE0);
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,698 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_dmacdrv.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "rza_io_regrw.h"
|
||||
#include "usb0_host_dmacdrv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
|
||||
|
||||
/* ==== Request setting information for on-chip peripheral module ==== */
|
||||
typedef enum dmac_peri_req_reg_type
|
||||
{
|
||||
DMAC_REQ_MID,
|
||||
DMAC_REQ_RID,
|
||||
DMAC_REQ_AM,
|
||||
DMAC_REQ_LVL,
|
||||
DMAC_REQ_REQD
|
||||
} dmac_peri_req_reg_type_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
/* ==== Prototype declaration ==== */
|
||||
|
||||
/* ==== Global variable ==== */
|
||||
/* On-chip peripheral module request setting table */
|
||||
static const uint8_t usb0_host_dmac_peri_req_init_table[8][5] =
|
||||
{
|
||||
/* MID,RID, AM,LVL,REQD */
|
||||
{ 32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
|
||||
{ 32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
|
||||
{ 33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
|
||||
{ 33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
|
||||
{ 34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
|
||||
{ 34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
|
||||
{ 35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
|
||||
{ 35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC1_PeriReqInit
|
||||
* Description : Sets the register mode for DMA mode and the on-chip peripheral
|
||||
* : module request for transfer request for DMAC channel 1.
|
||||
* : Executes DMAC initial setting using the DMA information
|
||||
* : specified by the argument *trans_info and the enabled/disabled
|
||||
* : continuous transfer specified by the argument continuation.
|
||||
* : Registers DMAC channel 1 interrupt handler function and sets
|
||||
* : the interrupt priority level. Then enables transfer completion
|
||||
* : interrupt.
|
||||
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
|
||||
* : : register
|
||||
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
|
||||
* : uint32_t continuation : Set continuous transfer to be valid
|
||||
* : : after DMA transfer has been completed
|
||||
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
|
||||
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
|
||||
* : : transfer
|
||||
* : uint32_t request_factor : Factor for on-chip peripheral module
|
||||
* : : request
|
||||
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
|
||||
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
|
||||
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
|
||||
* : :
|
||||
* : uint32_t req_direction : Setting value of CHCFG_n register
|
||||
* : : REQD bit
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC1_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction)
|
||||
{
|
||||
/* ==== Register mode ==== */
|
||||
if (DMAC_MODE_REGISTER == dmamode)
|
||||
{
|
||||
/* ==== Next0 register set ==== */
|
||||
DMAC1.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
|
||||
DMAC1.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
|
||||
DMAC1.N0TB_n = trans_info->count; /* Total transfer byte count */
|
||||
|
||||
/* DAD : Transfer destination address counting direction */
|
||||
/* SAD : Transfer source address counting direction */
|
||||
/* DDS : Transfer destination transfer size */
|
||||
/* SDS : Transfer source transfer size */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
trans_info->daddr_dir,
|
||||
DMAC1_CHCFG_n_DAD_SHIFT,
|
||||
DMAC1_CHCFG_n_DAD);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
trans_info->saddr_dir,
|
||||
DMAC1_CHCFG_n_SAD_SHIFT,
|
||||
DMAC1_CHCFG_n_SAD);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
trans_info->dst_size,
|
||||
DMAC1_CHCFG_n_DDS_SHIFT,
|
||||
DMAC1_CHCFG_n_DDS);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
trans_info->src_size,
|
||||
DMAC1_CHCFG_n_SDS_SHIFT,
|
||||
DMAC1_CHCFG_n_SDS);
|
||||
|
||||
/* DMS : Register mode */
|
||||
/* RSEL : Select Next0 register set */
|
||||
/* SBE : No discharge of buffer data when aborted */
|
||||
/* DEM : No DMA interrupt mask */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_DMS_SHIFT,
|
||||
DMAC1_CHCFG_n_DMS);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_RSEL_SHIFT,
|
||||
DMAC1_CHCFG_n_RSEL);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_SBE_SHIFT,
|
||||
DMAC1_CHCFG_n_SBE);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_DEM_SHIFT,
|
||||
DMAC1_CHCFG_n_DEM);
|
||||
|
||||
/* ---- Continuous transfer ---- */
|
||||
if (DMAC_SAMPLE_CONTINUATION == continuation)
|
||||
{
|
||||
/* REN : Execute continuous transfer */
|
||||
/* RSW : Change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
1,
|
||||
DMAC1_CHCFG_n_REN_SHIFT,
|
||||
DMAC1_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
1,
|
||||
DMAC1_CHCFG_n_RSW_SHIFT,
|
||||
DMAC1_CHCFG_n_RSW);
|
||||
}
|
||||
/* ---- Single transfer ---- */
|
||||
else
|
||||
{
|
||||
/* REN : Do not execute continuous transfer */
|
||||
/* RSW : Do not change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_REN_SHIFT,
|
||||
DMAC1_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_RSW_SHIFT,
|
||||
DMAC1_CHCFG_n_RSW);
|
||||
}
|
||||
|
||||
/* TM : Single transfer */
|
||||
/* SEL : Channel setting */
|
||||
/* HIEN, LOEN : On-chip peripheral module request */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_TM_SHIFT,
|
||||
DMAC1_CHCFG_n_TM);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
1,
|
||||
DMAC1_CHCFG_n_SEL_SHIFT,
|
||||
DMAC1_CHCFG_n_SEL);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
1,
|
||||
DMAC1_CHCFG_n_HIEN_SHIFT,
|
||||
DMAC1_CHCFG_n_HIEN);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
0,
|
||||
DMAC1_CHCFG_n_LOEN_SHIFT,
|
||||
DMAC1_CHCFG_n_LOEN);
|
||||
|
||||
/* ---- Set factor by specified on-chip peripheral module request ---- */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
|
||||
DMAC1_CHCFG_n_AM_SHIFT,
|
||||
DMAC1_CHCFG_n_AM);
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
|
||||
DMAC1_CHCFG_n_LVL_SHIFT,
|
||||
DMAC1_CHCFG_n_LVL);
|
||||
if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
|
||||
DMAC1_CHCFG_n_REQD_SHIFT,
|
||||
DMAC1_CHCFG_n_REQD);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
|
||||
req_direction,
|
||||
DMAC1_CHCFG_n_REQD_SHIFT,
|
||||
DMAC1_CHCFG_n_REQD);
|
||||
}
|
||||
RZA_IO_RegWrite_32(&DMAC01.DMARS,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
|
||||
DMAC01_DMARS_CH1_RID_SHIFT,
|
||||
DMAC01_DMARS_CH1_RID);
|
||||
RZA_IO_RegWrite_32(&DMAC01.DMARS,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
|
||||
DMAC01_DMARS_CH1_MID_SHIFT,
|
||||
DMAC01_DMARS_CH1_MID);
|
||||
|
||||
/* PR : Round robin mode */
|
||||
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
|
||||
1,
|
||||
DMAC07_DCTRL_0_7_PR_SHIFT,
|
||||
DMAC07_DCTRL_0_7_PR);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC1_Open
|
||||
* Description : Enables DMAC channel 1 transfer.
|
||||
* Arguments : uint32_t req : DMAC request mode
|
||||
* Return Value : 0 : Succeeded in enabling DMA transfer
|
||||
* : -1 : Failed to enable DMA transfer (due to DMA operation)
|
||||
*******************************************************************************/
|
||||
int32_t usb0_host_DMAC1_Open (uint32_t req)
|
||||
{
|
||||
int32_t ret;
|
||||
volatile uint8_t dummy;
|
||||
|
||||
/* Transferable? */
|
||||
if ((0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
|
||||
DMAC1_CHSTAT_n_EN_SHIFT,
|
||||
DMAC1_CHSTAT_n_EN)) &&
|
||||
(0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
|
||||
DMAC1_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC1_CHSTAT_n_TACT)))
|
||||
{
|
||||
/* Clear Channel Status Register */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
|
||||
1,
|
||||
DMAC1_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC1_CHCTRL_n_SWRST);
|
||||
dummy = RZA_IO_RegRead_32(&DMAC1.CHCTRL_n,
|
||||
DMAC1_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC1_CHCTRL_n_SWRST);
|
||||
/* Enable DMA transfer */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
|
||||
1,
|
||||
DMAC1_CHCTRL_n_SETEN_SHIFT,
|
||||
DMAC1_CHCTRL_n_SETEN);
|
||||
|
||||
/* ---- Request by software ---- */
|
||||
if (DMAC_REQ_MODE_SOFT == req)
|
||||
{
|
||||
/* DMA transfer Request by software */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
|
||||
1,
|
||||
DMAC1_CHCTRL_n_STG_SHIFT,
|
||||
DMAC1_CHCTRL_n_STG);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -1;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC1_Close
|
||||
* Description : Aborts DMAC channel 1 transfer. Returns the remaining transfer
|
||||
* : byte count at the time of DMA transfer abort to the argument
|
||||
* : *remain.
|
||||
* Arguments : uint32_t * remain : Remaining transfer byte count when
|
||||
* : : DMA transfer is aborted
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC1_Close (uint32_t * remain)
|
||||
{
|
||||
|
||||
/* ==== Abort transfer ==== */
|
||||
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
|
||||
1,
|
||||
DMAC1_CHCTRL_n_CLREN_SHIFT,
|
||||
DMAC1_CHCTRL_n_CLREN);
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
|
||||
DMAC1_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC1_CHSTAT_n_TACT))
|
||||
{
|
||||
/* Loop until transfer is aborted */
|
||||
}
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
|
||||
DMAC1_CHSTAT_n_EN_SHIFT,
|
||||
DMAC1_CHSTAT_n_EN))
|
||||
{
|
||||
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
|
||||
}
|
||||
/* ==== Obtain remaining transfer byte count ==== */
|
||||
*remain = DMAC1.CRTB_n;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC1_Load_Set
|
||||
* Description : Sets the transfer source address, transfer destination
|
||||
* : address, and total transfer byte count respectively
|
||||
* : specified by the argument src_addr, dst_addr, and count to
|
||||
* : DMAC channel 1 as DMA transfer information.
|
||||
* : Sets the register set selected by the CHCFG_n register
|
||||
* : RSEL bit from the Next0 or Next1 register set.
|
||||
* : This function should be called when DMA transfer of DMAC
|
||||
* : channel 1 is aboted.
|
||||
* Arguments : uint32_t src_addr : Transfer source address
|
||||
* : uint32_t dst_addr : Transfer destination address
|
||||
* : uint32_t count : Total transfer byte count
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC1_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
|
||||
{
|
||||
uint8_t reg_set;
|
||||
|
||||
/* Obtain register set in use */
|
||||
reg_set = RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
|
||||
DMAC1_CHSTAT_n_SR_SHIFT,
|
||||
DMAC1_CHSTAT_n_SR);
|
||||
|
||||
/* ==== Load ==== */
|
||||
if (0 == reg_set)
|
||||
{
|
||||
/* ---- Next0 Register Set ---- */
|
||||
DMAC1.N0SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC1.N0DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC1.N0TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ---- Next1 Register Set ---- */
|
||||
DMAC1.N1SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC1.N1DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC1.N1TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC2_PeriReqInit
|
||||
* Description : Sets the register mode for DMA mode and the on-chip peripheral
|
||||
* : module request for transfer request for DMAC channel 2.
|
||||
* : Executes DMAC initial setting using the DMA information
|
||||
* : specified by the argument *trans_info and the enabled/disabled
|
||||
* : continuous transfer specified by the argument continuation.
|
||||
* : Registers DMAC channel 2 interrupt handler function and sets
|
||||
* : the interrupt priority level. Then enables transfer completion
|
||||
* : interrupt.
|
||||
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
|
||||
* : : register
|
||||
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
|
||||
* : uint32_t continuation : Set continuous transfer to be valid
|
||||
* : : after DMA transfer has been completed
|
||||
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
|
||||
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
|
||||
* : : transfer
|
||||
* : uint32_t request_factor : Factor for on-chip peripheral module
|
||||
* : : request
|
||||
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
|
||||
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
|
||||
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
|
||||
* : :
|
||||
* : uint32_t req_direction : Setting value of CHCFG_n register
|
||||
* : : REQD bit
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC2_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction)
|
||||
{
|
||||
/* ==== Register mode ==== */
|
||||
if (DMAC_MODE_REGISTER == dmamode)
|
||||
{
|
||||
/* ==== Next0 register set ==== */
|
||||
DMAC2.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
|
||||
DMAC2.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
|
||||
DMAC2.N0TB_n = trans_info->count; /* Total transfer byte count */
|
||||
|
||||
/* DAD : Transfer destination address counting direction */
|
||||
/* SAD : Transfer source address counting direction */
|
||||
/* DDS : Transfer destination transfer size */
|
||||
/* SDS : Transfer source transfer size */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
trans_info->daddr_dir,
|
||||
DMAC2_CHCFG_n_DAD_SHIFT,
|
||||
DMAC2_CHCFG_n_DAD);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
trans_info->saddr_dir,
|
||||
DMAC2_CHCFG_n_SAD_SHIFT,
|
||||
DMAC2_CHCFG_n_SAD);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
trans_info->dst_size,
|
||||
DMAC2_CHCFG_n_DDS_SHIFT,
|
||||
DMAC2_CHCFG_n_DDS);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
trans_info->src_size,
|
||||
DMAC2_CHCFG_n_SDS_SHIFT,
|
||||
DMAC2_CHCFG_n_SDS);
|
||||
|
||||
/* DMS : Register mode */
|
||||
/* RSEL : Select Next0 register set */
|
||||
/* SBE : No discharge of buffer data when aborted */
|
||||
/* DEM : No DMA interrupt mask */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_DMS_SHIFT,
|
||||
DMAC2_CHCFG_n_DMS);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_RSEL_SHIFT,
|
||||
DMAC2_CHCFG_n_RSEL);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_SBE_SHIFT,
|
||||
DMAC2_CHCFG_n_SBE);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_DEM_SHIFT,
|
||||
DMAC2_CHCFG_n_DEM);
|
||||
|
||||
/* ---- Continuous transfer ---- */
|
||||
if (DMAC_SAMPLE_CONTINUATION == continuation)
|
||||
{
|
||||
/* REN : Execute continuous transfer */
|
||||
/* RSW : Change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
1,
|
||||
DMAC2_CHCFG_n_REN_SHIFT,
|
||||
DMAC2_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
1,
|
||||
DMAC2_CHCFG_n_RSW_SHIFT,
|
||||
DMAC2_CHCFG_n_RSW);
|
||||
}
|
||||
/* ---- Single transfer ---- */
|
||||
else
|
||||
{
|
||||
/* REN : Do not execute continuous transfer */
|
||||
/* RSW : Do not change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_REN_SHIFT,
|
||||
DMAC2_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_RSW_SHIFT,
|
||||
DMAC2_CHCFG_n_RSW);
|
||||
}
|
||||
|
||||
/* TM : Single transfer */
|
||||
/* SEL : Channel setting */
|
||||
/* HIEN, LOEN : On-chip peripheral module request */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_TM_SHIFT,
|
||||
DMAC2_CHCFG_n_TM);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
2,
|
||||
DMAC2_CHCFG_n_SEL_SHIFT,
|
||||
DMAC2_CHCFG_n_SEL);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
1,
|
||||
DMAC2_CHCFG_n_HIEN_SHIFT,
|
||||
DMAC2_CHCFG_n_HIEN);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
0,
|
||||
DMAC2_CHCFG_n_LOEN_SHIFT,
|
||||
DMAC2_CHCFG_n_LOEN);
|
||||
|
||||
/* ---- Set factor by specified on-chip peripheral module request ---- */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
|
||||
DMAC2_CHCFG_n_AM_SHIFT,
|
||||
DMAC2_CHCFG_n_AM);
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
|
||||
DMAC2_CHCFG_n_LVL_SHIFT,
|
||||
DMAC2_CHCFG_n_LVL);
|
||||
if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
|
||||
DMAC2_CHCFG_n_REQD_SHIFT,
|
||||
DMAC2_CHCFG_n_REQD);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
|
||||
req_direction,
|
||||
DMAC2_CHCFG_n_REQD_SHIFT,
|
||||
DMAC2_CHCFG_n_REQD);
|
||||
}
|
||||
RZA_IO_RegWrite_32(&DMAC23.DMARS,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
|
||||
DMAC23_DMARS_CH2_RID_SHIFT,
|
||||
DMAC23_DMARS_CH2_RID);
|
||||
RZA_IO_RegWrite_32(&DMAC23.DMARS,
|
||||
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
|
||||
DMAC23_DMARS_CH2_MID_SHIFT,
|
||||
DMAC23_DMARS_CH2_MID);
|
||||
|
||||
/* PR : Round robin mode */
|
||||
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
|
||||
1,
|
||||
DMAC07_DCTRL_0_7_PR_SHIFT,
|
||||
DMAC07_DCTRL_0_7_PR);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC2_Open
|
||||
* Description : Enables DMAC channel 2 transfer.
|
||||
* Arguments : uint32_t req : DMAC request mode
|
||||
* Return Value : 0 : Succeeded in enabling DMA transfer
|
||||
* : -1 : Failed to enable DMA transfer (due to DMA operation)
|
||||
*******************************************************************************/
|
||||
int32_t usb0_host_DMAC2_Open (uint32_t req)
|
||||
{
|
||||
int32_t ret;
|
||||
volatile uint8_t dummy;
|
||||
|
||||
/* Transferable? */
|
||||
if ((0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
|
||||
DMAC2_CHSTAT_n_EN_SHIFT,
|
||||
DMAC2_CHSTAT_n_EN)) &&
|
||||
(0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
|
||||
DMAC2_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC2_CHSTAT_n_TACT)))
|
||||
{
|
||||
/* Clear Channel Status Register */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
|
||||
1,
|
||||
DMAC2_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC2_CHCTRL_n_SWRST);
|
||||
dummy = RZA_IO_RegRead_32(&DMAC2.CHCTRL_n,
|
||||
DMAC2_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC2_CHCTRL_n_SWRST);
|
||||
/* Enable DMA transfer */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
|
||||
1,
|
||||
DMAC2_CHCTRL_n_SETEN_SHIFT,
|
||||
DMAC2_CHCTRL_n_SETEN);
|
||||
|
||||
/* ---- Request by software ---- */
|
||||
if (DMAC_REQ_MODE_SOFT == req)
|
||||
{
|
||||
/* DMA transfer Request by software */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
|
||||
1,
|
||||
DMAC2_CHCTRL_n_STG_SHIFT,
|
||||
DMAC2_CHCTRL_n_STG);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -1;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC2_Close
|
||||
* Description : Aborts DMAC channel 2 transfer. Returns the remaining transfer
|
||||
* : byte count at the time of DMA transfer abort to the argument
|
||||
* : *remain.
|
||||
* Arguments : uint32_t * remain : Remaining transfer byte count when
|
||||
* : : DMA transfer is aborted
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC2_Close (uint32_t * remain)
|
||||
{
|
||||
|
||||
/* ==== Abort transfer ==== */
|
||||
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
|
||||
1,
|
||||
DMAC2_CHCTRL_n_CLREN_SHIFT,
|
||||
DMAC2_CHCTRL_n_CLREN);
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
|
||||
DMAC2_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC2_CHSTAT_n_TACT))
|
||||
{
|
||||
/* Loop until transfer is aborted */
|
||||
}
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
|
||||
DMAC2_CHSTAT_n_EN_SHIFT,
|
||||
DMAC2_CHSTAT_n_EN))
|
||||
{
|
||||
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
|
||||
}
|
||||
/* ==== Obtain remaining transfer byte count ==== */
|
||||
*remain = DMAC2.CRTB_n;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_DMAC2_Load_Set
|
||||
* Description : Sets the transfer source address, transfer destination
|
||||
* : address, and total transfer byte count respectively
|
||||
* : specified by the argument src_addr, dst_addr, and count to
|
||||
* : DMAC channel 2 as DMA transfer information.
|
||||
* : Sets the register set selected by the CHCFG_n register
|
||||
* : RSEL bit from the Next0 or Next1 register set.
|
||||
* : This function should be called when DMA transfer of DMAC
|
||||
* : channel 2 is aboted.
|
||||
* Arguments : uint32_t src_addr : Transfer source address
|
||||
* : uint32_t dst_addr : Transfer destination address
|
||||
* : uint32_t count : Total transfer byte count
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb0_host_DMAC2_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
|
||||
{
|
||||
uint8_t reg_set;
|
||||
|
||||
/* Obtain register set in use */
|
||||
reg_set = RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
|
||||
DMAC2_CHSTAT_n_SR_SHIFT,
|
||||
DMAC2_CHSTAT_n_SR);
|
||||
|
||||
/* ==== Load ==== */
|
||||
if (0 == reg_set)
|
||||
{
|
||||
/* ---- Next0 Register Set ---- */
|
||||
DMAC2.N0SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC2.N0DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC2.N0TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ---- Next1 Register Set ---- */
|
||||
DMAC2.N1SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC2.N1DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC2.N1TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,156 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "devdrv_usb_host_api.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/********************************************************************************************************/
|
||||
/* Endpoint Configuration Data Format */
|
||||
/********************************************************************************************************/
|
||||
/* LINE1: Pipe Window Select Register */
|
||||
/* CPU Access PIPE : PIPE1 to PIPE9 [ ### SET ### ] */
|
||||
/* LINE2: Pipe Configuration Register */
|
||||
/* Transfer Type : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* Buffer Ready interrupt : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* Double Buffer Mode : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
|
||||
/* Continuous Transmit: : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
|
||||
/* Short NAK : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* Transfer Direction : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* Endpoint Number : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* LINE3: Pipe Buffer Configuration Register */
|
||||
/* Buffer Size : (uint16_t)((uint16_t)(((x) / 64) - 1) << 10) */
|
||||
/* [ ### SET ### ] */
|
||||
/* Buffer Top Number : (uint16_t)(x) [ ### SET ### ] */
|
||||
/* LINE4: Pipe Maxpacket Size Register */
|
||||
/* Max Packet Size : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* LINE5: Pipe Cycle Configuration Register (0x6C) */
|
||||
/* ISO Buffer Flush Mode : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* ISO Interval Value : USB_HOST_NONE [ USB_HOST_NONE ] */
|
||||
/* LINE6: use FIFO port */
|
||||
/* : USB_HOST_CUSE [ ### SET ### ] */
|
||||
/* : USB_HOST_D0USE / USB_HOST_D1USE */
|
||||
/* : USB_HOST_D0DMA / USB_HOST_D0DMA */
|
||||
/* LINE7: use FIFO port Endian : USB_HOST_FIFO_BIG / USB_HOST_FIFO_LITTLE [ #SET# ] */
|
||||
/********************************************************************************************************/
|
||||
|
||||
/* Device Address 1 */
|
||||
USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[ ] =
|
||||
{
|
||||
{
|
||||
USB_HOST_PIPE1,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(8),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D0USE
|
||||
},
|
||||
|
||||
{
|
||||
/* Pipe end */
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF
|
||||
}
|
||||
};
|
||||
|
||||
USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[ ] =
|
||||
{
|
||||
{
|
||||
USB_HOST_PIPE6,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(40),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D1USE
|
||||
},
|
||||
|
||||
{
|
||||
USB_HOST_PIPE7,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(41),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D1USE
|
||||
},
|
||||
|
||||
{
|
||||
USB_HOST_PIPE8,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(42),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D1USE
|
||||
},
|
||||
|
||||
{
|
||||
USB_HOST_PIPE9,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(43),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D1USE
|
||||
},
|
||||
|
||||
{
|
||||
/* Pipe end */
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF
|
||||
}
|
||||
};
|
||||
|
||||
/* End of File */
|
|
@ -0,0 +1,770 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb0_host_userdef.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include <stdio.h>
|
||||
#include "cmsis_os.h"
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "devdrv_usb_host_api.h"
|
||||
#include "usb0_host.h"
|
||||
#include "MBRZA1H.h" /* INTC Driver Header */
|
||||
#include "usb0_host_dmacdrv.h"
|
||||
#include "ohci_wrapp_RZ_A1_local.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define DUMMY_ACCESS (*(volatile unsigned long *)(OSTM0CNT))
|
||||
|
||||
/* #define CACHE_WRITEBACK */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern int32_t io_cwb(unsigned long start, unsigned long end);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb0_host_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
|
||||
static void usb0_host_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
|
||||
static void Userdef_USB_usb0_host_delay_10us_2(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_d0fifo_dmaintid
|
||||
* Description : get D0FIFO DMA Interrupt ID
|
||||
* Arguments : none
|
||||
* Return Value : D0FIFO DMA Interrupt ID
|
||||
*******************************************************************************/
|
||||
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid (void)
|
||||
{
|
||||
return DMAINT1_IRQn;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_d1fifo_dmaintid
|
||||
* Description : get D1FIFO DMA Interrupt ID
|
||||
* Arguments : none
|
||||
* Return Value : D1FIFO DMA Interrupt ID
|
||||
*******************************************************************************/
|
||||
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid (void)
|
||||
{
|
||||
return DMAINT2_IRQn;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_attach
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_attach (void)
|
||||
{
|
||||
// printf("\n");
|
||||
// printf("channel 0 attach device\n");
|
||||
// printf("\n");
|
||||
ohciwrapp_loc_Connect(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_detach
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_detach (void)
|
||||
{
|
||||
// printf("\n");
|
||||
// printf("channel 0 detach device\n");
|
||||
// printf("\n");
|
||||
ohciwrapp_loc_Connect(0);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_delay_1ms
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_delay_1ms (void)
|
||||
{
|
||||
osDelay(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_delay_xms
|
||||
* Description : Wait for the software in the period of time specified by the
|
||||
* : argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : uint32_t msec ; Wait Time (msec)
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_delay_xms (uint32_t msec)
|
||||
{
|
||||
osDelay(msec);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_delay_10us
|
||||
* Description : Waits for software for the period specified by the argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : uint32_t usec ; Wait Time(x 10usec)
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_delay_10us (uint32_t usec)
|
||||
{
|
||||
volatile int i;
|
||||
|
||||
/* Wait 10us (Please change for your MCU) */
|
||||
for (i = 0; i < usec; ++i)
|
||||
{
|
||||
Userdef_USB_usb0_host_delay_10us_2();
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_delay_10us_2
|
||||
* Description : Waits for software for the period specified by the argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void Userdef_USB_usb0_host_delay_10us_2 (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/* Wait 1us (Please change for your MCU) */
|
||||
for (i = 0; i < 14; ++i)
|
||||
{
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_delay_500ns
|
||||
* Description : Wait for software for 500ns.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_delay_500ns (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/* Wait 500ns (Please change for your MCU) */
|
||||
/* Wait 500ns I clock 266MHz */
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_start_dma
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* : Set DMAC register by this function to enable DMA transfer.
|
||||
* : After executing this function, USB module is set to start DMA
|
||||
* : transfer. DMA transfer should not wait for DMA transfer complete.
|
||||
* Arguments : USB_HOST_DMA_t *dma : DMA parameter
|
||||
* : typedef struct{
|
||||
* : uint32_t fifo; FIFO for using
|
||||
* : uint32_t buffer; Start address of transfer source/destination
|
||||
* : uint32_t bytes; Transfer size(Byte)
|
||||
* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
|
||||
* : uint32_t size; DMA transfer size
|
||||
* : } USB_HOST_DMA_t;
|
||||
* : uint16_t dfacc ; 0 : cycle steal mode
|
||||
* : 1 : 16byte continuous mode
|
||||
* : 2 : 32byte continuous mode
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_start_dma (USB_HOST_DMA_t * dma, uint16_t dfacc)
|
||||
{
|
||||
uint32_t trncount;
|
||||
uint32_t src;
|
||||
uint32_t dst;
|
||||
uint32_t size;
|
||||
uint32_t dir;
|
||||
#ifdef CACHE_WRITEBACK
|
||||
uint32_t ptr;
|
||||
#endif
|
||||
|
||||
trncount = dma->bytes;
|
||||
dir = dma->dir;
|
||||
|
||||
if (dir == USB_HOST_FIFO2BUF)
|
||||
{
|
||||
/* DxFIFO determination */
|
||||
dst = dma->buffer;
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
size = dma->size;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
src += 3; /* byte access */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
src += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
#else
|
||||
size = dma->size;
|
||||
|
||||
if (size == 2)
|
||||
{
|
||||
/* 32bit access */
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB200.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB200.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB200.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB200.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
/* 16bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
src += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 8bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
src += 3; /* byte access */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* DxFIFO determination */
|
||||
src = dma->buffer;
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
size = dma->size;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
dst += 3; /* byte access */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
dst += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
#else
|
||||
size = dma->size;
|
||||
if (size == 2)
|
||||
{
|
||||
/* 32bit access */
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
/* 16bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
dst += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 8bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
|
||||
}
|
||||
dst += 3; /* byte access */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CACHE_WRITEBACK
|
||||
ptr = (uint32_t)dma->buffer;
|
||||
if ((ptr & 0x20000000ul) == 0)
|
||||
{
|
||||
io_cwb((uint32_t)ptr,(uint32_t)(ptr)+trncount);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
usb0_host_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb0_host_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_enable_dmac0
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* Arguments : uint32_t src : src address
|
||||
* : uint32_t dst : dst address
|
||||
* : uint32_t count : transfer byte
|
||||
* : uint32_t size : transfer size
|
||||
* : uint32_t dir : direction
|
||||
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
|
||||
* : uint16_t dfacc : 0 : normal access
|
||||
* : : 1 : 16byte access
|
||||
* : : 2 : 32byte access
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb0_host_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
|
||||
{
|
||||
dmac_transinfo_t trans_info;
|
||||
uint32_t request_factor = 0;
|
||||
int32_t ret;
|
||||
|
||||
/* ==== Variable setting for DMAC initialization ==== */
|
||||
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
|
||||
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
|
||||
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
#else
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dir == USB_HOST_FIFO2BUF)
|
||||
{
|
||||
request_factor = DMAC_REQ_USB0_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else if (dir == USB_HOST_BUF2FIFO)
|
||||
{
|
||||
request_factor = DMAC_REQ_USB0_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* ==== DMAC initialization ==== */
|
||||
usb0_host_DMAC1_PeriReqInit((const dmac_transinfo_t *)&trans_info,
|
||||
DMAC_MODE_REGISTER,
|
||||
DMAC_SAMPLE_SINGLE,
|
||||
request_factor,
|
||||
0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC1_PeriReqInit() */
|
||||
|
||||
/* ==== DMAC startup ==== */
|
||||
ret = usb0_host_DMAC1_Open(DMAC_REQ_MODE_PERI);
|
||||
|
||||
if (ret != 0)
|
||||
{
|
||||
// printf("DMAC1 Open error!!\n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb0_host_enable_dmac1
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* Arguments : uint32_t src : src address
|
||||
* : uint32_t dst : dst address
|
||||
* : uint32_t count : transfer byte
|
||||
* : uint32_t size : transfer size
|
||||
* : uint32_t dir : direction
|
||||
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
|
||||
* : uint16_t dfacc : 0 : normal access
|
||||
* : : 1 : 16byte access
|
||||
* : : 2 : 32byte access
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb0_host_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
|
||||
{
|
||||
dmac_transinfo_t trans_info;
|
||||
uint32_t request_factor = 0;
|
||||
int32_t ret;
|
||||
|
||||
/* ==== Variable setting for DMAC initialization ==== */
|
||||
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
|
||||
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
|
||||
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
#else
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dir == USB_HOST_FIFO2BUF)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB0_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else if (dir == USB_HOST_BUF2FIFO)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB0_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* ==== DMAC initialization ==== */
|
||||
usb0_host_DMAC2_PeriReqInit((const dmac_transinfo_t *)&trans_info,
|
||||
DMAC_MODE_REGISTER,
|
||||
DMAC_SAMPLE_SINGLE,
|
||||
request_factor,
|
||||
0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC2_PeriReqInit() */
|
||||
|
||||
/* ==== DMAC startup ==== */
|
||||
ret = usb0_host_DMAC2_Open(DMAC_REQ_MODE_PERI);
|
||||
|
||||
if (ret != 0)
|
||||
{
|
||||
// printf("DMAC2 Open error!!\n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_stop_dma0
|
||||
* Description : Disables DMA transfer.
|
||||
* Arguments : none
|
||||
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
|
||||
* : regarding to the bus width.
|
||||
* Notice : This function should be executed to DMAC executed at the time
|
||||
* : of specification of D0_FIF0_DMA in dma->fifo.
|
||||
*******************************************************************************/
|
||||
uint32_t Userdef_USB_usb0_host_stop_dma0 (void)
|
||||
{
|
||||
uint32_t remain;
|
||||
|
||||
/* ==== DMAC release ==== */
|
||||
usb0_host_DMAC1_Close(&remain);
|
||||
|
||||
return remain;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_stop_dma1
|
||||
* Description : Disables DMA transfer.
|
||||
* : This function should be executed to DMAC executed at the time
|
||||
* : of specification of D1_FIF0_DMA in dma->fifo.
|
||||
* Arguments : none
|
||||
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
|
||||
* : regarding to the bus width.
|
||||
*******************************************************************************/
|
||||
uint32_t Userdef_USB_usb0_host_stop_dma1 (void)
|
||||
{
|
||||
uint32_t remain;
|
||||
|
||||
/* ==== DMAC release ==== */
|
||||
usb0_host_DMAC2_Close(&remain);
|
||||
|
||||
return remain;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_notice
|
||||
* Description : Notice of USER
|
||||
* Arguments : const char *format
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_notice (const char * format)
|
||||
{
|
||||
// printf(format);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb0_host_user_rdy
|
||||
* Description : This function notify a user and wait for trigger
|
||||
* Arguments : const char *format
|
||||
* : uint16_t data
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb0_host_user_rdy (const char * format, uint16_t data)
|
||||
{
|
||||
// printf(format, data);
|
||||
getchar();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/* End of File */
|
|
@ -14,6 +14,8 @@
|
|||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined(TARGET_LPC1768)
|
||||
|
||||
#include "mbed.h"
|
||||
#include "USBHALHost.h"
|
||||
#include "dbg.h"
|
||||
|
@ -320,3 +322,4 @@ void USBHALHost::UsbIrqhandler() {
|
|||
}
|
||||
}
|
||||
}
|
||||
#endif
|
|
@ -0,0 +1,293 @@
|
|||
/* mbed USBHost Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined(TARGET_RZ_A1H)
|
||||
|
||||
#include "mbed.h"
|
||||
#include "USBHALHost.h"
|
||||
#include "dbg.h"
|
||||
|
||||
#include "ohci_wrapp_RZ_A1.h"
|
||||
|
||||
|
||||
#define HCCA_SIZE sizeof(HCCA)
|
||||
#define ED_SIZE sizeof(HCED)
|
||||
#define TD_SIZE sizeof(HCTD)
|
||||
|
||||
#define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
|
||||
#define ALIGNE_MSK (0x0000000F)
|
||||
|
||||
static volatile uint8_t usb_buf[TOTAL_SIZE + ALIGNE_MSK]; //16 bytes aligned!
|
||||
|
||||
USBHALHost * USBHALHost::instHost;
|
||||
|
||||
USBHALHost::USBHALHost() {
|
||||
instHost = this;
|
||||
memInit();
|
||||
memset((void*)usb_hcca, 0, HCCA_SIZE);
|
||||
for (int i = 0; i < MAX_ENDPOINT; i++) {
|
||||
edBufAlloc[i] = false;
|
||||
}
|
||||
for (int i = 0; i < MAX_TD; i++) {
|
||||
tdBufAlloc[i] = false;
|
||||
}
|
||||
}
|
||||
|
||||
void USBHALHost::init() {
|
||||
ohciwrapp_init(&_usbisr, 1);
|
||||
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, 1); // HARDWARE RESET
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, 0); // Initialize Control list head to Zero
|
||||
ohciwrapp_reg_w(OHCI_REG_BULKHEADED, 0); // Initialize Bulk list head to Zero
|
||||
|
||||
// Wait 100 ms before apply reset
|
||||
wait_ms(100);
|
||||
|
||||
// software reset
|
||||
ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_HCR);
|
||||
|
||||
// Write Fm Interval and Largest Data Packet Counter
|
||||
ohciwrapp_reg_w(OHCI_REG_FMINTERVAL, DEFAULT_FMINTERVAL);
|
||||
ohciwrapp_reg_w(OHCI_REG_PERIODICSTART, FI * 90 / 100);
|
||||
|
||||
// Put HC in operational state
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, (ohciwrapp_reg_r(OHCI_REG_CONTROL) & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER);
|
||||
// Set Global Power
|
||||
ohciwrapp_reg_w(OHCI_REG_RHSTATUS, OR_RH_STATUS_LPSC);
|
||||
|
||||
ohciwrapp_reg_w(OHCI_REG_HCCA, (uint32_t)(usb_hcca));
|
||||
|
||||
// Clear Interrrupt Status
|
||||
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, ohciwrapp_reg_r(OHCI_REG_INTERRUPTSTATUS));
|
||||
|
||||
ohciwrapp_reg_w(OHCI_REG_INTERRUPTENABLE, OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC);
|
||||
|
||||
// Enable the USB Interrupt
|
||||
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_CSC);
|
||||
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
|
||||
|
||||
// Check for any connected devices
|
||||
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CCS) {
|
||||
//Device connected
|
||||
wait_ms(150);
|
||||
USB_DBG("Device connected (%08x)\n\r", ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1));
|
||||
deviceConnected(0, 1, ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_LSDA);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t USBHALHost::controlHeadED() {
|
||||
return ohciwrapp_reg_r(OHCI_REG_CONTROLHEADED);
|
||||
}
|
||||
|
||||
uint32_t USBHALHost::bulkHeadED() {
|
||||
return ohciwrapp_reg_r(OHCI_REG_BULKHEADED);
|
||||
}
|
||||
|
||||
uint32_t USBHALHost::interruptHeadED() {
|
||||
return usb_hcca->IntTable[0];
|
||||
}
|
||||
|
||||
void USBHALHost::updateBulkHeadED(uint32_t addr) {
|
||||
ohciwrapp_reg_w(OHCI_REG_BULKHEADED, addr);
|
||||
}
|
||||
|
||||
|
||||
void USBHALHost::updateControlHeadED(uint32_t addr) {
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, addr);
|
||||
}
|
||||
|
||||
void USBHALHost::updateInterruptHeadED(uint32_t addr) {
|
||||
usb_hcca->IntTable[0] = addr;
|
||||
}
|
||||
|
||||
|
||||
void USBHALHost::enableList(ENDPOINT_TYPE type) {
|
||||
uint32_t wk_data;
|
||||
|
||||
switch(type) {
|
||||
case CONTROL_ENDPOINT:
|
||||
ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_CLF);
|
||||
wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_CLE);
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
|
||||
break;
|
||||
case ISOCHRONOUS_ENDPOINT:
|
||||
break;
|
||||
case BULK_ENDPOINT:
|
||||
ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_BLF);
|
||||
wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_BLE);
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
|
||||
break;
|
||||
case INTERRUPT_ENDPOINT:
|
||||
wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_PLE);
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
bool USBHALHost::disableList(ENDPOINT_TYPE type) {
|
||||
uint32_t wk_data;
|
||||
|
||||
switch(type) {
|
||||
case CONTROL_ENDPOINT:
|
||||
wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
|
||||
if(wk_data & OR_CONTROL_CLE) {
|
||||
wk_data &= ~OR_CONTROL_CLE;
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
case ISOCHRONOUS_ENDPOINT:
|
||||
return false;
|
||||
case BULK_ENDPOINT:
|
||||
wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
|
||||
if(wk_data & OR_CONTROL_BLE) {
|
||||
wk_data &= ~OR_CONTROL_BLE;
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
case INTERRUPT_ENDPOINT:
|
||||
wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
|
||||
if(wk_data & OR_CONTROL_PLE) {
|
||||
wk_data &= ~OR_CONTROL_PLE;
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
void USBHALHost::memInit() {
|
||||
volatile uint8_t *p_wk_buf = (uint8_t *)(((uint32_t)usb_buf + ALIGNE_MSK) & ~ALIGNE_MSK);
|
||||
|
||||
usb_hcca = (volatile HCCA *)p_wk_buf;
|
||||
usb_edBuf = (volatile uint8_t *)(p_wk_buf + HCCA_SIZE);
|
||||
usb_tdBuf = (volatile uint8_t *)(p_wk_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE));
|
||||
}
|
||||
|
||||
volatile uint8_t * USBHALHost::getED() {
|
||||
for (int i = 0; i < MAX_ENDPOINT; i++) {
|
||||
if ( !edBufAlloc[i] ) {
|
||||
edBufAlloc[i] = true;
|
||||
return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
|
||||
}
|
||||
}
|
||||
perror("Could not allocate ED\r\n");
|
||||
return NULL; //Could not alloc ED
|
||||
}
|
||||
|
||||
volatile uint8_t * USBHALHost::getTD() {
|
||||
int i;
|
||||
for (i = 0; i < MAX_TD; i++) {
|
||||
if ( !tdBufAlloc[i] ) {
|
||||
tdBufAlloc[i] = true;
|
||||
return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
|
||||
}
|
||||
}
|
||||
perror("Could not allocate TD\r\n");
|
||||
return NULL; //Could not alloc TD
|
||||
}
|
||||
|
||||
|
||||
void USBHALHost::freeED(volatile uint8_t * ed) {
|
||||
int i;
|
||||
i = (ed - usb_edBuf) / ED_SIZE;
|
||||
edBufAlloc[i] = false;
|
||||
}
|
||||
|
||||
void USBHALHost::freeTD(volatile uint8_t * td) {
|
||||
int i;
|
||||
i = (td - usb_tdBuf) / TD_SIZE;
|
||||
tdBufAlloc[i] = false;
|
||||
}
|
||||
|
||||
|
||||
void USBHALHost::resetRootHub() {
|
||||
// Initiate port reset
|
||||
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRS);
|
||||
|
||||
while (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_PRS);
|
||||
|
||||
// ...and clear port reset signal
|
||||
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
|
||||
}
|
||||
|
||||
|
||||
void USBHALHost::_usbisr(void) {
|
||||
if (instHost) {
|
||||
instHost->UsbIrqhandler();
|
||||
}
|
||||
}
|
||||
|
||||
void USBHALHost::UsbIrqhandler() {
|
||||
uint32_t int_status = ohciwrapp_reg_r(OHCI_REG_INTERRUPTSTATUS) & ohciwrapp_reg_r(OHCI_REG_INTERRUPTENABLE);
|
||||
|
||||
if (int_status != 0) { //Is there something to actually process?
|
||||
// Root hub status change interrupt
|
||||
if (int_status & OR_INTR_STATUS_RHSC) {
|
||||
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CSC) {
|
||||
if (ohciwrapp_reg_r(OHCI_REG_RHSTATUS) & OR_RH_STATUS_DRWE) {
|
||||
// When DRWE is on, Connect Status Change
|
||||
// means a remote wakeup event.
|
||||
} else {
|
||||
|
||||
//Root device connected
|
||||
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CCS) {
|
||||
|
||||
// wait 150ms to avoid bounce
|
||||
wait_ms(150);
|
||||
|
||||
//Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
|
||||
deviceConnected(0, 1, ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_LSDA);
|
||||
}
|
||||
|
||||
//Root device disconnected
|
||||
else {
|
||||
|
||||
if (!(int_status & OR_INTR_STATUS_WDH)) {
|
||||
usb_hcca->DoneHead = 0;
|
||||
}
|
||||
|
||||
// wait 200ms to avoid bounce
|
||||
wait_ms(200);
|
||||
|
||||
deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
|
||||
|
||||
if (int_status & OR_INTR_STATUS_WDH) {
|
||||
usb_hcca->DoneHead = 0;
|
||||
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_WDH);
|
||||
}
|
||||
}
|
||||
}
|
||||
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_CSC);
|
||||
}
|
||||
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_PRSC) {
|
||||
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
|
||||
}
|
||||
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_RHSC);
|
||||
}
|
||||
|
||||
// Writeback Done Head interrupt
|
||||
if (int_status & OR_INTR_STATUS_WDH) {
|
||||
transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
|
||||
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_WDH);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
|
@ -47,6 +47,7 @@ bool USBHostMouse::connected() {
|
|||
}
|
||||
|
||||
bool USBHostMouse::connect() {
|
||||
int len_listen;
|
||||
|
||||
if (dev_connected) {
|
||||
return true;
|
||||
|
@ -69,7 +70,11 @@ bool USBHostMouse::connect() {
|
|||
host->registerDriver(dev, mouse_intf, this, &USBHostMouse::init);
|
||||
|
||||
int_in->attach(this, &USBHostMouse::rxHandler);
|
||||
host->interruptRead(dev, int_in, report, int_in->getSize(), false);
|
||||
len_listen = int_in->getSize();
|
||||
if (len_listen > sizeof(report)) {
|
||||
len_listen = sizeof(report);
|
||||
}
|
||||
host->interruptRead(dev, int_in, report, len_listen, false);
|
||||
|
||||
dev_connected = true;
|
||||
return true;
|
||||
|
@ -109,6 +114,10 @@ void USBHostMouse::rxHandler() {
|
|||
y = report[2];
|
||||
z = report[3];
|
||||
|
||||
if (len_listen > sizeof(report)) {
|
||||
len_listen = sizeof(report);
|
||||
}
|
||||
|
||||
if (dev)
|
||||
host->interruptRead(dev, int_in, report, len_listen, false);
|
||||
}
|
||||
|
|
|
@ -222,6 +222,9 @@ void USBHostHub::portReset(uint8_t port) {
|
|||
uint32_t status;
|
||||
USB_DBG("reset port %d on hub: %p [this: %p]", port, dev, this)
|
||||
setPortFeature(PORT_RESET_FEATURE, port);
|
||||
#if defined(TARGET_RZ_A1H)
|
||||
Thread::wait(50); // Reset release waiting for Hi-Speed check.
|
||||
#endif
|
||||
while(1) {
|
||||
status = getPortStatus(port);
|
||||
if (status & (PORT_ENABLE | PORT_RESET))
|
||||
|
|
|
@ -303,7 +303,7 @@ int USBHostMSD::getMaxLun() {
|
|||
|
||||
int USBHostMSD::disk_initialize() {
|
||||
USB_DBG("FILESYSTEM: init");
|
||||
U16 i, timeout = 10;
|
||||
uint16_t i, timeout = 10;
|
||||
|
||||
getMaxLun();
|
||||
|
||||
|
|
|
@ -71,6 +71,7 @@ bool USBHostSerial::connect() {
|
|||
{
|
||||
USBHostSerialPort::connect(host,d,port_intf,bulk_in, bulk_out);
|
||||
dev = d;
|
||||
dev_connected = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -171,6 +172,7 @@ bool USBHostMultiSerial::connect() {
|
|||
{
|
||||
ports[port]->connect(host,d,port_intf[port],bulk_in, bulk_out);
|
||||
dev = d;
|
||||
dev_connected = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -242,7 +244,7 @@ void USBHostSerialPort::connect(USBHost* _host, USBDeviceConnected * _dev,
|
|||
USB_INFO("New Serial device: VID:%04x PID:%04x [dev: %p - intf: %d]", dev->getVid(), dev->getPid(), dev, serial_intf);
|
||||
dev->setName("Serial", serial_intf);
|
||||
host->registerDriver(dev, serial_intf, this, &USBHostSerialPort::init);
|
||||
//baud(9600);
|
||||
baud(9600);
|
||||
size_bulk_in = bulk_in->getSize();
|
||||
size_bulk_out = bulk_out->getSize();
|
||||
bulk_in->attach(this, &USBHostSerialPort::rxHandler);
|
||||
|
|
|
@ -70,7 +70,7 @@ void us_ticker_insert_event(ticker_event_t *obj, timestamp_t timestamp, uint32_t
|
|||
ticker_event_t *prev = NULL, *p = head;
|
||||
while (p != NULL) {
|
||||
/* check if we come before p */
|
||||
if ((int64_t)(timestamp - p->timestamp) < 0) {
|
||||
if ((int)(timestamp - p->timestamp) < 0) {
|
||||
break;
|
||||
}
|
||||
/* go to the next element */
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef uint64_t timestamp_t;
|
||||
typedef uint32_t timestamp_t;
|
||||
|
||||
uint32_t us_ticker_read(void);
|
||||
|
||||
|
|
|
@ -150,11 +150,9 @@ void SystemInit(void)
|
|||
SCB->VTOR = (unsigned int) &g_pfnVectors;
|
||||
#endif
|
||||
|
||||
#if !defined(TOOLCHAIN_GCC)
|
||||
#if defined(__FPU_PRESENT) && __FPU_PRESENT == 1
|
||||
/* Initialize floating point */
|
||||
fpuInit();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
SystemSetupPins(pre_clock_mux, COUNT_OF(pre_clock_mux)); /* Configure pins */
|
||||
|
@ -367,7 +365,7 @@ void fpuInit(void)
|
|||
|
||||
static void WaitUs(uint32_t us)
|
||||
{
|
||||
uint32_t cyc = us * CPU_NANOSEC(1000) / 4;
|
||||
volatile uint32_t cyc = us * CPU_NANOSEC(1000) / 4;
|
||||
while (cyc--)
|
||||
;
|
||||
}
|
||||
|
|
|
@ -0,0 +1,155 @@
|
|||
/* Linker script to configure memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
|
||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 16K
|
||||
RAM (rwx) : ORIGIN = 0x20000194, LENGTH = 64K - 0x194
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
* _estack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.isr_vector))
|
||||
*(.text*)
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
__etext = .;
|
||||
_sidata = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
_sdata = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
_edata = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
_sbss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
_ebss = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_estack = __StackTop;
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
|
|
@ -0,0 +1,505 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f303xe.s
|
||||
* @author MCD Application Team
|
||||
* @version
|
||||
* @date 12-Sept-2014
|
||||
* @brief STM32F303xE devices vector table for Atollic
|
||||
* TrueSTUDIO toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
//bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
//bl main
|
||||
/**
|
||||
* Calling the crt0 'cold-start' entry point. There __libc_init_array is called
|
||||
* and when existing hardware_init_hook() and software_init_hook() before
|
||||
* starting main(). software_init_hook() is available and has to be called due
|
||||
* to initializsation when using rtos.
|
||||
*/
|
||||
bl _start
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_TSC_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_2_IRQHandler
|
||||
.word USB_HP_CAN_TX_IRQHandler
|
||||
.word USB_LP_CAN_RX0_IRQHandler
|
||||
.word CAN_RX1_IRQHandler
|
||||
.word CAN_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_TIM17_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USBWakeUp_IRQHandler
|
||||
.word TIM8_BRK_IRQHandler
|
||||
.word TIM8_UP_IRQHandler
|
||||
.word TIM8_TRG_COM_IRQHandler
|
||||
.word TIM8_CC_IRQHandler
|
||||
.word ADC3_IRQHandler
|
||||
.word FMC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word ADC4_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP1_2_3_IRQHandler
|
||||
.word COMP4_5_6_IRQHandler
|
||||
.word COMP7_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word USB_HP_IRQHandler
|
||||
.word USB_LP_IRQHandler
|
||||
.word USBWakeUp_RMP_IRQHandler
|
||||
.word TIM20_BRK_IRQHandler
|
||||
.word TIM20_UP_IRQHandler
|
||||
.word TIM20_TRG_COM_IRQHandler
|
||||
.word TIM20_CC_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word SPI4_IRQHandler
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_TSC_IRQHandler
|
||||
.thumb_set EXTI2_TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_CAN_TX_IRQHandler
|
||||
.thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_CAN_RX0_IRQHandler
|
||||
.thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN_RX1_IRQHandler
|
||||
.thumb_set CAN_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN_SCE_IRQHandler
|
||||
.thumb_set CAN_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM17_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBWakeUp_IRQHandler
|
||||
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_IRQHandler
|
||||
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_IRQHandler
|
||||
.thumb_set TIM8_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC3_IRQHandler
|
||||
.thumb_set ADC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC4_IRQHandler
|
||||
.thumb_set ADC4_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP1_2_3_IRQHandler
|
||||
.thumb_set COMP1_2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP4_5_6_IRQHandler
|
||||
.thumb_set COMP4_5_6_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP7_IRQHandler
|
||||
.thumb_set COMP7_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_IRQHandler
|
||||
.thumb_set USB_HP_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_IRQHandler
|
||||
.thumb_set USB_LP_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBWakeUp_RMP_IRQHandler
|
||||
.thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_BRK_IRQHandler
|
||||
.thumb_set TIM20_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_UP_IRQHandler
|
||||
.thumb_set TIM20_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_TRG_COM_IRQHandler
|
||||
.thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM20_CC_IRQHandler
|
||||
.thumb_set TIM20_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -375,6 +375,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
|||
}
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 72 MHz (8 MHz * 9)
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
|
@ -414,9 +415,10 @@ uint8_t SetSysClock_PLL_HSI(void)
|
|||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||
RCC_OscInitStruct.HSICalibrationValue = 16;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16)
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
|
|
|
@ -29,8 +29,7 @@ void us_ticker_init(void)
|
|||
return;
|
||||
}
|
||||
|
||||
APP_TIMER_INIT(0 /*CFG_TIMER_PRESCALER*/ , 1 /*CFG_TIMER_MAX_INSTANCE*/, 1 /*CFG_TIMER_OPERATION_QUEUE_SIZE*/, false /*CFG_SCHEDULER_ENABLE*/);
|
||||
|
||||
APP_TIMER_INIT(0 /*CFG_TIMER_PRESCALER*/ , 1 /*CFG_TIMER_MAX_INSTANCE*/, 1 /*CFG_TIMER_OPERATION_QUEUE_SIZE*/, false /*CFG_SCHEDULER_ENABLE*/);
|
||||
us_ticker_inited = true;
|
||||
}
|
||||
|
||||
|
@ -40,7 +39,7 @@ uint32_t us_ticker_read()
|
|||
us_ticker_init();
|
||||
}
|
||||
|
||||
timestamp_t value;
|
||||
uint64_t value;
|
||||
app_timer_cnt_get(&value); /* This returns the RTC counter (which is fed by the 32khz crystal clock source) */
|
||||
return ((value * 1000000) / (uint32_t)APP_TIMER_CLOCK_FREQ); /* Return a pseudo microsecond counter value.
|
||||
* This is only as precise as the 32khz low-freq
|
||||
|
@ -72,7 +71,7 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
|
|||
return;
|
||||
}
|
||||
|
||||
timestamp_t currentCounter64;
|
||||
uint64_t currentCounter64;
|
||||
app_timer_cnt_get(¤tCounter64);
|
||||
uint32_t currentCounter = currentCounter64 & MAX_RTC_COUNTER_VAL;
|
||||
uint32_t targetCounter = ((uint32_t)((timestamp * (uint64_t)APP_TIMER_CLOCK_FREQ) / 1000000) + 1) & MAX_RTC_COUNTER_VAL;
|
||||
|
@ -94,13 +93,17 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
|
|||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
if (us_ticker_appTimerRunning) {
|
||||
app_timer_stop(us_ticker_appTimerID);
|
||||
if (app_timer_stop(us_ticker_appTimerID) == NRF_SUCCESS) {
|
||||
us_ticker_appTimerRunning = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
if (us_ticker_appTimerRunning) {
|
||||
app_timer_stop(us_ticker_appTimerID);
|
||||
if (app_timer_stop(us_ticker_appTimerID) == NRF_SUCCESS) {
|
||||
us_ticker_appTimerRunning = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -78,7 +78,7 @@ typedef enum {
|
|||
P3_5 = (3 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x48,
|
||||
|
||||
// mbed DIP Pin Names (CQ board)
|
||||
p4 = P0_0,
|
||||
// p4 = P0_0,
|
||||
p5 = P0_9,
|
||||
p6 = P0_8,
|
||||
p7 = P0_6,
|
||||
|
@ -114,7 +114,7 @@ typedef enum {
|
|||
USBRX = P1_6,
|
||||
|
||||
// mbed DIP Pin Names (LPCXpresso LPC1114)
|
||||
xp4 = P0_0,
|
||||
// xp4 = P0_0,
|
||||
xp5 = P0_9,
|
||||
xp6 = P0_8,
|
||||
xp7 = P2_11,
|
||||
|
@ -173,7 +173,7 @@ typedef enum {
|
|||
dp16 = P1_7,
|
||||
dp17 = P1_8,
|
||||
dp18 = P1_9,
|
||||
dp23 = P0_0,
|
||||
// dp23 = P0_0,
|
||||
dp24 = P0_1,
|
||||
dp25 = P0_2,
|
||||
dp26 = P0_3,
|
||||
|
@ -194,7 +194,7 @@ typedef enum {
|
|||
dip16 = P1_7,
|
||||
dip17 = P1_8,
|
||||
dip18 = P1_9,
|
||||
dip23 = P0_0,
|
||||
// dip23 = P0_0,
|
||||
dip24 = P0_1,
|
||||
dip25 = P0_2,
|
||||
dip26 = P0_3,
|
||||
|
|
|
@ -86,11 +86,16 @@ inline int i2c_start(i2c_t *obj) {
|
|||
return status;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//Generate Stop condition and wait until bus is Idle
|
||||
//Will also send NAK for previous RD
|
||||
inline int i2c_stop(i2c_t *obj) {
|
||||
int timeout = 0;
|
||||
|
||||
obj->i2c->MSTCTL = (1 << 2) | (1 << 0);
|
||||
while ((obj->i2c->STAT & ((1 << 0) | (7 << 1))) != ((1 << 0) | (0 << 1))) {
|
||||
obj->i2c->MSTCTL = (1 << 2) | (1 << 0); // STP bit and Continue bit. Sends NAK to complete previous RD
|
||||
|
||||
while ((obj->i2c->STAT & ((7 << 1) | (1 << 0))) != ((0 << 1) | (1 << 0))) { //Spin until Ready (b0 == 1)and Status is Idle (b3..b1 == 000)
|
||||
timeout ++;
|
||||
if (timeout > 100000) return 1;
|
||||
}
|
||||
|
@ -98,7 +103,6 @@ inline int i2c_stop(i2c_t *obj) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
|
||||
// write the data
|
||||
I2C_DAT(obj) = value;
|
||||
|
@ -145,62 +149,82 @@ void i2c_frequency(i2c_t *obj, int hz) {
|
|||
// because something is setup wrong (e.g. wiring), and we don't need to programatically
|
||||
// check for that
|
||||
|
||||
//New version WH, Tested OK for Start and Repeated Start
|
||||
//Old version was Wrong: Calls i2c_start without setting address, i2c_do_read continues before checking status, status check for wrong value
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||
int count, status;
|
||||
|
||||
i2c_start(obj);
|
||||
|
||||
status = i2c_do_write(obj, (address | 0x01), 1);
|
||||
if (status != 0x01) {
|
||||
//Store the address+RD and then generate STA
|
||||
I2C_DAT(obj) = address | 0x01;
|
||||
i2c_start(obj);
|
||||
|
||||
// Wait for completion of STA and Sending of SlaveAddress+RD and first Read byte
|
||||
i2c_wait_SI(obj);
|
||||
status = i2c_status(obj);
|
||||
if (status == 0x03) { // NAK on SlaveAddress
|
||||
i2c_stop(obj);
|
||||
return I2C_ERROR_NO_SLAVE;
|
||||
}
|
||||
|
||||
|
||||
// Read in all except last byte
|
||||
for (count = 0; count < (length - 1); count++) {
|
||||
int value = i2c_do_read(obj, 0);
|
||||
status = i2c_status(obj);
|
||||
if (status != 0x00) {
|
||||
i2c_stop(obj);
|
||||
return count;
|
||||
}
|
||||
data[count] = (char) value;
|
||||
}
|
||||
|
||||
// read in last byte
|
||||
int value = i2c_do_read(obj, 1);
|
||||
status = i2c_status(obj);
|
||||
if (status != 0x01) {
|
||||
for (count = 0; count < (length-1); count++) {
|
||||
|
||||
// Wait for it to arrive, note that first byte read after address+RD is already waiting
|
||||
i2c_wait_SI(obj);
|
||||
status = i2c_status(obj);
|
||||
if (status != 0x01) { // RX RDY
|
||||
i2c_stop(obj);
|
||||
return length - 1;
|
||||
return count;
|
||||
}
|
||||
data[count] = I2C_DAT(obj) & 0xFF; // Store read byte
|
||||
|
||||
obj->i2c->MSTCTL = (1 << 0); // Send ACK and Continue to read
|
||||
}
|
||||
|
||||
data[count] = (char) value;
|
||||
|
||||
// Read final byte
|
||||
// Wait for it to arrive
|
||||
i2c_wait_SI(obj);
|
||||
|
||||
status = i2c_status(obj);
|
||||
if (status != 0x01) { // RX RDY
|
||||
i2c_stop(obj);
|
||||
return count;
|
||||
}
|
||||
data[count] = I2C_DAT(obj) & 0xFF; // Store final read byte
|
||||
|
||||
// If not repeated start, send stop.
|
||||
if (stop) {
|
||||
i2c_stop(obj);
|
||||
i2c_stop(obj); // Also sends NAK for last read byte
|
||||
} else {
|
||||
repeated_start = 1;
|
||||
}
|
||||
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//New version WH, Tested OK for Start and Repeated Start
|
||||
//Old version was Wrong: Calls i2c_start without setting address first
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||
int i, status;
|
||||
|
||||
|
||||
//Store the address+/WR and then generate STA
|
||||
I2C_DAT(obj) = address & 0xFE;
|
||||
i2c_start(obj);
|
||||
|
||||
status = i2c_do_write(obj, (address & 0xFE), 1);
|
||||
if (status != 0x02) {
|
||||
// Wait for completion of STA and Sending of SlaveAddress+/WR
|
||||
i2c_wait_SI(obj);
|
||||
status = i2c_status(obj);
|
||||
if (status == 0x03) { // NAK SlaveAddress
|
||||
i2c_stop(obj);
|
||||
return I2C_ERROR_NO_SLAVE;
|
||||
}
|
||||
|
||||
//Write all bytes
|
||||
for (i=0; i<length; i++) {
|
||||
status = i2c_do_write(obj, data[i], 0);
|
||||
if (status != 0x02) {
|
||||
if (status != 0x02) { // TX RDY. Handles a Slave NAK on datawrite
|
||||
i2c_stop(obj);
|
||||
return i;
|
||||
}
|
||||
|
@ -216,6 +240,8 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
|||
return length;
|
||||
}
|
||||
|
||||
|
||||
|
||||
void i2c_reset(i2c_t *obj) {
|
||||
i2c_stop(obj);
|
||||
}
|
||||
|
|
|
@ -30,7 +30,7 @@ extern "C" {
|
|||
#define MBED_UART0 P0_7, P0_18
|
||||
#define MBED_UARTUSB USBTX, USBRX
|
||||
|
||||
#define MBED_I2C0 P0_10, P0_11
|
||||
#define MBED_I2C0 P0_11, P0_10
|
||||
|
||||
typedef enum {
|
||||
ADC_0 = 0,
|
||||
|
|
|
@ -102,10 +102,10 @@ typedef enum {
|
|||
USBRX = P0_18,
|
||||
|
||||
// I2C pins
|
||||
SDA = P0_10,
|
||||
SCL = P0_11,
|
||||
I2C_SDA = P0_10,
|
||||
I2C_SCL = P0_11,
|
||||
SCL = P0_10,
|
||||
SDA = P0_11,
|
||||
I2C_SCL = P0_10,
|
||||
I2C_SDA = P0_11,
|
||||
|
||||
// Not connected
|
||||
NC = (int)0xFFFFFFFF,
|
||||
|
|
|
@ -30,7 +30,7 @@ extern "C" {
|
|||
#define MBED_UART0 P0_7, P0_18
|
||||
#define MBED_UARTUSB USBTX, USBRX
|
||||
|
||||
#define MBED_I2C0 P0_10, P0_11
|
||||
#define MBED_I2C0 P0_11, P0_10
|
||||
|
||||
typedef enum {
|
||||
ADC_0 = 0,
|
||||
|
|
|
@ -102,10 +102,10 @@ typedef enum {
|
|||
USBRX = P0_18,
|
||||
|
||||
// I2C pins
|
||||
SDA = P0_10,
|
||||
SCL = P0_11,
|
||||
I2C_SDA = P0_10,
|
||||
I2C_SCL = P0_11,
|
||||
SCL = P0_10,
|
||||
SDA = P0_11,
|
||||
I2C_SCL = P0_10,
|
||||
I2C_SDA = P0_11,
|
||||
|
||||
// Not connected
|
||||
NC = (int)0xFFFFFFFF,
|
||||
|
|
|
@ -39,62 +39,125 @@
|
|||
#define EDGE_BOTH (3)
|
||||
|
||||
#define CHANNEL_NUM (7)
|
||||
// Max pins for one line (max with EXTI10_15)
|
||||
#define MAX_PIN_LINE (6)
|
||||
|
||||
static uint32_t channel_ids[CHANNEL_NUM] = {0, 0, 0, 0, 0, 0, 0};
|
||||
static uint32_t channel_gpio[CHANNEL_NUM] = {0, 0, 0, 0, 0, 0, 0};
|
||||
static uint32_t channel_pin[CHANNEL_NUM] = {0, 0, 0, 0, 0, 0, 0};
|
||||
typedef struct gpio_channel {
|
||||
uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
|
||||
uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
|
||||
uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
|
||||
uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
|
||||
} gpio_channel_t;
|
||||
|
||||
static gpio_channel_t channels[CHANNEL_NUM] = {
|
||||
{.pin_mask = 0},
|
||||
{.pin_mask = 0},
|
||||
{.pin_mask = 0},
|
||||
{.pin_mask = 0},
|
||||
{.pin_mask = 0},
|
||||
{.pin_mask = 0},
|
||||
{.pin_mask = 0}
|
||||
};
|
||||
|
||||
// Used to return the index for channels array.
|
||||
static uint32_t pin_base_nr[16] = {
|
||||
// EXTI0
|
||||
0, // pin 0
|
||||
// EXTI1
|
||||
0, // pin 1
|
||||
// EXTI2
|
||||
0, // pin 2
|
||||
// EXTI3
|
||||
0, // pin 3
|
||||
// EXTI4
|
||||
0, // pin 4
|
||||
// EXTI5_9
|
||||
0, // pin 5
|
||||
1, // pin 6
|
||||
2, // pin 7
|
||||
3, // pin 8
|
||||
4, // pin 9
|
||||
// EXTI10_15
|
||||
0, // pin 10
|
||||
1, // pin 11
|
||||
2, // pin 12
|
||||
3, // pin 13
|
||||
4, // pin 14
|
||||
5 // pin 15
|
||||
};
|
||||
|
||||
static gpio_irq_handler irq_handler;
|
||||
|
||||
static void handle_interrupt_in(uint32_t irq_index)
|
||||
static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
|
||||
{
|
||||
// Retrieve the gpio and pin that generate the irq
|
||||
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[irq_index]);
|
||||
uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
|
||||
gpio_channel_t *gpio_channel = &channels[irq_index];
|
||||
uint32_t gpio_idx;
|
||||
|
||||
// Clear interrupt flag
|
||||
if (EXTI_GetITStatus(pin) != RESET) {
|
||||
EXTI_ClearITPendingBit(pin);
|
||||
}
|
||||
for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
|
||||
uint32_t current_mask = (1 << gpio_idx);
|
||||
|
||||
if (channel_ids[irq_index] == 0) return;
|
||||
if (gpio_channel->pin_mask & current_mask) {
|
||||
// Retrieve the gpio and pin that generate the irq
|
||||
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
|
||||
uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
|
||||
|
||||
// Check which edge has generated the irq
|
||||
if ((gpio->IDR & pin) == 0) {
|
||||
irq_handler(channel_ids[irq_index], IRQ_FALL);
|
||||
} else {
|
||||
irq_handler(channel_ids[irq_index], IRQ_RISE);
|
||||
// Clear interrupt flag
|
||||
if (EXTI_GetITStatus(pin) != RESET) {
|
||||
EXTI_ClearITPendingBit(pin);
|
||||
|
||||
if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
|
||||
|
||||
// Check which edge has generated the irq
|
||||
if ((gpio->IDR & pin) == 0) {
|
||||
irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
|
||||
} else {
|
||||
irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// The irq_index is passed to the function
|
||||
// EXTI line 0
|
||||
static void gpio_irq0(void)
|
||||
{
|
||||
handle_interrupt_in(0); // EXTI line 0
|
||||
handle_interrupt_in(0, 1);
|
||||
}
|
||||
|
||||
// EXTI line 1
|
||||
static void gpio_irq1(void)
|
||||
{
|
||||
handle_interrupt_in(1); // EXTI line 1
|
||||
handle_interrupt_in(1, 1);
|
||||
}
|
||||
|
||||
// EXTI line 2
|
||||
static void gpio_irq2(void)
|
||||
{
|
||||
handle_interrupt_in(2); // EXTI line 2
|
||||
handle_interrupt_in(2, 1);
|
||||
}
|
||||
|
||||
// EXTI line 3
|
||||
static void gpio_irq3(void)
|
||||
{
|
||||
handle_interrupt_in(3); // EXTI line 3
|
||||
handle_interrupt_in(3, 1);
|
||||
}
|
||||
|
||||
// EXTI line 4
|
||||
static void gpio_irq4(void)
|
||||
{
|
||||
handle_interrupt_in(4); // EXTI line 4
|
||||
handle_interrupt_in(4, 1);
|
||||
}
|
||||
|
||||
// EXTI lines 5 to 9
|
||||
static void gpio_irq5(void)
|
||||
{
|
||||
handle_interrupt_in(5); // EXTI lines 5 to 9
|
||||
handle_interrupt_in(5, 5);
|
||||
}
|
||||
|
||||
// EXTI lines 10 to 15
|
||||
static void gpio_irq6(void)
|
||||
{
|
||||
handle_interrupt_in(6); // EXTI lines 10 to 15
|
||||
handle_interrupt_in(6, 6);
|
||||
}
|
||||
|
||||
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
|
||||
|
@ -104,6 +167,8 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
|
|||
IRQn_Type irq_n = (IRQn_Type)0;
|
||||
uint32_t vector = 0;
|
||||
uint32_t irq_index;
|
||||
gpio_channel_t *gpio_channel;
|
||||
uint32_t gpio_idx;
|
||||
|
||||
if (pin == NC) return -1;
|
||||
|
||||
|
@ -193,9 +258,14 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
|
|||
obj->irq_n = irq_n;
|
||||
obj->irq_index = irq_index;
|
||||
obj->event = EDGE_NONE;
|
||||
channel_ids[irq_index] = id;
|
||||
channel_gpio[irq_index] = gpio_add;
|
||||
channel_pin[irq_index] = pin_index;
|
||||
obj->pin = pin;
|
||||
|
||||
gpio_channel = &channels[irq_index];
|
||||
gpio_idx = pin_base_nr[pin_index];
|
||||
gpio_channel->pin_mask |= (1 << gpio_idx);
|
||||
gpio_channel->channel_ids[gpio_idx] = id;
|
||||
gpio_channel->channel_gpio[gpio_idx] = gpio_add;
|
||||
gpio_channel->channel_pin[gpio_idx] = pin_index;
|
||||
|
||||
irq_handler = handler;
|
||||
|
||||
|
@ -204,21 +274,29 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
|
|||
|
||||
void gpio_irq_free(gpio_irq_t *obj)
|
||||
{
|
||||
channel_ids[obj->irq_index] = 0;
|
||||
channel_gpio[obj->irq_index] = 0;
|
||||
channel_pin[obj->irq_index] = 0;
|
||||
gpio_channel_t *gpio_channel = &channels[obj->irq_index];
|
||||
uint32_t pin_index = STM_PIN(obj->pin);
|
||||
uint32_t gpio_idx = pin_base_nr[pin_index];
|
||||
|
||||
gpio_channel->pin_mask &= ~(1 << gpio_idx);
|
||||
gpio_channel->channel_ids[gpio_idx] = 0;
|
||||
gpio_channel->channel_gpio[gpio_idx] = 0;
|
||||
gpio_channel->channel_pin[gpio_idx] = 0;
|
||||
|
||||
// Disable EXTI line
|
||||
EXTI_InitTypeDef EXTI_InitStructure;
|
||||
EXTI_StructInit(&EXTI_InitStructure);
|
||||
EXTI_Init(&EXTI_InitStructure);
|
||||
|
||||
pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_Out_PP, 0));
|
||||
pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_IN_FLOATING, 0));
|
||||
obj->event = EDGE_NONE;
|
||||
}
|
||||
|
||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
|
||||
{
|
||||
EXTI_InitTypeDef EXTI_InitStructure;
|
||||
|
||||
uint32_t pin_index = channel_pin[obj->irq_index];
|
||||
uint32_t pin_index = STM_PIN(obj->pin);
|
||||
|
||||
EXTI_InitStructure.EXTI_Line = (uint32_t)(1 << pin_index);
|
||||
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
|
||||
|
|
|
@ -43,6 +43,7 @@ struct gpio_irq_s {
|
|||
IRQn_Type irq_n;
|
||||
uint32_t irq_index;
|
||||
uint32_t event;
|
||||
PinName pin;
|
||||
};
|
||||
|
||||
struct port_s {
|
||||
|
|
|
@ -304,10 +304,10 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL}
|
|||
#endif
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern unsigned char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
#define HEAP_START (Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif defined(__GNUC__)
|
||||
extern unsigned char __end__[];
|
||||
extern uint32_t __end__[];
|
||||
#define HEAP_START (__end__)
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma section="HEAP"
|
||||
|
|
|
@ -89,6 +89,7 @@ int main()
|
|||
printf("SD: Reading data ... ");
|
||||
FILE *f = fopen(sd_file_path, "r");
|
||||
if (f) {
|
||||
read_result = true;
|
||||
for (int i = 0; i < DATA_SIZE; i++) {
|
||||
uint8_t data = fgetc(f);
|
||||
if (data != data_written[i]) {
|
||||
|
|
|
@ -85,7 +85,7 @@ def export(project_path, project_name, ide, target, destination='/tmp/',
|
|||
zip_path = None
|
||||
if report['success']:
|
||||
# add readme file to every offline export.
|
||||
open(tempdir+"\\README.html",'w').write('<meta http-equiv="refresh" content="0; url=http://developer.mbed.org/handbook/ExportToOfflineToolchain#%s#%s"/>'% (target,ide))
|
||||
open(os.path.join(tempdir, 'README.html'),'w').write('<meta http-equiv="refresh" content="0; url=http://developer.mbed.org/handbook/ExportToOfflineToolchain#%s#%s"/>'% (target,ide))
|
||||
zip_path = zip_working_directory_and_clean_up(tempdir, destination, project_name, clean)
|
||||
|
||||
return zip_path, report
|
||||
|
|
|
@ -31,6 +31,7 @@ class Uvision4(Exporter):
|
|||
'K64F',
|
||||
'K22F',
|
||||
'K20D50M',
|
||||
'TEENSY3_1',
|
||||
'LPC1347',
|
||||
'LPC1114',
|
||||
'LPC11C24',
|
||||
|
|
|
@ -0,0 +1,204 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>mbed TEENSY3_1</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>14</CpuCode>
|
||||
<Books>
|
||||
<Book>
|
||||
<Number>0</Number>
|
||||
<Title>Data Sheet</Title>
|
||||
<Path>DATASHTS\Freescale\K20PB.pdf</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>1</Number>
|
||||
<Title>Technical Reference Manual</Title>
|
||||
<Path>datashts\arm\cortex_m4\r0p1\DDI0439C_CORTEX_M4_R0P1_TRM.PDF</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>2</Number>
|
||||
<Title>Generic User Guide</Title>
|
||||
<Path>datashts\arm\cortex_m4\r0p1\DUI0553A_CORTEX_M4_DGUG.PDF</Path>
|
||||
</Book>
|
||||
</Books>
|
||||
<DllOpt>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments></SimDllArguments>
|
||||
<SimDlgDllName>DCM.DLL</SimDlgDllName>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDllName>TCM.DLL</TargetDlgDllName>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOpt>
|
||||
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>14</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ULP2CM3</Key>
|
||||
<Name>-O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P128_50MHZ -FS00 -FL020000)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"MBED CMSIS-DAP" -UA000000001 -O462 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BC11477) -L00(0) -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P128_50MHZ -FS00 -FL020000</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>src</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>8</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<Focus>0</Focus>
|
||||
<ColumnNumber>0</ColumnNumber>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<TopLine>1</TopLine>
|
||||
<CurrentLine>2</CurrentLine>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>main.cpp</PathWithFileName>
|
||||
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
|
@ -0,0 +1,423 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>mbed TEENSY3_1</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>MK20DX256xxx7</Device>
|
||||
<Vendor>Freescale</Vendor>
|
||||
<Cpu>IRAM(0x1FFF8000-0x1FFFFFFF) IRAM2(0x20000000-0x20007FFF) IROM(0x0-0x3FFFF) IROM2(0x10000000-0x10007FFF) CLOCK(12000000) CPUTYPE("Cortex-M4") ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile>"STARTUP\Freescale\Kinetis\startup_MK20D7.s" ("Freescale MK20Xxxxxxx7 Startup Code")</StartupFile>
|
||||
<FlashDriverDll>ULP2CM3(-O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN2 -FF0MK_P256 -FS00 -FL040000 -FF1MK_D32_72MHZ -FS110000000 -FL108000)</FlashDriverDll>
|
||||
<DeviceId>6298</DeviceId>
|
||||
<RegisterFile>MK20D7.H</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>SFD\Freescale\Kinetis\MK20D5.sfr</SFDFile>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath>Freescale\Kinetis\</RegisterFilePath>
|
||||
<DBRegisterFilePath>Freescale\Kinetis\</DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\</OutputDirectory>
|
||||
<OutputName>{{name}}</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin -o build\{{name}}_K20D5M.bin build\{{name}}.axf</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments></SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>14</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>BIN\CMSIS_AGDI.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4105</DriverSelection>
|
||||
</Flash1>
|
||||
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x1fffe000</StartAddress>
|
||||
<Size>0x2000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x1fffe000</StartAddress>
|
||||
<Size>0x2000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x2000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<VariousControls>
|
||||
<MiscControls>{% for flag in flags %}{{flag}} {% endfor %}</MiscControls>
|
||||
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x10000000</DataAddressRange>
|
||||
<ScatterFile>{{scatter_file}}</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc>
|
||||
{% for file in object_files %}
|
||||
{{file}}
|
||||
{% endfor %}
|
||||
</Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
{% for group,files in source_files %}
|
||||
<Group>
|
||||
<GroupName>{{group}}</GroupName>
|
||||
<Files>
|
||||
{% for file in files %}
|
||||
<File>
|
||||
<FileName>{{file.name}}</FileName>
|
||||
<FileType>{{file.type}}</FileType>
|
||||
<FilePath>{{file.path}}</FilePath>
|
||||
{%if file.type == "1" %}
|
||||
<FileOption>
|
||||
<FileArmAds>
|
||||
<Cads>
|
||||
<VariousControls>
|
||||
<MiscControls>--c99</MiscControls>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
</FileArmAds>
|
||||
</FileOption>
|
||||
{% endif %}
|
||||
</File>
|
||||
{% endfor %}
|
||||
</Files>
|
||||
</Group>
|
||||
{% endfor %}
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
|
@ -519,7 +519,7 @@ class NUCLEO_F303RE(Target):
|
|||
Target.__init__(self)
|
||||
self.core = "Cortex-M4F"
|
||||
self.extra_labels = ['STM', 'STM32F3', 'STM32F303RE']
|
||||
self.supported_toolchains = ["ARM", "uARM", "IAR"]
|
||||
self.supported_toolchains = ["ARM", "uARM", "IAR", "GCC_ARM"]
|
||||
self.default_toolchain = "uARM"
|
||||
self.supported_form_factors = ["ARDUINO", "MORPHO"]
|
||||
self.detect_code = ["0706"]
|
||||
|
|
Loading…
Reference in New Issue