From 1fa4dff010de183884d175fcb3c1740a59f936d7 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 7 Jun 2019 17:16:10 +0200 Subject: [PATCH] STM32F1 warning compilation [-Wparentheses-equality] --- .../TARGET_STM32F1/device/stm32f1xx_hal_adc.c | 2 +- .../device/stm32f1xx_hal_adc_ex.c | 2 +- .../TARGET_STM32F1/device/stm32f1xx_hal_tim.c | 28 +++++++++---------- .../device/stm32f1xx_hal_tim_ex.c | 12 ++++---- .../device/stm32f1xx_hal_usart.c | 2 +- 5 files changed, 23 insertions(+), 23 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c index 6e4c54dd8f..8fb28d6cbb 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c @@ -1765,7 +1765,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)) + if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c index 7ab6aa80fe..2489977a51 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c @@ -1225,7 +1225,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)) + if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c index db203f8f95..e44229fffe 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c @@ -389,11 +389,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat /* Check the parameters */ assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if((pData == 0U) && (Length > 0U)) { @@ -781,11 +781,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if(((uint32_t)pData == 0U) && (Length > 0U)) { @@ -1289,11 +1289,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if(((uint32_t)pData == 0U) && (Length > 0U)) { @@ -1770,11 +1770,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if((pData == 0U) && (Length > 0U)) { @@ -2593,11 +2593,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch /* Check the parameters */ assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U)) { @@ -3340,11 +3340,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if((BurstBuffer == 0U) && (BurstLength > 0U)) { @@ -3563,11 +3563,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if((BurstBuffer == 0U) && (BurstLength > 0U)) { diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c index f67ee6d859..4321ef6669 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c @@ -393,11 +393,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32 /* Check the parameters */ assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if(((uint32_t)pData == 0U) && (Length > 0U)) { @@ -683,11 +683,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan /* Check the parameters */ assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if(((uint32_t)pData == 0U) && (Length > 0U)) { @@ -1056,11 +1056,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha /* Check the parameters */ assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - if((htim->State == HAL_TIM_STATE_BUSY)) + if(htim->State == HAL_TIM_STATE_BUSY) { return HAL_BUSY; } - else if((htim->State == HAL_TIM_STATE_READY)) + else if(htim->State == HAL_TIM_STATE_READY) { if(((uint32_t)pData == 0U) && (Length > 0U)) { diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c index f7ff93a2a5..edc05ac0f2 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c @@ -2282,7 +2282,7 @@ static void USART_SetConfig(USART_HandleTypeDef *husart) CLEAR_BIT(husart->Instance->CR3, (uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)); /*-------------------------- USART BRR Configuration -----------------------*/ - if((husart->Instance == USART1)) + if(husart->Instance == USART1) { husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate); }